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14 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
15 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
37 class BranchProbabilityInfo;
38 class LegacyDivergenceAnalysis;
41 class MachineFunction;
43 class MachineRegisterInfo;
213 assert(R == 0 &&
"Already initialized this value register!");
221 if (!LiveOutRegInfo.inBounds(
Reg))
242 if (NumSignBits == 1 && Known.
isUnknown())
245 LiveOutRegInfo.grow(
Reg);
268 LiveOutRegInfo.grow(
Reg);
269 LiveOutRegInfo[
Reg].IsValid =
false;
289 #endif // LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
This class represents an incoming formal argument to a Function.
union llvm::FunctionLoweringInfo::StatepointRelocationRecord::payload_t payload
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block.
This is an optimization pass for GlobalISel generic memory operations.
void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)
set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...
void AddLiveOutRegInfo(Register Reg, unsigned NumSignBits, const KnownBits &Known)
AddLiveOutRegInfo - Adds LiveOutInfo for a register.
unsigned ExceptionPointerVirtReg
If the current MBB is a landing pad, the exception pointer and exception selector registers are copie...
unsigned ExceptionSelectorVirtReg
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
MachineBasicBlock::iterator InsertPt
MBB - The current insert position inside the current block.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Helper object to track which of three possible relocation mechanisms are used for a particular value ...
bool isUnknown() const
Returns true if we don't know any bits.
DenseSet< Register > RegsWithFixups
Reg
All possible values of the reg field in the ModR/M byte.
The instances of the Type class are immutable: once they are created, they are never changed.
MachineBasicBlock * MBB
MBB - The current block.
bool isExportedInst(const Value *V) const
isExportedInst - Return true if the specified value is an instruction exported from its block.
DenseMap< const Value *, Register > ValueMap
ValueMap - Since we emit code for the function a basic block at a time, we must remember which virtua...
BitVector DescribedArgs
Bitvector with a bit set if corresponding argument is described in ArgDbgValues.
bool CanLowerReturn
CanLowerReturn - true iff the function's return value can be lowered to registers.
const Value * getValueFromVirtualReg(Register Vreg)
This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...
SmallVector< unsigned, 50 > StatepointStackSlots
StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...
Register DemoteRegister
DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg allocated to hold a pointer to ...
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Analysis providing branch probability information.
void ComputePHILiveOutRegInfo(const PHINode *)
ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination register based on the LiveOutI...
const LiveOutInfo * GetLiveOutRegInfo(Register Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
bool isTokenTy() const
Return true if this is 'token'.
BranchProbabilityInfo * BPI
Register InitializeRegForValue(const Value *V)
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
unsigned OrigNumPHINodesToUpdate
Implements a dense probed hash-table based set.
const TargetLowering * TLI
bool SplitCSR
True if part of the CSRs will be handled via explicit copies.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
DenseMap< const Value *, Register > CatchPadExceptionPointers
Track virtual registers created for exception pointers.
Register CreateRegs(const Value *V)
@ BasicBlock
Various leaf nodes.
DenseMap< const Argument *, int > ByValArgFrameIndexMap
ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
Type * getType() const
All values are typed, get the type of this value.
DenseMap< const Instruction *, StatepointSpillMapTy > StatepointRelocationMaps
Wrapper class representing virtual and physical registers.
SmallPtrSet< const BasicBlock *, 4 > VisitedBBs
VisitedBBs - The set of basic blocks visited thus far by instruction selection.
void InvalidatePHILiveOutRegInfo(const PHINode *PN)
InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be called when a block is visited b...
void clear()
clear - Clear out all the function-specific state.
constexpr unsigned BitWidth
iterator find(const KeyT &Val)
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
DenseMap< Register, Register > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
DenseMap< Register, const Value * > VirtReg2Value
VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.
std::vector< std::pair< MachineInstr *, unsigned > > PHINodesToUpdate
PHINodesToUpdate - A list of phi instructions whose operand list will be updated after processing the...
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
const LegacyDivergenceAnalysis * DA
LLVM Value Representation.
enum llvm::FunctionLoweringInfo::StatepointRelocationRecord::RelocType type
Register CreateReg(MVT VT, bool isDivergent=false)
CreateReg - Allocate a single virtual register for the given type.
MachineRegisterInfo * RegInfo
Register getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.