29#define DEBUG_TYPE "si-lower-wwm-copies"
71char SILowerWWMCopies::
ID = 0;
93 Register PhysReg = VRM->getPhys(Reg);
95 "should have allocated a physical register");
97 MFI->allocateWWMSpill(MF, PhysReg);
105 auto *LISWrapper = getAnalysisIfAvailable<LiveIntervalsWrapperPass>();
106 LIS = LISWrapper ? &LISWrapper->getLIS() :
nullptr;
107 auto *SIWrapper = getAnalysisIfAvailable<SlotIndexesWrapperPass>();
108 Indexes = SIWrapper ? &SIWrapper->getSI() :
nullptr;
109 VRM = getAnalysisIfAvailable<VirtRegMap>();
110 TRI =
ST.getRegisterInfo();
113 if (!MFI->hasVRegFlags())
116 bool Changed =
false;
119 if (
MI.getOpcode() != AMDGPU::WWM_COPY)
129 Register RegForExecCopy = MFI->getSGPRForEXECCopy();
130 TII->insertScratchExecCopy(MF,
MBB, InsertPt,
DL, RegForExecCopy,
131 isSCCLiveAtMI(
MI), Indexes);
132 TII->restoreExec(MF,
MBB, ++InsertPt,
DL, RegForExecCopy, Indexes);
133 addToWWMSpills(MF,
MI.getOperand(0).getReg());
137 MI.setDesc(
TII->get(AMDGPU::COPY));
unsigned const MachineRegisterInfo * MRI
Provides AMDGPU specific target descriptions.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
AMD GCN specific subclass of TargetSubtarget.
const HexagonInstrInfo * TII
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS_DEPENDENCY(depName)
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Represent the analysis usage information of a pass.
void setPreservesAll()
Set by analyses that do not transform their input at all.
This class represents the liveness of a register, stack slot, etc.
bool liveAt(SlotIndex index) const
static MCRegister from(unsigned Val)
Check the provided unsigned value is a valid MCRegister.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Representation of each machine instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Wrapper class representing virtual and physical registers.
This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which inter...
SlotIndex - An opaque wrapper around machine indexes.
StringRef - Represent a constant reference to a string, i.e.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
char & SILowerWWMCopiesID
void initializeSILowerWWMCopiesPass(PassRegistry &)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.