ARMExpandPseudoInsts.cpp File Reference

#include "ARM.h"
#include "ARMBaseInstrInfo.h"
#include "ARMBaseRegisterInfo.h"
#include "ARMConstantPoolValue.h"
#include "ARMMachineFunctionInfo.h"
#include "ARMSubtarget.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Support/Debug.h"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "arm-pseudo"
#define	ARM_EXPAND_PSEUDO_NAME   "ARM pseudo instruction expansion pass"

Functions
	INITIALIZE_PASS (ARMExpandPseudo, DEBUG_TYPE, ARM_EXPAND_PSEUDO_NAME, false, false) namespace
static const NEONLdStTableEntry *	LookupNEONLdSt (unsigned Opcode)
	LookupNEONLdSt - Search the NEONLdStTable for information about a NEON load or store pseudo instruction.
static void	GetDSubRegs (unsigned Reg, NEONRegSpacing RegSpc, const TargetRegisterInfo *TRI, MCRegister &D0, MCRegister &D1, MCRegister &D2, MCRegister &D3)
	GetDSubRegs - Get 4 D subregisters of a Q, QQ, or QQQQ register, corresponding to the specified register spacing.
static bool	IsAnAddressOperand (const MachineOperand &MO)
static MachineOperand	makeImplicit (const MachineOperand &MO)
static MachineOperand	getMovOperand (const MachineOperand &MO, unsigned TargetFlag)
static void	determineGPRegsToClear (const MachineInstr &MI, const std::initializer_list< unsigned > &Regs, SmallVectorImpl< unsigned > &ClearRegs)
static bool	determineFPRegsToClear (const MachineInstr &MI, BitVector &ClearRegs)
static bool	definesOrUsesFPReg (const MachineInstr &MI)
static void	addExclusiveRegPair (MachineInstrBuilder &MIB, MachineOperand &Reg, unsigned Flags, bool IsThumb, const TargetRegisterInfo *TRI)
	ARM's ldrexd/strexd take a consecutive register pair (represented as a single GPRPair register), Thumb's take two separate registers so we need to extract the subregs from the pair.
static void	CMSEPushCalleeSaves (const TargetInstrInfo &TII, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register JumpReg, const LivePhysRegs &LiveRegs, bool Thumb1Only)
static void	CMSEPopCalleeSaves (const TargetInstrInfo &TII, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, bool Thumb1Only)

Variables
static cl::opt< bool >	VerifyARMPseudo ("verify-arm-pseudo-expand", cl::Hidden, cl::desc("Verify machine code after expanding ARM pseudos"))
static const NEONLdStTableEntry	NEONLdStTable []
static const int	CMSE_FP_SAVE_SIZE = 136

Macro Definition Documentation

ARM_EXPAND_PSEUDO_NAME

#define ARM_EXPAND_PSEUDO_NAME   "ARM pseudo instruction expansion pass"

Definition at line 38 of file ARMExpandPseudoInsts.cpp.

Referenced by INITIALIZE_PASS().

DEBUG_TYPE

#define DEBUG_TYPE   "arm-pseudo"

Definition at line 32 of file ARMExpandPseudoInsts.cpp.

Function Documentation

addExclusiveRegPair()

void addExclusiveRegPair ( MachineInstrBuilder & MIB, MachineOperand & Reg, unsigned Flags, bool IsThumb, const TargetRegisterInfo * TRI )

static

ARM's ldrexd/strexd take a consecutive register pair (represented as a single GPRPair register), Thumb's take two separate registers so we need to extract the subregs from the pair.

Definition at line 1961 of file ARMExpandPseudoInsts.cpp.

References llvm::MachineInstrBuilder::addReg(), Reg, and TRI.

CMSEPopCalleeSaves()

void CMSEPopCalleeSaves ( const TargetInstrInfo & TII, MachineBasicBlock & MBB, MachineBasicBlock::iterator MBBI, bool Thumb1Only )

static

Definition at line 2144 of file ARMExpandPseudoInsts.cpp.

References llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addReg(), llvm::ARMCC::AL, llvm::BuildMI(), llvm::RegState::Define, DL, llvm::RegState::Kill, MBB, MBBI, llvm::predOps(), Reg, and TII.

CMSEPushCalleeSaves()

void CMSEPushCalleeSaves ( const TargetInstrInfo & TII, MachineBasicBlock & MBB, MachineBasicBlock::iterator MBBI, Register JumpReg, const LivePhysRegs & LiveRegs, bool Thumb1Only )

static

Definition at line 2082 of file ARMExpandPseudoInsts.cpp.

References llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addReg(), llvm::ARMCC::AL, llvm::BuildMI(), DL, llvm::RegState::Kill, MBB, MBBI, llvm::predOps(), Reg, TII, and llvm::RegState::Undef.

definesOrUsesFPReg()

bool definesOrUsesFPReg ( const MachineInstr & MI )

static

Definition at line 1786 of file ARMExpandPseudoInsts.cpp.

References MI, and Reg.

determineFPRegsToClear()

bool determineFPRegsToClear ( const MachineInstr & MI, BitVector & ClearRegs )

static

Definition at line 1211 of file ARMExpandPseudoInsts.cpp.

References MI, Reg, and llvm::BitVector::reset().

determineGPRegsToClear()

void determineGPRegsToClear ( const MachineInstr & MI, const std::initializer_list< unsigned > & Regs, SmallVectorImpl< unsigned > & ClearRegs )

static

Definition at line 1161 of file ARMExpandPseudoInsts.cpp.

References llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::SmallVectorTemplateCommon< T, typename >::end(), MI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::sort().

GetDSubRegs()

void GetDSubRegs ( unsigned Reg, NEONRegSpacing RegSpc, const TargetRegisterInfo * TRI, MCRegister & D0, MCRegister & D1, MCRegister & D2, MCRegister & D3 )

static

GetDSubRegs - Get 4 D subregisters of a Q, QQ, or QQQQ register, corresponding to the specified register spacing.

Not all of the results are necessarily valid, e.g., a Q register only has 2 D subregisters.

Definition at line 517 of file ARMExpandPseudoInsts.cpp.

References assert(), Reg, and TRI.

getMovOperand()

MachineOperand getMovOperand ( const MachineOperand & MO, unsigned TargetFlag )

static

Definition at line 953 of file ARMExpandPseudoInsts.cpp.

References llvm::MachineOperand::CreateES(), llvm::MachineOperand::CreateGA(), llvm::MachineOperand::CreateImm(), llvm::MachineOperand::CreateJTI(), llvm::MachineOperand::getGlobal(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineOperand::getOffset(), llvm::MachineOperand::getSymbolName(), llvm::MachineOperand::getTargetFlags(), llvm::MachineOperand::getType(), llvm_unreachable, llvm::MachineOperand::MO_ExternalSymbol, llvm::ARMII::MO_HI16, llvm::ARMII::MO_HI_0_7, llvm::ARMII::MO_HI_8_15, llvm::MachineOperand::MO_Immediate, llvm::MachineOperand::MO_JumpTableIndex, llvm::ARMII::MO_LO16, llvm::ARMII::MO_LO_0_7, and llvm::ARMII::MO_LO_8_15.

INITIALIZE_PASS()

INITIALIZE_PASS	(	ARMExpandPseudo	,
		DEBUG_TYPE	,
		ARM_EXPAND_PSEUDO_NAME	,
		false	,
		false	)

Definition at line 120 of file ARMExpandPseudoInsts.cpp.

References ARM_EXPAND_PSEUDO_NAME, DEBUG_TYPE, LLVM_ATTRIBUTE_UNUSED, and llvm::operator<().

IsAnAddressOperand()

bool IsAnAddressOperand ( const MachineOperand & MO )

static

Definition at line 909 of file ARMExpandPseudoInsts.cpp.

References llvm::MachineOperand::getType(), llvm_unreachable, llvm::MachineOperand::MO_BlockAddress, llvm::MachineOperand::MO_CFIIndex, llvm::MachineOperand::MO_CImmediate, llvm::MachineOperand::MO_ConstantPoolIndex, llvm::MachineOperand::MO_DbgInstrRef, llvm::MachineOperand::MO_ExternalSymbol, llvm::MachineOperand::MO_FPImmediate, llvm::MachineOperand::MO_FrameIndex, llvm::MachineOperand::MO_GlobalAddress, llvm::MachineOperand::MO_Immediate, llvm::MachineOperand::MO_IntrinsicID, llvm::MachineOperand::MO_JumpTableIndex, llvm::MachineOperand::MO_MachineBasicBlock, llvm::MachineOperand::MO_MCSymbol, llvm::MachineOperand::MO_Metadata, llvm::MachineOperand::MO_Predicate, llvm::MachineOperand::MO_Register, llvm::MachineOperand::MO_RegisterLiveOut, llvm::MachineOperand::MO_RegisterMask, llvm::MachineOperand::MO_ShuffleMask, and llvm::MachineOperand::MO_TargetIndex.

LookupNEONLdSt()

const NEONLdStTableEntry * LookupNEONLdSt ( unsigned Opcode )

static

LookupNEONLdSt - Search the NEONLdStTable for information about a NEON load or store pseudo instruction.

Definition at line 498 of file ARMExpandPseudoInsts.cpp.

References assert(), I, llvm::is_sorted(), llvm::lower_bound(), and NEONLdStTable.

makeImplicit()

MachineOperand makeImplicit ( const MachineOperand & MO )

static

Definition at line 947 of file ARMExpandPseudoInsts.cpp.

References llvm::MachineOperand::setImplicit().

Variable Documentation

CMSE_FP_SAVE_SIZE

const int CMSE_FP_SAVE_SIZE = 136

static

Definition at line 1159 of file ARMExpandPseudoInsts.cpp.

NEONLdStTable

const NEONLdStTableEntry NEONLdStTable[]

static

Definition at line 169 of file ARMExpandPseudoInsts.cpp.

Referenced by LookupNEONLdSt().

VerifyARMPseudo

cl::opt< bool > VerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden, cl::desc("Verify machine code after expanding ARM pseudos")) ( "verify-arm-pseudo-expand" , cl::Hidden , cl::desc("Verify machine code after expanding ARM pseudos")  )

static