LLVM  13.0.0git
Macros | Functions | Variables
ARMExpandPseudoInsts.cpp File Reference
#include "ARM.h"
#include "ARMBaseInstrInfo.h"
#include "ARMBaseRegisterInfo.h"
#include "ARMConstantPoolValue.h"
#include "ARMMachineFunctionInfo.h"
#include "ARMSubtarget.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Support/Debug.h"
Include dependency graph for ARMExpandPseudoInsts.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "arm-pseudo"
 
#define ARM_EXPAND_PSEUDO_NAME   "ARM pseudo instruction expansion pass"
 

Functions

 INITIALIZE_PASS (ARMExpandPseudo, DEBUG_TYPE, ARM_EXPAND_PSEUDO_NAME, false, false) void ARMExpandPseudo
 TransferImpOps - Transfer implicit operands on the pseudo instruction to the instructions created from the expansion. More...
 
static const NEONLdStTableEntry * LookupNEONLdSt (unsigned Opcode)
 LookupNEONLdSt - Search the NEONLdStTable for information about a NEON load or store pseudo instruction. More...
 
static void GetDSubRegs (unsigned Reg, NEONRegSpacing RegSpc, const TargetRegisterInfo *TRI, unsigned &D0, unsigned &D1, unsigned &D2, unsigned &D3)
 GetDSubRegs - Get 4 D subregisters of a Q, QQ, or QQQQ register, corresponding to the specified register spacing. More...
 
static bool IsAnAddressOperand (const MachineOperand &MO)
 
static MachineOperand makeImplicit (const MachineOperand &MO)
 
static void determineGPRegsToClear (const MachineInstr &MI, const std::initializer_list< unsigned > &Regs, SmallVectorImpl< unsigned > &ClearRegs)
 
static bool determineFPRegsToClear (const MachineInstr &MI, BitVector &ClearRegs)
 
static bool definesOrUsesFPReg (const MachineInstr &MI)
 
static void addExclusiveRegPair (MachineInstrBuilder &MIB, MachineOperand &Reg, unsigned Flags, bool IsThumb, const TargetRegisterInfo *TRI)
 ARM's ldrexd/strexd take a consecutive register pair (represented as a single GPRPair register), Thumb's take two separate registers so we need to extract the subregs from the pair. More...
 
static void CMSEPushCalleeSaves (const TargetInstrInfo &TII, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, int JumpReg, const LivePhysRegs &LiveRegs, bool Thumb1Only)
 
static void CMSEPopCalleeSaves (const TargetInstrInfo &TII, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, int JumpReg, bool Thumb1Only)
 

Variables

static cl::opt< bool > VerifyARMPseudo ("verify-arm-pseudo-expand", cl::Hidden, cl::desc("Verify machine code after expanding ARM pseudos"))
 
static const NEONLdStTableEntry NEONLdStTable []
 
static const int CMSE_FP_SAVE_SIZE = 136
 

Macro Definition Documentation

◆ ARM_EXPAND_PSEUDO_NAME

#define ARM_EXPAND_PSEUDO_NAME   "ARM pseudo instruction expansion pass"

Definition at line 36 of file ARMExpandPseudoInsts.cpp.

◆ DEBUG_TYPE

#define DEBUG_TYPE   "arm-pseudo"

Definition at line 30 of file ARMExpandPseudoInsts.cpp.

Function Documentation

◆ addExclusiveRegPair()

static void addExclusiveRegPair ( MachineInstrBuilder MIB,
MachineOperand Reg,
unsigned  Flags,
bool  IsThumb,
const TargetRegisterInfo TRI 
)
static

ARM's ldrexd/strexd take a consecutive register pair (represented as a single GPRPair register), Thumb's take two separate registers so we need to extract the subregs from the pair.

Definition at line 1723 of file ARMExpandPseudoInsts.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::TargetRegisterInfo::getSubReg(), Reg, and TRI.

◆ CMSEPopCalleeSaves()

static void CMSEPopCalleeSaves ( const TargetInstrInfo TII,
MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
int  JumpReg,
bool  Thumb1Only 
)
static

◆ CMSEPushCalleeSaves()

static void CMSEPushCalleeSaves ( const TargetInstrInfo TII,
MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
int  JumpReg,
const LivePhysRegs LiveRegs,
bool  Thumb1Only 
)
static

◆ definesOrUsesFPReg()

static bool definesOrUsesFPReg ( const MachineInstr MI)
static

Definition at line 1558 of file ARMExpandPseudoInsts.cpp.

References MI, and Reg.

◆ determineFPRegsToClear()

static bool determineFPRegsToClear ( const MachineInstr MI,
BitVector ClearRegs 
)
static

Definition at line 1081 of file ARMExpandPseudoInsts.cpp.

References MI, Reg, and llvm::BitVector::reset().

◆ determineGPRegsToClear()

static void determineGPRegsToClear ( const MachineInstr MI,
const std::initializer_list< unsigned > &  Regs,
SmallVectorImpl< unsigned > &  ClearRegs 
)
static

Definition at line 1031 of file ARMExpandPseudoInsts.cpp.

References MI, llvm::set_difference(), and llvm::sort().

◆ GetDSubRegs()

static void GetDSubRegs ( unsigned  Reg,
NEONRegSpacing  RegSpc,
const TargetRegisterInfo TRI,
unsigned &  D0,
unsigned &  D1,
unsigned &  D2,
unsigned &  D3 
)
static

GetDSubRegs - Get 4 D subregisters of a Q, QQ, or QQQQ register, corresponding to the specified register spacing.

Not all of the results are necessarily valid, e.g., a Q register only has 2 D subregisters.

Definition at line 520 of file ARMExpandPseudoInsts.cpp.

References assert(), llvm::TargetRegisterInfo::getSubReg(), Reg, and TRI.

◆ INITIALIZE_PASS()

INITIALIZE_PASS ( ARMExpandPseudo  ,
DEBUG_TYPE  ,
ARM_EXPAND_PSEUDO_NAME  ,
false  ,
false   
)

TransferImpOps - Transfer implicit operands on the pseudo instruction to the instructions created from the expansion.

Definition at line 118 of file ARMExpandPseudoInsts.cpp.

References llvm::MachineInstrBuilder::add(), assert(), DefMI, llvm::numbers::e, llvm::MCInstrDesc::getNumOperands(), llvm::MachineOperand::getReg(), i, llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), and UseMI.

◆ IsAnAddressOperand()

static bool IsAnAddressOperand ( const MachineOperand MO)
static

◆ LookupNEONLdSt()

static const NEONLdStTableEntry* LookupNEONLdSt ( unsigned  Opcode)
static

LookupNEONLdSt - Search the NEONLdStTable for information about a NEON load or store pseudo instruction.

Definition at line 501 of file ARMExpandPseudoInsts.cpp.

References assert(), llvm::sys::path::end(), I, llvm::is_sorted(), llvm::lower_bound(), and NEONLdStTable.

◆ makeImplicit()

static MachineOperand makeImplicit ( const MachineOperand MO)
static

Definition at line 905 of file ARMExpandPseudoInsts.cpp.

References llvm::MachineOperand::setImplicit().

Variable Documentation

◆ CMSE_FP_SAVE_SIZE

const int CMSE_FP_SAVE_SIZE = 136
static

Definition at line 1029 of file ARMExpandPseudoInsts.cpp.

◆ NEONLdStTable

const NEONLdStTableEntry NEONLdStTable[]
static

Definition at line 184 of file ARMExpandPseudoInsts.cpp.

Referenced by LookupNEONLdSt().

◆ VerifyARMPseudo

cl::opt<bool> VerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden, cl::desc("Verify machine code after expanding ARM pseudos"))
static