26#define DEBUG_TYPE "dead-mi-elimination"
28STATISTIC(NumDeletes,
"Number of dead instructions deleted");
55char DeadMachineInstructionElim::ID = 0;
59 "Remove dead machine instructions",
false,
false)
65 if (
MI->isInlineAsm())
69 if (
MI->getOpcode() == TargetOpcode::LOCAL_ESCAPE)
73 bool SawStore =
false;
74 if (!
MI->isSafeToMove(
nullptr, SawStore) && !
MI->isPHI())
80 if (Reg.isPhysical()) {
88 for (
auto &U :
MRI->use_nodbg_operands(Reg))
89 assert(U.isUndef() &&
"'Undef' use on a 'dead' register is found!");
105bool DeadMachineInstructionElim::runOnMachineFunction(
MachineFunction &MF) {
112 TII =
ST.getInstrInfo();
115 bool AnyChanges = eliminateDeadMI(MF);
116 while (AnyChanges && eliminateDeadMI(MF))
122 bool AnyChanges =
false;
139 MI.eraseFromParent();
unsigned const MachineRegisterInfo * MRI
const HexagonInstrInfo * TII
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Represent the analysis usage information of a pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
A set of physical registers with utility functions to track liveness when walking backward/forward th...
void clear()
Clears the set.
bool available(const MachineRegisterInfo &MRI, MCPhysReg Reg) const
Returns true if register Reg and no aliasing register is in the set.
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
A set of register units used to track register liveness.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Wrapper class representing virtual and physical registers.
TargetInstrInfo - Interface to description of machine instruction set.
TargetSubtargetInfo - Generic base class for all target subtargets.
A Use represents the edge between a Value definition and its users.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
iterator_range< po_iterator< T > > post_order(const T &G)
void initializeDeadMachineInstructionElimPass(PassRegistry &)
auto reverse(ContainerTy &&C)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.