LLVM  14.0.0git
LivePhysRegs.cpp
Go to the documentation of this file.
1 //===--- LivePhysRegs.cpp - Live Physical Register Set --------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the LivePhysRegs utility for tracking liveness of
10 // physical registers across machine instructions in forward or backward order.
11 // A more detailed description can be found in the corresponding header file.
12 //
13 //===----------------------------------------------------------------------===//
14 
21 #include "llvm/Config/llvm-config.h"
22 #include "llvm/Support/Debug.h"
24 using namespace llvm;
25 
26 
27 /// Remove all registers from the set that get clobbered by the register
28 /// mask.
29 /// The clobbers set will be the list of live registers clobbered
30 /// by the regmask.
32  SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> *Clobbers) {
33  RegisterSet::iterator LRI = LiveRegs.begin();
34  while (LRI != LiveRegs.end()) {
35  if (MO.clobbersPhysReg(*LRI)) {
36  if (Clobbers)
37  Clobbers->push_back(std::make_pair(*LRI, &MO));
38  LRI = LiveRegs.erase(LRI);
39  } else
40  ++LRI;
41  }
42 }
43 
44 /// Remove defined registers and regmask kills from the set.
46  for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
47  if (MOP.isRegMask()) {
48  removeRegsInMask(MOP);
49  continue;
50  }
51 
52  if (MOP.isDef())
53  removeReg(MOP.getReg());
54  }
55 }
56 
57 /// Add uses to the set.
59  for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
60  if (!MOP.isReg() || !MOP.readsReg())
61  continue;
62  addReg(MOP.getReg());
63  }
64 }
65 
66 /// Simulates liveness when stepping backwards over an instruction(bundle):
67 /// Remove Defs, add uses. This is the recommended way of calculating liveness.
69  // Remove defined registers and regmask kills from the set.
70  removeDefs(MI);
71 
72  // Add uses to the set.
73  addUses(MI);
74 }
75 
76 /// Simulates liveness when stepping forward over an instruction(bundle): Remove
77 /// killed-uses, add defs. This is the not recommended way, because it depends
78 /// on accurate kill flags. If possible use stepBackward() instead of this
79 /// function.
81  SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> &Clobbers) {
82  // Remove killed registers from the set.
83  for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
84  if (O->isReg() && !O->isDebug()) {
85  Register Reg = O->getReg();
87  continue;
88  if (O->isDef()) {
89  // Note, dead defs are still recorded. The caller should decide how to
90  // handle them.
91  Clobbers.push_back(std::make_pair(Reg, &*O));
92  } else {
93  if (!O->isKill())
94  continue;
95  assert(O->isUse());
96  removeReg(Reg);
97  }
98  } else if (O->isRegMask())
99  removeRegsInMask(*O, &Clobbers);
100  }
101 
102  // Add defs to the set.
103  for (auto Reg : Clobbers) {
104  // Skip dead defs and registers clobbered by regmasks. They shouldn't
105  // be added to the set.
106  if (Reg.second->isReg() && Reg.second->isDead())
107  continue;
108  if (Reg.second->isRegMask() &&
109  MachineOperand::clobbersPhysReg(Reg.second->getRegMask(), Reg.first))
110  continue;
111  addReg(Reg.first);
112  }
113 }
114 
115 /// Print the currently live registers to OS.
117  OS << "Live Registers:";
118  if (!TRI) {
119  OS << " (uninitialized)\n";
120  return;
121  }
122 
123  if (empty()) {
124  OS << " (empty)\n";
125  return;
126  }
127 
128  for (MCPhysReg R : *this)
129  OS << " " << printReg(R, TRI);
130  OS << "\n";
131 }
132 
133 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
135  dbgs() << " " << *this;
136 }
137 #endif
138 
140  MCPhysReg Reg) const {
141  if (LiveRegs.count(Reg))
142  return false;
143  if (MRI.isReserved(Reg))
144  return false;
145  for (MCRegAliasIterator R(Reg, TRI, false); R.isValid(); ++R) {
146  if (LiveRegs.count(*R))
147  return false;
148  }
149  return true;
150 }
151 
152 /// Add live-in registers of basic block \p MBB to \p LiveRegs.
153 void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) {
154  for (const auto &LI : MBB.liveins()) {
155  MCPhysReg Reg = LI.PhysReg;
156  LaneBitmask Mask = LI.LaneMask;
158  assert(Mask.any() && "Invalid livein mask");
159  if (Mask.all() || !S.isValid()) {
160  addReg(Reg);
161  continue;
162  }
163  for (; S.isValid(); ++S) {
164  unsigned SI = S.getSubRegIndex();
165  if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
166  addReg(S.getSubReg());
167  }
168  }
169 }
170 
171 /// Adds all callee saved registers to \p LiveRegs.
172 static void addCalleeSavedRegs(LivePhysRegs &LiveRegs,
173  const MachineFunction &MF) {
174  const MachineRegisterInfo &MRI = MF.getRegInfo();
175  for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)
176  LiveRegs.addReg(*CSR);
177 }
178 
179 void LivePhysRegs::addPristines(const MachineFunction &MF) {
180  const MachineFrameInfo &MFI = MF.getFrameInfo();
181  if (!MFI.isCalleeSavedInfoValid())
182  return;
183  /// This function will usually be called on an empty object, handle this
184  /// as a special case.
185  if (empty()) {
186  /// Add all callee saved regs, then remove the ones that are saved and
187  /// restored.
188  addCalleeSavedRegs(*this, MF);
189  /// Remove the ones that are not saved/restored; they are pristine.
190  for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
191  removeReg(Info.getReg());
192  return;
193  }
194  /// If a callee-saved register that is not pristine is already present
195  /// in the set, we should make sure that it stays in it. Precompute the
196  /// set of pristine registers in a separate object.
197  /// Add all callee saved regs, then remove the ones that are saved+restored.
198  LivePhysRegs Pristine(*TRI);
199  addCalleeSavedRegs(Pristine, MF);
200  /// Remove the ones that are not saved/restored; they are pristine.
201  for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
202  Pristine.removeReg(Info.getReg());
203  for (MCPhysReg R : Pristine)
204  addReg(R);
205 }
206 
208  // To get the live-outs we simply merge the live-ins of all successors.
209  for (const MachineBasicBlock *Succ : MBB.successors())
210  addBlockLiveIns(*Succ);
211  if (MBB.isReturnBlock()) {
212  // Return blocks are a special case because we currently don't mark up
213  // return instructions completely: specifically, there is no explicit
214  // use for callee-saved registers. So we add all callee saved registers
215  // that are saved and restored (somewhere). This does not include
216  // callee saved registers that are unused and hence not saved and
217  // restored; they are called pristine.
218  // FIXME: PEI should add explicit markings to return instructions
219  // instead of implicitly handling them here.
220  const MachineFunction &MF = *MBB.getParent();
221  const MachineFrameInfo &MFI = MF.getFrameInfo();
222  if (MFI.isCalleeSavedInfoValid()) {
223  for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
224  if (Info.isRestored())
225  addReg(Info.getReg());
226  }
227  }
228 }
229 
231  const MachineFunction &MF = *MBB.getParent();
232  addPristines(MF);
234 }
235 
237  const MachineFunction &MF = *MBB.getParent();
238  addPristines(MF);
239  addBlockLiveIns(MBB);
240 }
241 
243  addBlockLiveIns(MBB);
244 }
245 
247  const MachineBasicBlock &MBB) {
248  const MachineFunction &MF = *MBB.getParent();
249  const MachineRegisterInfo &MRI = MF.getRegInfo();
251  LiveRegs.init(TRI);
252  LiveRegs.addLiveOutsNoPristines(MBB);
253  for (const MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend()))
254  LiveRegs.stepBackward(MI);
255 }
256 
258  assert(MBB.livein_empty() && "Expected empty live-in list");
259  const MachineFunction &MF = *MBB.getParent();
260  const MachineRegisterInfo &MRI = MF.getRegInfo();
262  for (MCPhysReg Reg : LiveRegs) {
263  if (MRI.isReserved(Reg))
264  continue;
265  // Skip the register if we are about to add one of its super registers.
266  bool ContainsSuperReg = false;
267  for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) {
268  if (LiveRegs.contains(*SReg) && !MRI.isReserved(*SReg)) {
269  ContainsSuperReg = true;
270  break;
271  }
272  }
273  if (ContainsSuperReg)
274  continue;
275  MBB.addLiveIn(Reg);
276  }
277 }
278 
280  const MachineFunction &MF = *MBB.getParent();
281  const MachineRegisterInfo &MRI = MF.getRegInfo();
283  const MachineFrameInfo &MFI = MF.getFrameInfo();
284 
285  // We walk through the block backwards and start with the live outs.
286  LivePhysRegs LiveRegs;
287  LiveRegs.init(TRI);
288  LiveRegs.addLiveOutsNoPristines(MBB);
289 
290  for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend())) {
291  // Recompute dead flags.
292  for (MIBundleOperands MO(MI); MO.isValid(); ++MO) {
293  if (!MO->isReg() || !MO->isDef() || MO->isDebug())
294  continue;
295 
296  Register Reg = MO->getReg();
297  if (Reg == 0)
298  continue;
300 
301  bool IsNotLive = LiveRegs.available(MRI, Reg);
302 
303  // Special-case return instructions for cases when a return is not
304  // the last instruction in the block.
305  if (MI.isReturn() && MFI.isCalleeSavedInfoValid()) {
306  for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo()) {
307  if (Info.getReg() == Reg) {
308  IsNotLive = !Info.isRestored();
309  break;
310  }
311  }
312  }
313 
314  MO->setIsDead(IsNotLive);
315  }
316 
317  // Step backward over defs.
318  LiveRegs.removeDefs(MI);
319 
320  // Recompute kill flags.
321  for (MIBundleOperands MO(MI); MO.isValid(); ++MO) {
322  if (!MO->isReg() || !MO->readsReg() || MO->isDebug())
323  continue;
324 
325  Register Reg = MO->getReg();
326  if (Reg == 0)
327  continue;
329 
330  bool IsNotLive = LiveRegs.available(MRI, Reg);
331  MO->setIsKill(IsNotLive);
332  }
333 
334  // Complete the stepbackward.
335  LiveRegs.addUses(MI);
336  }
337 }
338 
341  computeLiveIns(LiveRegs, MBB);
342  addLiveIns(MBB, LiveRegs);
343 }
llvm::LaneBitmask
Definition: LaneBitmask.h:40
llvm::SparseSet< MCPhysReg, identity< MCPhysReg > >::iterator
typename DenseT::iterator iterator
Definition: SparseSet.h:171
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:102
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition: Compiler.h:491
llvm::LivePhysRegs::removeDefs
void removeDefs(const MachineInstr &MI)
Remove defined registers and regmask kills from the set.
Definition: LivePhysRegs.cpp:45
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::LivePhysRegs::removeReg
void removeReg(MCPhysReg Reg)
Removes a physical register, all its sub-registers, and all its super-registers from the set.
Definition: LivePhysRegs.h:89
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::computeLiveIns
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB)
Computes registers live-in to MBB assuming all of its successors live-in lists are up-to-date.
Definition: LivePhysRegs.cpp:246
llvm::MCSubRegIndexIterator
Iterator that enumerates the sub-registers of a Reg and the associated sub-register indices.
Definition: MCRegisterInfo.h:607
llvm::make_range
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition: iterator_range.h:53
llvm::LivePhysRegs::addReg
void addReg(MCPhysReg Reg)
Adds a physical register and all its sub-registers to the set.
Definition: LivePhysRegs.h:79
llvm::LivePhysRegs::dump
void dump() const
Dumps the currently live registers to the debug output.
Definition: LivePhysRegs.cpp:134
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::recomputeLivenessFlags
void recomputeLivenessFlags(MachineBasicBlock &MBB)
Recomputes dead and kill flags in MBB.
Definition: LivePhysRegs.cpp:279
llvm::LivePhysRegs::addLiveInsNoPristines
void addLiveInsNoPristines(const MachineBasicBlock &MBB)
Adds all live-in registers of basic block MBB but skips pristine registers.
Definition: LivePhysRegs.cpp:242
llvm::MachineRegisterInfo::getTargetRegisterInfo
const TargetRegisterInfo * getTargetRegisterInfo() const
Definition: MachineRegisterInfo.h:153
llvm::SparseSet::begin
const_iterator begin() const
Definition: SparseSet.h:174
llvm::LivePhysRegs::removeRegsInMask
void removeRegsInMask(const MachineOperand &MO, SmallVectorImpl< std::pair< MCPhysReg, const MachineOperand * >> *Clobbers=nullptr)
Removes physical registers clobbered by the regmask operand MO.
Definition: LivePhysRegs.cpp:31
llvm::LivePhysRegs
A set of physical registers with utility functions to track liveness when walking backward/forward th...
Definition: LivePhysRegs.h:48
llvm::MachineBasicBlock::isReturnBlock
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
Definition: MachineBasicBlock.h:805
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
llvm::MachineBasicBlock::liveins
iterator_range< livein_iterator > liveins() const
Definition: MachineBasicBlock.h:412
llvm::addLiveIns
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
Definition: LivePhysRegs.cpp:257
llvm::LivePhysRegs::empty
bool empty() const
Returns true if the set is empty.
Definition: LivePhysRegs.h:76
llvm::BitmaskEnumDetail::Mask
std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
MachineRegisterInfo.h
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:632
addCalleeSavedRegs
static void addCalleeSavedRegs(LivePhysRegs &LiveRegs, const MachineFunction &MF)
Adds all callee saved registers to LiveRegs.
Definition: LivePhysRegs.cpp:172
llvm::TargetRegisterInfo::getSubRegIndexLaneMask
LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const
Return a bitmask representing the parts of a register that are covered by SubIdx.
Definition: TargetRegisterInfo.h:375
llvm::LivePhysRegs::addLiveIns
void addLiveIns(const MachineBasicBlock &MBB)
Adds all live-in registers of basic block MBB.
Definition: LivePhysRegs.cpp:236
llvm::SparseSet::end
const_iterator end() const
Definition: SparseSet.h:175
llvm::MachineRegisterInfo::isReserved
bool isReserved(MCRegister PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
Definition: MachineRegisterInfo.h:915
llvm::Register::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:65
llvm::LivePhysRegs::addLiveOuts
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
Definition: LivePhysRegs.cpp:230
llvm::phys_regs_and_masks
iterator_range< filter_iterator< ConstMIBundleOperands, std::function< bool(const MachineOperand &)> > > phys_regs_and_masks(const MachineInstr &MI)
Returns an iterator range over all physical register and mask operands for MI and bundled instruction...
Definition: LiveRegUnits.h:166
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
MachineInstrBundle.h
llvm::MachineBasicBlock::rend
reverse_iterator rend()
Definition: MachineBasicBlock.h:278
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::MIBundleOperands
MIBundleOperands - Iterate over all operands in a bundle of machine instructions.
Definition: MachineInstrBundle.h:166
llvm::computeAndAddLiveIns
void computeAndAddLiveIns(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB)
Convenience function combining computeLiveIns() and addLiveIns().
Definition: LivePhysRegs.cpp:339
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::MachineFrameInfo::isCalleeSavedInfoValid
bool isCalleeSavedInfoValid() const
Has the callee saved info been calculated yet?
Definition: MachineFrameInfo.h:766
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::RISCVFenceField::O
@ O
Definition: RISCVBaseInfo.h:179
llvm::MachineOperand::clobbersPhysReg
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
Definition: MachineOperand.h:617
llvm::LivePhysRegs::stepBackward
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
Definition: LivePhysRegs.cpp:68
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::LivePhysRegs::addUses
void addUses(const MachineInstr &MI)
Add uses to the set.
Definition: LivePhysRegs.cpp:58
llvm::LivePhysRegs::available
bool available(const MachineRegisterInfo &MRI, MCPhysReg Reg) const
Returns true if register Reg and no aliasing register is in the set.
Definition: LivePhysRegs.cpp:139
llvm::MachineRegisterInfo::getCalleeSavedRegs
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
Definition: MachineRegisterInfo.cpp:621
llvm::MCPhysReg
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:20
llvm::MIBundleOperandIteratorBase::isValid
bool isValid() const
isValid - Returns true until all the operands have been visited.
Definition: MachineInstrBundle.h:136
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::LivePhysRegs::print
void print(raw_ostream &OS) const
Prints the currently live registers to OS.
Definition: LivePhysRegs.cpp:116
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:638
SI
StandardInstrumentations SI(Debug, VerifyEach)
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:225
llvm::MCSuperRegIterator
MCSuperRegIterator enumerates all super-registers of Reg.
Definition: MCRegisterInfo.h:641
llvm::MachineFunction
Definition: MachineFunction.h:230
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:753
llvm::MachineBasicBlock::successors
iterator_range< succ_iterator > successors()
Definition: MachineBasicBlock.h:355
llvm::MachineBasicBlock::rbegin
reverse_iterator rbegin()
Definition: MachineBasicBlock.h:272
llvm::LivePhysRegs::init
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
Definition: LivePhysRegs.h:66
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::LivePhysRegs::stepForward
void stepForward(const MachineInstr &MI, SmallVectorImpl< std::pair< MCPhysReg, const MachineOperand * >> &Clobbers)
Simulates liveness when stepping forward over an instruction(bundle).
Definition: LivePhysRegs.cpp:80
LiveRegUnits.h
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:367
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::LivePhysRegs::addLiveOutsNoPristines
void addLiveOutsNoPristines(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB but skips pristine registers.
Definition: LivePhysRegs.cpp:207
llvm::CalleeSavedInfo
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
Definition: MachineFrameInfo.h:34
uint16_t
llvm::ConstMIBundleOperands
ConstMIBundleOperands - Iterate over all operands in a const bundle of machine instructions.
Definition: MachineInstrBundle.h:185
MachineFrameInfo.h
llvm::SparseSet::count
size_type count(const KeyT &Key) const
count - Returns 1 if this set contains an element identified by Key, 0 otherwise.
Definition: SparseSet.h:240
llvm::SparseSet::erase
iterator erase(iterator I)
erase - Erases an existing element identified by a valid iterator.
Definition: SparseSet.h:288
llvm::MachineBasicBlock::livein_empty
bool livein_empty() const
Definition: MachineBasicBlock.h:411
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:107
llvm::MCRegisterInfo::DiffListIterator::isValid
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
Definition: MCRegisterInfo.h:224
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
raw_ostream.h
MachineFunction.h
llvm::printReg
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition: TargetRegisterInfo.cpp:110
Debug.h
llvm::MCRegAliasIterator
MCRegAliasIterator enumerates all registers aliasing Reg.
Definition: MCRegisterInfo.h:780
LivePhysRegs.h