LLVM  16.0.0git
FunctionLoweringInfo.cpp
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1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements routines for translating functions from LLVM IR into
10 // Machine IR.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/ADT/APInt.h"
17 #include "llvm/CodeGen/Analysis.h"
29 #include "llvm/IR/DataLayout.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/Instructions.h"
33 #include "llvm/IR/IntrinsicInst.h"
34 #include "llvm/IR/Module.h"
35 #include "llvm/Support/Debug.h"
38 #include <algorithm>
39 using namespace llvm;
40 
41 #define DEBUG_TYPE "function-lowering-info"
42 
43 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
44 /// PHI nodes or outside of the basic block that defines it, or used by a
45 /// switch or atomic instruction, which may expand to multiple basic blocks.
47  if (I->use_empty()) return false;
48  if (isa<PHINode>(I)) return true;
49  const BasicBlock *BB = I->getParent();
50  for (const User *U : I->users())
51  if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
52  return true;
53 
54  return false;
55 }
56 
58  // For the users of the source value being used for compare instruction, if
59  // the number of signed predicate is greater than unsigned predicate, we
60  // prefer to use SIGN_EXTEND.
61  //
62  // With this optimization, we would be able to reduce some redundant sign or
63  // zero extension instruction, and eventually more machine CSE opportunities
64  // can be exposed.
65  ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
66  unsigned NumOfSigned = 0, NumOfUnsigned = 0;
67  for (const User *U : I->users()) {
68  if (const auto *CI = dyn_cast<CmpInst>(U)) {
69  NumOfSigned += CI->isSigned();
70  NumOfUnsigned += CI->isUnsigned();
71  }
72  }
73  if (NumOfSigned > NumOfUnsigned)
74  ExtendKind = ISD::SIGN_EXTEND;
75 
76  return ExtendKind;
77 }
78 
80  SelectionDAG *DAG) {
81  Fn = &fn;
82  MF = &mf;
84  RegInfo = &MF->getRegInfo();
86  DA = DAG->getDivergenceAnalysis();
87 
88  // Check whether the function can return without sret-demotion.
91 
93  mf.getDataLayout());
95  TLI->CanLowerReturn(CC, *MF, Fn->isVarArg(), Outs, Fn->getContext());
96 
97  // If this personality uses funclets, we need to do a bit more work.
100  Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
101  if (isFuncletEHPersonality(Personality)) {
102  // Calculate state numbers if we haven't already.
103  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
104  if (Personality == EHPersonality::MSVC_CXX)
105  calculateWinCXXEHStateNumbers(&fn, EHInfo);
106  else if (isAsynchronousEHPersonality(Personality))
107  calculateSEHStateNumbers(&fn, EHInfo);
108  else if (Personality == EHPersonality::CoreCLR)
109  calculateClrEHStateNumbers(&fn, EHInfo);
110 
111  // Map all BB references in the WinEH data to MBBs.
112  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
113  for (WinEHHandlerType &H : TBME.HandlerArray) {
114  if (const AllocaInst *AI = H.CatchObj.Alloca)
115  CatchObjects.insert({AI, {}}).first->second.push_back(
116  &H.CatchObj.FrameIndex);
117  else
118  H.CatchObj.FrameIndex = INT_MAX;
119  }
120  }
121  }
122 
123  // Initialize the mapping of values to registers. This is only set up for
124  // instruction values that are used outside of the block that defines
125  // them.
126  const Align StackAlign = TFI->getStackAlign();
127  for (const BasicBlock &BB : *Fn) {
128  for (const Instruction &I : BB) {
129  if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
130  Type *Ty = AI->getAllocatedType();
131  Align TyPrefAlign = MF->getDataLayout().getPrefTypeAlign(Ty);
132  // The "specified" alignment is the alignment written on the alloca,
133  // or the preferred alignment of the type if none is specified.
134  //
135  // (Unspecified alignment on allocas will be going away soon.)
136  Align SpecifiedAlign = AI->getAlign();
137 
138  // If the preferred alignment of the type is higher than the specified
139  // alignment of the alloca, promote the alignment, as long as it doesn't
140  // require realigning the stack.
141  //
142  // FIXME: Do we really want to second-guess the IR in isel?
143  Align Alignment =
144  std::max(std::min(TyPrefAlign, StackAlign), SpecifiedAlign);
145 
146  // Static allocas can be folded into the initial stack frame
147  // adjustment. For targets that don't realign the stack, don't
148  // do this if there is an extra alignment requirement.
149  if (AI->isStaticAlloca() &&
150  (TFI->isStackRealignable() || (Alignment <= StackAlign))) {
151  const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
152  uint64_t TySize =
154 
155  TySize *= CUI->getZExtValue(); // Get total allocated size.
156  if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
157  int FrameIndex = INT_MAX;
158  auto Iter = CatchObjects.find(AI);
159  if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
161  TySize, 0, /*IsImmutable=*/false, /*isAliased=*/true);
163  } else {
164  FrameIndex = MF->getFrameInfo().CreateStackObject(TySize, Alignment,
165  false, AI);
166  }
167 
168  // Scalable vectors may need a special StackID to distinguish
169  // them from other (fixed size) stack objects.
170  if (isa<ScalableVectorType>(Ty))
173 
175  // Update the catch handler information.
176  if (Iter != CatchObjects.end()) {
177  for (int *CatchObjPtr : Iter->second)
178  *CatchObjPtr = FrameIndex;
179  }
180  } else {
181  // FIXME: Overaligned static allocas should be grouped into
182  // a single dynamic allocation instead of using a separate
183  // stack allocation for each one.
184  // Inform the Frame Information that we have variable-sized objects.
186  Alignment <= StackAlign ? Align(1) : Alignment, AI);
187  }
188  } else if (auto *Call = dyn_cast<CallBase>(&I)) {
189  // Look for inline asm that clobbers the SP register.
190  if (Call->isInlineAsm()) {
193  std::vector<TargetLowering::AsmOperandInfo> Ops =
195  *Call);
196  for (TargetLowering::AsmOperandInfo &Op : Ops) {
197  if (Op.Type == InlineAsm::isClobber) {
198  // Clobbers don't have SDValue operands, hence SDValue().
200  std::pair<unsigned, const TargetRegisterClass *> PhysReg =
201  TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
202  Op.ConstraintVT);
203  if (PhysReg.first == SP)
205  }
206  }
207  }
208  // Look for calls to the @llvm.va_start intrinsic. We can omit some
209  // prologue boilerplate for variadic functions that don't examine their
210  // arguments.
211  if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
212  if (II->getIntrinsicID() == Intrinsic::vastart)
213  MF->getFrameInfo().setHasVAStart(true);
214  }
215 
216  // If we have a musttail call in a variadic function, we need to ensure
217  // we forward implicit register parameters.
218  if (const auto *CI = dyn_cast<CallInst>(&I)) {
219  if (CI->isMustTailCall() && Fn->isVarArg())
221  }
222  }
223 
224  // Mark values used outside their block as exported, by allocating
225  // a virtual register for them.
227  if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
229 
230  // Decide the preferred extend type for a value.
232  }
233  }
234 
235  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
236  // also creates the initial PHI MachineInstrs, though none of the input
237  // operands are populated.
238  for (const BasicBlock &BB : *Fn) {
239  // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
240  // are really data, and no instructions can live here.
241  if (BB.isEHPad()) {
242  const Instruction *PadInst = BB.getFirstNonPHI();
243  // If this is a non-landingpad EH pad, mark this function as using
244  // funclets.
245  // FIXME: SEH catchpads do not create EH scope/funclets, so we could avoid
246  // setting this in such cases in order to improve frame layout.
247  if (!isa<LandingPadInst>(PadInst)) {
248  MF->setHasEHScopes(true);
249  MF->setHasEHFunclets(true);
251  }
252  if (isa<CatchSwitchInst>(PadInst)) {
253  assert(&*BB.begin() == PadInst &&
254  "WinEHPrepare failed to remove PHIs from imaginary BBs");
255  continue;
256  }
257  if (isa<FuncletPadInst>(PadInst))
258  assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
259  }
260 
262  MBBMap[&BB] = MBB;
263  MF->push_back(MBB);
264 
265  // Transfer the address-taken flag. This is necessary because there could
266  // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
267  // the first one should be marked.
268  if (BB.hasAddressTaken())
269  MBB->setAddressTakenIRBlock(const_cast<BasicBlock *>(&BB));
270 
271  // Mark landing pad blocks.
272  if (BB.isEHPad())
273  MBB->setIsEHPad();
274 
275  // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
276  // appropriate.
277  for (const PHINode &PN : BB.phis()) {
278  if (PN.use_empty())
279  continue;
280 
281  // Skip empty types
282  if (PN.getType()->isEmptyTy())
283  continue;
284 
285  DebugLoc DL = PN.getDebugLoc();
286  unsigned PHIReg = ValueMap[&PN];
287  assert(PHIReg && "PHI node does not have an assigned virtual register!");
288 
289  SmallVector<EVT, 4> ValueVTs;
290  ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);
291  for (EVT VT : ValueVTs) {
292  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
294  for (unsigned i = 0; i != NumRegisters; ++i)
295  BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
296  PHIReg += NumRegisters;
297  }
298  }
299  }
300 
301  if (isFuncletEHPersonality(Personality)) {
302  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
303 
304  // Map all BB references in the WinEH data to MBBs.
305  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
306  for (WinEHHandlerType &H : TBME.HandlerArray) {
307  if (H.Handler)
308  H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
309  }
310  }
311  for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
312  if (UME.Cleanup)
313  UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
314  for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
315  const auto *BB = UME.Handler.get<const BasicBlock *>();
316  UME.Handler = MBBMap[BB];
317  }
318  for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
319  const auto *BB = CME.Handler.get<const BasicBlock *>();
320  CME.Handler = MBBMap[BB];
321  }
322  } else if (Personality == EHPersonality::Wasm_CXX) {
323  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
324  calculateWasmEHInfo(&fn, EHInfo);
325 
326  // Map all BB references in the Wasm EH data to MBBs.
327  DenseMap<BBOrMBB, BBOrMBB> SrcToUnwindDest;
328  for (auto &KV : EHInfo.SrcToUnwindDest) {
329  const auto *Src = KV.first.get<const BasicBlock *>();
330  const auto *Dest = KV.second.get<const BasicBlock *>();
331  SrcToUnwindDest[MBBMap[Src]] = MBBMap[Dest];
332  }
333  EHInfo.SrcToUnwindDest = std::move(SrcToUnwindDest);
335  for (auto &KV : EHInfo.UnwindDestToSrcs) {
336  const auto *Dest = KV.first.get<const BasicBlock *>();
337  UnwindDestToSrcs[MBBMap[Dest]] = SmallPtrSet<BBOrMBB, 4>();
338  for (const auto P : KV.second)
339  UnwindDestToSrcs[MBBMap[Dest]].insert(
340  MBBMap[P.get<const BasicBlock *>()]);
341  }
342  EHInfo.UnwindDestToSrcs = std::move(UnwindDestToSrcs);
343  }
344 }
345 
346 /// clear - Clear out all the function-specific state. This returns this
347 /// FunctionLoweringInfo to an empty state, ready to be used for a
348 /// different function.
350  MBBMap.clear();
351  ValueMap.clear();
352  VirtReg2Value.clear();
353  StaticAllocaMap.clear();
354  LiveOutRegInfo.clear();
355  VisitedBBs.clear();
356  ArgDbgValues.clear();
358  ByValArgFrameIndexMap.clear();
359  RegFixups.clear();
360  RegsWithFixups.clear();
362  StatepointRelocationMaps.clear();
363  PreferredExtendType.clear();
364 }
365 
366 /// CreateReg - Allocate a single virtual register for the given type.
368  return RegInfo->createVirtualRegister(TLI->getRegClassFor(VT, isDivergent));
369 }
370 
371 /// CreateRegs - Allocate the appropriate number of virtual registers of
372 /// the correctly promoted or expanded types. Assign these registers
373 /// consecutive vreg numbers and return the first assigned number.
374 ///
375 /// In the case that the given value has struct or array type, this function
376 /// will assign registers for each member or element.
377 ///
379  SmallVector<EVT, 4> ValueVTs;
380  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
381 
382  Register FirstReg;
383  for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
384  EVT ValueVT = ValueVTs[Value];
385  MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
386 
387  unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
388  for (unsigned i = 0; i != NumRegs; ++i) {
389  Register R = CreateReg(RegisterVT, isDivergent);
390  if (!FirstReg) FirstReg = R;
391  }
392  }
393  return FirstReg;
394 }
395 
397  return CreateRegs(V->getType(), DA && DA->isDivergent(V) &&
399 }
400 
401 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
402 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
403 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
404 /// the larger bit width by zero extension. The bit width must be no smaller
405 /// than the LiveOutInfo's existing bit width.
408  if (!LiveOutRegInfo.inBounds(Reg))
409  return nullptr;
410 
411  LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
412  if (!LOI->IsValid)
413  return nullptr;
414 
415  if (BitWidth > LOI->Known.getBitWidth()) {
416  LOI->NumSignBits = 1;
417  LOI->Known = LOI->Known.anyext(BitWidth);
418  }
419 
420  return LOI;
421 }
422 
423 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
424 /// register based on the LiveOutInfo of its operands.
426  Type *Ty = PN->getType();
427  if (!Ty->isIntegerTy() || Ty->isVectorTy())
428  return;
429 
430  SmallVector<EVT, 1> ValueVTs;
431  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
432  assert(ValueVTs.size() == 1 &&
433  "PHIs with non-vector integer types should have a single VT.");
434  EVT IntVT = ValueVTs[0];
435 
436  if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
437  return;
438  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
439  unsigned BitWidth = IntVT.getSizeInBits();
440 
441  auto It = ValueMap.find(PN);
442  if (It == ValueMap.end())
443  return;
444 
445  Register DestReg = It->second;
446  if (DestReg == 0)
447  return;
448  assert(Register::isVirtualRegister(DestReg) && "Expected a virtual reg");
449  LiveOutRegInfo.grow(DestReg);
450  LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
451 
452  Value *V = PN->getIncomingValue(0);
453  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
454  DestLOI.NumSignBits = 1;
455  DestLOI.Known = KnownBits(BitWidth);
456  return;
457  }
458 
459  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
460  APInt Val;
461  if (TLI->signExtendConstant(CI))
462  Val = CI->getValue().sext(BitWidth);
463  else
464  Val = CI->getValue().zext(BitWidth);
465  DestLOI.NumSignBits = Val.getNumSignBits();
466  DestLOI.Known = KnownBits::makeConstant(Val);
467  } else {
468  assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
469  "CopyToReg node was created.");
470  Register SrcReg = ValueMap[V];
471  if (!Register::isVirtualRegister(SrcReg)) {
472  DestLOI.IsValid = false;
473  return;
474  }
475  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
476  if (!SrcLOI) {
477  DestLOI.IsValid = false;
478  return;
479  }
480  DestLOI = *SrcLOI;
481  }
482 
483  assert(DestLOI.Known.Zero.getBitWidth() == BitWidth &&
484  DestLOI.Known.One.getBitWidth() == BitWidth &&
485  "Masks should have the same bit width as the type.");
486 
487  for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
488  Value *V = PN->getIncomingValue(i);
489  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
490  DestLOI.NumSignBits = 1;
491  DestLOI.Known = KnownBits(BitWidth);
492  return;
493  }
494 
495  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
496  APInt Val;
497  if (TLI->signExtendConstant(CI))
498  Val = CI->getValue().sext(BitWidth);
499  else
500  Val = CI->getValue().zext(BitWidth);
501  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
502  DestLOI.Known.Zero &= ~Val;
503  DestLOI.Known.One &= Val;
504  continue;
505  }
506 
507  assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
508  "its CopyToReg node was created.");
509  Register SrcReg = ValueMap[V];
510  if (!SrcReg.isVirtual()) {
511  DestLOI.IsValid = false;
512  return;
513  }
514  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
515  if (!SrcLOI) {
516  DestLOI.IsValid = false;
517  return;
518  }
519  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
520  DestLOI.Known = KnownBits::commonBits(DestLOI.Known, SrcLOI->Known);
521  }
522 }
523 
524 /// setArgumentFrameIndex - Record frame index for the byval
525 /// argument. This overrides previous frame index entry for this argument,
526 /// if any.
528  int FI) {
529  ByValArgFrameIndexMap[A] = FI;
530 }
531 
532 /// getArgumentFrameIndex - Get frame index for the byval argument.
533 /// If the argument does not have any assigned frame index then 0 is
534 /// returned.
536  auto I = ByValArgFrameIndexMap.find(A);
537  if (I != ByValArgFrameIndexMap.end())
538  return I->second;
539  LLVM_DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
540  return INT_MAX;
541 }
542 
544  const Value *CPI, const TargetRegisterClass *RC) {
546  auto I = CatchPadExceptionPointers.insert({CPI, 0});
547  Register &VReg = I.first->second;
548  if (I.second)
549  VReg = MRI.createVirtualRegister(RC);
550  assert(VReg && "null vreg in exception pointer table!");
551  return VReg;
552 }
553 
554 const Value *
556  if (VirtReg2Value.empty()) {
557  SmallVector<EVT, 4> ValueVTs;
558  for (auto &P : ValueMap) {
559  ValueVTs.clear();
561  P.first->getType(), ValueVTs);
562  unsigned Reg = P.second;
563  for (EVT VT : ValueVTs) {
564  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
565  for (unsigned i = 0, e = NumRegisters; i != e; ++i)
566  VirtReg2Value[Reg++] = P.first;
567  }
568  }
569  }
570  return VirtReg2Value.lookup(Vreg);
571 }
llvm::FunctionLoweringInfo::Fn
const Function * Fn
Definition: FunctionLoweringInfo.h:54
llvm::EHPersonality::MSVC_CXX
@ MSVC_CXX
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Definition: README.txt:29
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KnownBits anyext(unsigned BitWidth) const
Return known bits for an "any" extension of the value we're tracking, where we don't know anything ab...
Definition: KnownBits.h:158
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Definition: WasmEHFuncInfo.h:32
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bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
Definition: EHPersonalities.h:49
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This class represents an incoming formal argument to a Function.
Definition: Argument.h:28
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unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit.
Definition: APInt.h:1551
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DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block.
Definition: FunctionLoweringInfo.h:128
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StackAlign
Definition: RISCVAttributes.h:37
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Register getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
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Definition: AddressRanges.h:18
TargetFrameLowering.h
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void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)
set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...
Definition: FunctionLoweringInfo.cpp:79
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Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:43
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Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:156
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virtual EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
Definition: TargetLowering.h:1002
PHI
Rewrite undef for PHI
Definition: AMDGPURewriteUndefForPHI.cpp:101
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iterator end()
Definition: ValueMap.h:136
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SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap
Definition: WinEHFuncInfo.h:95
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MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
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Definition: Function.h:60
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
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virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:95
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SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap
Definition: WinEHFuncInfo.h:98
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void clear()
clear - Removes all bits from the bitvector.
Definition: BitVector.h:328
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Definition: WinEHFuncInfo.h:81
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Definition: FunctionLoweringInfo.h:158
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APInt Zero
Definition: KnownBits.h:24
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This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1199
llvm::FunctionLoweringInfo::RegsWithFixups
DenseSet< Register > RegsWithFixups
Definition: FunctionLoweringInfo.h:144
ErrorHandling.h
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::WinEHHandlerType
Definition: WinEHFuncInfo.h:60
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:766
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:127
APInt.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:237
llvm::Function::getContext
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function.
Definition: Function.cpp:321
llvm::WinEHFuncInfo::TryBlockMap
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:96
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
llvm::APInt::getBitWidth
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1431
llvm::ClrEHUnwindMapEntry::Handler
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:82
Module.h
llvm::FunctionLoweringInfo::MBB
MachineBasicBlock * MBB
MBB - The current block.
Definition: FunctionLoweringInfo.h:153
TargetInstrInfo.h
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:450
llvm::TargetLowering::ComputeConstraintToUse
virtual void ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG=nullptr) const
Determines the constraint code and constraint type to use for the specific AsmOperandInfo,...
Definition: TargetLowering.cpp:5665
llvm::max
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:337
llvm::FunctionLoweringInfo::DescribedArgs
BitVector DescribedArgs
Bitvector with a bit set if corresponding argument is described in ArgDbgValues.
Definition: FunctionLoweringInfo.h:139
llvm::MachineFunction::setHasEHFunclets
void setHasEHFunclets(bool V)
Definition: MachineFunction.h:1101
getPreferredExtendForValue
static ISD::NodeType getPreferredExtendForValue(const Instruction *I)
Definition: FunctionLoweringInfo.cpp:57
llvm::MachineFrameInfo::CreateVariableSizedObject
int CreateVariableSizedObject(Align Alignment, const AllocaInst *Alloca)
Notify the MachineFrameInfo object that a variable sized object has been created.
Definition: MachineFrameInfo.cpp:74
llvm::TargetFrameLowering::getStackIDForScalableVectors
virtual TargetStackID::Value getStackIDForScalableVectors() const
Returns the StackID that scalable vectors should be associated with.
Definition: TargetFrameLowering.h:432
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::PointerUnion::get
T get() const
Returns the value of the specified pointer type.
Definition: PointerUnion.h:155
llvm::FunctionLoweringInfo::CanLowerReturn
bool CanLowerReturn
CanLowerReturn - true iff the function's return value can be lowered to registers.
Definition: FunctionLoweringInfo.h:62
llvm::MachineFrameInfo::setObjectAlignment
void setObjectAlignment(int ObjectIdx, Align Alignment)
setObjectAlignment - Change the alignment of the specified stack object.
Definition: MachineFrameInfo.h:497
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
llvm::FunctionLoweringInfo::getValueFromVirtualReg
const Value * getValueFromVirtualReg(Register Vreg)
This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...
Definition: FunctionLoweringInfo.cpp:555
MachineRegisterInfo.h
llvm::TargetLoweringBase::needsFixedCatchObjects
virtual bool needsFixedCatchObjects() const
Definition: TargetLowering.h:1841
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
llvm::ComputeValueVTs
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Definition: Analysis.cpp:121
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::CxxUnwindMapEntry::Cleanup
MBBOrBasicBlock Cleanup
Definition: WinEHFuncInfo.h:42
llvm::classifyEHPersonality
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
Definition: EHPersonalities.cpp:22
TargetLowering.h
llvm::ConstantInt
This is the shared class of boolean and integer constants.
Definition: Constants.h:79
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:667
llvm::FunctionLoweringInfo::StatepointStackSlots
SmallVector< unsigned, 50 > StatepointStackSlots
StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...
Definition: FunctionLoweringInfo.h:150
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:98
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:220
llvm::FunctionLoweringInfo::MBBMap
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
Definition: FunctionLoweringInfo.h:72
llvm::PHINode::getIncomingValue
Value * getIncomingValue(unsigned i) const
Return incoming value number x.
Definition: Instructions.h:2794
FunctionLoweringInfo.h
llvm::User
Definition: User.h:44
llvm::TargetFrameLowering::getStackAlign
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:100
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:34
llvm::TargetLowering::CanLowerReturn
virtual bool CanLowerReturn(CallingConv::ID, MachineFunction &, bool, const SmallVectorImpl< ISD::OutputArg > &, LLVMContext &) const
This hook should be implemented to check whether the return values described by the Outs array can fi...
Definition: TargetLowering.h:4367
llvm::KnownBits::One
APInt One
Definition: KnownBits.h:25
llvm::FunctionLoweringInfo::ArgDbgValues
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Definition: FunctionLoweringInfo.h:135
llvm::SelectionDAG::getDivergenceAnalysis
const LegacyDivergenceAnalysis * getDivergenceAnalysis() const
Definition: SelectionDAG.h:478
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::FunctionLoweringInfo::ComputePHILiveOutRegInfo
void ComputePHILiveOutRegInfo(const PHINode *)
ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination register based on the LiveOutI...
Definition: FunctionLoweringInfo.cpp:425
llvm::FunctionLoweringInfo::GetLiveOutRegInfo
const LiveOutInfo * GetLiveOutRegInfo(Register Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
Definition: FunctionLoweringInfo.h:220
llvm::Type::isVectorTy
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:246
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::ISD::NodeType
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:40
llvm::MachineFrameInfo::setHasOpaqueSPAdjustment
void setHasOpaqueSPAdjustment(bool B)
Definition: MachineFrameInfo.h:618
llvm::FunctionLoweringInfo::LiveOutInfo::NumSignBits
unsigned NumSignBits
Definition: FunctionLoweringInfo.h:159
llvm::Instruction
Definition: Instruction.h:42
llvm::TargetFrameLowering::isStackRealignable
bool isStackRealignable() const
isStackRealignable - This method returns whether the stack can be realigned.
Definition: TargetFrameLowering.h:122
llvm::Function::hasPersonalityFn
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:759
llvm::FunctionLoweringInfo::LiveOutInfo::Known
KnownBits Known
Definition: FunctionLoweringInfo.h:161
llvm::FunctionLoweringInfo::LiveOutInfo::IsValid
unsigned IsValid
Definition: FunctionLoweringInfo.h:160
isUsedOutsideOfDefiningBlock
static bool isUsedOutsideOfDefiningBlock(const Instruction *I)
isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...
Definition: FunctionLoweringInfo.cpp:46
Align
uint64_t Align
Definition: ELFObjHandler.cpp:82
llvm::MachineFunction::getWasmEHFuncInfo
const WasmEHFuncInfo * getWasmEHFuncInfo() const
getWasmEHFuncInfo - Return information about how the current function uses Wasm exception handling.
Definition: MachineFunction.h:695
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::FunctionLoweringInfo::InitializeRegForValue
Register InitializeRegForValue(const Value *V)
Definition: FunctionLoweringInfo.h:208
llvm::ValueMap::count
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: ValueMap.h:152
llvm::PHINode::getNumIncomingValues
unsigned getNumIncomingValues() const
Return the number of incoming edges.
Definition: Instructions.h:2790
llvm::EHPersonality::Wasm_CXX
@ Wasm_CXX
llvm::ValueMap::clear
void clear()
Definition: ValueMap.h:146
llvm::TargetLoweringBase::requiresUniformRegister
virtual bool requiresUniformRegister(MachineFunction &MF, const Value *) const
Allows target to decide about the register class of the specific value that is live outside the defin...
Definition: TargetLowering.h:906
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::Function::getAttributes
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition: Function.h:314
llvm::Type::isIntegerTy
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:210
llvm::DataLayout::getPrefTypeAlign
Align getPrefTypeAlign(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:838
llvm::Register::isVirtual
bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:91
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:657
llvm::FunctionLoweringInfo::TLI
const TargetLowering * TLI
Definition: FunctionLoweringInfo.h:56
llvm::WinEHTryBlockMapEntry
Definition: WinEHFuncInfo.h:72
llvm::MachineFunction::push_back
void push_back(MachineBasicBlock *MBB)
Definition: MachineFunction.h:871
llvm::MachineFrameInfo::setHasMustTailInVarArgFunc
void setHasMustTailInVarArgFunc(bool B)
Definition: MachineFrameInfo.h:635
llvm::MachineBasicBlock::setAddressTakenIRBlock
void setAddressTakenIRBlock(BasicBlock *BB)
Set this block to reflect that it corresponds to an IR-level basic block with a BlockAddress.
Definition: MachineBasicBlock.h:251
llvm::WinEHFuncInfo
Definition: WinEHFuncInfo.h:90
llvm::EVT::getSizeInBits
TypeSize getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:340
llvm::Function::getReturnType
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:180
uint64_t
llvm::Function::getCallingConv
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:238
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:650
llvm::MachineBasicBlock::setIsEHPad
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
Definition: MachineBasicBlock.h:580
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:53
llvm::TargetLowering::ParseConstraints
virtual AsmOperandInfoVector ParseConstraints(const DataLayout &DL, const TargetRegisterInfo *TRI, const CallBase &Call) const
Split up the constraint string from the inline assembly value into the specific constraints and their...
Definition: TargetLowering.cpp:5316
llvm::DenseMap
Definition: DenseMap.h:714
llvm::WinEHTryBlockMapEntry::HandlerArray
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:76
I
#define I(x, y, z)
Definition: MD5.cpp:58
Analysis.h
llvm::TargetLowering::AsmOperandInfo
This contains information for each constraint that we are lowering.
Definition: TargetLowering.h:4577
llvm::MachineFunction::CreateMachineBasicBlock
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
Definition: MachineFunction.cpp:439
llvm::Register::isVirtualRegister
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:71
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::find
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:150
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineFrameInfo::CreateFixedObject
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
Definition: MachineFrameInfo.cpp:83
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:673
llvm::FunctionLoweringInfo::CatchPadExceptionPointers
DenseMap< const Value *, Register > CatchPadExceptionPointers
Track virtual registers created for exception pointers.
Definition: FunctionLoweringInfo.h:91
llvm::FunctionLoweringInfo::CreateRegs
Register CreateRegs(const Value *V)
Definition: FunctionLoweringInfo.cpp:396
llvm::WasmEHFuncInfo::SrcToUnwindDest
DenseMap< BBOrMBB, BBOrMBB > SrcToUnwindDest
Definition: WasmEHFuncInfo.h:35
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::FunctionLoweringInfo::ByValArgFrameIndexMap
DenseMap< const Argument *, int > ByValArgFrameIndexMap
ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
Definition: FunctionLoweringInfo.h:131
llvm::EHPersonality::CoreCLR
@ CoreCLR
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:75
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::SmallPtrSetImplBase::clear
void clear()
Definition: SmallPtrSet.h:95
llvm::MachineFrameInfo::setStackID
void setStackID(int ObjectIdx, uint8_t ID)
Definition: MachineFrameInfo.h:736
llvm::min
Expected< ExpressionValue > min(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:357
DataLayout.h
llvm::MachineFrameInfo::CreateStackObject
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
Definition: MachineFrameInfo.cpp:51
llvm::MachineFunction::setHasEHScopes
void setHasEHScopes(bool V)
Definition: MachineFunction.h:1098
llvm::Value::getType
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
getParent
static const Function * getParent(const Value *V)
Definition: BasicAliasAnalysis.cpp:805
llvm::SEHUnwindMapEntry
Similar to CxxUnwindMapEntry, but supports SEH filters.
Definition: WinEHFuncInfo.h:46
llvm::Value::getContext
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:994
TargetSubtargetInfo.h
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::LegacyDivergenceAnalysis::isDivergent
bool isDivergent(const Value *V) const
Definition: LegacyDivergenceAnalysis.cpp:360
CC
auto CC
Definition: RISCVRedundantCopyElimination.cpp:79
llvm::TargetLowering::getRegForInlineAsmConstraint
virtual std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const
Given a physical register constraint (e.g.
Definition: TargetLowering.cpp:5254
llvm::FunctionLoweringInfo::StatepointRelocationMaps
DenseMap< const Instruction *, StatepointSpillMapTy > StatepointRelocationMaps
Definition: FunctionLoweringInfo.h:123
llvm::Type::getContext
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:128
llvm::ValueMap
See the file comment.
Definition: ValueMap.h:85
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::insert
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:207
llvm::EHPersonality
EHPersonality
Definition: EHPersonalities.h:21
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::SEHUnwindMapEntry::Handler
MBBOrBasicBlock Handler
Holds the __except or __finally basic block.
Definition: WinEHFuncInfo.h:57
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::ConstantInt::getZExtValue
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:142
llvm::APInt::zext
APInt zext(unsigned width) const
Zero extend to a new width.
Definition: APInt.cpp:973
llvm::WinEHFuncInfo::SEHUnwindMap
SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap
Definition: WinEHFuncInfo.h:97
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
llvm::FunctionLoweringInfo::VisitedBBs
SmallPtrSet< const BasicBlock *, 4 > VisitedBBs
VisitedBBs - The set of basic blocks visited thus far by instruction selection.
Definition: FunctionLoweringInfo.h:172
llvm::KnownBits
Definition: KnownBits.h:23
H
#define H(x, y, z)
Definition: MD5.cpp:57
llvm::TargetSubtargetInfo::getFrameLowering
virtual const TargetFrameLowering * getFrameLowering() const
Definition: TargetSubtargetInfo.h:96
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::end
iterator end()
Definition: DenseMap.h:84
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::InlineAsm::isClobber
@ isClobber
Definition: InlineAsm.h:97
MachineFrameInfo.h
llvm::MachineFunction::getWinEHFuncInfo
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling.
Definition: MachineFunction.h:701
WasmEHFuncInfo.h
llvm::FunctionLoweringInfo::clear
void clear()
clear - Clear out all the function-specific state.
Definition: FunctionLoweringInfo.cpp:349
llvm::CxxUnwindMapEntry
Definition: WinEHFuncInfo.h:40
Function.h
llvm::BitWidth
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:147
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:145
llvm::ValueMap::find
iterator find(const KeyT &Val)
Definition: ValueMap.h:156
llvm::SmallVectorImpl::clear
void clear()
Definition: SmallVector.h:614
llvm::FunctionLoweringInfo::setArgumentFrameIndex
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
Definition: FunctionLoweringInfo.cpp:527
llvm::FunctionLoweringInfo::RegFixups
DenseMap< Register, Register > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
Definition: FunctionLoweringInfo.h:142
llvm::Function::getPersonalityFn
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1968
llvm::APInt::sext
APInt sext(unsigned width) const
Sign extend to a new width.
Definition: APInt.cpp:946
WinEHFuncInfo.h
llvm::Function::isVarArg
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:188
Instructions.h
llvm::FunctionLoweringInfo::MF
MachineFunction * MF
Definition: FunctionLoweringInfo.h:55
llvm::GetReturnInfo
void GetReturnInfo(CallingConv::ID CC, Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags,...
Definition: TargetLoweringBase.cpp:1669
LegacyDivergenceAnalysis.h
llvm::TargetSubtargetInfo::getTargetLowering
virtual const TargetLowering * getTargetLowering() const
Definition: TargetSubtargetInfo.h:99
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:357
MachineInstrBuilder.h
llvm::WasmEHFuncInfo::UnwindDestToSrcs
DenseMap< BBOrMBB, SmallPtrSet< BBOrMBB, 4 > > UnwindDestToSrcs
Definition: WasmEHFuncInfo.h:36
llvm::KnownBits::commonBits
static KnownBits commonBits(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits common to LHS and RHS.
Definition: KnownBits.h:315
llvm::TargetLoweringBase::getRegClassFor
virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const
Return the register class that should be used for the specified value type.
Definition: TargetLowering.h:896
llvm::FunctionLoweringInfo::VirtReg2Value
DenseMap< Register, const Value * > VirtReg2Value
VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.
Definition: FunctionLoweringInfo.h:84
llvm::MachineFunction::getDataLayout
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Definition: MachineFunction.cpp:285
llvm::TargetLoweringBase::getRegisterType
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
Definition: TargetLowering.h:1544
llvm::PHINode
Definition: Instructions.h:2698
llvm::KnownBits::makeConstant
static KnownBits makeConstant(const APInt &C)
Create known bits from a known constant.
Definition: KnownBits.h:310
llvm::TypeSize::getKnownMinSize
ScalarTy getKnownMinSize() const
Definition: TypeSize.h:445
llvm::TargetLoweringBase::getNumRegisters
virtual unsigned getNumRegisters(LLVMContext &Context, EVT VT, Optional< MVT > RegisterVT=None) const
Return the number of registers that this ValueType will eventually require.
Definition: TargetLowering.h:1582
llvm::Module::getDataLayout
const DataLayout & getDataLayout() const
Get the data layout for the module's target platform.
Definition: Module.cpp:399
DerivedTypes.h
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::KnownBits::getBitWidth
unsigned getBitWidth() const
Get the bit width of this value.
Definition: KnownBits.h:40
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::AllocaInst
an instruction to allocate memory on the stack
Definition: Instructions.h:58
llvm::calculateSEHStateNumbers
void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Definition: WinEHPrepare.cpp:451
llvm::ISD::SIGN_EXTEND
@ SIGN_EXTEND
Conversion operators.
Definition: ISDOpcodes.h:760
raw_ostream.h
MachineFunction.h
llvm::FunctionLoweringInfo::getArgumentFrameIndex
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
Definition: FunctionLoweringInfo.cpp:535
llvm::calculateWinCXXEHStateNumbers
void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Analyze the IR in ParentFn and it's handlers to build WinEHFuncInfo, which describes the state number...
Definition: WinEHPrepare.cpp:469
llvm::FunctionLoweringInfo::DA
const LegacyDivergenceAnalysis * DA
Definition: FunctionLoweringInfo.h:59
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::MachineFrameInfo::setHasVAStart
void setHasVAStart(bool B)
Definition: MachineFrameInfo.h:631
TargetRegisterInfo.h
Debug.h
llvm::FunctionLoweringInfo::CreateReg
Register CreateReg(MVT VT, bool isDivergent=false)
CreateReg - Allocate a single virtual register for the given type.
Definition: FunctionLoweringInfo.cpp:367
llvm::FunctionLoweringInfo::RegInfo
MachineRegisterInfo * RegInfo
Definition: FunctionLoweringInfo.h:57
llvm::calculateWasmEHInfo
void calculateWasmEHInfo(const Function *F, WasmEHFuncInfo &EHInfo)
Definition: WasmEHPrepare.cpp:349
llvm::TargetLoweringBase::signExtendConstant
virtual bool signExtendConstant(const ConstantInt *C) const
Return true if this constant should be sign extended when promoting to a larger type.
Definition: TargetLowering.h:2822
llvm::isFuncletEHPersonality
bool isFuncletEHPersonality(EHPersonality Pers)
Returns true if this is a personality function that invokes handler funclets (which must return to it...
Definition: EHPersonalities.h:64
llvm::FunctionLoweringInfo::getCatchPadExceptionPointerVReg
Register getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
Definition: FunctionLoweringInfo.cpp:543
llvm::FunctionLoweringInfo::PreferredExtendType
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.
Definition: FunctionLoweringInfo.h:168
llvm::calculateClrEHStateNumbers
void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)
Definition: WinEHPrepare.cpp:500
llvm::DataLayout::getTypeAllocSize
TypeSize getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:506