LLVM  14.0.0git
FunctionLoweringInfo.cpp
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1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements routines for translating functions from LLVM IR into
10 // Machine IR.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/ADT/APInt.h"
17 #include "llvm/CodeGen/Analysis.h"
29 #include "llvm/IR/DataLayout.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/Instructions.h"
33 #include "llvm/IR/IntrinsicInst.h"
34 #include "llvm/IR/LLVMContext.h"
35 #include "llvm/IR/Module.h"
36 #include "llvm/Support/Debug.h"
41 #include <algorithm>
42 using namespace llvm;
43 
44 #define DEBUG_TYPE "function-lowering-info"
45 
46 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
47 /// PHI nodes or outside of the basic block that defines it, or used by a
48 /// switch or atomic instruction, which may expand to multiple basic blocks.
50  if (I->use_empty()) return false;
51  if (isa<PHINode>(I)) return true;
52  const BasicBlock *BB = I->getParent();
53  for (const User *U : I->users())
54  if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
55  return true;
56 
57  return false;
58 }
59 
61  // For the users of the source value being used for compare instruction, if
62  // the number of signed predicate is greater than unsigned predicate, we
63  // prefer to use SIGN_EXTEND.
64  //
65  // With this optimization, we would be able to reduce some redundant sign or
66  // zero extension instruction, and eventually more machine CSE opportunities
67  // can be exposed.
68  ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
69  unsigned NumOfSigned = 0, NumOfUnsigned = 0;
70  for (const User *U : V->users()) {
71  if (const auto *CI = dyn_cast<CmpInst>(U)) {
72  NumOfSigned += CI->isSigned();
73  NumOfUnsigned += CI->isUnsigned();
74  }
75  }
76  if (NumOfSigned > NumOfUnsigned)
77  ExtendKind = ISD::SIGN_EXTEND;
78 
79  return ExtendKind;
80 }
81 
83  SelectionDAG *DAG) {
84  Fn = &fn;
85  MF = &mf;
87  RegInfo = &MF->getRegInfo();
89  DA = DAG->getDivergenceAnalysis();
90 
91  // Check whether the function can return without sret-demotion.
94 
95  GetReturnInfo(CC, Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,
96  mf.getDataLayout());
98  TLI->CanLowerReturn(CC, *MF, Fn->isVarArg(), Outs, Fn->getContext());
99 
100  // If this personality uses funclets, we need to do a bit more work.
102  EHPersonality Personality = classifyEHPersonality(
103  Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
104  if (isFuncletEHPersonality(Personality)) {
105  // Calculate state numbers if we haven't already.
106  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
107  if (Personality == EHPersonality::MSVC_CXX)
108  calculateWinCXXEHStateNumbers(&fn, EHInfo);
109  else if (isAsynchronousEHPersonality(Personality))
110  calculateSEHStateNumbers(&fn, EHInfo);
111  else if (Personality == EHPersonality::CoreCLR)
112  calculateClrEHStateNumbers(&fn, EHInfo);
113 
114  // Map all BB references in the WinEH data to MBBs.
115  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
116  for (WinEHHandlerType &H : TBME.HandlerArray) {
117  if (const AllocaInst *AI = H.CatchObj.Alloca)
118  CatchObjects.insert({AI, {}}).first->second.push_back(
119  &H.CatchObj.FrameIndex);
120  else
121  H.CatchObj.FrameIndex = INT_MAX;
122  }
123  }
124  }
125  if (Personality == EHPersonality::Wasm_CXX) {
126  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
127  calculateWasmEHInfo(&fn, EHInfo);
128  }
129 
130  // Initialize the mapping of values to registers. This is only set up for
131  // instruction values that are used outside of the block that defines
132  // them.
133  const Align StackAlign = TFI->getStackAlign();
134  for (const BasicBlock &BB : *Fn) {
135  for (const Instruction &I : BB) {
136  if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
137  Type *Ty = AI->getAllocatedType();
138  Align TyPrefAlign = MF->getDataLayout().getPrefTypeAlign(Ty);
139  // The "specified" alignment is the alignment written on the alloca,
140  // or the preferred alignment of the type if none is specified.
141  //
142  // (Unspecified alignment on allocas will be going away soon.)
143  Align SpecifiedAlign = AI->getAlign();
144 
145  // If the preferred alignment of the type is higher than the specified
146  // alignment of the alloca, promote the alignment, as long as it doesn't
147  // require realigning the stack.
148  //
149  // FIXME: Do we really want to second-guess the IR in isel?
150  Align Alignment =
151  std::max(std::min(TyPrefAlign, StackAlign), SpecifiedAlign);
152 
153  // Static allocas can be folded into the initial stack frame
154  // adjustment. For targets that don't realign the stack, don't
155  // do this if there is an extra alignment requirement.
156  if (AI->isStaticAlloca() &&
157  (TFI->isStackRealignable() || (Alignment <= StackAlign))) {
158  const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
159  uint64_t TySize =
161 
162  TySize *= CUI->getZExtValue(); // Get total allocated size.
163  if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
164  int FrameIndex = INT_MAX;
165  auto Iter = CatchObjects.find(AI);
166  if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
168  TySize, 0, /*IsImmutable=*/false, /*isAliased=*/true);
170  } else {
171  FrameIndex = MF->getFrameInfo().CreateStackObject(TySize, Alignment,
172  false, AI);
173  }
174 
175  // Scalable vectors may need a special StackID to distinguish
176  // them from other (fixed size) stack objects.
177  if (isa<ScalableVectorType>(Ty))
180 
182  // Update the catch handler information.
183  if (Iter != CatchObjects.end()) {
184  for (int *CatchObjPtr : Iter->second)
185  *CatchObjPtr = FrameIndex;
186  }
187  } else {
188  // FIXME: Overaligned static allocas should be grouped into
189  // a single dynamic allocation instead of using a separate
190  // stack allocation for each one.
191  // Inform the Frame Information that we have variable-sized objects.
193  Alignment <= StackAlign ? Align(1) : Alignment, AI);
194  }
195  } else if (auto *Call = dyn_cast<CallBase>(&I)) {
196  // Look for inline asm that clobbers the SP register.
197  if (Call->isInlineAsm()) {
200  std::vector<TargetLowering::AsmOperandInfo> Ops =
202  *Call);
203  for (TargetLowering::AsmOperandInfo &Op : Ops) {
204  if (Op.Type == InlineAsm::isClobber) {
205  // Clobbers don't have SDValue operands, hence SDValue().
207  std::pair<unsigned, const TargetRegisterClass *> PhysReg =
208  TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
209  Op.ConstraintVT);
210  if (PhysReg.first == SP)
212  }
213  }
214  }
215  // Look for calls to the @llvm.va_start intrinsic. We can omit some
216  // prologue boilerplate for variadic functions that don't examine their
217  // arguments.
218  if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
219  if (II->getIntrinsicID() == Intrinsic::vastart)
220  MF->getFrameInfo().setHasVAStart(true);
221  }
222 
223  // If we have a musttail call in a variadic function, we need to ensure
224  // we forward implicit register parameters.
225  if (const auto *CI = dyn_cast<CallInst>(&I)) {
226  if (CI->isMustTailCall() && Fn->isVarArg())
228  }
229  }
230 
231  // Mark values used outside their block as exported, by allocating
232  // a virtual register for them.
234  if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
236 
237  // Decide the preferred extend type for a value.
239  }
240  }
241 
242  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
243  // also creates the initial PHI MachineInstrs, though none of the input
244  // operands are populated.
245  for (const BasicBlock &BB : *Fn) {
246  // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
247  // are really data, and no instructions can live here.
248  if (BB.isEHPad()) {
249  const Instruction *PadInst = BB.getFirstNonPHI();
250  // If this is a non-landingpad EH pad, mark this function as using
251  // funclets.
252  // FIXME: SEH catchpads do not create EH scope/funclets, so we could avoid
253  // setting this in such cases in order to improve frame layout.
254  if (!isa<LandingPadInst>(PadInst)) {
255  MF->setHasEHScopes(true);
256  MF->setHasEHFunclets(true);
258  }
259  if (isa<CatchSwitchInst>(PadInst)) {
260  assert(&*BB.begin() == PadInst &&
261  "WinEHPrepare failed to remove PHIs from imaginary BBs");
262  continue;
263  }
264  if (isa<FuncletPadInst>(PadInst))
265  assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
266  }
267 
269  MBBMap[&BB] = MBB;
270  MF->push_back(MBB);
271 
272  // Transfer the address-taken flag. This is necessary because there could
273  // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
274  // the first one should be marked.
275  if (BB.hasAddressTaken())
277 
278  // Mark landing pad blocks.
279  if (BB.isEHPad())
280  MBB->setIsEHPad();
281 
282  // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
283  // appropriate.
284  for (const PHINode &PN : BB.phis()) {
285  if (PN.use_empty())
286  continue;
287 
288  // Skip empty types
289  if (PN.getType()->isEmptyTy())
290  continue;
291 
292  DebugLoc DL = PN.getDebugLoc();
293  unsigned PHIReg = ValueMap[&PN];
294  assert(PHIReg && "PHI node does not have an assigned virtual register!");
295 
296  SmallVector<EVT, 4> ValueVTs;
297  ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);
298  for (EVT VT : ValueVTs) {
299  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
301  for (unsigned i = 0; i != NumRegisters; ++i)
302  BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
303  PHIReg += NumRegisters;
304  }
305  }
306  }
307 
308  if (isFuncletEHPersonality(Personality)) {
309  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
310 
311  // Map all BB references in the WinEH data to MBBs.
312  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
313  for (WinEHHandlerType &H : TBME.HandlerArray) {
314  if (H.Handler)
315  H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
316  }
317  }
318  for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
319  if (UME.Cleanup)
320  UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
321  for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
322  const auto *BB = UME.Handler.get<const BasicBlock *>();
323  UME.Handler = MBBMap[BB];
324  }
325  for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
326  const auto *BB = CME.Handler.get<const BasicBlock *>();
327  CME.Handler = MBBMap[BB];
328  }
329  }
330 
331  else if (Personality == EHPersonality::Wasm_CXX) {
332  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
333  // Map all BB references in the Wasm EH data to MBBs.
334  DenseMap<BBOrMBB, BBOrMBB> SrcToUnwindDest;
335  for (auto &KV : EHInfo.SrcToUnwindDest) {
336  const auto *Src = KV.first.get<const BasicBlock *>();
337  const auto *Dest = KV.second.get<const BasicBlock *>();
338  SrcToUnwindDest[MBBMap[Src]] = MBBMap[Dest];
339  }
340  EHInfo.SrcToUnwindDest = std::move(SrcToUnwindDest);
342  for (auto &KV : EHInfo.UnwindDestToSrcs) {
343  const auto *Dest = KV.first.get<const BasicBlock *>();
344  UnwindDestToSrcs[MBBMap[Dest]] = SmallPtrSet<BBOrMBB, 4>();
345  for (const auto P : KV.second)
346  UnwindDestToSrcs[MBBMap[Dest]].insert(
347  MBBMap[P.get<const BasicBlock *>()]);
348  }
349  EHInfo.UnwindDestToSrcs = std::move(UnwindDestToSrcs);
350  }
351 }
352 
353 /// clear - Clear out all the function-specific state. This returns this
354 /// FunctionLoweringInfo to an empty state, ready to be used for a
355 /// different function.
357  MBBMap.clear();
358  ValueMap.clear();
359  VirtReg2Value.clear();
360  StaticAllocaMap.clear();
361  LiveOutRegInfo.clear();
362  VisitedBBs.clear();
363  ArgDbgValues.clear();
365  ByValArgFrameIndexMap.clear();
366  RegFixups.clear();
367  RegsWithFixups.clear();
369  StatepointRelocationMaps.clear();
370  PreferredExtendType.clear();
371 }
372 
373 /// CreateReg - Allocate a single virtual register for the given type.
376  MF->getSubtarget().getTargetLowering()->getRegClassFor(VT, isDivergent));
377 }
378 
379 /// CreateRegs - Allocate the appropriate number of virtual registers of
380 /// the correctly promoted or expanded types. Assign these registers
381 /// consecutive vreg numbers and return the first assigned number.
382 ///
383 /// In the case that the given value has struct or array type, this function
384 /// will assign registers for each member or element.
385 ///
388 
389  SmallVector<EVT, 4> ValueVTs;
390  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
391 
392  Register FirstReg;
393  for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
394  EVT ValueVT = ValueVTs[Value];
395  MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
396 
397  unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
398  for (unsigned i = 0; i != NumRegs; ++i) {
399  Register R = CreateReg(RegisterVT, isDivergent);
400  if (!FirstReg) FirstReg = R;
401  }
402  }
403  return FirstReg;
404 }
405 
407  return CreateRegs(V->getType(), DA && DA->isDivergent(V) &&
409 }
410 
411 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
412 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
413 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
414 /// the larger bit width by zero extension. The bit width must be no smaller
415 /// than the LiveOutInfo's existing bit width.
418  if (!LiveOutRegInfo.inBounds(Reg))
419  return nullptr;
420 
421  LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
422  if (!LOI->IsValid)
423  return nullptr;
424 
425  if (BitWidth > LOI->Known.getBitWidth()) {
426  LOI->NumSignBits = 1;
427  LOI->Known = LOI->Known.anyext(BitWidth);
428  }
429 
430  return LOI;
431 }
432 
433 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
434 /// register based on the LiveOutInfo of its operands.
436  Type *Ty = PN->getType();
437  if (!Ty->isIntegerTy() || Ty->isVectorTy())
438  return;
439 
440  SmallVector<EVT, 1> ValueVTs;
441  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
442  assert(ValueVTs.size() == 1 &&
443  "PHIs with non-vector integer types should have a single VT.");
444  EVT IntVT = ValueVTs[0];
445 
446  if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
447  return;
448  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
449  unsigned BitWidth = IntVT.getSizeInBits();
450 
451  Register DestReg = ValueMap[PN];
452  if (!Register::isVirtualRegister(DestReg))
453  return;
454  LiveOutRegInfo.grow(DestReg);
455  LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
456 
457  Value *V = PN->getIncomingValue(0);
458  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
459  DestLOI.NumSignBits = 1;
460  DestLOI.Known = KnownBits(BitWidth);
461  return;
462  }
463 
464  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
465  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
466  DestLOI.NumSignBits = Val.getNumSignBits();
467  DestLOI.Known = KnownBits::makeConstant(Val);
468  } else {
469  assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
470  "CopyToReg node was created.");
471  Register SrcReg = ValueMap[V];
472  if (!Register::isVirtualRegister(SrcReg)) {
473  DestLOI.IsValid = false;
474  return;
475  }
476  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
477  if (!SrcLOI) {
478  DestLOI.IsValid = false;
479  return;
480  }
481  DestLOI = *SrcLOI;
482  }
483 
484  assert(DestLOI.Known.Zero.getBitWidth() == BitWidth &&
485  DestLOI.Known.One.getBitWidth() == BitWidth &&
486  "Masks should have the same bit width as the type.");
487 
488  for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
489  Value *V = PN->getIncomingValue(i);
490  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
491  DestLOI.NumSignBits = 1;
492  DestLOI.Known = KnownBits(BitWidth);
493  return;
494  }
495 
496  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
497  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
498  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
499  DestLOI.Known.Zero &= ~Val;
500  DestLOI.Known.One &= Val;
501  continue;
502  }
503 
504  assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
505  "its CopyToReg node was created.");
506  Register SrcReg = ValueMap[V];
507  if (!SrcReg.isVirtual()) {
508  DestLOI.IsValid = false;
509  return;
510  }
511  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
512  if (!SrcLOI) {
513  DestLOI.IsValid = false;
514  return;
515  }
516  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
517  DestLOI.Known = KnownBits::commonBits(DestLOI.Known, SrcLOI->Known);
518  }
519 }
520 
521 /// setArgumentFrameIndex - Record frame index for the byval
522 /// argument. This overrides previous frame index entry for this argument,
523 /// if any.
525  int FI) {
526  ByValArgFrameIndexMap[A] = FI;
527 }
528 
529 /// getArgumentFrameIndex - Get frame index for the byval argument.
530 /// If the argument does not have any assigned frame index then 0 is
531 /// returned.
533  auto I = ByValArgFrameIndexMap.find(A);
534  if (I != ByValArgFrameIndexMap.end())
535  return I->second;
536  LLVM_DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
537  return INT_MAX;
538 }
539 
541  const Value *CPI, const TargetRegisterClass *RC) {
543  auto I = CatchPadExceptionPointers.insert({CPI, 0});
544  Register &VReg = I.first->second;
545  if (I.second)
546  VReg = MRI.createVirtualRegister(RC);
547  assert(VReg && "null vreg in exception pointer table!");
548  return VReg;
549 }
550 
551 const Value *
553  if (VirtReg2Value.empty()) {
554  SmallVector<EVT, 4> ValueVTs;
555  for (auto &P : ValueMap) {
556  ValueVTs.clear();
558  P.first->getType(), ValueVTs);
559  unsigned Reg = P.second;
560  for (EVT VT : ValueVTs) {
561  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
562  for (unsigned i = 0, e = NumRegisters; i != e; ++i)
563  VirtReg2Value[Reg++] = P.first;
564  }
565  }
566  }
567  return VirtReg2Value.lookup(Vreg);
568 }
llvm::FunctionLoweringInfo::Fn
const Function * Fn
Definition: FunctionLoweringInfo.h:55
llvm::EHPersonality::MSVC_CXX
@ MSVC_CXX
i
i
Definition: README.txt:29
llvm::KnownBits::anyext
KnownBits anyext(unsigned BitWidth) const
Return known bits for an "any" extension of the value we're tracking, where we don't know anything ab...
Definition: KnownBits.h:156
llvm::WasmEHFuncInfo
Definition: WasmEHFuncInfo.h:32
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bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
Definition: EHPersonalities.h:50
llvm::Argument
This class represents an incoming formal argument to a Function.
Definition: Argument.h:29
llvm::APInt::getNumSignBits
unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit.
Definition: APInt.h:1688
llvm::FunctionLoweringInfo::StaticAllocaMap
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block.
Definition: FunctionLoweringInfo.h:125
llvm::RISCVAttrs::StackAlign
StackAlign
Definition: RISCVAttributes.h:37
llvm::TargetLoweringBase::getStackPointerRegisterToSaveRestore
Register getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
Definition: TargetLowering.h:1737
MathExtras.h
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---------------------— PointerInfo ------------------------------------—
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unsigned Reg
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TargetFrameLowering.h
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void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)
set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...
Definition: FunctionLoweringInfo.cpp:82
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Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:43
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Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:158
IntrinsicInst.h
llvm::WinEHFuncInfo::CxxUnwindMap
SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap
Definition: WinEHFuncInfo.h:95
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MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
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Definition: Function.h:61
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
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virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::WinEHFuncInfo::ClrEHUnwindMap
SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap
Definition: WinEHFuncInfo.h:98
llvm::BitVector::clear
void clear()
clear - Removes all bits from the bitvector.
Definition: BitVector.h:327
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Definition: WinEHFuncInfo.h:81
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Definition: FunctionLoweringInfo.h:155
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APInt Zero
Definition: KnownBits.h:24
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
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DenseSet< Register > RegsWithFixups
Definition: FunctionLoweringInfo.h:141
ErrorHandling.h
llvm::APInt::zextOrTrunc
APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
Definition: APInt.cpp:952
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Definition: WinEHFuncInfo.h:60
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:732
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
APInt.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
llvm::Function::getContext
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function.
Definition: Function.cpp:321
llvm::WinEHFuncInfo::TryBlockMap
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:96
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
llvm::APInt::getBitWidth
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1581
llvm::ClrEHUnwindMapEntry::Handler
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:82
Module.h
llvm::FunctionLoweringInfo::MBB
MachineBasicBlock * MBB
MBB - The current block.
Definition: FunctionLoweringInfo.h:150
TargetInstrInfo.h
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:449
llvm::TargetLowering::ComputeConstraintToUse
virtual void ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG=nullptr) const
Determines the constraint code and constraint type to use for the specific AsmOperandInfo,...
Definition: TargetLowering.cpp:5001
llvm::FunctionLoweringInfo::DescribedArgs
BitVector DescribedArgs
Bitvector with a bit set if corresponding argument is described in ArgDbgValues.
Definition: FunctionLoweringInfo.h:136
llvm::MachineFunction::setHasEHFunclets
void setHasEHFunclets(bool V)
Definition: MachineFunction.h:1047
llvm::MachineFrameInfo::CreateVariableSizedObject
int CreateVariableSizedObject(Align Alignment, const AllocaInst *Alloca)
Notify the MachineFrameInfo object that a variable sized object has been created.
Definition: MachineFrameInfo.cpp:74
llvm::TargetFrameLowering::getStackIDForScalableVectors
virtual TargetStackID::Value getStackIDForScalableVectors() const
Returns the StackID that scalable vectors should be associated with.
Definition: TargetFrameLowering.h:414
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::PointerUnion::get
T get() const
Returns the value of the specified pointer type.
Definition: PointerUnion.h:157
llvm::FunctionLoweringInfo::CanLowerReturn
bool CanLowerReturn
CanLowerReturn - true iff the function's return value can be lowered to registers.
Definition: FunctionLoweringInfo.h:63
llvm::MachineFrameInfo::setObjectAlignment
void setObjectAlignment(int ObjectIdx, Align Alignment)
setObjectAlignment - Change the alignment of the specified stack object.
Definition: MachineFrameInfo.h:472
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:122
llvm::FunctionLoweringInfo::getValueFromVirtualReg
const Value * getValueFromVirtualReg(Register Vreg)
This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...
Definition: FunctionLoweringInfo.cpp:552
MachineRegisterInfo.h
llvm::TargetLoweringBase::needsFixedCatchObjects
virtual bool needsFixedCatchObjects() const
Definition: TargetLowering.h:1755
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
llvm::ComputeValueVTs
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Definition: Analysis.cpp:124
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::CxxUnwindMapEntry::Cleanup
MBBOrBasicBlock Cleanup
Definition: WinEHFuncInfo.h:42
llvm::classifyEHPersonality
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
Definition: EHPersonalities.cpp:21
TargetLowering.h
llvm::ConstantInt
This is the shared class of boolean and integer constants.
Definition: Constants.h:79
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:632
llvm::FunctionLoweringInfo::StatepointStackSlots
SmallVector< unsigned, 50 > StatepointStackSlots
StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...
Definition: FunctionLoweringInfo.h:147
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:216
llvm::FunctionLoweringInfo::MBBMap
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
Definition: FunctionLoweringInfo.h:73
llvm::PHINode::getIncomingValue
Value * getIncomingValue(unsigned i) const
Return incoming value number x.
Definition: Instructions.h:2723
FunctionLoweringInfo.h
llvm::User
Definition: User.h:44
llvm::TargetFrameLowering::getStackAlign
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:100
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:35
llvm::TargetLowering::CanLowerReturn
virtual bool CanLowerReturn(CallingConv::ID, MachineFunction &, bool, const SmallVectorImpl< ISD::OutputArg > &, LLVMContext &) const
This hook should be implemented to check whether the return values described by the Outs array can fi...
Definition: TargetLowering.h:3955
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3170
llvm::KnownBits::One
APInt One
Definition: KnownBits.h:25
llvm::FunctionLoweringInfo::ArgDbgValues
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Definition: FunctionLoweringInfo.h:132
llvm::SelectionDAG::getDivergenceAnalysis
const LegacyDivergenceAnalysis * getDivergenceAnalysis() const
Definition: SelectionDAG.h:446
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::FunctionLoweringInfo::ComputePHILiveOutRegInfo
void ComputePHILiveOutRegInfo(const PHINode *)
ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination register based on the LiveOutI...
Definition: FunctionLoweringInfo.cpp:435
llvm::FunctionLoweringInfo::GetLiveOutRegInfo
const LiveOutInfo * GetLiveOutRegInfo(Register Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
Definition: FunctionLoweringInfo.h:217
llvm::Type::isVectorTy
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:237
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::ISD::NodeType
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:40
llvm::MachineFrameInfo::setHasOpaqueSPAdjustment
void setHasOpaqueSPAdjustment(bool B)
Definition: MachineFrameInfo.h:584
llvm::FunctionLoweringInfo::LiveOutInfo::NumSignBits
unsigned NumSignBits
Definition: FunctionLoweringInfo.h:156
llvm::Instruction
Definition: Instruction.h:45
llvm::TargetFrameLowering::isStackRealignable
bool isStackRealignable() const
isStackRealignable - This method returns whether the stack can be realigned.
Definition: TargetFrameLowering.h:122
llvm::Function::hasPersonalityFn
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:830
llvm::FunctionLoweringInfo::LiveOutInfo::Known
KnownBits Known
Definition: FunctionLoweringInfo.h:158
llvm::FunctionLoweringInfo::LiveOutInfo::IsValid
unsigned IsValid
Definition: FunctionLoweringInfo.h:157
isUsedOutsideOfDefiningBlock
static bool isUsedOutsideOfDefiningBlock(const Instruction *I)
isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...
Definition: FunctionLoweringInfo.cpp:49
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::MachineFunction::getWasmEHFuncInfo
const WasmEHFuncInfo * getWasmEHFuncInfo() const
getWasmEHFuncInfo - Return information about how the current function uses Wasm exception handling.
Definition: MachineFunction.h:660
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::FunctionLoweringInfo::InitializeRegForValue
Register InitializeRegForValue(const Value *V)
Definition: FunctionLoweringInfo.h:205
llvm::ValueMap::count
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: ValueMap.h:152
llvm::PHINode::getNumIncomingValues
unsigned getNumIncomingValues() const
Return the number of incoming edges.
Definition: Instructions.h:2719
llvm::EHPersonality::Wasm_CXX
@ Wasm_CXX
llvm::ValueMap::clear
void clear()
Definition: ValueMap.h:146
llvm::TargetLoweringBase::requiresUniformRegister
virtual bool requiresUniformRegister(MachineFunction &MF, const Value *) const
Allows target to decide about the register class of the specific value that is live outside the defin...
Definition: TargetLowering.h:861
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::TargetLoweringBase::getTypeToTransformTo
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
Definition: TargetLowering.h:941
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::Function::getAttributes
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition: Function.h:249
llvm::Type::isIntegerTy
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:201
llvm::DataLayout::getPrefTypeAlign
Align getPrefTypeAlign(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:830
llvm::Register::isVirtual
bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:91
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:622
llvm::FunctionLoweringInfo::TLI
const TargetLowering * TLI
Definition: FunctionLoweringInfo.h:57
llvm::WinEHTryBlockMapEntry
Definition: WinEHFuncInfo.h:72
llvm::MachineFunction::push_back
void push_back(MachineBasicBlock *MBB)
Definition: MachineFunction.h:821
llvm::MachineFrameInfo::setHasMustTailInVarArgFunc
void setHasMustTailInVarArgFunc(bool B)
Definition: MachineFrameInfo.h:601
llvm::WinEHFuncInfo
Definition: WinEHFuncInfo.h:90
llvm::EVT::getSizeInBits
TypeSize getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:341
llvm::Function::getReturnType
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:180
llvm::Function::getCallingConv
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:238
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:572
llvm::MachineBasicBlock::setIsEHPad
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
Definition: MachineBasicBlock.h:530
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
llvm::TargetLowering::ParseConstraints
virtual AsmOperandInfoVector ParseConstraints(const DataLayout &DL, const TargetRegisterInfo *TRI, const CallBase &Call) const
Split up the constraint string from the inline assembly value into the specific constraints and their...
Definition: TargetLowering.cpp:4650
llvm::DenseMap
Definition: DenseMap.h:714
llvm::WinEHTryBlockMapEntry::HandlerArray
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:76
I
#define I(x, y, z)
Definition: MD5.cpp:59
Analysis.h
llvm::TargetLowering::AsmOperandInfo
This contains information for each constraint that we are lowering.
Definition: TargetLowering.h:4164
llvm::MachineFunction::CreateMachineBasicBlock
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
Definition: MachineFunction.cpp:414
llvm::Register::isVirtualRegister
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:71
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::find
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:150
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineFrameInfo::CreateFixedObject
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
Definition: MachineFrameInfo.cpp:83
llvm::MachineBasicBlock::setHasAddressTaken
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
Definition: MachineBasicBlock.h:215
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:638
llvm::FunctionLoweringInfo::CatchPadExceptionPointers
DenseMap< const Value *, Register > CatchPadExceptionPointers
Track virtual registers created for exception pointers.
Definition: FunctionLoweringInfo.h:92
llvm::FunctionLoweringInfo::CreateRegs
Register CreateRegs(const Value *V)
Definition: FunctionLoweringInfo.cpp:406
llvm::WasmEHFuncInfo::SrcToUnwindDest
DenseMap< BBOrMBB, BBOrMBB > SrcToUnwindDest
Definition: WasmEHFuncInfo.h:35
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::FunctionLoweringInfo::ByValArgFrameIndexMap
DenseMap< const Argument *, int > ByValArgFrameIndexMap
ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
Definition: FunctionLoweringInfo.h:128
llvm::EHPersonality::CoreCLR
@ CoreCLR
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:70
llvm::MachineFunction
Definition: MachineFunction.h:230
TargetOptions.h
llvm::SmallPtrSetImplBase::clear
void clear()
Definition: SmallPtrSet.h:94
llvm::MachineFrameInfo::setStackID
void setStackID(int ObjectIdx, uint8_t ID)
Definition: MachineFrameInfo.h:702
llvm::min
Expected< ExpressionValue > min(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:357
DataLayout.h
llvm::MachineFrameInfo::CreateStackObject
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
Definition: MachineFrameInfo.cpp:51
llvm::MachineFunction::setHasEHScopes
void setHasEHScopes(bool V)
Definition: MachineFunction.h:1044
llvm::Value::getType
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:256
getParent
static const Function * getParent(const Value *V)
Definition: BasicAliasAnalysis.cpp:776
llvm::SEHUnwindMapEntry
Similar to CxxUnwindMapEntry, but supports SEH filters.
Definition: WinEHFuncInfo.h:46
llvm::Value::getContext
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:979
TargetSubtargetInfo.h
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::LegacyDivergenceAnalysis::isDivergent
bool isDivergent(const Value *V) const
Definition: LegacyDivergenceAnalysis.cpp:359
llvm::TargetLowering::getRegForInlineAsmConstraint
virtual std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const
Given a physical register constraint (e.g.
Definition: TargetLowering.cpp:4588
llvm::FunctionLoweringInfo::StatepointRelocationMaps
DenseMap< const Instruction *, StatepointSpillMapTy > StatepointRelocationMaps
Definition: FunctionLoweringInfo.h:120
llvm::Type::getContext
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:127
llvm::ValueMap
See the file comment.
Definition: ValueMap.h:85
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::insert
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:207
llvm::EHPersonality
EHPersonality
Definition: EHPersonalities.h:22
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::SEHUnwindMapEntry::Handler
MBBOrBasicBlock Handler
Holds the __except or __finally basic block.
Definition: WinEHFuncInfo.h:57
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::ConstantInt::getZExtValue
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:142
llvm::WinEHFuncInfo::SEHUnwindMap
SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap
Definition: WinEHFuncInfo.h:97
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
llvm::FunctionLoweringInfo::VisitedBBs
SmallPtrSet< const BasicBlock *, 4 > VisitedBBs
VisitedBBs - The set of basic blocks visited thus far by instruction selection.
Definition: FunctionLoweringInfo.h:169
llvm::KnownBits
Definition: KnownBits.h:23
H
#define H(x, y, z)
Definition: MD5.cpp:58
llvm::TargetSubtargetInfo::getFrameLowering
virtual const TargetFrameLowering * getFrameLowering() const
Definition: TargetSubtargetInfo.h:93
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::end
iterator end()
Definition: DenseMap.h:83
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:314
llvm::InlineAsm::isClobber
@ isClobber
Definition: InlineAsm.h:96
MachineFrameInfo.h
llvm::MachineFunction::getWinEHFuncInfo
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling.
Definition: MachineFunction.h:666
WasmEHFuncInfo.h
llvm::FunctionLoweringInfo::clear
void clear()
clear - Clear out all the function-specific state.
Definition: FunctionLoweringInfo.cpp:356
llvm::CxxUnwindMapEntry
Definition: WinEHFuncInfo.h:40
Function.h
llvm::BitWidth
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:147
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:138
llvm::SmallVectorImpl::clear
void clear()
Definition: SmallVector.h:585
llvm::FunctionLoweringInfo::setArgumentFrameIndex
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
Definition: FunctionLoweringInfo.cpp:524
llvm::FunctionLoweringInfo::RegFixups
DenseMap< Register, Register > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
Definition: FunctionLoweringInfo.h:139
llvm::Function::getPersonalityFn
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1783
WinEHFuncInfo.h
llvm::Function::isVarArg
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:188
Instructions.h
llvm::FunctionLoweringInfo::MF
MachineFunction * MF
Definition: FunctionLoweringInfo.h:56
llvm::GetReturnInfo
void GetReturnInfo(CallingConv::ID CC, Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags,...
Definition: TargetLoweringBase.cpp:1645
LegacyDivergenceAnalysis.h
llvm::TargetSubtargetInfo::getTargetLowering
virtual const TargetLowering * getTargetLowering() const
Definition: TargetSubtargetInfo.h:96
MachineInstrBuilder.h
llvm::WasmEHFuncInfo::UnwindDestToSrcs
DenseMap< BBOrMBB, SmallPtrSet< BBOrMBB, 4 > > UnwindDestToSrcs
Definition: WasmEHFuncInfo.h:36
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
llvm::KnownBits::commonBits
static KnownBits commonBits(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits common to LHS and RHS.
Definition: KnownBits.h:289
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:340
llvm::TargetLoweringBase::getRegClassFor
virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const
Return the register class that should be used for the specified value type.
Definition: TargetLowering.h:851
llvm::FunctionLoweringInfo::VirtReg2Value
DenseMap< Register, const Value * > VirtReg2Value
VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.
Definition: FunctionLoweringInfo.h:85
llvm::MachineFunction::getDataLayout
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Definition: MachineFunction.cpp:260
llvm::TargetLoweringBase::getRegisterType
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
Definition: TargetLowering.h:1459
llvm::PHINode
Definition: Instructions.h:2627
llvm::KnownBits::makeConstant
static KnownBits makeConstant(const APInt &C)
Create known bits from a known constant.
Definition: KnownBits.h:284
llvm::TypeSize::getKnownMinSize
ScalarTy getKnownMinSize() const
Definition: TypeSize.h:427
llvm::TargetLoweringBase::getNumRegisters
virtual unsigned getNumRegisters(LLVMContext &Context, EVT VT, Optional< MVT > RegisterVT=None) const
Return the number of registers that this ValueType will eventually require.
Definition: TargetLowering.h:1497
llvm::Module::getDataLayout
const DataLayout & getDataLayout() const
Get the data layout for the module's target platform.
Definition: Module.cpp:401
DerivedTypes.h
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::KnownBits::getBitWidth
unsigned getBitWidth() const
Get the bit width of this value.
Definition: KnownBits.h:40
LLVMContext.h
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::AllocaInst
an instruction to allocate memory on the stack
Definition: Instructions.h:62
getPreferredExtendForValue
static ISD::NodeType getPreferredExtendForValue(const Value *V)
Definition: FunctionLoweringInfo.cpp:60
llvm::calculateSEHStateNumbers
void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Definition: WinEHPrepare.cpp:451
llvm::ISD::SIGN_EXTEND
@ SIGN_EXTEND
Conversion operators.
Definition: ISDOpcodes.h:726
raw_ostream.h
MachineFunction.h
llvm::FunctionLoweringInfo::getArgumentFrameIndex
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
Definition: FunctionLoweringInfo.cpp:532
llvm::calculateWinCXXEHStateNumbers
void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Analyze the IR in ParentFn and it's handlers to build WinEHFuncInfo, which describes the state number...
Definition: WinEHPrepare.cpp:469
llvm::FunctionLoweringInfo::DA
const LegacyDivergenceAnalysis * DA
Definition: FunctionLoweringInfo.h:60
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
llvm::MachineFrameInfo::setHasVAStart
void setHasVAStart(bool B)
Definition: MachineFrameInfo.h:597
TargetRegisterInfo.h
Debug.h
llvm::Value::users
iterator_range< user_iterator > users()
Definition: Value.h:422
llvm::FunctionLoweringInfo::CreateReg
Register CreateReg(MVT VT, bool isDivergent=false)
CreateReg - Allocate a single virtual register for the given type.
Definition: FunctionLoweringInfo.cpp:374
llvm::FunctionLoweringInfo::RegInfo
MachineRegisterInfo * RegInfo
Definition: FunctionLoweringInfo.h:58
llvm::calculateWasmEHInfo
void calculateWasmEHInfo(const Function *F, WasmEHFuncInfo &EHInfo)
Definition: WasmEHPrepare.cpp:343
llvm::isFuncletEHPersonality
bool isFuncletEHPersonality(EHPersonality Pers)
Returns true if this is a personality function that invokes handler funclets (which must return to it...
Definition: EHPersonalities.h:65
llvm::FunctionLoweringInfo::getCatchPadExceptionPointerVReg
Register getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
Definition: FunctionLoweringInfo.cpp:540
llvm::FunctionLoweringInfo::PreferredExtendType
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.
Definition: FunctionLoweringInfo.h:165
llvm::calculateClrEHStateNumbers
void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)
Definition: WinEHPrepare.cpp:500
llvm::DataLayout::getTypeAllocSize
TypeSize getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:498