LLVM 22.0.0git
llvm::AVRInstrInfo Class Reference

Utilities related to the AVR instruction set. More...

#include "Target/AVR/AVRInstrInfo.h"

Inheritance diagram for llvm::AVRInstrInfo:
[legend]

Public Member Functions

 AVRInstrInfo (const AVRSubtarget &STI)
const AVRRegisterInfogetRegisterInfo () const
const MCInstrDescgetBrCond (AVRCC::CondCodes CC) const
AVRCC::CondCodes getCondFromBranchOpc (unsigned Opc) const
AVRCC::CondCodes getOppositeCondition (AVRCC::CondCodes CC) const
unsigned getInstSizeInBytes (const MachineInstr &MI) const override
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
Register isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override
Register isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override
bool analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override
unsigned insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
unsigned removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
bool reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
MachineBasicBlockgetBranchDestBlock (const MachineInstr &MI) const override
bool isBranchOffsetInRange (unsigned BranchOpc, int64_t BrOffset) const override
void insertIndirectBranch (MachineBasicBlock &MBB, MachineBasicBlock &NewDestBB, MachineBasicBlock &RestoreBB, const DebugLoc &DL, int64_t BrOffset, RegScavenger *RS) const override

Protected Attributes

const AVRSubtargetSTI

Detailed Description

Utilities related to the AVR instruction set.

Definition at line 66 of file AVRInstrInfo.h.

Constructor & Destructor Documentation

◆ AVRInstrInfo()

llvm::AVRInstrInfo::AVRInstrInfo ( const AVRSubtarget & STI)
explicit

Definition at line 32 of file AVRInstrInfo.cpp.

References STI.

Member Function Documentation

◆ analyzeBranch()

◆ copyPhysReg()

void llvm::AVRInstrInfo::copyPhysReg ( MachineBasicBlock & MBB,
MachineBasicBlock::iterator MI,
const DebugLoc & DL,
Register DestReg,
Register SrcReg,
bool KillSrc,
bool RenamableDest = false,
bool RenamableSrc = false ) const
override

◆ getBranchDestBlock()

MachineBasicBlock * llvm::AVRInstrInfo::getBranchDestBlock ( const MachineInstr & MI) const
override

Definition at line 503 of file AVRInstrInfo.cpp.

References llvm_unreachable, and MI.

◆ getBrCond()

◆ getCondFromBranchOpc()

◆ getInstSizeInBytes()

unsigned llvm::AVRInstrInfo::getInstSizeInBytes ( const MachineInstr & MI) const
override

Definition at line 476 of file AVRInstrInfo.cpp.

References llvm::get(), llvm::MachineFunction::getTarget(), MI, STI, and TII.

Referenced by insertBranch(), and removeBranch().

◆ getOppositeCondition()

◆ getRegisterInfo()

const AVRRegisterInfo & llvm::AVRInstrInfo::getRegisterInfo ( ) const
inline

Definition at line 70 of file AVRInstrInfo.h.

◆ insertBranch()

unsigned llvm::AVRInstrInfo::insertBranch ( MachineBasicBlock & MBB,
MachineBasicBlock * TBB,
MachineBasicBlock * FBB,
ArrayRef< MachineOperand > Cond,
const DebugLoc & DL,
int * BytesAdded = nullptr ) const
override

◆ insertIndirectBranch()

void llvm::AVRInstrInfo::insertIndirectBranch ( MachineBasicBlock & MBB,
MachineBasicBlock & NewDestBB,
MachineBasicBlock & RestoreBB,
const DebugLoc & DL,
int64_t BrOffset,
RegScavenger * RS ) const
override

◆ isBranchOffsetInRange()

bool llvm::AVRInstrInfo::isBranchOffsetInRange ( unsigned BranchOpc,
int64_t BrOffset ) const
override

Definition at line 531 of file AVRInstrInfo.cpp.

References llvm::isIntN(), llvm_unreachable, and STI.

◆ isLoadFromStackSlot()

Register llvm::AVRInstrInfo::isLoadFromStackSlot ( const MachineInstr & MI,
int & FrameIndex ) const
override

Definition at line 89 of file AVRInstrInfo.cpp.

References MI.

◆ isStoreToStackSlot()

Register llvm::AVRInstrInfo::isStoreToStackSlot ( const MachineInstr & MI,
int & FrameIndex ) const
override

Definition at line 108 of file AVRInstrInfo.cpp.

References MI.

◆ loadRegFromStackSlot()

◆ removeBranch()

unsigned llvm::AVRInstrInfo::removeBranch ( MachineBasicBlock & MBB,
int * BytesRemoved = nullptr ) const
override

◆ reverseBranchCondition()

bool llvm::AVRInstrInfo::reverseBranchCondition ( SmallVectorImpl< MachineOperand > & Cond) const
override

Definition at line 466 of file AVRInstrInfo.cpp.

References assert(), Cond, and getOppositeCondition().

◆ storeRegToStackSlot()

Member Data Documentation

◆ STI

const AVRSubtarget& llvm::AVRInstrInfo::STI
protected

The documentation for this class was generated from the following files: