LLVM 23.0.0git
AMDGPUMCExpr.cpp
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1//===- AMDGPUMCExpr.cpp - AMDGPU specific MC expression classes -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "AMDGPUMCExpr.h"
11#include "llvm/MC/MCAsmInfo.h"
12#include "llvm/MC/MCAssembler.h"
13#include "llvm/MC/MCContext.h"
14#include "llvm/MC/MCStreamer.h"
16#include "llvm/MC/MCSymbol.h"
17#include "llvm/MC/MCValue.h"
22#include <functional>
23#include <optional>
24
25using namespace llvm;
26using namespace llvm::AMDGPU;
27
28AMDGPUMCExpr::AMDGPUMCExpr(VariantKind Kind, ArrayRef<const MCExpr *> Args,
29 MCContext &Ctx)
30 : Kind(Kind), Ctx(Ctx) {
31 assert(Args.size() >= 1 && "Needs a minimum of one expression.");
32 assert(Kind != AGVK_None && "Cannot construct AMDGPUMCExpr of kind none.");
33 assert((getNumExpectedArgs(Kind) == 0 ||
34 Args.size() == getNumExpectedArgs(Kind)) &&
35 "wrong number of operands for AMDGPUMCExpr kind.");
36
37 // Allocating the variadic arguments through the same allocation mechanism
38 // that the object itself is allocated with so they end up in the same memory.
39 //
40 // Will result in an asan failure if allocated on the heap through standard
41 // allocation (e.g., through SmallVector's grow).
42 RawArgs = static_cast<const MCExpr **>(
43 Ctx.allocate(sizeof(const MCExpr *) * Args.size()));
44 llvm::uninitialized_copy(Args, RawArgs);
45 this->Args = ArrayRef<const MCExpr *>(RawArgs, Args.size());
46}
47
48AMDGPUMCExpr::~AMDGPUMCExpr() { Ctx.deallocate(RawArgs); }
49
50const AMDGPUMCExpr *AMDGPUMCExpr::create(VariantKind Kind,
52 MCContext &Ctx) {
53 return new (Ctx) AMDGPUMCExpr(Kind, Args, Ctx);
54}
55
57 switch (Kind) {
58 case AGVK_None:
59 llvm_unreachable("AGVK_None is not a valid AMDGPUMCExpr kind.");
60 case AGVK_Or:
61 case AGVK_Max:
62 case AGVK_Min:
63 // Variadic (parser requires >= 1).
64 return 0;
65 case AGVK_Lit:
66 case AGVK_Lit64:
68 return 1;
70 case AGVK_AlignTo:
71 return 2;
72 case AGVK_ExtraSGPRs:
73 return 3;
74 case AGVK_Occupancy:
75 return 9;
76 }
77 llvm_unreachable("unknown AMDGPUMCExpr kind.");
78}
79
80const MCExpr *AMDGPUMCExpr::getSubExpr(size_t Index) const {
81 assert(Index < Args.size() && "Indexing out of bounds AMDGPUMCExpr sub-expr");
82 return Args[Index];
83}
84
85void AMDGPUMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
86 switch (Kind) {
87 default:
88 llvm_unreachable("Unknown AMDGPUMCExpr kind.");
89 case AGVK_Or:
90 OS << "or(";
91 break;
92 case AGVK_Max:
93 OS << "max(";
94 break;
95 case AGVK_Min:
96 OS << "min(";
97 break;
98 case AGVK_ExtraSGPRs:
99 OS << "extrasgprs(";
100 break;
102 OS << "totalnumvgprs(";
103 break;
104 case AGVK_AlignTo:
105 OS << "alignto(";
106 break;
107 case AGVK_Occupancy:
108 OS << "occupancy(";
109 break;
111 OS << "instprefsize(";
112 break;
113 case AGVK_Lit:
114 OS << "lit(";
115 break;
116 case AGVK_Lit64:
117 OS << "lit64(";
118 break;
119 }
120 for (const auto *It = Args.begin(); It != Args.end(); ++It) {
121 MAI->printExpr(OS, **It);
122 if ((It + 1) != Args.end())
123 OS << ", ";
124 }
125 OS << ')';
126}
127
128static int64_t op(AMDGPUMCExpr::VariantKind Kind, int64_t Arg1, int64_t Arg2) {
129 switch (Kind) {
130 default:
131 llvm_unreachable("Unknown AMDGPUMCExpr kind.");
133 return std::max(Arg1, Arg2);
135 return Arg1 | Arg2;
137 return std::min(Arg1, Arg2);
138 }
139}
140
141static bool
143 std::initializer_list<std::reference_wrapper<uint64_t>> Vals) {
144 return llvm::all_of(llvm::zip_equal(Exprs, Vals), [&](const auto &Pair) {
145 auto [Expr, ValRef] = Pair;
146 uint64_t &Val = ValRef.get();
147 MCValue MCVal;
148 if (!Expr->evaluateAsRelocatable(MCVal, Asm) || !MCVal.isAbsolute())
149 return false;
150 Val = MCVal.getConstant();
151 return true;
152 });
153}
154
155bool AMDGPUMCExpr::evaluateExtraSGPRs(MCValue &Res,
156 const MCAssembler *Asm) const {
157 const MCSubtargetInfo &STI = *Ctx.getSubtargetInfo();
158 uint64_t VCCUsed = 0, FlatScrUsed = 0, XNACKUsed = 0;
159
160 if (!evaluateMCExprs(Args, Asm, {VCCUsed, FlatScrUsed, XNACKUsed}))
161 return false;
162
163 uint64_t ExtraSGPRs = IsaInfo::getNumExtraSGPRs(
164 STI, (bool)VCCUsed, (bool)FlatScrUsed, (bool)XNACKUsed);
165 Res = MCValue::get(ExtraSGPRs);
166 return true;
167}
168
169bool AMDGPUMCExpr::evaluateTotalNumVGPR(MCValue &Res,
170 const MCAssembler *Asm) const {
171 const MCSubtargetInfo &STI = *Ctx.getSubtargetInfo();
172 uint64_t NumAGPR = 0, NumVGPR = 0;
173
174 bool Has90AInsts = AMDGPU::isGFX90A(STI);
175
176 if (!evaluateMCExprs(Args, Asm, {NumAGPR, NumVGPR}))
177 return false;
178
179 uint64_t TotalNum = Has90AInsts && NumAGPR ? alignTo(NumVGPR, 4) + NumAGPR
180 : std::max(NumVGPR, NumAGPR);
181 Res = MCValue::get(TotalNum);
182 return true;
183}
184
185bool AMDGPUMCExpr::evaluateAlignTo(MCValue &Res, const MCAssembler *Asm) const {
186 uint64_t Value = 0, Align = 0;
187 if (!evaluateMCExprs(Args, Asm, {Value, Align}))
188 return false;
189
190 Res = MCValue::get(alignTo(Value, Align));
191 return true;
192}
193
194bool AMDGPUMCExpr::evaluateOccupancy(MCValue &Res,
195 const MCAssembler *Asm) const {
196 uint64_t InitOccupancy, MaxWaves, Granule, TargetTotalNumVGPRs, NumSGPRs,
197 NumVGPRs, SGPRTotal, SGPRGranule, SGPRTrapReserve;
198
199 // Leading operands are known constants (wave/VGPR caps + the SGPR budget
200 // total/granule/trap reserve baked in by createOccupancy); only NumSGPRs and
201 // NumVGPRs can still be symbolic. The SGPR budget makes the SGPR-limited
202 // occupancy match getMaxNumSGPRs().
203 bool Success =
204 evaluateMCExprs(Args.slice(0, 7), Asm,
205 {MaxWaves, Granule, TargetTotalNumVGPRs, InitOccupancy,
206 SGPRTotal, SGPRGranule, SGPRTrapReserve});
207
208 assert(Success && "Arguments 1 to 7 for Occupancy should be known constants");
209
210 if (!Success || !evaluateMCExprs(Args.slice(7, 2), Asm, {NumSGPRs, NumVGPRs}))
211 return false;
212
213 unsigned Occupancy = InitOccupancy;
214 if (NumSGPRs)
215 Occupancy = std::min(Occupancy, IsaInfo::getOccupancyWithNumSGPRs(
216 NumSGPRs, MaxWaves, SGPRTotal,
217 SGPRGranule, SGPRTrapReserve));
218 if (NumVGPRs)
219 Occupancy = std::min(Occupancy,
221 NumVGPRs, Granule, MaxWaves, TargetTotalNumVGPRs));
222
223 Res = MCValue::get(Occupancy);
224 return true;
225}
226
227/// Get the inst_pref_size field width for the given subtarget.
228static unsigned getInstPrefSizeFieldWidth(const MCSubtargetInfo &STI) {
229 if (AMDGPU::isGFX12Plus(STI))
230 return amdhsa::COMPUTE_PGM_RSRC3_GFX12_PLUS_INST_PREF_SIZE_WIDTH;
231 return amdhsa::COMPUTE_PGM_RSRC3_GFX11_INST_PREF_SIZE_WIDTH;
232}
233
234bool AMDGPUMCExpr::evaluateInstPrefSize(MCValue &Res,
235 const MCAssembler *Asm) const {
236 uint64_t CodeSizeInBytes = 0;
237 if (!evaluateMCExprs(Args, Asm, {CodeSizeInBytes}))
238 return false;
239 const MCSubtargetInfo *STI = Ctx.getSubtargetInfo();
240 unsigned FieldWidth = getInstPrefSizeFieldWidth(*STI);
242 uint64_t CodeSizeInLines = divideCeil(CodeSizeInBytes, CacheLineSize);
243 uint64_t MaxVal = (1u << FieldWidth) - 1;
244 Res = MCValue::get(std::min(CodeSizeInLines, MaxVal));
245 return true;
246}
247
249 const MCExpr *E) {
250 switch (E->getKind()) {
251 case MCExpr::Constant:
252 return false;
253 case MCExpr::Unary:
255 Sym, static_cast<const MCUnaryExpr *>(E)->getSubExpr());
256 case MCExpr::Binary: {
257 const MCBinaryExpr *BE = static_cast<const MCBinaryExpr *>(E);
258 return isSymbolUsedInExpression(Sym, BE->getLHS()) ||
260 }
261 case MCExpr::SymbolRef: {
262 const MCSymbol &S = static_cast<const MCSymbolRefExpr *>(E)->getSymbol();
263 if (S.isVariable())
265 return &S == Sym;
266 }
268 case MCExpr::Target: {
269 auto *TE = static_cast<const AMDGPUMCExpr *>(E);
270 for (const MCExpr *E : TE->getArgs())
271 if (isSymbolUsedInExpression(Sym, E))
272 return true;
273 return false;
274 }
275 }
276 llvm_unreachable("Unknown expr kind!");
277}
278
280 const MCAssembler *Asm) const {
281 std::optional<int64_t> Total;
282 switch (Kind) {
283 default:
284 break;
285 case AGVK_ExtraSGPRs:
286 return evaluateExtraSGPRs(Res, Asm);
287 case AGVK_AlignTo:
288 return evaluateAlignTo(Res, Asm);
290 return evaluateTotalNumVGPR(Res, Asm);
291 case AGVK_Occupancy:
292 return evaluateOccupancy(Res, Asm);
294 return evaluateInstPrefSize(Res, Asm);
295 case AGVK_Lit:
296 case AGVK_Lit64:
297 return Args[0]->evaluateAsRelocatable(Res, Asm);
298 }
299
300 for (const MCExpr *Arg : Args) {
301 MCValue ArgRes;
302 if (!Arg->evaluateAsRelocatable(ArgRes, Asm) || !ArgRes.isAbsolute())
303 return false;
304
305 if (!Total.has_value())
306 Total = ArgRes.getConstant();
307 Total = op(Kind, *Total, ArgRes.getConstant());
308 }
309
310 Res = MCValue::get(*Total);
311 return true;
312}
313
315 for (const MCExpr *Arg : Args)
316 Streamer.visitUsedExpr(*Arg);
317}
318
320 for (const MCExpr *Arg : Args) {
321 if (Arg->findAssociatedFragment())
322 return Arg->findAssociatedFragment();
323 }
324 return nullptr;
325}
326
327/// Allow delayed MCExpr resolve of ExtraSGPRs (in case VCCUsed or FlatScrUsed
328/// are unresolvable but needed for further MCExprs). Derived from
329/// implementation of IsaInfo::getNumExtraSGPRs in AMDGPUBaseInfo.cpp.
330///
331const AMDGPUMCExpr *AMDGPUMCExpr::createExtraSGPRs(const MCExpr *VCCUsed,
332 const MCExpr *FlatScrUsed,
333 bool XNACKUsed,
334 MCContext &Ctx) {
335
336 return create(AGVK_ExtraSGPRs,
337 {VCCUsed, FlatScrUsed, MCConstantExpr::create(XNACKUsed, Ctx)},
338 Ctx);
339}
340
341const AMDGPUMCExpr *AMDGPUMCExpr::createTotalNumVGPR(const MCExpr *NumAGPR,
342 const MCExpr *NumVGPR,
343 MCContext &Ctx) {
344 return create(AGVK_TotalNumVGPRs, {NumAGPR, NumVGPR}, Ctx);
345}
346
347const AMDGPUMCExpr *
349 return create(AGVK_InstPrefSize, {CodeSizeBytes}, Ctx);
350}
351
352const AMDGPUMCExpr *AMDGPUMCExpr::createLit(LitModifier Lit, int64_t Value,
353 MCContext &Ctx) {
357 {MCConstantExpr::create(Value, Ctx, /*PrintInHex=*/true)}, Ctx);
358}
359
360static KnownBits fromOptionalToKnownBits(std::optional<bool> CompareResult) {
361 static constexpr unsigned BitWidth = 64;
362 const APInt True(BitWidth, 1);
363 const APInt False(BitWidth, 0);
364 if (CompareResult) {
365 return *CompareResult ? KnownBits::makeConstant(True)
367 }
368
369 KnownBits UnknownBool(/*BitWidth=*/1);
370 return UnknownBool.zext(BitWidth);
371}
372
374static void knownBitsMapHelper(const MCExpr *Expr, KnownBitsMap &KBM,
375 unsigned Depth = 0);
376
377static void binaryOpKnownBitsMapHelper(const MCExpr *Expr, KnownBitsMap &KBM,
378 unsigned Depth) {
379 static constexpr unsigned BitWidth = 64;
380 const MCBinaryExpr *BExpr = cast<MCBinaryExpr>(Expr);
381 const MCExpr *LHS = BExpr->getLHS();
382 const MCExpr *RHS = BExpr->getRHS();
383
384 knownBitsMapHelper(LHS, KBM, Depth + 1);
385 knownBitsMapHelper(RHS, KBM, Depth + 1);
386 KnownBits LHSKnown = KBM[LHS];
387 KnownBits RHSKnown = KBM[RHS];
388
389 switch (BExpr->getOpcode()) {
390 default:
391 KBM[Expr] = KnownBits(BitWidth);
392 return;
394 KBM[Expr] = KnownBits::add(LHSKnown, RHSKnown);
395 return;
397 KBM[Expr] = LHSKnown & RHSKnown;
398 return;
400 KBM[Expr] = KnownBits::sdiv(LHSKnown, RHSKnown);
401 return;
403 std::optional<bool> CompareRes = KnownBits::eq(LHSKnown, RHSKnown);
404 KBM[Expr] = fromOptionalToKnownBits(CompareRes);
405 return;
406 }
408 std::optional<bool> CompareRes = KnownBits::ne(LHSKnown, RHSKnown);
409 KBM[Expr] = fromOptionalToKnownBits(CompareRes);
410 return;
411 }
413 std::optional<bool> CompareRes = KnownBits::sgt(LHSKnown, RHSKnown);
414 KBM[Expr] = fromOptionalToKnownBits(CompareRes);
415 return;
416 }
418 std::optional<bool> CompareRes = KnownBits::sge(LHSKnown, RHSKnown);
419 KBM[Expr] = fromOptionalToKnownBits(CompareRes);
420 return;
421 }
423 std::optional<bool> CompareRes;
424 const APInt False(BitWidth, 0);
425 std::optional<bool> LHSBool =
426 KnownBits::ne(LHSKnown, KnownBits::makeConstant(False));
427 std::optional<bool> RHSBool =
428 KnownBits::ne(RHSKnown, KnownBits::makeConstant(False));
429 if (LHSBool && RHSBool)
430 CompareRes = *LHSBool && *RHSBool;
431 KBM[Expr] = fromOptionalToKnownBits(CompareRes);
432 return;
433 }
435 const APInt False(BitWidth, 0);
436 KnownBits Bits = LHSKnown | RHSKnown;
437 std::optional<bool> CompareRes =
439 KBM[Expr] = fromOptionalToKnownBits(CompareRes);
440 return;
441 }
443 std::optional<bool> CompareRes = KnownBits::slt(LHSKnown, RHSKnown);
444 KBM[Expr] = fromOptionalToKnownBits(CompareRes);
445 return;
446 }
448 std::optional<bool> CompareRes = KnownBits::sle(LHSKnown, RHSKnown);
449 KBM[Expr] = fromOptionalToKnownBits(CompareRes);
450 return;
451 }
453 KBM[Expr] = KnownBits::srem(LHSKnown, RHSKnown);
454 return;
456 KBM[Expr] = KnownBits::mul(LHSKnown, RHSKnown);
457 return;
459 KBM[Expr] = LHSKnown | RHSKnown;
460 return;
462 KBM[Expr] = KnownBits::shl(LHSKnown, RHSKnown);
463 return;
465 KBM[Expr] = KnownBits::ashr(LHSKnown, RHSKnown);
466 return;
468 KBM[Expr] = KnownBits::lshr(LHSKnown, RHSKnown);
469 return;
471 KBM[Expr] = KnownBits::sub(LHSKnown, RHSKnown);
472 return;
474 KBM[Expr] = LHSKnown ^ RHSKnown;
475 return;
476 }
477}
478
479static void unaryOpKnownBitsMapHelper(const MCExpr *Expr, KnownBitsMap &KBM,
480 unsigned Depth) {
481 static constexpr unsigned BitWidth = 64;
482 const MCUnaryExpr *UExpr = cast<MCUnaryExpr>(Expr);
483 knownBitsMapHelper(UExpr->getSubExpr(), KBM, Depth + 1);
484 KnownBits KB = KBM[UExpr->getSubExpr()];
485
486 switch (UExpr->getOpcode()) {
487 default:
488 KBM[Expr] = KnownBits(BitWidth);
489 return;
491 KB.makeNegative();
492 KBM[Expr] = std::move(KB);
493 return;
494 }
497 AllOnes.setAllOnes();
498 KBM[Expr] = KB ^ AllOnes;
499 return;
500 }
502 KB.makeNonNegative();
503 KBM[Expr] = std::move(KB);
504 return;
505 }
506 }
507}
508
509static void targetOpKnownBitsMapHelper(const MCExpr *Expr, KnownBitsMap &KBM,
510 unsigned Depth) {
511 static constexpr unsigned BitWidth = 64;
512 const AMDGPUMCExpr *AGVK = cast<AMDGPUMCExpr>(Expr);
513
514 switch (AGVK->getKind()) {
515 default:
516 KBM[Expr] = KnownBits(BitWidth);
517 return;
519 knownBitsMapHelper(AGVK->getSubExpr(0), KBM, Depth + 1);
520 KnownBits KB = KBM[AGVK->getSubExpr(0)];
521 for (const MCExpr *Arg : AGVK->getArgs()) {
522 knownBitsMapHelper(Arg, KBM, Depth + 1);
523 KB |= KBM[Arg];
524 }
525 KBM[Expr] = std::move(KB);
526 return;
527 }
529 knownBitsMapHelper(AGVK->getSubExpr(0), KBM, Depth + 1);
530 KnownBits KB = KBM[AGVK->getSubExpr(0)];
531 for (const MCExpr *Arg : AGVK->getArgs()) {
532 knownBitsMapHelper(Arg, KBM, Depth + 1);
533 KB = KnownBits::smax(KB, KBM[Arg]);
534 }
535 KBM[Expr] = std::move(KB);
536 return;
537 }
539 knownBitsMapHelper(AGVK->getSubExpr(0), KBM, Depth + 1);
540 KnownBits KB = KBM[AGVK->getSubExpr(0)];
541 for (const MCExpr *Arg : AGVK->getArgs()) {
542 knownBitsMapHelper(Arg, KBM, Depth + 1);
543 KB = KnownBits::smin(KB, KBM[Arg]);
544 }
545 KBM[Expr] = std::move(KB);
546 return;
547 }
555 int64_t Val;
556 if (AGVK->evaluateAsAbsolute(Val)) {
557 APInt APValue(BitWidth, Val);
558 KBM[Expr] = KnownBits::makeConstant(APValue);
559 return;
560 }
562 // The result is clamped to (1 << FieldWidth) - 1, so upper bits are
563 // known zero. FieldWidth is derived from the subtarget.
564 const MCSubtargetInfo *STI = AGVK->getCtx().getSubtargetInfo();
565 unsigned FieldWidth = getInstPrefSizeFieldWidth(*STI);
567 KB.Zero.setBitsFrom(FieldWidth);
568 KBM[Expr] = KB;
569 return;
570 }
571 KBM[Expr] = KnownBits(BitWidth);
572 return;
573 }
574 }
575}
576
577static void knownBitsMapHelper(const MCExpr *Expr, KnownBitsMap &KBM,
578 unsigned Depth) {
579 static constexpr unsigned BitWidth = 64;
580
581 int64_t Val;
582 if (Expr->evaluateAsAbsolute(Val)) {
583 APInt APValue(BitWidth, Val, /*isSigned=*/true);
584 KBM[Expr] = KnownBits::makeConstant(APValue);
585 return;
586 }
587
588 if (Depth == 16) {
589 KBM[Expr] = KnownBits(BitWidth);
590 return;
591 }
592
593 switch (Expr->getKind()) {
596 return;
597 }
599 const MCConstantExpr *CE = cast<MCConstantExpr>(Expr);
600 APInt APValue(BitWidth, CE->getValue(), /*isSigned=*/true);
601 KBM[Expr] = KnownBits::makeConstant(APValue);
602 return;
603 }
605 const MCSymbolRefExpr *RExpr = cast<MCSymbolRefExpr>(Expr);
606 const MCSymbol &Sym = RExpr->getSymbol();
607 if (!Sym.isVariable()) {
608 KBM[Expr] = KnownBits(BitWidth);
609 return;
610 }
611
612 // Variable value retrieval is not for actual use but only for knownbits
613 // analysis.
614 const MCExpr *SymVal = Sym.getVariableValue();
615 knownBitsMapHelper(SymVal, KBM, Depth + 1);
616
617 // Explicitly copy-construct so that there exists a local KnownBits in case
618 // KBM[SymVal] gets invalidated after a potential growth through KBM[Expr].
619 KBM[Expr] = KnownBits(KBM[SymVal]);
620 return;
621 }
624 return;
625 }
628 return;
630 llvm_unreachable("unused by this backend");
631 }
632 }
633}
634
635static const MCExpr *tryFoldHelper(const MCExpr *Expr, KnownBitsMap &KBM,
636 MCContext &Ctx) {
637 if (!KBM.count(Expr))
638 return Expr;
639
640 auto ValueCheckKnownBits = [](KnownBits &KB, unsigned Value) -> bool {
641 if (!KB.isConstant())
642 return false;
643
644 return Value == KB.getConstant();
645 };
646
647 if (Expr->getKind() == MCExpr::ExprKind::Constant)
648 return Expr;
649
650 // Resolving unary operations to constants may make the value more ambiguous.
651 // For example, `~62` becomes `-63`; however, to me it's more ambiguous if a
652 // bit mask value is represented through a negative number.
653 if (Expr->getKind() != MCExpr::ExprKind::Unary) {
654 if (KBM[Expr].isConstant()) {
655 APInt ConstVal = KBM[Expr].getConstant();
656 return MCConstantExpr::create(ConstVal.getSExtValue(), Ctx);
657 }
658
659 int64_t EvalValue;
660 if (Expr->evaluateAsAbsolute(EvalValue))
661 return MCConstantExpr::create(EvalValue, Ctx);
662 }
663
664 switch (Expr->getKind()) {
665 default:
666 return Expr;
668 const MCBinaryExpr *BExpr = cast<MCBinaryExpr>(Expr);
669 const MCExpr *LHS = BExpr->getLHS();
670 const MCExpr *RHS = BExpr->getRHS();
671
672 switch (BExpr->getOpcode()) {
673 default:
674 return Expr;
676 if (ValueCheckKnownBits(KBM[RHS], 0))
677 return tryFoldHelper(LHS, KBM, Ctx);
678 break;
679 }
682 if (ValueCheckKnownBits(KBM[LHS], 0))
683 return tryFoldHelper(RHS, KBM, Ctx);
684 if (ValueCheckKnownBits(KBM[RHS], 0))
685 return tryFoldHelper(LHS, KBM, Ctx);
686 break;
687 }
689 if (ValueCheckKnownBits(KBM[LHS], 1))
690 return tryFoldHelper(RHS, KBM, Ctx);
691 if (ValueCheckKnownBits(KBM[RHS], 1))
692 return tryFoldHelper(LHS, KBM, Ctx);
693 break;
694 }
698 if (ValueCheckKnownBits(KBM[RHS], 0))
699 return tryFoldHelper(LHS, KBM, Ctx);
700 if (ValueCheckKnownBits(KBM[LHS], 0))
701 return MCConstantExpr::create(0, Ctx);
702 break;
703 }
705 if (ValueCheckKnownBits(KBM[LHS], 0) || ValueCheckKnownBits(KBM[RHS], 0))
706 return MCConstantExpr::create(0, Ctx);
707 break;
708 }
709 }
710 const MCExpr *NewLHS = tryFoldHelper(LHS, KBM, Ctx);
711 const MCExpr *NewRHS = tryFoldHelper(RHS, KBM, Ctx);
712 if (NewLHS != LHS || NewRHS != RHS)
713 return MCBinaryExpr::create(BExpr->getOpcode(), NewLHS, NewRHS, Ctx,
714 BExpr->getLoc());
715 return Expr;
716 }
718 const MCUnaryExpr *UExpr = cast<MCUnaryExpr>(Expr);
719 const MCExpr *SubExpr = UExpr->getSubExpr();
720 const MCExpr *NewSubExpr = tryFoldHelper(SubExpr, KBM, Ctx);
721 if (SubExpr != NewSubExpr)
722 return MCUnaryExpr::create(UExpr->getOpcode(), NewSubExpr, Ctx,
723 UExpr->getLoc());
724 return Expr;
725 }
727 const AMDGPUMCExpr *AGVK = cast<AMDGPUMCExpr>(Expr);
729 bool Changed = false;
730 for (const MCExpr *Arg : AGVK->getArgs()) {
731 const MCExpr *NewArg = tryFoldHelper(Arg, KBM, Ctx);
732 NewArgs.push_back(NewArg);
733 Changed |= Arg != NewArg;
734 }
735 return Changed ? AMDGPUMCExpr::create(AGVK->getKind(), NewArgs, Ctx) : Expr;
736 }
737 }
738 return Expr;
739}
740
742 MCContext &Ctx) {
743 KnownBitsMap KBM;
744 knownBitsMapHelper(Expr, KBM);
745 const MCExpr *NewExpr = tryFoldHelper(Expr, KBM, Ctx);
746
747 return Expr != NewExpr ? NewExpr : Expr;
748}
749
751 const MCAsmInfo *MAI) {
752 int64_t Val;
753 if (Expr->evaluateAsAbsolute(Val)) {
754 OS << Val;
755 return;
756 }
757
758 MAI->printExpr(OS, *Expr);
759}
760
761bool AMDGPU::isLitExpr(const MCExpr *Expr) {
762 const auto *E = dyn_cast<AMDGPUMCExpr>(Expr);
763 return E && (E->getKind() == AMDGPUMCExpr::AGVK_Lit ||
764 E->getKind() == AMDGPUMCExpr::AGVK_Lit64);
765}
766
767int64_t AMDGPU::getLitValue(const MCExpr *Expr) {
768 assert(isLitExpr(Expr));
769 return cast<MCConstantExpr>(cast<AMDGPUMCExpr>(Expr)->getArgs()[0])
770 ->getValue();
771}
772
774 const auto *E = dyn_cast<AMDGPUMCExpr>(Expr);
775 if (!E)
777 return E->getKind();
778}
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static bool isConstant(const MachineInstr &MI)
static void targetOpKnownBitsMapHelper(const MCExpr *Expr, KnownBitsMap &KBM, unsigned Depth)
static void unaryOpKnownBitsMapHelper(const MCExpr *Expr, KnownBitsMap &KBM, unsigned Depth)
static KnownBits fromOptionalToKnownBits(std::optional< bool > CompareResult)
static void binaryOpKnownBitsMapHelper(const MCExpr *Expr, KnownBitsMap &KBM, unsigned Depth)
static const MCExpr * tryFoldHelper(const MCExpr *Expr, KnownBitsMap &KBM, MCContext &Ctx)
static void knownBitsMapHelper(const MCExpr *Expr, KnownBitsMap &KBM, unsigned Depth=0)
static bool evaluateMCExprs(ArrayRef< const MCExpr * > Exprs, const MCAssembler *Asm, std::initializer_list< std::reference_wrapper< uint64_t > > Vals)
static unsigned getInstPrefSizeFieldWidth(const MCSubtargetInfo &STI)
Get the inst_pref_size field width for the given subtarget.
DenseMap< const MCExpr *, KnownBits > KnownBitsMap
AMDHSA kernel descriptor definitions.
#define op(i)
static cl::opt< unsigned > CacheLineSize("cache-line-size", cl::init(0), cl::Hidden, cl::desc("Use this to override the target cache line size when " "specified by the user."))
Value * RHS
Value * LHS
AMDGPU target specific MCExpr operations.
ArrayRef< const MCExpr * > getArgs() const
MCFragment * findAssociatedFragment() const override
static const AMDGPUMCExpr * createInstPrefSize(const MCExpr *CodeSizeBytes, MCContext &Ctx)
Create an expression for instruction prefetch size computation: min(divideCeil(CodeSizeBytes,...
void visitUsedExpr(MCStreamer &Streamer) const override
static unsigned getNumExpectedArgs(VariantKind Kind)
static const AMDGPUMCExpr * createTotalNumVGPR(const MCExpr *NumAGPR, const MCExpr *NumVGPR, MCContext &Ctx)
static const AMDGPUMCExpr * createLit(LitModifier Lit, int64_t Value, MCContext &Ctx)
static const AMDGPUMCExpr * create(VariantKind Kind, ArrayRef< const MCExpr * > Args, MCContext &Ctx)
bool evaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm) const override
MCContext & getCtx() const
static const AMDGPUMCExpr * createExtraSGPRs(const MCExpr *VCCUsed, const MCExpr *FlatScrUsed, bool XNACKUsed, MCContext &Ctx)
Allow delayed MCExpr resolve of ExtraSGPRs (in case VCCUsed or FlatScrUsed are unresolvable but neede...
const MCExpr * getSubExpr(size_t Index) const
void printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const override
VariantKind getKind() const
static bool isSymbolUsedInExpression(const MCSymbol *Sym, const MCExpr *E)
Class for arbitrary precision integers.
Definition APInt.h:78
void setBitsFrom(unsigned loBit)
Set the top bits starting from loBit.
Definition APInt.h:1408
int64_t getSExtValue() const
Get sign extended value.
Definition APInt.h:1585
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
size_type count(const_arg_type_t< KeyT > Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition DenseMap.h:221
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition MCAsmInfo.h:66
void printExpr(raw_ostream &, const MCExpr &) const
Binary assembler expressions.
Definition MCExpr.h:298
const MCExpr * getLHS() const
Get the left-hand side expression of the binary operator.
Definition MCExpr.h:445
const MCExpr * getRHS() const
Get the right-hand side expression of the binary operator.
Definition MCExpr.h:448
Opcode getOpcode() const
Get the kind of this binary expression.
Definition MCExpr.h:442
static LLVM_ABI const MCBinaryExpr * create(Opcode Op, const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx, SMLoc Loc=SMLoc())
Definition MCExpr.cpp:201
@ Div
Signed division.
Definition MCExpr.h:303
@ Shl
Shift left.
Definition MCExpr.h:320
@ AShr
Arithmetic shift right.
Definition MCExpr.h:321
@ LShr
Logical shift right.
Definition MCExpr.h:322
@ GTE
Signed greater than or equal comparison (result is either 0 or some target-specific non-zero value).
Definition MCExpr.h:307
@ EQ
Equality comparison.
Definition MCExpr.h:304
@ Sub
Subtraction.
Definition MCExpr.h:323
@ Mul
Multiplication.
Definition MCExpr.h:316
@ GT
Signed greater than comparison (result is either 0 or some target-specific non-zero value)
Definition MCExpr.h:305
@ Mod
Signed remainder.
Definition MCExpr.h:315
@ And
Bitwise and.
Definition MCExpr.h:302
@ Or
Bitwise or.
Definition MCExpr.h:318
@ Xor
Bitwise exclusive or.
Definition MCExpr.h:324
@ LAnd
Logical and.
Definition MCExpr.h:309
@ LOr
Logical or.
Definition MCExpr.h:310
@ LT
Signed less than comparison (result is either 0 or some target-specific non-zero value).
Definition MCExpr.h:311
@ Add
Addition.
Definition MCExpr.h:301
@ LTE
Signed less than or equal comparison (result is either 0 or some target-specific non-zero value).
Definition MCExpr.h:313
@ NE
Inequality comparison.
Definition MCExpr.h:317
static LLVM_ABI const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Definition MCExpr.cpp:212
Context object for machine code objects.
Definition MCContext.h:83
const MCSubtargetInfo * getSubtargetInfo() const
Definition MCContext.h:415
Base class for the full range of assembler expressions which are needed for parsing.
Definition MCExpr.h:34
@ Unary
Unary expressions.
Definition MCExpr.h:44
@ Constant
Constant expressions.
Definition MCExpr.h:42
@ SymbolRef
References to labels and assigned expressions.
Definition MCExpr.h:43
@ Target
Target specific expression.
Definition MCExpr.h:46
@ Specifier
Expression with a relocation specifier.
Definition MCExpr.h:45
@ Binary
Binary expressions.
Definition MCExpr.h:41
LLVM_ABI bool evaluateAsAbsolute(int64_t &Res) const
Try to evaluate the expression to an absolute value.
Definition MCExpr.cpp:238
ExprKind getKind() const
Definition MCExpr.h:85
SMLoc getLoc() const
Definition MCExpr.h:86
Streaming machine code generation interface.
Definition MCStreamer.h:222
void visitUsedExpr(const MCExpr &Expr)
Generic base class for all target subtargets.
Represent a reference to a symbol from inside an expression.
Definition MCExpr.h:190
const MCSymbol & getSymbol() const
Definition MCExpr.h:226
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition MCSymbol.h:42
bool isVariable() const
isVariable - Check if this is a variable symbol.
Definition MCSymbol.h:267
const MCExpr * getVariableValue() const
Get the expression of the variable symbol.
Definition MCSymbol.h:270
Unary assembler expressions.
Definition MCExpr.h:242
Opcode getOpcode() const
Get the kind of this unary expression.
Definition MCExpr.h:285
static LLVM_ABI const MCUnaryExpr * create(Opcode Op, const MCExpr *Expr, MCContext &Ctx, SMLoc Loc=SMLoc())
Definition MCExpr.cpp:207
@ Minus
Unary minus.
Definition MCExpr.h:246
@ Plus
Unary plus.
Definition MCExpr.h:248
@ Not
Bitwise negation.
Definition MCExpr.h:247
const MCExpr * getSubExpr() const
Get the child of this unary expression.
Definition MCExpr.h:288
static MCValue get(const MCSymbol *SymA, const MCSymbol *SymB=nullptr, int64_t Val=0, uint32_t Specifier=0)
Definition MCValue.h:56
int64_t getConstant() const
Definition MCValue.h:44
bool isAbsolute() const
Is this an absolute (as opposed to relocatable) value.
Definition MCValue.h:54
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
LLVM Value Representation.
Definition Value.h:75
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
Changed
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
constexpr char NumVGPRs[]
Key for Kernel::CodeProps::Metadata::mNumVGPRs.
constexpr char NumSGPRs[]
Key for Kernel::CodeProps::Metadata::mNumSGPRs.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
unsigned getNumWavesPerEUWithNumVGPRs(const MCSubtargetInfo &STI, unsigned NumVGPRs, unsigned DynamicVGPRBlockSize)
unsigned getInstCacheLineSize(const MCSubtargetInfo &STI)
unsigned getOccupancyWithNumSGPRs(unsigned SGPRs, unsigned MaxWaves, unsigned TotalNumSGPRs, unsigned Granule, unsigned TrapReserve)
unsigned getNumExtraSGPRs(const MCSubtargetInfo &STI, bool VCCUsed, bool FlatScrUsed, bool XNACKUsed)
LLVM_READONLY bool isLitExpr(const MCExpr *Expr)
void printAMDGPUMCExpr(const MCExpr *Expr, raw_ostream &OS, const MCAsmInfo *MAI)
bool isGFX12Plus(const MCSubtargetInfo &STI)
bool isGFX90A(const MCSubtargetInfo &STI)
LLVM_READONLY AMDGPUMCExpr::VariantKind getExprKind(const MCExpr *Expr)
LLVM_READONLY int64_t getLitValue(const MCExpr *Expr)
const MCExpr * foldAMDGPUMCExpr(const MCExpr *Expr, MCContext &Ctx)
This is an optimization pass for GlobalISel generic memory operations.
FunctionAddr VTableAddr Value
Definition InstrProf.h:137
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1738
detail::zippy< detail::zip_first, T, U, Args... > zip_equal(T &&t, U &&u, Args &&...args)
zip iterator that assumes that all iteratees have the same length.
Definition STLExtras.h:840
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
auto uninitialized_copy(R &&Src, IterTy Dst)
Definition STLExtras.h:2110
constexpr uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition Alignment.h:144
@ Success
The lock was released successfully.
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition MathExtras.h:394
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
static KnownBits makeConstant(const APInt &C)
Create known bits from a known constant.
Definition KnownBits.h:315
static LLVM_ABI std::optional< bool > eq(const KnownBits &LHS, const KnownBits &RHS)
Determine if these known bits always give the same ICMP_EQ result.
static LLVM_ABI KnownBits smax(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits for smax(LHS, RHS).
void makeNonNegative()
Make this value non-negative.
Definition KnownBits.h:125
static LLVM_ABI KnownBits ashr(const KnownBits &LHS, const KnownBits &RHS, bool ShAmtNonZero=false, bool Exact=false)
Compute known bits for ashr(LHS, RHS).
static LLVM_ABI std::optional< bool > ne(const KnownBits &LHS, const KnownBits &RHS)
Determine if these known bits always give the same ICMP_NE result.
void makeNegative()
Make this value negative.
Definition KnownBits.h:120
static LLVM_ABI std::optional< bool > sge(const KnownBits &LHS, const KnownBits &RHS)
Determine if these known bits always give the same ICMP_SGE result.
KnownBits zext(unsigned BitWidth) const
Return known bits for a zero extension of the value we're tracking.
Definition KnownBits.h:176
bool isConstant() const
Returns true if we know the value of all bits.
Definition KnownBits.h:54
static KnownBits add(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false, bool SelfAdd=false)
Compute knownbits resulting from addition of LHS and RHS.
Definition KnownBits.h:361
static LLVM_ABI KnownBits lshr(const KnownBits &LHS, const KnownBits &RHS, bool ShAmtNonZero=false, bool Exact=false)
Compute known bits for lshr(LHS, RHS).
static LLVM_ABI KnownBits smin(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits for smin(LHS, RHS).
static LLVM_ABI KnownBits srem(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits for srem(LHS, RHS).
static LLVM_ABI std::optional< bool > slt(const KnownBits &LHS, const KnownBits &RHS)
Determine if these known bits always give the same ICMP_SLT result.
static LLVM_ABI KnownBits sdiv(const KnownBits &LHS, const KnownBits &RHS, bool Exact=false)
Compute known bits for sdiv(LHS, RHS).
static KnownBits sub(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from subtraction of LHS and RHS.
Definition KnownBits.h:376
static LLVM_ABI KnownBits mul(const KnownBits &LHS, const KnownBits &RHS, bool NoUndefSelfMultiply=false)
Compute known bits resulting from multiplying LHS and RHS.
static LLVM_ABI std::optional< bool > sle(const KnownBits &LHS, const KnownBits &RHS)
Determine if these known bits always give the same ICMP_SLE result.
static LLVM_ABI std::optional< bool > sgt(const KnownBits &LHS, const KnownBits &RHS)
Determine if these known bits always give the same ICMP_SGT result.
static LLVM_ABI KnownBits shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW=false, bool NSW=false, bool ShAmtNonZero=false)
Compute known bits for shl(LHS, RHS).
const APInt & getConstant() const
Returns the value when all bits have a known value.
Definition KnownBits.h:58