LLVM 17.0.0git
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This file implements the targeting of the Machinelegalizer class for AMDGPU. More...
#include "AMDGPULegalizerInfo.h"
#include "AMDGPU.h"
#include "AMDGPUGlobalISelUtils.h"
#include "AMDGPUInstrInfo.h"
#include "AMDGPUTargetMachine.h"
#include "SIMachineFunctionInfo.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/ADT/ScopeExit.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsR600.h"
Go to the source code of this file.
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#define | DEBUG_TYPE "amdgpu-legalinfo" |
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static cl::opt< bool > | EnableNewLegality ("amdgpu-global-isel-new-legality", cl::desc("Use GlobalISel desired legality, rather than try to use" "rules compatible with selection patterns"), cl::init(false), cl::ReallyHidden) |
static constexpr unsigned | MaxRegisterSize = 1024 |
This file implements the targeting of the Machinelegalizer class for AMDGPU.
Definition in file AMDGPULegalizerInfo.cpp.
#define DEBUG_TYPE "amdgpu-legalinfo" |
Definition at line 31 of file AMDGPULegalizerInfo.cpp.
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Definition at line 146 of file AMDGPULegalizerInfo.cpp.
References getBitcastRegisterType().
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Definition at line 153 of file AMDGPULegalizerInfo.cpp.
References assert(), llvm::ElementCount::getFixed(), llvm::LLT::getSizeInBits(), llvm::LLT::scalarOrVector(), and Size.
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Definition at line 4471 of file AMDGPULegalizerInfo.cpp.
References B, and llvm::Format.
Referenced by llvm::AMDGPULegalizerInfo::legalizeBufferLoad().
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Convert from separate vaddr components to a single vector address register, and replace the remaining operands with $noreg.
Definition at line 4830 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::LLT::fixed_vector(), llvm::SrcOp::getReg(), I, MI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::LLT::scalar(), and llvm::SmallVectorBase< Size_T >::size().
Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic().
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Definition at line 218 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getElementType(), llvm::LLT::getSizeInBits(), llvm::LLT::isVector(), and llvm::LLT::scalar().
Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo().
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Definition at line 3477 of file AMDGPULegalizerInfo.cpp.
References B, llvm::BitsToFloat(), and llvm::LLT::scalar().
Referenced by llvm::AMDGPULegalizerInfo::legalizeUnsignedDIV_REM64Impl().
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Definition at line 2113 of file AMDGPULegalizerInfo.cpp.
References B, llvm::Hi, and llvm::LLT::scalar().
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Definition at line 104 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getElementType(), llvm::ElementCount::getFixed(), llvm::LLT::getNumElements(), llvm::LLT::getSizeInBits(), llvm::LLT::scalarOrVector(), and Size.
Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo().
Definition at line 134 of file AMDGPULegalizerInfo.cpp.
References llvm::ElementCount::getFixed(), llvm::LLT::getSizeInBits(), llvm::LLT::scalar(), llvm::LLT::scalarOrVector(), and Size.
Referenced by bitcastToRegisterType(), and llvm::AMDGPULegalizerInfo::legalizeSBufferLoad().
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Definition at line 4641 of file AMDGPULegalizerInfo.cpp.
References llvm_unreachable.
Referenced by llvm::AMDGPULegalizerInfo::legalizeBufferAtomic().
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Definition at line 4112 of file AMDGPULegalizerInfo.cpp.
References llvm_unreachable.
Referenced by llvm::AMDGPULegalizerInfo::legalizeDSAtomicFPIntrinsic().
Definition at line 57 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getSizeInBits(), llvm::Log2_32_Ceil(), and llvm::LLT::scalar().
Referenced by llvm::AMDGPULegalizerInfo::legalizeSBufferLoad().
Definition at line 50 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::changeElementCount(), llvm::ElementCount::getFixed(), llvm::LLT::getNumElements(), and llvm::Log2_32_Ceil().
Referenced by llvm::AMDGPULegalizerInfo::legalizeSBufferLoad().
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Return true if the value is a known valid address, such that a null check is not necessary.
Definition at line 1909 of file AMDGPULegalizerInfo.cpp.
References llvm::ConstantInt::getSExtValue(), MRI, and TM.
Referenced by llvm::AMDGPULegalizerInfo::legalizeAddrSpaceCast().
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Definition at line 354 of file AMDGPULegalizerInfo.cpp.
References isLoadStoreSizeLegal(), isRegisterType(), loadStoreBitcastWorkaround(), and llvm::LegalityQuery::Types.
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Definition at line 266 of file AMDGPULegalizerInfo.cpp.
References llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl(), assert(), llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::LLT::getSizeInBits(), llvm::LLT::isVector(), maxSizeForAddrSpace(), llvm::LegalityQuery::MMODescrs, llvm::LegalityQuery::Opcode, RegSize, Size, and llvm::LegalityQuery::Types.
Referenced by isLoadStoreLegal().
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Definition at line 3198 of file AMDGPULegalizerInfo.cpp.
References llvm::getIConstantVRegSExtVal(), MI, and MRI.
Referenced by llvm::MCAsmParserExtension::ParseDirectiveCGProfile(), and verifyCFIntrinsic().
Definition at line 184 of file AMDGPULegalizerInfo.cpp.
References MaxRegisterSize, and Size.
Referenced by isRegisterType(), and shouldBitcastLoadStoreType().
Definition at line 200 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getSizeInBits(), isRegisterSize(), isRegisterVectorType(), and llvm::LLT::isVector().
Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), isLoadStoreLegal(), isRegisterType(), llvm::AMDGPULegalizerInfo::legalizeLoad(), and shouldBitcastLoadStoreType().
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Definition at line 212 of file AMDGPULegalizerInfo.cpp.
References isRegisterType().
Definition at line 188 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getSizeInBits().
Referenced by shouldBitcastLoadStoreType().
Definition at line 193 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getElementType(), llvm::LLT::getNumElements(), and llvm::LLT::getSizeInBits().
Referenced by isRegisterType().
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Definition at line 66 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getElementType(), llvm::LLT::getNumElements(), llvm::LLT::getSizeInBits(), and llvm::LLT::isVector().
Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo().
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Definition at line 230 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getSizeInBits(), and llvm::LLT::isVector().
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Definition at line 87 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getNumElements(), llvm::LLT::getScalarType(), and llvm::LLT::getSizeInBits().
Definition at line 336 of file AMDGPULegalizerInfo.cpp.
References EnableNewLegality, llvm::LLT::getElementType(), llvm::LLT::getSizeInBits(), llvm::LLT::isPointer(), llvm::LLT::isVector(), and Size.
Referenced by isLoadStoreLegal(), and shouldBitcastLoadStoreType().
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Definition at line 241 of file AMDGPULegalizerInfo.cpp.
References llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::AMDGPUAS::GLOBAL_ADDRESS, llvm::AMDGPUAS::LOCAL_ADDRESS, and llvm::AMDGPUAS::PRIVATE_ADDRESS.
Referenced by isLoadStoreSizeLegal(), and shouldWidenLoad().
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Definition at line 118 of file AMDGPULegalizerInfo.cpp.
References assert(), llvm::LLT::fixed_vector(), llvm::LLT::getElementType(), llvm::LLT::getSizeInBits(), and Size.
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Definition at line 177 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getNumElements(), and llvm::LLT::isVector().
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Definition at line 95 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::fixed_vector(), llvm::LLT::getElementType(), and llvm::LLT::getNumElements().
Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo().
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Turn a set of s16 typed registers in AddrRegs
into a dword sized vector with s16 typed elements.
Definition at line 4769 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::LLT::fixed_vector(), llvm::SrcOp::getReg(), I, Intr, MI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::LLT::scalar().
Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic().
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Definition at line 3319 of file AMDGPULegalizerInfo.cpp.
References B, llvm::CallingConv::C, and MI.
Referenced by llvm::AMDGPULegalizerInfo::legalizeWorkitemIDIntrinsic().
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Return true if a load or store of the type should be lowered with a bitcast to a different type.
Definition at line 362 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getElementType(), llvm::LLT::getSizeInBits(), isRegisterSize(), isRegisterType(), isRegisterVectorElementType(), llvm::LLT::isVector(), loadStoreBitcastWorkaround(), and Size.
Referenced by llvm::AMDGPULegalizerInfo::legalizeSBufferLoad().
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Definition at line 415 of file AMDGPULegalizerInfo.cpp.
References llvm::LegalityQuery::MMODescrs, shouldWidenLoad(), and llvm::LegalityQuery::Types.
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Return true if we should legalize a load by widening an odd sized memory access up to the alignment.
Note this case when the memory access itself changes, not the size of the result register.
Definition at line 381 of file AMDGPULegalizerInfo.cpp.
References llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl(), llvm::CallingConv::Fast, llvm::LLT::getSizeInBits(), llvm::isPowerOf2_32(), maxSizeForAddrSpace(), llvm::MachineMemOperand::MOLoad, and llvm::NextPowerOf2().
Referenced by llvm::AMDGPULegalizerInfo::legalizeLoad(), and shouldWidenLoad().
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Definition at line 80 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getSizeInBits().
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Definition at line 2792 of file AMDGPULegalizerInfo.cpp.
References llvm::getOpcodeDef(), and MRI.
Referenced by llvm::AMDGPULegalizerInfo::legalizeFFloor().
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Definition at line 3850 of file AMDGPULegalizerInfo.cpp.
References B, llvm::Enable, FP_DENORM_FLUSH_NONE, llvm::AMDGPU::Hwreg::ID_MODE, llvm::AMDGPU::Hwreg::OFFSET_SHIFT_, and llvm::AMDGPU::Hwreg::WIDTH_M1_SHIFT_.
Referenced by llvm::AMDGPULegalizerInfo::legalizeFDIV32().
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Definition at line 163 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getSizeInBits(), llvm::LLT::isVector(), and Size.
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Definition at line 170 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::getSizeInBits(), llvm::LLT::isVector(), and Size.
Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo().
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Definition at line 3207 of file AMDGPULegalizerInfo.cpp.
References llvm::MachineBasicBlock::end(), llvm::MachineFunction::end(), llvm::eraseInstr(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), isNot(), MI, MRI, and UseMI.
Referenced by llvm::AMDGPULegalizerInfo::legalizeIntrinsic().
Definition at line 2591 of file AMDGPULegalizerInfo.cpp.
References llvm::LLT::changeElementCount(), llvm::ElementCount::getFixed(), llvm::LLT::getNumElements(), llvm::LLT::getSizeInBits(), llvm::LLT::isVector(), llvm::PowerOf2Ceil(), and llvm::LLT::scalar().
Referenced by llvm::AMDGPULegalizerInfo::legalizeLoad().
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Referenced by loadStoreBitcastWorkaround().
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Definition at line 47 of file AMDGPULegalizerInfo.cpp.
Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), and isRegisterSize().