LLVM  16.0.0git
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llvm::SIMachineFunctionInfo Class Referencefinal

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load. More...

#include "Target/AMDGPU/SIMachineFunctionInfo.h"

Inheritance diagram for llvm::SIMachineFunctionInfo:
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Collaboration diagram for llvm::SIMachineFunctionInfo:
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Classes

struct  SGPRSpillVGPR
 
struct  VGPRSpillToAGPR
 

Public Member Functions

void allocateWWMReservedSpillSlots (MachineFrameInfo &MFI, const SIRegisterInfo &TRI)
 
auto wwmAllocation () const
 
Register getVGPRForAGPRCopy () const
 
void setVGPRForAGPRCopy (Register NewVGPRForAGPRCopy)
 
bool isCalleeSavedReg (const MCPhysReg *CSRegs, MCPhysReg Reg)
 
 SIMachineFunctionInfo (const MachineFunction &MF)
 
 SIMachineFunctionInfo (const SIMachineFunctionInfo &MFI)=default
 
MachineFunctionInfoclone (BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override
 Make a functionally equivalent copy of this MachineFunctionInfo in MF. More...
 
bool initializeBaseYamlFields (const yaml::SIMachineFunctionInfo &YamlMFI, const MachineFunction &MF, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange)
 
void reserveWWMRegister (Register Reg)
 
AMDGPU::SIModeRegisterDefaults getMode () const
 
ArrayRef< SIRegisterInfo::SpilledReggetSGPRToVGPRSpills (int FrameIndex) const
 
ArrayRef< SGPRSpillVGPRgetSGPRSpillVGPRs () const
 
ArrayRef< MCPhysReggetAGPRSpillVGPRs () const
 
ArrayRef< MCPhysReggetVGPRSpillAGPRs () const
 
MCPhysReg getVGPRToAGPRSpill (int FrameIndex, unsigned Lane) const
 
void setVGPRToAGPRSpillDead (int FrameIndex)
 
bool haveFreeLanesForSGPRSpill (const MachineFunction &MF, unsigned NumLane) const
 returns true if NumLanes slots are available in VGPRs already used for SGPR spilling. More...
 
bool allocateSGPRSpillToVGPR (MachineFunction &MF, int FI)
 Reserve a slice of a VGPR to support spilling for FrameIndex FI. More...
 
bool allocateVGPRSpillToAGPR (MachineFunction &MF, int FI, bool isAGPRtoVGPR)
 Reserve AGPRs or VGPRs to support spilling for FrameIndex FI. More...
 
bool removeDeadFrameIndices (MachineFrameInfo &MFI, bool ResetSGPRSpillStackIDs)
 If ResetSGPRSpillStackIDs is true, reset the stack ID from sgpr-spill to the default stack. More...
 
int getScavengeFI (MachineFrameInfo &MFI, const SIRegisterInfo &TRI)
 
Optional< intgetOptionalScavengeFI () const
 
unsigned getBytesInStackArgArea () const
 
void setBytesInStackArgArea (unsigned Bytes)
 
Register addPrivateSegmentBuffer (const SIRegisterInfo &TRI)
 
Register addDispatchPtr (const SIRegisterInfo &TRI)
 
Register addQueuePtr (const SIRegisterInfo &TRI)
 
Register addKernargSegmentPtr (const SIRegisterInfo &TRI)
 
Register addDispatchID (const SIRegisterInfo &TRI)
 
Register addFlatScratchInit (const SIRegisterInfo &TRI)
 
Register addImplicitBufferPtr (const SIRegisterInfo &TRI)
 
Register addLDSKernelId ()
 
Register addReservedUserSGPR ()
 Increment user SGPRs used for padding the argument list only. More...
 
Register addWorkGroupIDX ()
 
Register addWorkGroupIDY ()
 
Register addWorkGroupIDZ ()
 
Register addWorkGroupInfo ()
 
void setWorkItemIDX (ArgDescriptor Arg)
 
void setWorkItemIDY (ArgDescriptor Arg)
 
void setWorkItemIDZ (ArgDescriptor Arg)
 
Register addPrivateSegmentWaveByteOffset ()
 
void setPrivateSegmentWaveByteOffset (Register Reg)
 
bool hasPrivateSegmentBuffer () const
 
bool hasDispatchPtr () const
 
bool hasQueuePtr () const
 
bool hasKernargSegmentPtr () const
 
bool hasDispatchID () const
 
bool hasFlatScratchInit () const
 
bool hasWorkGroupIDX () const
 
bool hasWorkGroupIDY () const
 
bool hasWorkGroupIDZ () const
 
bool hasWorkGroupInfo () const
 
bool hasLDSKernelId () const
 
bool hasPrivateSegmentWaveByteOffset () const
 
bool hasWorkItemIDX () const
 
bool hasWorkItemIDY () const
 
bool hasWorkItemIDZ () const
 
bool hasImplicitArgPtr () const
 
bool hasImplicitBufferPtr () const
 
AMDGPUFunctionArgInfogetArgInfo ()
 
const AMDGPUFunctionArgInfogetArgInfo () const
 
std::tuple< const ArgDescriptor *, const TargetRegisterClass *, LLTgetPreloadedValue (AMDGPUFunctionArgInfo::PreloadedValue Value) const
 
MCRegister getPreloadedReg (AMDGPUFunctionArgInfo::PreloadedValue Value) const
 
unsigned getGITPtrHigh () const
 
Register getGITPtrLoReg (const MachineFunction &MF) const
 
uint32_t get32BitAddressHighBits () const
 
unsigned getNumUserSGPRs () const
 
unsigned getNumPreloadedSGPRs () const
 
Register getPrivateSegmentWaveByteOffsetSystemSGPR () const
 
Register getScratchRSrcReg () const
 Returns the physical register reserved for use as the resource descriptor for scratch accesses. More...
 
void setScratchRSrcReg (Register Reg)
 
Register getFrameOffsetReg () const
 
void setFrameOffsetReg (Register Reg)
 
void setStackPtrOffsetReg (Register Reg)
 
Register getStackPtrOffsetReg () const
 
Register getQueuePtrUserSGPR () const
 
Register getImplicitBufferPtrUserSGPR () const
 
bool hasSpilledSGPRs () const
 
void setHasSpilledSGPRs (bool Spill=true)
 
bool hasSpilledVGPRs () const
 
void setHasSpilledVGPRs (bool Spill=true)
 
bool hasNonSpillStackObjects () const
 
void setHasNonSpillStackObjects (bool StackObject=true)
 
bool isStackRealigned () const
 
void setIsStackRealigned (bool Realigned=true)
 
unsigned getNumSpilledSGPRs () const
 
unsigned getNumSpilledVGPRs () const
 
void addToSpilledSGPRs (unsigned num)
 
void addToSpilledVGPRs (unsigned num)
 
unsigned getPSInputAddr () const
 
unsigned getPSInputEnable () const
 
bool isPSInputAllocated (unsigned Index) const
 
void markPSInputAllocated (unsigned Index)
 
void markPSInputEnabled (unsigned Index)
 
bool returnsVoid () const
 
void setIfReturnsVoid (bool Value)
 
std::pair< unsigned, unsigned > getFlatWorkGroupSizes () const
 
unsigned getMinFlatWorkGroupSize () const
 
unsigned getMaxFlatWorkGroupSize () const
 
std::pair< unsigned, unsigned > getWavesPerEU () const
 
unsigned getMinWavesPerEU () const
 
unsigned getMaxWavesPerEU () const
 
Register getWorkGroupIDSGPR (unsigned Dim) const
 
const AMDGPUBufferPseudoSourceValuegetBufferPSV (const AMDGPUTargetMachine &TM)
 
const AMDGPUImagePseudoSourceValuegetImagePSV (const AMDGPUTargetMachine &TM)
 
const AMDGPUGWSResourcePseudoSourceValuegetGWSPSV (const AMDGPUTargetMachine &TM)
 
unsigned getOccupancy () const
 
unsigned getMinAllowedOccupancy () const
 
void limitOccupancy (const MachineFunction &MF)
 
void limitOccupancy (unsigned Limit)
 
void increaseOccupancy (const MachineFunction &MF, unsigned Limit)
 
bool mayNeedAGPRs () const
 
bool mayUseAGPRs (const Function &F) const
 
bool usesAGPRs (const MachineFunction &MF) const
 
- Public Member Functions inherited from llvm::AMDGPUMachineFunction
 AMDGPUMachineFunction (const MachineFunction &MF)
 
uint64_t getExplicitKernArgSize () const
 
Align getMaxKernArgAlign () const
 
uint32_t getLDSSize () const
 
uint32_t getGDSSize () const
 
bool isEntryFunction () const
 
bool isModuleEntryFunction () const
 
bool hasNoSignedZerosFPMath () const
 
bool isMemoryBound () const
 
bool needsWaveLimiter () const
 
unsigned allocateLDSGlobal (const DataLayout &DL, const GlobalVariable &GV)
 
unsigned allocateLDSGlobal (const DataLayout &DL, const GlobalVariable &GV, Align Trailing)
 
void allocateKnownAddressLDSGlobal (const Function &F)
 
Align getDynLDSAlign () const
 
void setDynLDSAlign (const DataLayout &DL, const GlobalVariable &GV)
 
- Public Member Functions inherited from llvm::MachineFunctionInfo
virtual ~MachineFunctionInfo ()
 

Public Attributes

SmallSetVector< Register, 8 > WWMReservedRegs
 
SmallVector< int, 8 > WWMReservedFrameIndexes
 Track stack slots used for save/restore of reserved WWM VGPRs in the prolog/epilog. More...
 
Register SGPRForFPSaveRestoreCopy
 If this is set, an SGPR used for save/restore of the register used for the frame pointer. More...
 
Optional< intFramePointerSaveIndex
 
Register SGPRForBPSaveRestoreCopy
 If this is set, an SGPR used for save/restore of the register used for the base pointer. More...
 
Optional< intBasePointerSaveIndex
 

Friends

class GCNTargetMachine
 

Additional Inherited Members

- Static Public Member Functions inherited from llvm::AMDGPUMachineFunction
static const GlobalVariablegetKernelLDSGlobalFromFunction (const Function &F)
 
static Optional< uint32_tgetLDSKernelIdMetadata (const Function &F)
 
- Static Public Member Functions inherited from llvm::MachineFunctionInfo
template<typename Ty >
static Ty * create (BumpPtrAllocator &Allocator, MachineFunction &MF)
 Factory function: default behavior is to call new using the supplied allocator. More...
 
template<typename Ty >
static Ty * create (BumpPtrAllocator &Allocator, const Ty &MFI)
 
- Protected Attributes inherited from llvm::AMDGPUMachineFunction
uint64_t ExplicitKernArgSize = 0
 
Align MaxKernArgAlign
 
uint32_t LDSSize = 0
 Number of bytes in the LDS that are being used. More...
 
uint32_t GDSSize = 0
 
uint32_t StaticLDSSize = 0
 Number of bytes in the LDS allocated statically. More...
 
uint32_t StaticGDSSize = 0
 
Align DynLDSAlign
 Align for dynamic shared memory if any. More...
 
bool IsEntryFunction = false
 
bool IsModuleEntryFunction = false
 
bool NoSignedZerosFPMath = false
 
bool MemoryBound = false
 
bool WaveLimiter = false
 

Detailed Description

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load.

Definition at line 351 of file SIMachineFunctionInfo.h.

Constructor & Destructor Documentation

◆ SIMachineFunctionInfo() [1/2]

SIMachineFunctionInfo::SIMachineFunctionInfo ( const MachineFunction MF)

◆ SIMachineFunctionInfo() [2/2]

llvm::SIMachineFunctionInfo::SIMachineFunctionInfo ( const SIMachineFunctionInfo MFI)
default

Member Function Documentation

◆ addDispatchID()

Register SIMachineFunctionInfo::addDispatchID ( const SIRegisterInfo TRI)

◆ addDispatchPtr()

Register SIMachineFunctionInfo::addDispatchPtr ( const SIRegisterInfo TRI)

◆ addFlatScratchInit()

Register SIMachineFunctionInfo::addFlatScratchInit ( const SIRegisterInfo TRI)

◆ addImplicitBufferPtr()

Register SIMachineFunctionInfo::addImplicitBufferPtr ( const SIRegisterInfo TRI)

◆ addKernargSegmentPtr()

Register SIMachineFunctionInfo::addKernargSegmentPtr ( const SIRegisterInfo TRI)

◆ addLDSKernelId()

Register SIMachineFunctionInfo::addLDSKernelId ( )

Definition at line 269 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister().

◆ addPrivateSegmentBuffer()

Register SIMachineFunctionInfo::addPrivateSegmentBuffer ( const SIRegisterInfo TRI)

◆ addPrivateSegmentWaveByteOffset()

Register llvm::SIMachineFunctionInfo::addPrivateSegmentWaveByteOffset ( )
inline

Definition at line 668 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ addQueuePtr()

Register SIMachineFunctionInfo::addQueuePtr ( const SIRegisterInfo TRI)

◆ addReservedUserSGPR()

Register llvm::SIMachineFunctionInfo::addReservedUserSGPR ( )
inline

Increment user SGPRs used for padding the argument list only.

Definition at line 624 of file SIMachineFunctionInfo.h.

◆ addToSpilledSGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledSGPRs ( unsigned  num)
inline

◆ addToSpilledVGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledVGPRs ( unsigned  num)
inline

◆ addWorkGroupIDX()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDX ( )
inline

Definition at line 631 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ addWorkGroupIDY()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDY ( )
inline

Definition at line 637 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ addWorkGroupIDZ()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDZ ( )
inline

Definition at line 643 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ addWorkGroupInfo()

Register llvm::SIMachineFunctionInfo::addWorkGroupInfo ( )
inline

Definition at line 649 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ allocateSGPRSpillToVGPR()

bool SIMachineFunctionInfo::allocateSGPRSpillToVGPR ( MachineFunction MF,
int  FI 
)

◆ allocateVGPRSpillToAGPR()

bool SIMachineFunctionInfo::allocateVGPRSpillToAGPR ( MachineFunction MF,
int  FI,
bool  isAGPRtoVGPR 
)

◆ allocateWWMReservedSpillSlots()

void SIMachineFunctionInfo::allocateWWMReservedSpillSlots ( MachineFrameInfo MFI,
const SIRegisterInfo TRI 
)

◆ clone()

MachineFunctionInfo * SIMachineFunctionInfo::clone ( BumpPtrAllocator Allocator,
MachineFunction DestMF,
const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &  Src2DstMBB 
) const
overridevirtual

Make a functionally equivalent copy of this MachineFunctionInfo in MF.

This requires remapping MachineBasicBlock references from the original parent to values in the new function. Targets may assume that virtual register and frame index values are preserved in the new function.

Reimplemented from llvm::MachineFunctionInfo.

Definition at line 203 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFunction::cloneInfo().

◆ get32BitAddressHighBits()

uint32_t llvm::SIMachineFunctionInfo::get32BitAddressHighBits ( ) const
inline

Definition at line 769 of file SIMachineFunctionInfo.h.

◆ getAGPRSpillVGPRs()

ArrayRef<MCPhysReg> llvm::SIMachineFunctionInfo::getAGPRSpillVGPRs ( ) const
inline

◆ getArgInfo() [1/2]

AMDGPUFunctionArgInfo& llvm::SIMachineFunctionInfo::getArgInfo ( )
inline

◆ getArgInfo() [2/2]

const AMDGPUFunctionArgInfo& llvm::SIMachineFunctionInfo::getArgInfo ( ) const
inline

Definition at line 749 of file SIMachineFunctionInfo.h.

◆ getBufferPSV()

const AMDGPUBufferPseudoSourceValue* llvm::SIMachineFunctionInfo::getBufferPSV ( const AMDGPUTargetMachine TM)
inline

◆ getBytesInStackArgArea()

unsigned llvm::SIMachineFunctionInfo::getBytesInStackArgArea ( ) const
inline

◆ getFlatWorkGroupSizes()

std::pair<unsigned, unsigned> llvm::SIMachineFunctionInfo::getFlatWorkGroupSizes ( ) const
inline
Returns
A pair of default/requested minimum/maximum flat work group sizes for this function.

Definition at line 904 of file SIMachineFunctionInfo.h.

◆ getFrameOffsetReg()

Register llvm::SIMachineFunctionInfo::getFrameOffsetReg ( ) const
inline

◆ getGITPtrHigh()

unsigned llvm::SIMachineFunctionInfo::getGITPtrHigh ( ) const
inline

Definition at line 763 of file SIMachineFunctionInfo.h.

Referenced by buildGitPtr().

◆ getGITPtrLoReg()

Register SIMachineFunctionInfo::getGITPtrLoReg ( const MachineFunction MF) const

◆ getGWSPSV()

const AMDGPUGWSResourcePseudoSourceValue* llvm::SIMachineFunctionInfo::getGWSPSV ( const AMDGPUTargetMachine TM)
inline

◆ getImagePSV()

const AMDGPUImagePseudoSourceValue* llvm::SIMachineFunctionInfo::getImagePSV ( const AMDGPUTargetMachine TM)
inline

◆ getImplicitBufferPtrUserSGPR()

Register llvm::SIMachineFunctionInfo::getImplicitBufferPtrUserSGPR ( ) const
inline

Definition at line 822 of file SIMachineFunctionInfo.h.

◆ getMaxFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMaxFlatWorkGroupSize ( ) const
inline
Returns
Default/requested maximum flat work group size for this function.

Definition at line 914 of file SIMachineFunctionInfo.h.

◆ getMaxWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMaxWavesPerEU ( ) const
inline
Returns
Default/requested maximum number of waves per execution unit.

Definition at line 930 of file SIMachineFunctionInfo.h.

Referenced by llvm::UnclusteredHighRPStage::initGCNSchedStage(), and limitOccupancy().

◆ getMinAllowedOccupancy()

unsigned llvm::SIMachineFunctionInfo::getMinAllowedOccupancy ( ) const
inline

◆ getMinFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMinFlatWorkGroupSize ( ) const
inline
Returns
Default/requested minimum flat work group size for this function.

Definition at line 909 of file SIMachineFunctionInfo.h.

◆ getMinWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMinWavesPerEU ( ) const
inline
Returns
Default/requested minimum number of waves per execution unit.

Definition at line 925 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStage::mayCauseSpilling().

◆ getMode()

AMDGPU::SIModeRegisterDefaults llvm::SIMachineFunctionInfo::getMode ( ) const
inline

◆ getNumPreloadedSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs ( ) const
inline

◆ getNumSpilledSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledSGPRs ( ) const
inline

Definition at line 858 of file SIMachineFunctionInfo.h.

◆ getNumSpilledVGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledVGPRs ( ) const
inline

Definition at line 862 of file SIMachineFunctionInfo.h.

◆ getNumUserSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumUserSGPRs ( ) const
inline

Definition at line 773 of file SIMachineFunctionInfo.h.

◆ getOccupancy()

unsigned llvm::SIMachineFunctionInfo::getOccupancy ( ) const
inline

Definition at line 965 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStrategy::initialize().

◆ getOptionalScavengeFI()

Optional<int> llvm::SIMachineFunctionInfo::getOptionalScavengeFI ( ) const
inline

◆ getPreloadedReg()

MCRegister llvm::SIMachineFunctionInfo::getPreloadedReg ( AMDGPUFunctionArgInfo::PreloadedValue  Value) const
inline

Definition at line 758 of file SIMachineFunctionInfo.h.

References Arg.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue().

◆ getPreloadedValue()

std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT> llvm::SIMachineFunctionInfo::getPreloadedValue ( AMDGPUFunctionArgInfo::PreloadedValue  Value) const
inline

◆ getPrivateSegmentWaveByteOffsetSystemSGPR()

Register llvm::SIMachineFunctionInfo::getPrivateSegmentWaveByteOffsetSystemSGPR ( ) const
inline

Definition at line 781 of file SIMachineFunctionInfo.h.

◆ getPSInputAddr()

unsigned llvm::SIMachineFunctionInfo::getPSInputAddr ( ) const
inline

Definition at line 874 of file SIMachineFunctionInfo.h.

◆ getPSInputEnable()

unsigned llvm::SIMachineFunctionInfo::getPSInputEnable ( ) const
inline

Definition at line 878 of file SIMachineFunctionInfo.h.

◆ getQueuePtrUserSGPR()

Register llvm::SIMachineFunctionInfo::getQueuePtrUserSGPR ( ) const
inline

Definition at line 818 of file SIMachineFunctionInfo.h.

◆ getScavengeFI()

int SIMachineFunctionInfo::getScavengeFI ( MachineFrameInfo MFI,
const SIRegisterInfo TRI 
)

◆ getScratchRSrcReg()

Register llvm::SIMachineFunctionInfo::getScratchRSrcReg ( ) const
inline

Returns the physical register reserved for use as the resource descriptor for scratch accesses.

Definition at line 787 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::AMDGPUCallLowering::handleImplicitCallArguments().

◆ getSGPRSpillVGPRs()

ArrayRef<SGPRSpillVGPR> llvm::SIMachineFunctionInfo::getSGPRSpillVGPRs ( ) const
inline

◆ getSGPRToVGPRSpills()

ArrayRef<SIRegisterInfo::SpilledReg> llvm::SIMachineFunctionInfo::getSGPRToVGPRSpills ( int  FrameIndex) const
inline

◆ getStackPtrOffsetReg()

Register llvm::SIMachineFunctionInfo::getStackPtrOffsetReg ( ) const
inline

◆ getVGPRForAGPRCopy()

Register llvm::SIMachineFunctionInfo::getVGPRForAGPRCopy ( ) const
inline

◆ getVGPRSpillAGPRs()

ArrayRef<MCPhysReg> llvm::SIMachineFunctionInfo::getVGPRSpillAGPRs ( ) const
inline

◆ getVGPRToAGPRSpill()

MCPhysReg llvm::SIMachineFunctionInfo::getVGPRToAGPRSpill ( int  FrameIndex,
unsigned  Lane 
) const
inline

◆ getWavesPerEU()

std::pair<unsigned, unsigned> llvm::SIMachineFunctionInfo::getWavesPerEU ( ) const
inline
Returns
A pair of default/requested minimum/maximum number of waves per execution unit.

Definition at line 920 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSubtarget::getMaxNumSGPRs(), and llvm::GCNSubtarget::getMaxNumVGPRs().

◆ getWorkGroupIDSGPR()

Register llvm::SIMachineFunctionInfo::getWorkGroupIDSGPR ( unsigned  Dim) const
inline
Returns
SGPR used for Dim's work group ID.

Definition at line 935 of file SIMachineFunctionInfo.h.

References assert(), hasWorkGroupIDX(), hasWorkGroupIDY(), hasWorkGroupIDZ(), and llvm_unreachable.

◆ hasDispatchID()

bool llvm::SIMachineFunctionInfo::hasDispatchID ( ) const
inline

Definition at line 695 of file SIMachineFunctionInfo.h.

◆ hasDispatchPtr()

bool llvm::SIMachineFunctionInfo::hasDispatchPtr ( ) const
inline

Definition at line 683 of file SIMachineFunctionInfo.h.

◆ hasFlatScratchInit()

bool llvm::SIMachineFunctionInfo::hasFlatScratchInit ( ) const
inline

◆ hasImplicitArgPtr()

bool llvm::SIMachineFunctionInfo::hasImplicitArgPtr ( ) const
inline

Definition at line 737 of file SIMachineFunctionInfo.h.

◆ hasImplicitBufferPtr()

bool llvm::SIMachineFunctionInfo::hasImplicitBufferPtr ( ) const
inline

Definition at line 741 of file SIMachineFunctionInfo.h.

◆ hasKernargSegmentPtr()

bool llvm::SIMachineFunctionInfo::hasKernargSegmentPtr ( ) const
inline

Definition at line 691 of file SIMachineFunctionInfo.h.

◆ hasLDSKernelId()

bool llvm::SIMachineFunctionInfo::hasLDSKernelId ( ) const
inline

Definition at line 719 of file SIMachineFunctionInfo.h.

◆ hasNonSpillStackObjects()

bool llvm::SIMachineFunctionInfo::hasNonSpillStackObjects ( ) const
inline

Definition at line 842 of file SIMachineFunctionInfo.h.

◆ hasPrivateSegmentBuffer()

bool llvm::SIMachineFunctionInfo::hasPrivateSegmentBuffer ( ) const
inline

Definition at line 679 of file SIMachineFunctionInfo.h.

◆ hasPrivateSegmentWaveByteOffset()

bool llvm::SIMachineFunctionInfo::hasPrivateSegmentWaveByteOffset ( ) const
inline

Definition at line 721 of file SIMachineFunctionInfo.h.

◆ hasQueuePtr()

bool llvm::SIMachineFunctionInfo::hasQueuePtr ( ) const
inline

◆ hasSpilledSGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledSGPRs ( ) const
inline

◆ hasSpilledVGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledVGPRs ( ) const
inline

◆ hasWorkGroupIDX()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDX ( ) const
inline

Definition at line 703 of file SIMachineFunctionInfo.h.

Referenced by getWorkGroupIDSGPR().

◆ hasWorkGroupIDY()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDY ( ) const
inline

Definition at line 707 of file SIMachineFunctionInfo.h.

Referenced by getWorkGroupIDSGPR().

◆ hasWorkGroupIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDZ ( ) const
inline

Definition at line 711 of file SIMachineFunctionInfo.h.

Referenced by getWorkGroupIDSGPR().

◆ hasWorkGroupInfo()

bool llvm::SIMachineFunctionInfo::hasWorkGroupInfo ( ) const
inline

Definition at line 715 of file SIMachineFunctionInfo.h.

◆ hasWorkItemIDX()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDX ( ) const
inline

Definition at line 725 of file SIMachineFunctionInfo.h.

◆ hasWorkItemIDY()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDY ( ) const
inline

Definition at line 729 of file SIMachineFunctionInfo.h.

◆ hasWorkItemIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDZ ( ) const
inline

Definition at line 733 of file SIMachineFunctionInfo.h.

◆ haveFreeLanesForSGPRSpill()

bool SIMachineFunctionInfo::haveFreeLanesForSGPRSpill ( const MachineFunction MF,
unsigned  NumLane 
) const

returns true if NumLanes slots are available in VGPRs already used for SGPR spilling.

Definition at line 289 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFunction::getSubtarget(), and llvm::ARM_MB::ST.

Referenced by getVGPRSpillLaneOrTempRegister().

◆ increaseOccupancy()

void llvm::SIMachineFunctionInfo::increaseOccupancy ( const MachineFunction MF,
unsigned  Limit 
)
inline

◆ initializeBaseYamlFields()

bool SIMachineFunctionInfo::initializeBaseYamlFields ( const yaml::SIMachineFunctionInfo YamlMFI,
const MachineFunction MF,
PerFunctionMIParsingState PFS,
SMDiagnostic Error,
SMRange SourceRange 
)

◆ isCalleeSavedReg()

bool SIMachineFunctionInfo::isCalleeSavedReg ( const MCPhysReg CSRegs,
MCPhysReg  Reg 
)

Definition at line 275 of file SIMachineFunctionInfo.cpp.

References I.

◆ isPSInputAllocated()

bool llvm::SIMachineFunctionInfo::isPSInputAllocated ( unsigned  Index) const
inline

Definition at line 882 of file SIMachineFunctionInfo.h.

References Index.

◆ isStackRealigned()

bool llvm::SIMachineFunctionInfo::isStackRealigned ( ) const
inline

Definition at line 850 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEpilogue().

◆ limitOccupancy() [1/2]

void SIMachineFunctionInfo::limitOccupancy ( const MachineFunction MF)

◆ limitOccupancy() [2/2]

void llvm::SIMachineFunctionInfo::limitOccupancy ( unsigned  Limit)
inline

Definition at line 977 of file SIMachineFunctionInfo.h.

◆ markPSInputAllocated()

void llvm::SIMachineFunctionInfo::markPSInputAllocated ( unsigned  Index)
inline

Definition at line 886 of file SIMachineFunctionInfo.h.

References Index.

◆ markPSInputEnabled()

void llvm::SIMachineFunctionInfo::markPSInputEnabled ( unsigned  Index)
inline

Definition at line 890 of file SIMachineFunctionInfo.h.

References Index.

◆ mayNeedAGPRs()

bool llvm::SIMachineFunctionInfo::mayNeedAGPRs ( ) const
inline

Definition at line 988 of file SIMachineFunctionInfo.h.

◆ mayUseAGPRs()

bool SIMachineFunctionInfo::mayUseAGPRs ( const Function F) const

◆ removeDeadFrameIndices()

bool SIMachineFunctionInfo::removeDeadFrameIndices ( MachineFrameInfo MFI,
bool  ResetSGPRSpillStackIDs 
)

◆ reserveWWMRegister()

void llvm::SIMachineFunctionInfo::reserveWWMRegister ( Register  Reg)
inline

◆ returnsVoid()

bool llvm::SIMachineFunctionInfo::returnsVoid ( ) const
inline

Definition at line 894 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerReturn().

◆ setBytesInStackArgArea()

void llvm::SIMachineFunctionInfo::setBytesInStackArgArea ( unsigned  Bytes)
inline

Definition at line 609 of file SIMachineFunctionInfo.h.

◆ setFrameOffsetReg()

void llvm::SIMachineFunctionInfo::setFrameOffsetReg ( Register  Reg)
inline

Definition at line 800 of file SIMachineFunctionInfo.h.

References assert().

◆ setHasNonSpillStackObjects()

void llvm::SIMachineFunctionInfo::setHasNonSpillStackObjects ( bool  StackObject = true)
inline

Definition at line 846 of file SIMachineFunctionInfo.h.

◆ setHasSpilledSGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledSGPRs ( bool  Spill = true)
inline

◆ setHasSpilledVGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledVGPRs ( bool  Spill = true)
inline

Definition at line 838 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::storeRegToStackSlot().

◆ setIfReturnsVoid()

void llvm::SIMachineFunctionInfo::setIfReturnsVoid ( bool  Value)
inline

Definition at line 898 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerReturn().

◆ setIsStackRealigned()

void llvm::SIMachineFunctionInfo::setIsStackRealigned ( bool  Realigned = true)
inline

Definition at line 854 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitPrologue().

◆ setPrivateSegmentWaveByteOffset()

void llvm::SIMachineFunctionInfo::setPrivateSegmentWaveByteOffset ( Register  Reg)
inline

Definition at line 675 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ setScratchRSrcReg()

void llvm::SIMachineFunctionInfo::setScratchRSrcReg ( Register  Reg)
inline

Definition at line 791 of file SIMachineFunctionInfo.h.

References assert().

◆ setStackPtrOffsetReg()

void llvm::SIMachineFunctionInfo::setStackPtrOffsetReg ( Register  Reg)
inline

Definition at line 805 of file SIMachineFunctionInfo.h.

References assert().

◆ setVGPRForAGPRCopy()

void llvm::SIMachineFunctionInfo::setVGPRForAGPRCopy ( Register  NewVGPRForAGPRCopy)
inline

◆ setVGPRToAGPRSpillDead()

void llvm::SIMachineFunctionInfo::setVGPRToAGPRSpillDead ( int  FrameIndex)
inline

◆ setWorkItemIDX()

void llvm::SIMachineFunctionInfo::setWorkItemIDX ( ArgDescriptor  Arg)
inline

Definition at line 656 of file SIMachineFunctionInfo.h.

References Arg.

◆ setWorkItemIDY()

void llvm::SIMachineFunctionInfo::setWorkItemIDY ( ArgDescriptor  Arg)
inline

Definition at line 660 of file SIMachineFunctionInfo.h.

References Arg.

◆ setWorkItemIDZ()

void llvm::SIMachineFunctionInfo::setWorkItemIDZ ( ArgDescriptor  Arg)
inline

Definition at line 664 of file SIMachineFunctionInfo.h.

References Arg.

◆ usesAGPRs()

bool SIMachineFunctionInfo::usesAGPRs ( const MachineFunction MF) const

◆ wwmAllocation()

auto llvm::SIMachineFunctionInfo::wwmAllocation ( ) const
inline

Friends And Related Function Documentation

◆ GCNTargetMachine

friend class GCNTargetMachine
friend

Definition at line 352 of file SIMachineFunctionInfo.h.

Member Data Documentation

◆ BasePointerSaveIndex

Optional<int> llvm::SIMachineFunctionInfo::BasePointerSaveIndex

◆ FramePointerSaveIndex

Optional<int> llvm::SIMachineFunctionInfo::FramePointerSaveIndex

◆ SGPRForBPSaveRestoreCopy

Register llvm::SIMachineFunctionInfo::SGPRForBPSaveRestoreCopy

If this is set, an SGPR used for save/restore of the register used for the base pointer.

Definition at line 535 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::assignCalleeSavedSpillSlots(), llvm::SIFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEpilogue(), and llvm::SIFrameLowering::emitPrologue().

◆ SGPRForFPSaveRestoreCopy

Register llvm::SIMachineFunctionInfo::SGPRForFPSaveRestoreCopy

If this is set, an SGPR used for save/restore of the register used for the frame pointer.

Definition at line 530 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::assignCalleeSavedSpillSlots(), llvm::SIFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEpilogue(), and llvm::SIFrameLowering::emitPrologue().

◆ WWMReservedFrameIndexes

SmallVector<int, 8> llvm::SIMachineFunctionInfo::WWMReservedFrameIndexes

Track stack slots used for save/restore of reserved WWM VGPRs in the prolog/epilog.

FIXME: This is temporary state only needed in PrologEpilogInserter, and doesn't really belong here. It does not require serialization

Definition at line 486 of file SIMachineFunctionInfo.h.

Referenced by allocateWWMReservedSpillSlots(), and wwmAllocation().

◆ WWMReservedRegs

SmallSetVector<Register, 8> llvm::SIMachineFunctionInfo::WWMReservedRegs

The documentation for this class was generated from the following files: