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27 #define GET_REGINFO_TARGET_DESC
28 #include "LoongArchGenRegisterInfo.inc"
39 switch (Subtarget.getTargetABI()) {
44 return CSR_ILP32S_LP64S_SaveList;
47 return CSR_ILP32F_LP64F_SaveList;
50 return CSR_ILP32D_LP64D_SaveList;
59 switch (Subtarget.getTargetABI()) {
64 return CSR_ILP32S_LP64S_RegMask;
67 return CSR_ILP32F_LP64F_RegMask;
70 return CSR_ILP32D_LP64D_RegMask;
75 return CSR_NoRegs_RegMask;
84 markSuperRegs(Reserved, LoongArch::R0);
86 markSuperRegs(Reserved, LoongArch::R3);
87 markSuperRegs(Reserved, LoongArch::R21);
89 markSuperRegs(Reserved, LoongArch::R22);
95 assert(checkAllSuperRegsMarked(Reserved));
100 return PhysReg == LoongArch::R0;
106 return TFI->
hasFP(MF) ? LoongArch::R22 : LoongArch::R3;
111 unsigned FIOperandNum,
113 assert(SPAdj == 0 &&
"Unexpected non-zero SPAdj value");
This is an optimization pass for GlobalISel generic memory operations.
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Information about stack frame layout on the target.
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
const uint32_t * getNoPreservedMask() const override
virtual bool hasFP(const MachineFunction &MF) const =0
hasFP - Return true if the specified function should have a dedicated frame pointer register.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
bool isConstantPhysReg(MCRegister PhysReg) const override
Register getFrameRegister(const MachineFunction &MF) const override
void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasBP(const MachineFunction &MF) const
LoongArchRegisterInfo(unsigned HwMode)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Wrapper class representing virtual and physical registers.
BitVector getReservedRegs(const MachineFunction &MF) const override
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Wrapper class representing physical registers. Should be passed by value.