LLVM  16.0.0git
LoongArchFrameLowering.cpp
Go to the documentation of this file.
1 //===-- LoongArchFrameLowering.cpp - LoongArch Frame Information -*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the LoongArch implementation of TargetFrameLowering class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "LoongArchFrameLowering.h"
15 #include "LoongArchSubtarget.h"
23 #include "llvm/IR/DiagnosticInfo.h"
24 #include "llvm/MC/MCDwarf.h"
25 
26 using namespace llvm;
27 
28 #define DEBUG_TYPE "loongarch-frame-lowering"
29 
30 // Return true if the specified function should have a dedicated frame
31 // pointer register. This is true if frame pointer elimination is
32 // disabled, if it needs dynamic stack realignment, if the function has
33 // variable sized allocas, or if the frame address is taken.
35  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
36 
37  const MachineFrameInfo &MFI = MF.getFrameInfo();
38  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
39  RegInfo->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
40  MFI.isFrameAddressTaken();
41 }
42 
44  const MachineFrameInfo &MFI = MF.getFrameInfo();
45  const TargetRegisterInfo *TRI = STI.getRegisterInfo();
46 
47  return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF);
48 }
49 
50 void LoongArchFrameLowering::adjustReg(MachineBasicBlock &MBB,
52  const DebugLoc &DL, Register DestReg,
53  Register SrcReg, int64_t Val,
54  MachineInstr::MIFlag Flag) const {
55  const LoongArchInstrInfo *TII = STI.getInstrInfo();
56  bool IsLA64 = STI.is64Bit();
57  unsigned Addi = IsLA64 ? LoongArch::ADDI_D : LoongArch::ADDI_W;
58 
59  if (DestReg == SrcReg && Val == 0)
60  return;
61 
62  if (isInt<12>(Val)) {
63  // addi.w/d $DstReg, $SrcReg, Val
64  BuildMI(MBB, MBBI, DL, TII->get(Addi), DestReg)
65  .addReg(SrcReg)
66  .addImm(Val)
67  .setMIFlag(Flag);
68  return;
69  }
70 
71  // Try to split the offset across two ADDIs. We need to keep the stack pointer
72  // aligned after each ADDI. We need to determine the maximum value we can put
73  // in each ADDI. In the negative direction, we can use -2048 which is always
74  // sufficiently aligned. In the positive direction, we need to find the
75  // largest 12-bit immediate that is aligned. Exclude -4096 since it can be
76  // created with LU12I.W.
77  assert(getStackAlign().value() < 2048 && "Stack alignment too large");
78  int64_t MaxPosAdjStep = 2048 - getStackAlign().value();
79  if (Val > -4096 && Val <= (2 * MaxPosAdjStep)) {
80  int64_t FirstAdj = Val < 0 ? -2048 : MaxPosAdjStep;
81  Val -= FirstAdj;
82  BuildMI(MBB, MBBI, DL, TII->get(Addi), DestReg)
83  .addReg(SrcReg)
84  .addImm(FirstAdj)
85  .setMIFlag(Flag);
86  BuildMI(MBB, MBBI, DL, TII->get(Addi), DestReg)
87  .addReg(DestReg, RegState::Kill)
88  .addImm(Val)
89  .setMIFlag(Flag);
90  return;
91  }
92 
93  unsigned Opc = IsLA64 ? LoongArch::ADD_D : LoongArch::ADD_W;
94  if (Val < 0) {
95  Val = -Val;
96  Opc = IsLA64 ? LoongArch::SUB_D : LoongArch::SUB_W;
97  }
98 
100  Register ScratchReg = MRI.createVirtualRegister(&LoongArch::GPRRegClass);
101  TII->movImm(MBB, MBBI, DL, ScratchReg, Val, Flag);
102  BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg)
103  .addReg(SrcReg)
104  .addReg(ScratchReg, RegState::Kill)
105  .setMIFlag(Flag);
106 }
107 
108 // Determine the size of the frame and maximum call frame size.
109 void LoongArchFrameLowering::determineFrameLayout(MachineFunction &MF) const {
110  MachineFrameInfo &MFI = MF.getFrameInfo();
111 
112  // Get the number of bytes to allocate from the FrameInfo.
113  uint64_t FrameSize = MFI.getStackSize();
114 
115  // Make sure the frame is aligned.
116  FrameSize = alignTo(FrameSize, getStackAlign());
117 
118  // Update frame info.
119  MFI.setStackSize(FrameSize);
120 }
121 
123  const MachineFunction &MF) {
124  uint64_t FuncSize = 0;
125  for (auto &MBB : MF)
126  for (auto &MI : MBB)
127  FuncSize += TII->getInstSizeInBytes(MI);
128  return FuncSize;
129 }
130 
133  return false;
134  for (auto &MBB : MF)
135  for (auto &MI : MBB)
136  if (MI.getOpcode() == LoongArch::PseudoST_CFR)
137  return true;
138  return false;
139 }
140 
142  MachineFunction &MF, RegScavenger *RS) const {
143  const LoongArchRegisterInfo *RI = STI.getRegisterInfo();
144  const TargetRegisterClass &RC = LoongArch::GPRRegClass;
145  const LoongArchInstrInfo *TII = STI.getInstrInfo();
148  MachineFrameInfo &MFI = MF.getFrameInfo();
149 
150  unsigned ScavSlotsNum = 0;
151 
152  // Far branches beyond 27-bit offset require a spill slot for scratch register.
153  bool IsLargeFunction = !isInt<27>(estimateFunctionSizeInBytes(TII, MF));
154  if (IsLargeFunction)
155  ScavSlotsNum = 1;
156 
157  // estimateStackSize has been observed to under-estimate the final stack
158  // size, so give ourselves wiggle-room by checking for stack size
159  // representable an 11-bit signed field rather than 12-bits.
160  if (!isInt<11>(MFI.estimateStackSize(MF)))
161  ScavSlotsNum = std::max(ScavSlotsNum, 1u);
162 
163  // For CFR spill.
164  if (needScavSlotForCFR(MF))
165  ++ScavSlotsNum;
166 
167  // Create emergency spill slots.
168  for (unsigned i = 0; i < ScavSlotsNum; ++i) {
169  int FI = MFI.CreateStackObject(RI->getSpillSize(RC), RI->getSpillAlign(RC),
170  false);
171  RS->addScavengingFrameIndex(FI);
172  if (IsLargeFunction && LAFI->getBranchRelaxationSpillFrameIndex() == -1)
174  LLVM_DEBUG(dbgs() << "Allocated FI(" << FI
175  << ") as the emergency spill slot.\n");
176  }
177 }
178 
180  MachineBasicBlock &MBB) const {
181  MachineFrameInfo &MFI = MF.getFrameInfo();
182  auto *LoongArchFI = MF.getInfo<LoongArchMachineFunctionInfo>();
183  const LoongArchRegisterInfo *RI = STI.getRegisterInfo();
184  const LoongArchInstrInfo *TII = STI.getInstrInfo();
186  bool IsLA64 = STI.is64Bit();
187 
188  Register SPReg = LoongArch::R3;
189  Register FPReg = LoongArch::R22;
190 
191  // Debug location must be unknown since the first debug location is used
192  // to determine the end of the prologue.
193  DebugLoc DL;
194 
195  // Determine the correct frame layout
196  determineFrameLayout(MF);
197 
198  // First, compute final stack size.
199  uint64_t StackSize = MFI.getStackSize();
200  uint64_t RealStackSize = StackSize;
201 
202  // Early exit if there is no need to allocate space in the stack.
203  if (StackSize == 0 && !MFI.adjustsStack())
204  return;
205 
206  uint64_t FirstSPAdjustAmount = getFirstSPAdjustAmount(MF, true);
207  uint64_t SecondSPAdjustAmount = RealStackSize - FirstSPAdjustAmount;
208  // Split the SP adjustment to reduce the offsets of callee saved spill.
209  if (FirstSPAdjustAmount)
210  StackSize = FirstSPAdjustAmount;
211 
212  // Adjust stack.
213  adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup);
214  if (FirstSPAdjustAmount != 2048 || SecondSPAdjustAmount == 0) {
215  // Emit ".cfi_def_cfa_offset StackSize".
216  unsigned CFIIndex =
217  MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize));
218  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
219  .addCFIIndex(CFIIndex)
221  }
222 
223  const auto &CSI = MFI.getCalleeSavedInfo();
224 
225  // The frame pointer is callee-saved, and code has been generated for us to
226  // save it to the stack. We need to skip over the storing of callee-saved
227  // registers as the frame pointer must be modified after it has been saved
228  // to the stack, not before.
229  std::advance(MBBI, CSI.size());
230 
231  // Iterate over list of callee-saved registers and emit .cfi_offset
232  // directives.
233  for (const auto &Entry : CSI) {
234  int64_t Offset = MFI.getObjectOffset(Entry.getFrameIdx());
235  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
236  nullptr, RI->getDwarfRegNum(Entry.getReg(), true), Offset));
237  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
238  .addCFIIndex(CFIIndex)
240  }
241 
242  // Generate new FP.
243  if (hasFP(MF)) {
244  adjustReg(MBB, MBBI, DL, FPReg, SPReg,
245  StackSize - LoongArchFI->getVarArgsSaveSize(),
247 
248  // Emit ".cfi_def_cfa $fp, LoongArchFI->getVarArgsSaveSize()"
249  unsigned CFIIndex = MF.addFrameInst(
250  MCCFIInstruction::cfiDefCfa(nullptr, RI->getDwarfRegNum(FPReg, true),
251  LoongArchFI->getVarArgsSaveSize()));
252  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
253  .addCFIIndex(CFIIndex)
255  }
256 
257  // Emit the second SP adjustment after saving callee saved registers.
258  if (FirstSPAdjustAmount && SecondSPAdjustAmount) {
259  if (hasFP(MF)) {
260  assert(SecondSPAdjustAmount > 0 &&
261  "SecondSPAdjustAmount should be greater than zero");
262  adjustReg(MBB, MBBI, DL, SPReg, SPReg, -SecondSPAdjustAmount,
264  } else {
265  // FIXME: RegScavenger will place the spill instruction before the
266  // prologue if a VReg is created in the prologue. This will pollute the
267  // caller's stack data. Therefore, until there is better way, we just use
268  // the `addi.w/d` instruction for stack adjustment to ensure that VReg
269  // will not be created.
270  for (int Val = SecondSPAdjustAmount; Val > 0; Val -= 2048)
271  BuildMI(MBB, MBBI, DL,
272  TII->get(IsLA64 ? LoongArch::ADDI_D : LoongArch::ADDI_W), SPReg)
273  .addReg(SPReg)
274  .addImm(Val < 2048 ? -Val : -2048)
276 
277  // If we are using a frame-pointer, and thus emitted ".cfi_def_cfa fp, 0",
278  // don't emit an sp-based .cfi_def_cfa_offset
279  // Emit ".cfi_def_cfa_offset RealStackSize"
280  unsigned CFIIndex = MF.addFrameInst(
281  MCCFIInstruction::cfiDefCfaOffset(nullptr, RealStackSize));
282  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
283  .addCFIIndex(CFIIndex)
285  }
286  }
287 
288  if (hasFP(MF)) {
289  // Realign stack.
290  if (RI->hasStackRealignment(MF)) {
291  unsigned ShiftAmount = Log2(MFI.getMaxAlign());
292  Register VR =
293  MF.getRegInfo().createVirtualRegister(&LoongArch::GPRRegClass);
294  BuildMI(MBB, MBBI, DL,
295  TII->get(IsLA64 ? LoongArch::SRLI_D : LoongArch::SRLI_W), VR)
296  .addReg(SPReg)
297  .addImm(ShiftAmount)
299  BuildMI(MBB, MBBI, DL,
300  TII->get(IsLA64 ? LoongArch::SLLI_D : LoongArch::SLLI_W), SPReg)
301  .addReg(VR)
302  .addImm(ShiftAmount)
304  // FP will be used to restore the frame in the epilogue, so we need
305  // another base register BP to record SP after re-alignment. SP will
306  // track the current stack after allocating variable sized objects.
307  if (hasBP(MF)) {
308  // move BP, $sp
309  BuildMI(MBB, MBBI, DL, TII->get(LoongArch::OR),
311  .addReg(SPReg)
312  .addReg(LoongArch::R0)
314  }
315  }
316  }
317 }
318 
320  MachineBasicBlock &MBB) const {
321  const LoongArchRegisterInfo *RI = STI.getRegisterInfo();
322  MachineFrameInfo &MFI = MF.getFrameInfo();
323  auto *LoongArchFI = MF.getInfo<LoongArchMachineFunctionInfo>();
324  Register SPReg = LoongArch::R3;
325 
327  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
328 
329  const auto &CSI = MFI.getCalleeSavedInfo();
330  // Skip to before the restores of callee-saved registers.
331  auto LastFrameDestroy = MBBI;
332  if (!CSI.empty())
333  LastFrameDestroy = std::prev(MBBI, CSI.size());
334 
335  // Get the number of bytes from FrameInfo.
336  uint64_t StackSize = MFI.getStackSize();
337 
338  // Restore the stack pointer.
339  if (RI->hasStackRealignment(MF) || MFI.hasVarSizedObjects()) {
340  assert(hasFP(MF) && "frame pointer should not have been eliminated");
341  adjustReg(MBB, LastFrameDestroy, DL, SPReg, LoongArch::R22,
342  -StackSize + LoongArchFI->getVarArgsSaveSize(),
344  }
345 
346  uint64_t FirstSPAdjustAmount = getFirstSPAdjustAmount(MF);
347  if (FirstSPAdjustAmount) {
348  uint64_t SecondSPAdjustAmount = StackSize - FirstSPAdjustAmount;
349  assert(SecondSPAdjustAmount > 0 &&
350  "SecondSPAdjustAmount should be greater than zero");
351 
352  adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, SecondSPAdjustAmount,
354  StackSize = FirstSPAdjustAmount;
355  }
356 
357  // Deallocate stack
358  adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackSize, MachineInstr::FrameDestroy);
359 }
360 
361 // We would like to split the SP adjustment to reduce prologue/epilogue
362 // as following instructions. In this way, the offset of the callee saved
363 // register could fit in a single store.
364 // e.g.
365 // addi.d $sp, $sp, -2032
366 // st.d $ra, $sp, 2024
367 // st.d $fp, $sp, 2016
368 // addi.d $sp, $sp, -16
369 uint64_t
371  bool IsPrologue) const {
372  const MachineFrameInfo &MFI = MF.getFrameInfo();
373  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
374 
375  // Return the FirstSPAdjustAmount if the StackSize can not fit in a signed
376  // 12-bit and there exists a callee-saved register needing to be pushed.
377  if (!isInt<12>(MFI.getStackSize())) {
378  // FirstSPAdjustAmount is chosen as (2048 - StackAlign) because 2048 will
379  // cause sp = sp + 2048 in the epilogue to be split into multiple
380  // instructions. Offsets smaller than 2048 can fit in a single load/store
381  // instruction, and we have to stick with the stack alignment.
382  // So (2048 - StackAlign) will satisfy the stack alignment.
383  //
384  // FIXME: This place may seem odd. When using multiple ADDI instructions to
385  // adjust the stack in Prologue, and there are no callee-saved registers, we
386  // can take advantage of the logic of split sp ajustment to reduce code
387  // changes.
388  return CSI.size() > 0 ? 2048 - getStackAlign().value()
389  : (IsPrologue ? 2048 : 0);
390  }
391  return 0;
392 }
393 
395  BitVector &SavedRegs,
396  RegScavenger *RS) const {
398  // Unconditionally spill RA and FP only if the function uses a frame
399  // pointer.
400  if (hasFP(MF)) {
401  SavedRegs.set(LoongArch::R1);
402  SavedRegs.set(LoongArch::R22);
403  }
404  // Mark BP as used if function has dedicated base pointer.
405  if (hasBP(MF))
406  SavedRegs.set(LoongArchABI::getBPReg());
407 }
408 
409 // Do not preserve stack space within prologue for outgoing variables if the
410 // function contains variable size objects.
411 // Let eliminateCallFramePseudoInstr preserve stack space for it.
413  const MachineFunction &MF) const {
414  return !MF.getFrameInfo().hasVarSizedObjects();
415 }
416 
417 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions.
422  Register SPReg = LoongArch::R3;
423  DebugLoc DL = MI->getDebugLoc();
424 
425  if (!hasReservedCallFrame(MF)) {
426  // If space has not been reserved for a call frame, ADJCALLSTACKDOWN and
427  // ADJCALLSTACKUP must be converted to instructions manipulating the stack
428  // pointer. This is necessary when there is a variable length stack
429  // allocation (e.g. alloca), which means it's not possible to allocate
430  // space for outgoing arguments from within the function prologue.
431  int64_t Amount = MI->getOperand(0).getImm();
432 
433  if (Amount != 0) {
434  // Ensure the stack remains aligned after adjustment.
435  Amount = alignSPAdjust(Amount);
436 
437  if (MI->getOpcode() == LoongArch::ADJCALLSTACKDOWN)
438  Amount = -Amount;
439 
440  adjustReg(MBB, MI, DL, SPReg, SPReg, Amount, MachineInstr::NoFlags);
441  }
442  }
443 
444  return MBB.erase(MI);
445 }
446 
450  if (CSI.empty())
451  return true;
452 
453  MachineFunction *MF = MBB.getParent();
454  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
455 
456  // Insert the spill to the stack frame.
457  for (auto &CS : CSI) {
458  Register Reg = CS.getReg();
459  // If the register is RA and the return address is taken by method
460  // LoongArchTargetLowering::lowerRETURNADDR, don't set kill flag.
461  bool IsKill =
462  !(Reg == LoongArch::R1 && MF->getFrameInfo().isReturnAddressTaken());
464  TII.storeRegToStackSlot(MBB, MI, Reg, IsKill, CS.getFrameIdx(), RC, TRI);
465  }
466 
467  return true;
468 }
469 
471  const MachineFunction &MF, int FI, Register &FrameReg) const {
472  const MachineFrameInfo &MFI = MF.getFrameInfo();
474  auto *LoongArchFI = MF.getInfo<LoongArchMachineFunctionInfo>();
475  uint64_t StackSize = MFI.getStackSize();
476  uint64_t FirstSPAdjustAmount = getFirstSPAdjustAmount(MF);
477 
478  // Callee-saved registers should be referenced relative to the stack
479  // pointer (positive offset), otherwise use the frame pointer (negative
480  // offset).
481  const auto &CSI = MFI.getCalleeSavedInfo();
482  int MinCSFI = 0;
483  int MaxCSFI = -1;
484  StackOffset Offset =
486  MFI.getOffsetAdjustment());
487 
488  if (CSI.size()) {
489  MinCSFI = CSI[0].getFrameIdx();
490  MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
491  }
492 
493  if (FI >= MinCSFI && FI <= MaxCSFI) {
494  FrameReg = LoongArch::R3;
495  if (FirstSPAdjustAmount)
496  Offset += StackOffset::getFixed(FirstSPAdjustAmount);
497  else
498  Offset += StackOffset::getFixed(StackSize);
499  } else if (RI->hasStackRealignment(MF) && !MFI.isFixedObjectIndex(FI)) {
500  // If the stack was realigned, the frame pointer is set in order to allow
501  // SP to be restored, so we need another base register to record the stack
502  // after realignment.
503  FrameReg = hasBP(MF) ? LoongArchABI::getBPReg() : LoongArch::R3;
504  Offset += StackOffset::getFixed(StackSize);
505  } else {
506  FrameReg = RI->getFrameRegister(MF);
507  if (hasFP(MF))
508  Offset += StackOffset::getFixed(LoongArchFI->getVarArgsSaveSize());
509  else
510  Offset += StackOffset::getFixed(StackSize);
511  }
512 
513  return Offset;
514 }
llvm::LoongArchSubtarget::getRegisterInfo
const LoongArchRegisterInfo * getRegisterInfo() const override
Definition: LoongArchSubtarget.h:74
i
i
Definition: README.txt:29
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:156
llvm::MachineFrameInfo::hasVarSizedObjects
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
Definition: MachineFrameInfo.h:355
MCDwarf.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:108
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:131
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::ISD::OR
@ OR
Definition: ISDOpcodes.h:667
llvm::MachineRegisterInfo::createVirtualRegister
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:156
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::BitVector::set
BitVector & set()
Definition: BitVector.h:344
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:95
llvm::MachineInstrBuilder::addCFIIndex
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
Definition: MachineInstrBuilder.h:247
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::LoongArchFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: LoongArchFrameLowering.cpp:470
llvm::MachineFrameInfo::getOffsetAdjustment
int getOffsetAdjustment() const
Return the correction for frame offsets.
Definition: MachineFrameInfo.h:594
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:127
llvm::LoongArchFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: LoongArchFrameLowering.cpp:179
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:237
llvm::LoongArchSubtarget::is64Bit
bool is64Bit() const
Definition: LoongArchSubtarget.h:83
LoongArchFrameLowering.h
llvm::StackOffset::getFixed
ScalarTy getFixed() const
Definition: TypeSize.h:149
llvm::MachineFrameInfo::setStackSize
void setStackSize(uint64_t Size)
Set the size of the stack.
Definition: MachineFrameInfo.h:588
llvm::LoongArchFrameLowering::processFunctionBeforeFrameFinalized
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Definition: LoongArchFrameLowering.cpp:141
LoongArchSubtarget.h
llvm::max
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:337
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::ArrayRef::empty
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:159
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:546
MachineRegisterInfo.h
llvm::MachineInstr::FrameDestroy
@ FrameDestroy
Definition: MachineInstr.h:86
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1314
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:667
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:98
needScavSlotForCFR
static bool needScavSlotForCFR(MachineFunction &MF)
Definition: LoongArchFrameLowering.cpp:131
llvm::TargetFrameLowering::getOffsetOfLocalArea
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
Definition: TargetFrameLowering.h:140
llvm::LoongArchMachineFunctionInfo
LoongArchMachineFunctionInfo - This class is derived from MachineFunctionInfo and contains private Lo...
Definition: LoongArchMachineFunctionInfo.h:25
llvm::MachineFrameInfo::isReturnAddressTaken
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Definition: MachineFrameInfo.h:377
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:755
llvm::TargetFrameLowering::getStackAlign
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:100
llvm::Log2
unsigned Log2(Align A)
Returns the log2 of the alignment.
Definition: Alignment.h:209
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::MachineInstr::FrameSetup
@ FrameSetup
Definition: MachineInstr.h:84
llvm::LoongArchFrameLowering::getFirstSPAdjustAmount
uint64_t getFirstSPAdjustAmount(const MachineFunction &MF, bool IsPrologue=false) const
Definition: LoongArchFrameLowering.cpp:370
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
llvm::LoongArchSubtarget::hasBasicF
bool hasBasicF() const
Definition: LoongArchSubtarget.h:84
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:585
llvm::LoongArchRegisterInfo
Definition: LoongArchRegisterInfo.h:24
llvm::MachineFrameInfo::getObjectOffset
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Definition: MachineFrameInfo.h:526
llvm::BitVector
Definition: BitVector.h:75
llvm::MachineFrameInfo::isFixedObjectIndex
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
Definition: MachineFrameInfo.h:688
llvm::LoongArchFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: LoongArchFrameLowering.cpp:394
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::TargetOptions::DisableFramePointerElim
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
Definition: TargetOptionsImpl.cpp:23
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:657
llvm::LoongArchFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: LoongArchFrameLowering.cpp:447
llvm::MachineInstrBuilder::setMIFlag
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
Definition: MachineInstrBuilder.h:278
llvm::TargetFrameLowering::alignSPAdjust
int alignSPAdjust(int SPAdj) const
alignSPAdjust - This method aligns the stack adjustment to the correct alignment.
Definition: TargetFrameLowering.h:105
uint64_t
llvm::LoongArchSubtarget
Definition: LoongArchSubtarget.h:32
llvm::HexagonInstrInfo::storeRegToStackSlot
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Store the specified register of the given register class to the specified stack frame index.
Definition: HexagonInstrInfo.cpp:955
llvm::TargetRegisterInfo::getFrameRegister
virtual Register getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
llvm::RegScavenger
Definition: RegisterScavenging.h:34
llvm::MachineInstr::NoFlags
@ NoFlags
Definition: MachineInstr.h:83
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:117
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::LoongArchFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: LoongArchFrameLowering.cpp:412
llvm::MachineBasicBlock::size
unsigned size() const
Definition: MachineBasicBlock.h:275
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:673
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:261
llvm::LoongArchFrameLowering::hasBP
bool hasBP(const MachineFunction &MF) const
Definition: LoongArchFrameLowering.cpp:43
llvm::RegScavenger::addScavengingFrameIndex
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Definition: RegisterScavenging.h:143
llvm::MCCFIInstruction::cfiDefCfa
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
Definition: MCDwarf.h:532
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::MachineInstr::MIFlag
MIFlag
Definition: MachineInstr.h:82
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:787
llvm::MachineBasicBlock::getFirstTerminator
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
Definition: MachineBasicBlock.cpp:239
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::MachineFrameInfo::getMaxAlign
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Definition: MachineFrameInfo.h:601
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineFunction::addFrameInst
unsigned addFrameInst(const MCCFIInstruction &Inst)
Definition: MachineFunction.cpp:310
llvm::MachineFrameInfo::isFrameAddressTaken
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Definition: MachineFrameInfo.h:371
llvm::LoongArchMachineFunctionInfo::getBranchRelaxationSpillFrameIndex
int getBranchRelaxationSpillFrameIndex()
Definition: LoongArchMachineFunctionInfo.h:58
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::LoongArchFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: LoongArchFrameLowering.cpp:319
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:653
MachineFrameInfo.h
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
LoongArchBaseInfo.h
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
DiagnosticInfo.h
llvm::LoongArchFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: LoongArchFrameLowering.cpp:419
LoongArchMachineFunctionInfo.h
llvm::LoongArchABI::getBPReg
MCRegister getBPReg()
Definition: LoongArchBaseInfo.cpp:36
llvm::TargetRegisterInfo::hasStackRealignment
bool hasStackRealignment(const MachineFunction &MF) const
True if stack realignment is required and still possible.
Definition: TargetRegisterInfo.h:968
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:106
LoongArchMCTargetDesc.h
llvm::LoongArchSubtarget::getInstrInfo
const LoongArchInstrInfo * getInstrInfo() const override
Definition: LoongArchSubtarget.h:73
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:357
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:305
MachineInstrBuilder.h
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:570
llvm::TargetFrameLowering::determineCalleeSaves
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: TargetFrameLoweringImpl.cpp:83
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MachineFrameInfo::adjustsStack
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Definition: MachineFrameInfo.h:609
llvm::TargetRegisterInfo::getMinimalPhysRegClass
const TargetRegisterClass * getMinimalPhysRegClass(MCRegister Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
Definition: TargetRegisterInfo.cpp:212
RegisterScavenging.h
estimateFunctionSizeInBytes
static uint64_t estimateFunctionSizeInBytes(const LoongArchInstrInfo *TII, const MachineFunction &MF)
Definition: LoongArchFrameLowering.cpp:122
MachineFunction.h
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::LoongArchInstrInfo
Definition: LoongArchInstrInfo.h:26
llvm::LoongArchMachineFunctionInfo::setBranchRelaxationSpillFrameIndex
void setBranchRelaxationSpillFrameIndex(int Index)
Definition: LoongArchMachineFunctionInfo.h:61
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:307
llvm::LoongArchFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: LoongArchFrameLowering.cpp:34