LLVM  16.0.0git
M68kTargetMachine.cpp
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1 //===-- M68kTargetMachine.cpp - M68k Target Machine -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file contains implementation for M68k target machine.
11 ///
12 //===----------------------------------------------------------------------===//
13 
14 #include "M68kTargetMachine.h"
15 #include "M68k.h"
16 #include "M68kSubtarget.h"
17 #include "M68kTargetObjectFile.h"
23 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/InitializePasses.h"
27 #include "llvm/MC/TargetRegistry.h"
28 #include "llvm/PassRegistry.h"
29 #include <memory>
30 
31 using namespace llvm;
32 
33 #define DEBUG_TYPE "m68k"
34 
37  auto *PR = PassRegistry::getPassRegistry();
39 }
40 
41 namespace {
42 
43 std::string computeDataLayout(const Triple &TT, StringRef CPU,
44  const TargetOptions &Options) {
45  std::string Ret = "";
46  // M68k is Big Endian
47  Ret += "E";
48 
49  // FIXME how to wire it with the used object format?
50  Ret += "-m:e";
51 
52  // M68k pointers are always 32 bit wide even for 16-bit CPUs.
53  // The ABI only specifies 16-bit alignment.
54  // On at least the 68020+ with a 32-bit bus, there is a performance benefit
55  // to having 32-bit alignment.
56  Ret += "-p:32:16:32";
57 
58  // Bytes do not require special alignment, words are word aligned and
59  // long words are word aligned at minimum.
60  Ret += "-i8:8:8-i16:16:16-i32:16:32";
61 
62  // FIXME no floats at the moment
63 
64  // The registers can hold 8, 16, 32 bits
65  Ret += "-n8:16:32";
66 
67  Ret += "-a:0:16-S16";
68 
69  return Ret;
70 }
71 
74  // If not defined we default to static
75  if (!RM.has_value())
76  return Reloc::Static;
77 
78  return *RM;
79 }
80 
82  bool JIT) {
83  if (!CM) {
84  return CodeModel::Small;
85  } else if (CM == CodeModel::Large) {
86  llvm_unreachable("Large code model is not supported");
87  } else if (CM == CodeModel::Kernel) {
88  llvm_unreachable("Kernel code model is not implemented yet");
89  }
90  return CM.value();
91 }
92 } // end anonymous namespace
93 
95  StringRef CPU, StringRef FS,
96  const TargetOptions &Options,
99  CodeGenOpt::Level OL, bool JIT)
100  : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
102  ::getEffectiveCodeModel(CM, JIT), OL),
103  TLOF(std::make_unique<M68kELFTargetObjectFile>()),
104  Subtarget(TT, CPU, FS, *this) {
105  initAsmInfo();
106 }
107 
109 
110 const M68kSubtarget *
112  Attribute CPUAttr = F.getFnAttribute("target-cpu");
113  Attribute FSAttr = F.getFnAttribute("target-features");
114 
115  auto CPU = CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
116  auto FS = FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
117 
118  auto &I = SubtargetMap[CPU + FS];
119  if (!I) {
120  // This needs to be done before we create a new subtarget since any
121  // creation will depend on the TM and the code generation flags on the
122  // function that reside in TargetOptions.
124  I = std::make_unique<M68kSubtarget>(TargetTriple, CPU, FS, *this);
125  }
126  return I.get();
127 }
128 
129 //===----------------------------------------------------------------------===//
130 // Pass Pipeline Configuration
131 //===----------------------------------------------------------------------===//
132 
133 namespace {
134 class M68kPassConfig : public TargetPassConfig {
135 public:
136  M68kPassConfig(M68kTargetMachine &TM, PassManagerBase &PM)
137  : TargetPassConfig(TM, PM) {}
138 
139  M68kTargetMachine &getM68kTargetMachine() const {
140  return getTM<M68kTargetMachine>();
141  }
142 
143  const M68kSubtarget &getM68kSubtarget() const {
144  return *getM68kTargetMachine().getSubtargetImpl();
145  }
146  bool addIRTranslator() override;
147  bool addLegalizeMachineIR() override;
148  bool addRegBankSelect() override;
149  bool addGlobalInstructionSelect() override;
150  bool addInstSelector() override;
151  void addPreSched2() override;
152  void addPreEmitPass() override;
153 };
154 } // namespace
155 
157  return new M68kPassConfig(*this, PM);
158 }
159 
160 bool M68kPassConfig::addInstSelector() {
161  // Install an instruction selector.
162  addPass(createM68kISelDag(getM68kTargetMachine()));
163  addPass(createM68kGlobalBaseRegPass());
164  return false;
165 }
166 
167 bool M68kPassConfig::addIRTranslator() {
168  addPass(new IRTranslator());
169  return false;
170 }
171 
172 bool M68kPassConfig::addLegalizeMachineIR() {
173  addPass(new Legalizer());
174  return false;
175 }
176 
177 bool M68kPassConfig::addRegBankSelect() {
178  addPass(new RegBankSelect());
179  return false;
180 }
181 
182 bool M68kPassConfig::addGlobalInstructionSelect() {
183  addPass(new InstructionSelect());
184  return false;
185 }
186 
187 void M68kPassConfig::addPreSched2() { addPass(createM68kExpandPseudoPass()); }
188 
189 void M68kPassConfig::addPreEmitPass() {
190  addPass(createM68kCollapseMOVEMPass());
191 }
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::M68kTargetMachine
Definition: M68kTargetMachine.h:29
llvm::Attribute::isValid
bool isValid() const
Return true if the attribute is any kind of attribute.
Definition: Attributes.h:182
M68kTargetMachine.h
llvm::TargetOptions
Definition: TargetOptions.h:124
llvm::Function
Definition: Function.h:60
llvm::Attribute
Definition: Attributes.h:65
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:145
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::getTheM68kTarget
Target & getTheM68kTarget()
Definition: M68kTargetInfo.cpp:18
InstructionSelect.h
llvm::Optional< Reloc::Model >
T
#define T
Definition: Mips16ISelLowering.cpp:341
llvm::initializeGlobalISel
void initializeGlobalISel(PassRegistry &)
Initialize all passes linked into the GlobalISel library.
Definition: GlobalISel.cpp:17
llvm::MipsISD::Ret
@ Ret
Definition: MipsISelLowering.h:119
llvm::CodeModel::Kernel
@ Kernel
Definition: CodeGen.h:28
LegacyPassManager.h
PassRegistry.h
F
#define F(x, y, z)
Definition: MD5.cpp:55
M68kTargetObjectFile.h
M68k.h
llvm::Reloc::Model
Model
Definition: CodeGen.h:22
llvm::M68kTargetMachine::createPassConfig
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
Definition: M68kTargetMachine.cpp:156
llvm::PassRegistry::getPassRegistry
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Definition: PassRegistry.cpp:24
llvm::Legalizer
Definition: Legalizer.h:36
llvm::createM68kCollapseMOVEMPass
FunctionPass * createM68kCollapseMOVEMPass()
Finds sequential MOVEM instruction and collapse them into a single one.
Definition: M68kCollapseMOVEMPass.cpp:305
llvm::M68kTargetMachine::M68kTargetMachine
M68kTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
Definition: M68kTargetMachine.cpp:94
llvm::CodeModel::Small
@ Small
Definition: CodeGen.h:28
llvm::InstructionSelect
This pass is responsible for selecting generic machine instructions to target-specific instructions.
Definition: InstructionSelect.h:33
llvm::RegisterTargetMachine
RegisterTargetMachine - Helper template for registering a target machine implementation,...
Definition: TargetRegistry.h:1318
Options
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
Definition: PassBuilderBindings.cpp:48
llvm::TargetMachine::TargetFS
std::string TargetFS
Definition: TargetMachine.h:98
llvm::Attribute::getValueAsString
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:304
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::TargetMachine::resetTargetOptions
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
Definition: TargetMachine.cpp:53
llvm::M68kSubtarget
Definition: M68kSubtarget.h:45
llvm::CodeModel::Model
Model
Definition: CodeGen.h:28
Passes.h
llvm::TargetPassConfig
Target-Independent Code Generator Pass Configuration Options.
Definition: TargetPassConfig.h:84
llvm::M68kTargetMachine::getSubtargetImpl
const M68kSubtarget * getSubtargetImpl() const
Definition: M68kTargetMachine.h:43
llvm::TargetMachine::TargetTriple
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:96
llvm::EngineKind::JIT
@ JIT
Definition: ExecutionEngine.h:524
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:127
computeDataLayout
static std::string computeDataLayout(const Triple &TT, const MCTargetOptions &Options, bool LittleEndian)
Definition: AArch64TargetMachine.cpp:247
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::M68kELFTargetObjectFile
Definition: M68kTargetObjectFile.h:21
TargetPassConfig.h
llvm::AArch64::RM
@ RM
Definition: AArch64ISelLowering.h:472
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
this
Analysis the ScalarEvolution expression for r is this
Definition: README.txt:8
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::Reloc::Static
@ Static
Definition: CodeGen.h:22
IRTranslator.h
llvm::createM68kISelDag
FunctionPass * createM68kISelDag(M68kTargetMachine &TM)
This pass converts a legalized DAG into a M68k-specific DAG, ready for instruction scheduling.
Definition: M68kISelDAGToDAG.cpp:349
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::getEffectiveRelocModel
static Reloc::Model getEffectiveRelocModel(Optional< Reloc::Model > RM)
Definition: AVRTargetMachine.cpp:40
llvm::getEffectiveCodeModel
CodeModel::Model getEffectiveCodeModel(Optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
Definition: TargetMachine.h:506
llvm::LLVMTargetMachine::initAsmInfo
void initAsmInfo()
Definition: LLVMTargetMachine.cpp:40
llvm::X86AS::FS
@ FS
Definition: X86.h:196
std
Definition: BitVector.h:851
M68kTargetInfo.h
RegBankSelect.h
LLVMInitializeM68kTarget
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeM68kTarget()
Definition: M68kTargetMachine.cpp:35
llvm::LLVMTargetMachine
This class describes a target machine that is implemented with the LLVM target-independent code gener...
Definition: TargetMachine.h:414
llvm::CodeModel::Large
@ Large
Definition: CodeGen.h:28
Legalizer.h
llvm::createM68kExpandPseudoPass
FunctionPass * createM68kExpandPseudoPass()
Return a Machine IR pass that expands M68k-specific pseudo instructions into a sequence of actual ins...
Definition: M68kExpandPseudo.cpp:318
M68kSubtarget.h
llvm::legacy::PassManagerBase
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
Definition: LegacyPassManager.h:39
llvm::Optional::value
constexpr const T & value() const &
Definition: Optional.h:313
llvm::IRTranslator
Definition: IRTranslator.h:62
llvm::StringRef::str
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:213
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::RegBankSelect
This pass implements the reg bank selector pass used in the GlobalISel pipeline.
Definition: RegBankSelect.h:91
TargetRegistry.h
InitializePasses.h
llvm::TargetMachine::TargetCPU
std::string TargetCPU
Definition: TargetMachine.h:97
llvm::createM68kGlobalBaseRegPass
FunctionPass * createM68kGlobalBaseRegPass()
This pass initializes a global base register for PIC on M68k.
Definition: M68kInstrInfo.cpp:856
llvm::M68kTargetMachine::~M68kTargetMachine
~M68kTargetMachine() override
Definition: M68kTargetMachine.cpp:108