LLVM 19.0.0git
M68kTargetMachine.cpp
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1//===-- M68kTargetMachine.cpp - M68k Target Machine -------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file contains implementation for M68k target machine.
11///
12//===----------------------------------------------------------------------===//
13
14#include "M68kTargetMachine.h"
15#include "M68k.h"
16#include "M68kMachineFunction.h"
17#include "M68kSubtarget.h"
24#include "llvm/CodeGen/Passes.h"
28#include "llvm/PassRegistry.h"
29#include <memory>
30#include <optional>
31
32using namespace llvm;
33
34#define DEBUG_TYPE "m68k"
35
44}
45
46namespace {
47
48std::string computeDataLayout(const Triple &TT, StringRef CPU,
49 const TargetOptions &Options) {
50 std::string Ret = "";
51 // M68k is Big Endian
52 Ret += "E";
53
54 // FIXME how to wire it with the used object format?
55 Ret += "-m:e";
56
57 // M68k pointers are always 32 bit wide even for 16-bit CPUs.
58 // The ABI only specifies 16-bit alignment.
59 // On at least the 68020+ with a 32-bit bus, there is a performance benefit
60 // to having 32-bit alignment.
61 Ret += "-p:32:16:32";
62
63 // Bytes do not require special alignment, words are word aligned and
64 // long words are word aligned at minimum.
65 Ret += "-i8:8:8-i16:16:16-i32:16:32";
66
67 // FIXME no floats at the moment
68
69 // The registers can hold 8, 16, 32 bits
70 Ret += "-n8:16:32";
71
72 Ret += "-a:0:16-S16";
73
74 return Ret;
75}
76
78 std::optional<Reloc::Model> RM) {
79 // If not defined we default to static
80 if (!RM.has_value())
81 return Reloc::Static;
82
83 return *RM;
84}
85
86CodeModel::Model getEffectiveCodeModel(std::optional<CodeModel::Model> CM,
87 bool JIT) {
88 if (!CM) {
89 return CodeModel::Small;
90 } else if (CM == CodeModel::Large) {
91 llvm_unreachable("Large code model is not supported");
92 } else if (CM == CodeModel::Kernel) {
93 llvm_unreachable("Kernel code model is not implemented yet");
94 }
95 return CM.value();
96}
97} // end anonymous namespace
98
100 StringRef CPU, StringRef FS,
101 const TargetOptions &Options,
102 std::optional<Reloc::Model> RM,
103 std::optional<CodeModel::Model> CM,
104 CodeGenOptLevel OL, bool JIT)
105 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
107 ::getEffectiveCodeModel(CM, JIT), OL),
108 TLOF(std::make_unique<M68kELFTargetObjectFile>()),
109 Subtarget(TT, CPU, FS, *this) {
110 initAsmInfo();
111}
112
114
115const M68kSubtarget *
117 Attribute CPUAttr = F.getFnAttribute("target-cpu");
118 Attribute FSAttr = F.getFnAttribute("target-features");
119
120 auto CPU = CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
121 auto FS = FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
122
123 auto &I = SubtargetMap[CPU + FS];
124 if (!I) {
125 // This needs to be done before we create a new subtarget since any
126 // creation will depend on the TM and the code generation flags on the
127 // function that reside in TargetOptions.
129 I = std::make_unique<M68kSubtarget>(TargetTriple, CPU, FS, *this);
130 }
131 return I.get();
132}
133
135 BumpPtrAllocator &Allocator, const Function &F,
136 const TargetSubtargetInfo *STI) const {
137 return M68kMachineFunctionInfo::create<M68kMachineFunctionInfo>(Allocator, F,
138 STI);
139}
140
141//===----------------------------------------------------------------------===//
142// Pass Pipeline Configuration
143//===----------------------------------------------------------------------===//
144
145namespace {
146class M68kPassConfig : public TargetPassConfig {
147public:
148 M68kPassConfig(M68kTargetMachine &TM, PassManagerBase &PM)
149 : TargetPassConfig(TM, PM) {}
150
151 M68kTargetMachine &getM68kTargetMachine() const {
152 return getTM<M68kTargetMachine>();
153 }
154
155 const M68kSubtarget &getM68kSubtarget() const {
156 return *getM68kTargetMachine().getSubtargetImpl();
157 }
158 void addIRPasses() override;
159 bool addIRTranslator() override;
160 bool addLegalizeMachineIR() override;
161 bool addRegBankSelect() override;
162 bool addGlobalInstructionSelect() override;
163 bool addInstSelector() override;
164 void addPreSched2() override;
165 void addPreEmitPass() override;
166};
167} // namespace
168
170 return new M68kPassConfig(*this, PM);
171}
172
173void M68kPassConfig::addIRPasses() {
176}
177
178bool M68kPassConfig::addInstSelector() {
179 // Install an instruction selector.
180 addPass(createM68kISelDag(getM68kTargetMachine()));
182 return false;
183}
184
185bool M68kPassConfig::addIRTranslator() {
186 addPass(new IRTranslator());
187 return false;
188}
189
190bool M68kPassConfig::addLegalizeMachineIR() {
191 addPass(new Legalizer());
192 return false;
193}
194
195bool M68kPassConfig::addRegBankSelect() {
196 addPass(new RegBankSelect());
197 return false;
198}
199
200bool M68kPassConfig::addGlobalInstructionSelect() {
201 addPass(new InstructionSelect());
202 return false;
203}
204
205void M68kPassConfig::addPreSched2() { addPass(createM68kExpandPseudoPass()); }
206
207void M68kPassConfig::addPreEmitPass() {
209}
static Reloc::Model getEffectiveRelocModel(const Triple &TT, std::optional< Reloc::Model > RM)
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:135
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
This file declares the IRTranslator pass.
static LVOptions Options
Definition: LVOptions.cpp:25
static std::string computeDataLayout()
This file declares the M68k specific subclass of MachineFunctionInfo.
This file declares the M68k specific subclass of TargetSubtargetInfo.
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeM68kTarget()
This file declares the M68k specific subclass of TargetMachine.
This file contains declarations for M68k ELF object file lowering.
This file contains the entry points for global functions defined in the M68k target library,...
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
const char LLVMTargetMachineRef TM
Basic Register Allocator
This file describes the interface of the MachineFunctionPass responsible for assigning the generic vi...
Target-Independent Code Generator Pass Configuration Options pass.
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:349
bool isValid() const
Return true if the attribute is any kind of attribute.
Definition: Attributes.h:193
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
This pass is responsible for selecting generic machine instructions to target-specific instructions.
This class describes a target machine that is implemented with the LLVM target-independent code gener...
const M68kSubtarget * getSubtargetImpl() const
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
M68kTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
This pass implements the reg bank selector pass used in the GlobalISel pipeline.
Definition: RegBankSelect.h:91
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:223
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:95
std::string TargetFS
Definition: TargetMachine.h:97
std::string TargetCPU
Definition: TargetMachine.h:96
std::unique_ptr< const MCSubtargetInfo > STI
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
Target-Independent Code Generator Pass Configuration Options.
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
TargetSubtargetInfo - Generic base class for all target subtargets.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void initializeM68kGlobalBaseRegPass(PassRegistry &)
void initializeM68kExpandPseudoPass(PassRegistry &)
void initializeM68kCollapseMOVEMPass(PassRegistry &)
FunctionPass * createM68kGlobalBaseRegPass()
This pass initializes a global base register for PIC on M68k.
CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
FunctionPass * createM68kCollapseMOVEMPass()
Finds sequential MOVEM instruction and collapse them into a single one.
FunctionPass * createM68kISelDag(M68kTargetMachine &TM)
This pass converts a legalized DAG into a M68k-specific DAG, ready for instruction scheduling.
CodeGenOptLevel
Code generation optimization level.
Definition: CodeGen.h:54
void initializeM68kDAGToDAGISelLegacyPass(PassRegistry &)
void initializeGlobalISel(PassRegistry &)
Initialize all passes linked into the GlobalISel library.
Definition: GlobalISel.cpp:17
Target & getTheM68kTarget()
FunctionPass * createM68kExpandPseudoPass()
Return a Machine IR pass that expands M68k-specific pseudo instructions into a sequence of actual ins...
FunctionPass * createAtomicExpandLegacyPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
Implement std::hash so that hash_code can be used in STL containers.
Definition: BitVector.h:858
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
RegisterTargetMachine - Helper template for registering a target machine implementation,...