LLVM 20.0.0git
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llvm::RegBankSelect Class Reference

This pass implements the reg bank selector pass used in the GlobalISel pipeline. More...

#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"

Inheritance diagram for llvm::RegBankSelect:
Inheritance graph
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Classes

class  EdgeInsertPoint
 Insertion point on an edge. More...
 
class  InsertPoint
 Abstract class used to represent an insertion point in a CFG. More...
 
class  InstrInsertPoint
 Insertion point before or after an instruction. More...
 
class  MappingCost
 Helper class used to represent the cost for mapping an instruction. More...
 
class  MBBInsertPoint
 Insertion point at the beginning or end of a basic block. More...
 
class  RepairingPlacement
 Struct used to represent the placement of a repairing point for a given operand. More...
 

Public Types

enum  Mode { Fast , Greedy }
 List of the modes supported by the RegBankSelect pass. More...
 

Public Member Functions

 RegBankSelect (char &PassID=ID, Mode RunningMode=Fast)
 Create a RegBankSelect pass with the specified RunningMode.
 
StringRef getPassName () const override
 getPassName - Return a nice clean name for a pass.
 
void getAnalysisUsage (AnalysisUsage &AU) const override
 getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job.
 
MachineFunctionProperties getRequiredProperties () const override
 
MachineFunctionProperties getSetProperties () const override
 
MachineFunctionProperties getClearedProperties () const override
 
bool checkFunctionIsLegal (MachineFunction &MF) const
 Check that our input is fully legal: we require the function to have the Legalized property, so it should be.
 
bool assignRegisterBanks (MachineFunction &MF)
 Walk through MF and assign a register bank to every virtual register that are still mapped to nothing.
 
bool runOnMachineFunction (MachineFunction &MF) override
 runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.
 
- Public Member Functions inherited from llvm::MachineFunctionPass
bool doInitialization (Module &) override
 doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run.
 
- Public Member Functions inherited from llvm::FunctionPass
 FunctionPass (char &pid)
 
PasscreatePrinterPass (raw_ostream &OS, const std::string &Banner) const override
 createPrinterPass - Get a function printer pass.
 
virtual bool runOnFunction (Function &F)=0
 runOnFunction - Virtual method overriden by subclasses to do the per-function processing of the pass.
 
void assignPassManager (PMStack &PMS, PassManagerType T) override
 Find appropriate Function Pass Manager or Call Graph Pass Manager in the PM Stack and add self into that manager.
 
PassManagerType getPotentialPassManagerType () const override
 Return what kind of Pass Manager can manage this pass.
 
- Public Member Functions inherited from llvm::Pass
 Pass (PassKind K, char &pid)
 
 Pass (const Pass &)=delete
 
Passoperator= (const Pass &)=delete
 
virtual ~Pass ()
 
PassKind getPassKind () const
 
virtual StringRef getPassName () const
 getPassName - Return a nice clean name for a pass.
 
AnalysisID getPassID () const
 getPassID - Return the PassID number that corresponds to this pass.
 
virtual bool doInitialization (Module &)
 doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run.
 
virtual bool doFinalization (Module &)
 doFinalization - Virtual method overriden by subclasses to do any necessary clean up after all passes have run.
 
virtual void print (raw_ostream &OS, const Module *M) const
 print - Print out the internal state of the pass.
 
void dump () const
 
virtual PasscreatePrinterPass (raw_ostream &OS, const std::string &Banner) const =0
 createPrinterPass - Get a Pass appropriate to print the IR this pass operates on (Module, Function or MachineFunction).
 
virtual void assignPassManager (PMStack &, PassManagerType)
 Each pass is responsible for assigning a pass manager to itself.
 
virtual void preparePassManager (PMStack &)
 Check if available pass managers are suitable for this pass or not.
 
virtual PassManagerType getPotentialPassManagerType () const
 Return what kind of Pass Manager can manage this pass.
 
void setResolver (AnalysisResolver *AR)
 
AnalysisResolvergetResolver () const
 
virtual void getAnalysisUsage (AnalysisUsage &) const
 getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job.
 
virtual void releaseMemory ()
 releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memory when it is no longer needed.
 
virtual void * getAdjustedAnalysisPointer (AnalysisID ID)
 getAdjustedAnalysisPointer - This method is used when a pass implements an analysis interface through multiple inheritance.
 
virtual ImmutablePassgetAsImmutablePass ()
 
virtual PMDataManagergetAsPMDataManager ()
 
virtual void verifyAnalysis () const
 verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis information.
 
virtual void dumpPassStructure (unsigned Offset=0)
 
template<typename AnalysisType >
AnalysisType * getAnalysisIfAvailable () const
 getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to get analysis information that might be around, for example to update it.
 
bool mustPreserveAnalysisID (char &AID) const
 mustPreserveAnalysisID - This method serves the same function as getAnalysisIfAvailable, but works if you just have an AnalysisID.
 
template<typename AnalysisType >
AnalysisType & getAnalysis () const
 getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function.
 
template<typename AnalysisType >
AnalysisType & getAnalysis (Function &F, bool *Changed=nullptr)
 getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function.
 
template<typename AnalysisType >
AnalysisType & getAnalysisID (AnalysisID PI) const
 
template<typename AnalysisType >
AnalysisType & getAnalysisID (AnalysisID PI, Function &F, bool *Changed=nullptr)
 

Static Public Attributes

static char ID = 0
 

Protected Member Functions

bool assignInstr (MachineInstr &MI)
 Assign the register bank of each operand of MI.
 
void init (MachineFunction &MF)
 Initialize the field members using MF.
 
bool assignmentMatch (Register Reg, const RegisterBankInfo::ValueMapping &ValMapping, bool &OnlyAssign) const
 Check if Reg is already assigned what is described by ValMapping.
 
bool repairReg (MachineOperand &MO, const RegisterBankInfo::ValueMapping &ValMapping, RegBankSelect::RepairingPlacement &RepairPt, const iterator_range< SmallVectorImpl< Register >::const_iterator > &NewVRegs)
 Insert repairing code for Reg as specified by ValMapping.
 
uint64_t getRepairCost (const MachineOperand &MO, const RegisterBankInfo::ValueMapping &ValMapping) const
 Return the cost of the instruction needed to map MO to ValMapping.
 
const RegisterBankInfo::InstructionMappingfindBestMapping (MachineInstr &MI, RegisterBankInfo::InstructionMappings &PossibleMappings, SmallVectorImpl< RepairingPlacement > &RepairPts)
 Find the best mapping for MI from PossibleMappings.
 
MappingCost computeMapping (MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, SmallVectorImpl< RepairingPlacement > &RepairPts, const MappingCost *BestCost=nullptr)
 Compute the cost of mapping MI with InstrMapping and compute the repairing placement for such mapping in RepairPts.
 
void tryAvoidingSplit (RegBankSelect::RepairingPlacement &RepairPt, const MachineOperand &MO, const RegisterBankInfo::ValueMapping &ValMapping) const
 When RepairPt involves splitting to repair MO for the given ValMapping, try to change the way we repair such that the splitting is not required anymore.
 
bool applyMapping (MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, SmallVectorImpl< RepairingPlacement > &RepairPts)
 Apply Mapping to MI.
 
- Protected Member Functions inherited from llvm::MachineFunctionPass
 MachineFunctionPass (char &ID)
 
virtual bool runOnMachineFunction (MachineFunction &MF)=0
 runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.
 
void getAnalysisUsage (AnalysisUsage &AU) const override
 getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
 
virtual MachineFunctionProperties getRequiredProperties () const
 
virtual MachineFunctionProperties getSetProperties () const
 
virtual MachineFunctionProperties getClearedProperties () const
 
- Protected Member Functions inherited from llvm::FunctionPass
bool skipFunction (const Function &F) const
 Optional passes call this function to check whether the pass should be skipped.
 

Protected Attributes

const RegisterBankInfoRBI = nullptr
 Interface to the target lowering info related to register banks.
 
MachineRegisterInfoMRI = nullptr
 MRI contains all the register class/bank information that this pass uses and updates.
 
const TargetRegisterInfoTRI = nullptr
 Information on the register classes for the current function.
 
MachineBlockFrequencyInfoMBFI = nullptr
 Get the frequency of blocks.
 
MachineBranchProbabilityInfoMBPI = nullptr
 Get the frequency of the edges.
 
std::unique_ptr< MachineOptimizationRemarkEmitterMORE
 Current optimization remark emitter. Used to report failures.
 
MachineIRBuilder MIRBuilder
 Helper class used for every code morphing.
 
Mode OptMode
 Optimization mode of the pass.
 
const TargetPassConfigTPC
 Current target configuration. Controls how the pass handles errors.
 

Additional Inherited Members

- Static Public Member Functions inherited from llvm::Pass
static const PassInfolookupPassInfo (const void *TI)
 
static const PassInfolookupPassInfo (StringRef Arg)
 
static PasscreatePass (AnalysisID ID)
 

Detailed Description

This pass implements the reg bank selector pass used in the GlobalISel pipeline.

At the end of this pass, all register operands have been assigned

Definition at line 91 of file RegBankSelect.h.

Member Enumeration Documentation

◆ Mode

List of the modes supported by the RegBankSelect pass.

Enumerator
Fast 

Assign the register banks as fast as possible (default).

Greedy 

Greedily minimize the cost of assigning register banks.

This should produce code of greater quality, but will require more compile time.

Definition at line 96 of file RegBankSelect.h.

Constructor & Destructor Documentation

◆ RegBankSelect()

llvm::RegBankSelect::RegBankSelect ( char PassID = ID,
Mode  RunningMode = Fast 
)

Create a RegBankSelect pass with the specified RunningMode.

Member Function Documentation

◆ applyMapping()

bool RegBankSelect::applyMapping ( MachineInstr MI,
const RegisterBankInfo::InstructionMapping InstrMapping,
SmallVectorImpl< RepairingPlacement > &  RepairPts 
)
protected

◆ assignInstr()

bool RegBankSelect::assignInstr ( MachineInstr MI)
protected

◆ assignmentMatch()

bool RegBankSelect::assignmentMatch ( Register  Reg,
const RegisterBankInfo::ValueMapping ValMapping,
bool OnlyAssign 
) const
protected

Check if Reg is already assigned what is described by ValMapping.

OnlyAssign == true means that Reg just needs to be assigned a register bank. I.e., no repairing is necessary to have the assignment match.

Definition at line 110 of file RegBankSelect.cpp.

References assert(), llvm::RegisterBankInfo::ValueMapping::BreakDown, llvm::dbgs(), llvm::RegisterBankInfo::getRegBank(), LLVM_DEBUG, MRI, llvm::RegisterBankInfo::ValueMapping::NumBreakDowns, RBI, llvm::RegisterBankInfo::PartialMapping::RegBank, and TRI.

Referenced by computeMapping().

◆ assignRegisterBanks()

bool RegBankSelect::assignRegisterBanks ( MachineFunction MF)

Walk through MF and assign a register bank to every virtual register that are still mapped to nothing.

The target needs to provide a RegisterBankInfo and in particular override RegisterBankInfo::getInstrMapping.

Simplified algo:

RBI = MF.subtarget.getRegBankInfo()
for each bb in MF
for each inst in bb
MappingCosts = RBI.getMapping(inst);
Idx = findIdxOfMinCost(MappingCosts)
CurRegBank = MappingCosts[Idx].RegBank
MRI.setRegBank(inst.getOperand(0).getReg(), CurRegBank)
for each argument in inst
if (CurRegBank != argument.RegBank)
ArgReg = argument.getReg()
Tmp = MRI.createNewVirtual(MRI.getSize(ArgReg), CurRegBank)
MIRBuilder.buildInstr(COPY, Tmp, ArgReg)
inst.getOperand(argument.getOperandNo()).setReg(Tmp)
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
void setInstr(MachineInstr &MI)
Set the insertion point to before MI.
MachineInstrBuilder buildInstr(unsigned Opcode)
Build and insert <empty> = Opcode <empty>.
void setMF(MachineFunction &MF)
void setRegBank(Register Reg, const RegisterBank &RegBank)
Set the register bank to RegBank for Reg.
MachineIRBuilder MIRBuilder
Helper class used for every code morphing.
MachineRegisterInfo * MRI
MRI contains all the register class/bank information that this pass uses and updates.
const RegisterBankInfo * RBI
Interface to the target lowering info related to register banks.

Definition at line 681 of file RegBankSelect.cpp.

References assignInstr(), llvm::SmallVectorBase< Size_T >::empty(), llvm::MachineBasicBlock::instrs(), llvm::isTargetSpecificOpcode(), llvm::make_pointer_range(), MBB, MI, MIRBuilder, MORE, llvm::SmallVectorImpl< T >::pop_back_val(), llvm::reportGISelFailure(), llvm::reverse(), llvm::MachineIRBuilder::setMBB(), and TPC.

Referenced by runOnMachineFunction().

◆ checkFunctionIsLegal()

bool RegBankSelect::checkFunctionIsLegal ( MachineFunction MF) const

Check that our input is fully legal: we require the function to have the Legalized property, so it should be.

FIXME: This should be in the MachineVerifier.

Definition at line 721 of file RegBankSelect.cpp.

References llvm::DisableGISelLegalityCheck, llvm::machineFunctionIsIllegal(), MI, MORE, llvm::reportGISelFailure(), and TPC.

Referenced by runOnMachineFunction().

◆ computeMapping()

RegBankSelect::MappingCost RegBankSelect::computeMapping ( MachineInstr MI,
const RegisterBankInfo::InstructionMapping InstrMapping,
SmallVectorImpl< RepairingPlacement > &  RepairPts,
const MappingCost BestCost = nullptr 
)
protected

◆ findBestMapping()

const RegisterBankInfo::InstructionMapping & RegBankSelect::findBestMapping ( MachineInstr MI,
RegisterBankInfo::InstructionMappings PossibleMappings,
SmallVectorImpl< RepairingPlacement > &  RepairPts 
)
protected

◆ getAnalysisUsage()

void RegBankSelect::getAnalysisUsage ( AnalysisUsage ) const
overridevirtual

getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job.

If a pass specifies that it uses a particular analysis result to this function, it can then use the getAnalysis<AnalysisType>() function, below.

Reimplemented from llvm::Pass.

Reimplemented in llvm::AMDGPURegBankSelect.

Definition at line 98 of file RegBankSelect.cpp.

References llvm::AnalysisUsage::addRequired(), Fast, llvm::MachineFunctionPass::getAnalysisUsage(), llvm::getSelectionDAGFallbackAnalysisUsage(), and OptMode.

Referenced by llvm::AMDGPURegBankSelect::getAnalysisUsage().

◆ getClearedProperties()

MachineFunctionProperties llvm::RegBankSelect::getClearedProperties ( ) const
inlineoverridevirtual

◆ getPassName()

StringRef llvm::RegBankSelect::getPassName ( ) const
inlineoverridevirtual

getPassName - Return a nice clean name for a pass.

This usually implemented in terms of the name that is registered by one of the Registration templates, but can be overloaded directly.

Reimplemented from llvm::Pass.

Reimplemented in llvm::AMDGPURegBankSelect.

Definition at line 622 of file RegBankSelect.h.

◆ getRepairCost()

uint64_t RegBankSelect::getRepairCost ( const MachineOperand MO,
const RegisterBankInfo::ValueMapping ValMapping 
) const
protected

Return the cost of the instruction needed to map MO to ValMapping.

The cost is free of basic block frequencies.

Precondition
MO.isReg()
MO is assigned to a register bank.
ValMapping is a valid mapping for MO.

Definition at line 237 of file RegBankSelect.cpp.

References assert(), llvm::RegisterBankInfo::ValueMapping::BreakDown, llvm::RegisterBankInfo::copyCost(), llvm::RegisterBankInfo::getBreakDownCost(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::RegisterBankInfo::getSizeInBits(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), MRI, llvm::RegisterBankInfo::ValueMapping::NumBreakDowns, RBI, llvm::RegisterBankInfo::PartialMapping::RegBank, std::swap(), and TRI.

Referenced by computeMapping().

◆ getRequiredProperties()

MachineFunctionProperties llvm::RegBankSelect::getRequiredProperties ( ) const
inlineoverridevirtual

◆ getSetProperties()

MachineFunctionProperties llvm::RegBankSelect::getSetProperties ( ) const
inlineoverridevirtual

◆ init()

void RegBankSelect::init ( MachineFunction MF)
protected

◆ repairReg()

bool RegBankSelect::repairReg ( MachineOperand MO,
const RegisterBankInfo::ValueMapping ValMapping,
RegBankSelect::RepairingPlacement RepairPt,
const iterator_range< SmallVectorImpl< Register >::const_iterator > &  NewVRegs 
)
protected

Insert repairing code for Reg as specified by ValMapping.

The repairing placement is specified by RepairPt. NewVRegs contains all the registers required to remap Reg. In other words, the number of registers in NewVRegs must be equal to ValMapping.BreakDown.size().

The transformation could be sketched as:

... = op Reg
#define op(i)
unsigned Reg

Becomes

<NewRegs> = COPY or extract Reg
... = op Reg
loop extract

and

Reg = op ...

Becomes

Reg = op ...
Reg = COPY or build_sequence <NewRegs>
Precondition
NewVRegs.size() == ValMapping.BreakDown.size()
Note
The caller is supposed to do the rewriting of op if need be. I.e., Reg = op ... => <NewRegs> = NewOp ...
Returns
True if the repairing worked, false otherwise.

Definition at line 133 of file RegBankSelect.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addUse(), assert(), llvm::RegisterBankInfo::ValueMapping::BreakDown, llvm::MachineIRBuilder::buildInstrNoInsert(), llvm::MachineFunction::CloneMachineInstr(), llvm::dbgs(), llvm::MachineIRBuilder::getMF(), llvm::LLT::getNumElements(), llvm::RegBankSelect::RepairingPlacement::getNumInsertPoints(), llvm::MachineOperand::getReg(), llvm::LLT::getScalarSizeInBits(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), Idx, llvm::MachineInstr::insert(), llvm::MachineOperand::isDef(), llvm::LLT::isVector(), llvm::RegisterBankInfo::PartialMapping::Length, LLVM_DEBUG, MI, MIRBuilder, MRI, llvm::RegisterBankInfo::ValueMapping::NumBreakDowns, llvm::RegisterBankInfo::ValueMapping::partsAllUniform(), llvm::printReg(), llvm::printRegClassOrBank(), llvm::report_fatal_error(), llvm::size(), std::swap(), and TRI.

Referenced by applyMapping().

◆ runOnMachineFunction()

bool RegBankSelect::runOnMachineFunction ( MachineFunction MF)
overridevirtual

◆ tryAvoidingSplit()

void RegBankSelect::tryAvoidingSplit ( RegBankSelect::RepairingPlacement RepairPt,
const MachineOperand MO,
const RegisterBankInfo::ValueMapping ValMapping 
) const
protected

When RepairPt involves splitting to repair MO for the given ValMapping, try to change the way we repair such that the splitting is not required anymore.

Precondition
RepairPt.hasSplit()
MO == MO.getParent()->getOperand(RepairPt.getOpIdx())
ValMapping is the mapping of MO for MO.getParent() that implied RepairPt.

Definition at line 323 of file RegBankSelect.cpp.

References assert(), llvm::RegBankSelect::RepairingPlacement::getOpIdx(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), llvm::RegBankSelect::RepairingPlacement::hasSplit(), llvm::RegBankSelect::RepairingPlacement::Impossible, llvm::MachineOperand::isDef(), llvm::MachineInstr::isUnconditionalBranch(), MI, llvm::RegisterBankInfo::ValueMapping::NumBreakDowns, llvm::MachineInstr::readsRegister(), llvm::RegBankSelect::RepairingPlacement::Reassign, and llvm::RegBankSelect::RepairingPlacement::switchTo().

Referenced by computeMapping().

Member Data Documentation

◆ ID

char RegBankSelect::ID = 0
static

Definition at line 93 of file RegBankSelect.h.

◆ MBFI

MachineBlockFrequencyInfo* llvm::RegBankSelect::MBFI = nullptr
protected

Get the frequency of blocks.

This is required for non-fast mode.

Definition at line 498 of file RegBankSelect.h.

Referenced by computeMapping(), llvm::RegBankSelect::EdgeInsertPoint::frequency(), and init().

◆ MBPI

MachineBranchProbabilityInfo* llvm::RegBankSelect::MBPI = nullptr
protected

Get the frequency of the edges.

This is required for non-fast mode.

Definition at line 502 of file RegBankSelect.h.

Referenced by computeMapping(), llvm::RegBankSelect::EdgeInsertPoint::frequency(), and init().

◆ MIRBuilder

MachineIRBuilder llvm::RegBankSelect::MIRBuilder
protected

Helper class used for every code morphing.

Definition at line 508 of file RegBankSelect.h.

Referenced by applyMapping(), assignRegisterBanks(), init(), and repairReg().

◆ MORE

std::unique_ptr<MachineOptimizationRemarkEmitter> llvm::RegBankSelect::MORE
protected

Current optimization remark emitter. Used to report failures.

Definition at line 505 of file RegBankSelect.h.

Referenced by assignRegisterBanks(), checkFunctionIsLegal(), and init().

◆ MRI

MachineRegisterInfo* llvm::RegBankSelect::MRI = nullptr
protected

MRI contains all the register class/bank information that this pass uses and updates.

Definition at line 491 of file RegBankSelect.h.

Referenced by applyMapping(), assignInstr(), assignmentMatch(), computeMapping(), getRepairCost(), init(), and repairReg().

◆ OptMode

Mode llvm::RegBankSelect::OptMode
protected

Optimization mode of the pass.

Definition at line 511 of file RegBankSelect.h.

Referenced by assignInstr(), getAnalysisUsage(), init(), and runOnMachineFunction().

◆ RBI

const RegisterBankInfo* llvm::RegBankSelect::RBI = nullptr
protected

Interface to the target lowering info related to register banks.

Definition at line 487 of file RegBankSelect.h.

Referenced by applyMapping(), assignInstr(), assignmentMatch(), getRepairCost(), and init().

◆ TPC

const TargetPassConfig* llvm::RegBankSelect::TPC
protected

Current target configuration. Controls how the pass handles errors.

Definition at line 514 of file RegBankSelect.h.

Referenced by assignRegisterBanks(), checkFunctionIsLegal(), findBestMapping(), and init().

◆ TRI

const TargetRegisterInfo* llvm::RegBankSelect::TRI = nullptr
protected

Information on the register classes for the current function.

Definition at line 494 of file RegBankSelect.h.

Referenced by assignInstr(), assignmentMatch(), computeMapping(), findBestMapping(), getRepairCost(), init(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), and repairReg().


The documentation for this class was generated from the following files: