LLVM  14.0.0git
MIPatternMatch.h
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1 //==------ llvm/CodeGen/GlobalISel/MIPatternMatch.h -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// Contains matchers for matching SSA Machine Instructions.
10 ///
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_CODEGEN_GLOBALISEL_MIPATTERNMATCH_H
14 #define LLVM_CODEGEN_GLOBALISEL_MIPATTERNMATCH_H
15 
18 #include "llvm/IR/InstrTypes.h"
19 
20 namespace llvm {
21 namespace MIPatternMatch {
22 
23 template <typename Reg, typename Pattern>
25  return P.match(MRI, R);
26 }
27 
28 template <typename Pattern>
30  return P.match(MRI, &MI);
31 }
32 
33 // TODO: Extend for N use.
34 template <typename SubPatternT> struct OneUse_match {
35  SubPatternT SubPat;
36  OneUse_match(const SubPatternT &SP) : SubPat(SP) {}
37 
39  return MRI.hasOneUse(Reg) && SubPat.match(MRI, Reg);
40  }
41 };
42 
43 template <typename SubPat>
44 inline OneUse_match<SubPat> m_OneUse(const SubPat &SP) {
45  return SP;
46 }
47 
48 template <typename SubPatternT> struct OneNonDBGUse_match {
49  SubPatternT SubPat;
50  OneNonDBGUse_match(const SubPatternT &SP) : SubPat(SP) {}
51 
53  return MRI.hasOneNonDBGUse(Reg) && SubPat.match(MRI, Reg);
54  }
55 };
56 
57 template <typename SubPat>
58 inline OneNonDBGUse_match<SubPat> m_OneNonDBGUse(const SubPat &SP) {
59  return SP;
60 }
61 
62 struct ConstantMatch {
63  int64_t &CR;
64  ConstantMatch(int64_t &C) : CR(C) {}
66  if (auto MaybeCst = getConstantVRegSExtVal(Reg, MRI)) {
67  CR = *MaybeCst;
68  return true;
69  }
70  return false;
71  }
72 };
73 
74 inline ConstantMatch m_ICst(int64_t &Cst) { return ConstantMatch(Cst); }
75 
76 struct ICstRegMatch {
80  if (auto MaybeCst = getConstantVRegValWithLookThrough(
81  Reg, MRI, /*LookThroughInstrs*/ true,
82  /*HandleFConstants*/ false)) {
83  CR = MaybeCst->VReg;
84  return true;
85  }
86  return false;
87  }
88 };
89 
91 
92 /// Matcher for a specific constant value.
94  int64_t RequestedVal;
97  int64_t MatchedVal;
98  return mi_match(Reg, MRI, m_ICst(MatchedVal)) && MatchedVal == RequestedVal;
99  }
100 };
101 
102 /// Matches a constant equal to \p RequestedValue.
103 inline SpecificConstantMatch m_SpecificICst(int64_t RequestedValue) {
104  return SpecificConstantMatch(RequestedValue);
105 }
106 
107 ///{
108 /// Convenience matchers for specific integer values.
111  return SpecificConstantMatch(-1);
112 }
113 ///}
114 
115 // TODO: Rework this for different kinds of MachineOperand.
116 // Currently assumes the Src for a match is a register.
117 // We might want to support taking in some MachineOperands and call getReg on
118 // that.
119 
121  bool match(const MachineRegisterInfo &MRI, Register Reg) { return true; }
123  return MO->isReg();
124  }
125 };
126 
128 
129 /// Matching combinators.
130 template <typename... Preds> struct And {
131  template <typename MatchSrc>
132  bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
133  return true;
134  }
135 };
136 
137 template <typename Pred, typename... Preds>
138 struct And<Pred, Preds...> : And<Preds...> {
139  Pred P;
140  And(Pred &&p, Preds &&... preds)
141  : And<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {
142  }
143  template <typename MatchSrc>
144  bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
145  return P.match(MRI, src) && And<Preds...>::match(MRI, src);
146  }
147 };
148 
149 template <typename... Preds> struct Or {
150  template <typename MatchSrc>
151  bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
152  return false;
153  }
154 };
155 
156 template <typename Pred, typename... Preds>
157 struct Or<Pred, Preds...> : Or<Preds...> {
158  Pred P;
159  Or(Pred &&p, Preds &&... preds)
160  : Or<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {}
161  template <typename MatchSrc>
162  bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
163  return P.match(MRI, src) || Or<Preds...>::match(MRI, src);
164  }
165 };
166 
167 template <typename... Preds> And<Preds...> m_all_of(Preds &&... preds) {
168  return And<Preds...>(std::forward<Preds>(preds)...);
169 }
170 
171 template <typename... Preds> Or<Preds...> m_any_of(Preds &&... preds) {
172  return Or<Preds...>(std::forward<Preds>(preds)...);
173 }
174 
175 template <typename BindTy> struct bind_helper {
176  static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V) {
177  VR = V;
178  return true;
179  }
180 };
181 
182 template <> struct bind_helper<MachineInstr *> {
183  static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI,
184  Register Reg) {
185  MI = MRI.getVRegDef(Reg);
186  if (MI)
187  return true;
188  return false;
189  }
190  static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI,
191  MachineInstr *Inst) {
192  MI = Inst;
193  return MI;
194  }
195 };
196 
197 template <> struct bind_helper<LLT> {
198  static bool bind(const MachineRegisterInfo &MRI, LLT Ty, Register Reg) {
199  Ty = MRI.getType(Reg);
200  if (Ty.isValid())
201  return true;
202  return false;
203  }
204 };
205 
206 template <> struct bind_helper<const ConstantFP *> {
207  static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F,
208  Register Reg) {
210  if (F)
211  return true;
212  return false;
213  }
214 };
215 
216 template <typename Class> struct bind_ty {
217  Class &VR;
218 
219  bind_ty(Class &V) : VR(V) {}
220 
221  template <typename ITy> bool match(const MachineRegisterInfo &MRI, ITy &&V) {
222  return bind_helper<Class>::bind(MRI, VR, V);
223  }
224 };
225 
226 inline bind_ty<Register> m_Reg(Register &R) { return R; }
228 inline bind_ty<LLT> m_Type(LLT Ty) { return Ty; }
231 
232 // Helper for matching G_FCONSTANT
233 inline bind_ty<const ConstantFP *> m_GFCst(const ConstantFP *&C) { return C; }
234 
235 // General helper for all the binary generic MI such as G_ADD/G_SUB etc
236 template <typename LHS_P, typename RHS_P, unsigned Opcode,
237  bool Commutable = false>
239  LHS_P L;
240  RHS_P R;
241 
242  BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS) : L(LHS), R(RHS) {}
243  template <typename OpTy>
244  bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
245  MachineInstr *TmpMI;
246  if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
247  if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
248  return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
249  R.match(MRI, TmpMI->getOperand(2).getReg())) ||
250  (Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) &&
251  L.match(MRI, TmpMI->getOperand(2).getReg())));
252  }
253  }
254  return false;
255  }
256 };
257 
258 // Helper for (commutative) binary generic MI that checks Opcode.
259 template <typename LHS_P, typename RHS_P, bool Commutable = false>
261  unsigned Opc;
262  LHS_P L;
263  RHS_P R;
264 
265  BinaryOpc_match(unsigned Opcode, const LHS_P &LHS, const RHS_P &RHS)
266  : Opc(Opcode), L(LHS), R(RHS) {}
267  template <typename OpTy>
268  bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
269  MachineInstr *TmpMI;
270  if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
271  if (TmpMI->getOpcode() == Opc && TmpMI->getNumDefs() == 1 &&
272  TmpMI->getNumOperands() == 3) {
273  return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
274  R.match(MRI, TmpMI->getOperand(2).getReg())) ||
275  (Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) &&
276  L.match(MRI, TmpMI->getOperand(2).getReg())));
277  }
278  }
279  return false;
280  }
281 };
282 
283 template <typename LHS, typename RHS>
284 inline BinaryOpc_match<LHS, RHS, false> m_BinOp(unsigned Opcode, const LHS &L,
285  const RHS &R) {
286  return BinaryOpc_match<LHS, RHS, false>(Opcode, L, R);
287 }
288 
289 template <typename LHS, typename RHS>
290 inline BinaryOpc_match<LHS, RHS, true>
291 m_CommutativeBinOp(unsigned Opcode, const LHS &L, const RHS &R) {
292  return BinaryOpc_match<LHS, RHS, true>(Opcode, L, R);
293 }
294 
295 template <typename LHS, typename RHS>
297 m_GAdd(const LHS &L, const RHS &R) {
299 }
300 
301 template <typename LHS, typename RHS>
303 m_GPtrAdd(const LHS &L, const RHS &R) {
305 }
306 
307 template <typename LHS, typename RHS>
309  const RHS &R) {
311 }
312 
313 template <typename LHS, typename RHS>
315 m_GMul(const LHS &L, const RHS &R) {
317 }
318 
319 template <typename LHS, typename RHS>
321 m_GFAdd(const LHS &L, const RHS &R) {
323 }
324 
325 template <typename LHS, typename RHS>
327 m_GFMul(const LHS &L, const RHS &R) {
329 }
330 
331 template <typename LHS, typename RHS>
333 m_GFSub(const LHS &L, const RHS &R) {
335 }
336 
337 template <typename LHS, typename RHS>
339 m_GAnd(const LHS &L, const RHS &R) {
341 }
342 
343 template <typename LHS, typename RHS>
345 m_GXor(const LHS &L, const RHS &R) {
347 }
348 
349 template <typename LHS, typename RHS>
351  const RHS &R) {
353 }
354 
355 template <typename LHS, typename RHS>
357 m_GShl(const LHS &L, const RHS &R) {
359 }
360 
361 template <typename LHS, typename RHS>
363 m_GLShr(const LHS &L, const RHS &R) {
365 }
366 
367 template <typename LHS, typename RHS>
369 m_GAShr(const LHS &L, const RHS &R) {
371 }
372 
373 template <typename LHS, typename RHS>
375 m_GSMax(const LHS &L, const RHS &R) {
377 }
378 
379 template <typename LHS, typename RHS>
381 m_GSMin(const LHS &L, const RHS &R) {
383 }
384 
385 // Helper for unary instructions (G_[ZSA]EXT/G_TRUNC) etc
386 template <typename SrcTy, unsigned Opcode> struct UnaryOp_match {
387  SrcTy L;
388 
389  UnaryOp_match(const SrcTy &LHS) : L(LHS) {}
390  template <typename OpTy>
391  bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
392  MachineInstr *TmpMI;
393  if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
394  if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
395  return L.match(MRI, TmpMI->getOperand(1).getReg());
396  }
397  }
398  return false;
399  }
400 };
401 
402 template <typename SrcTy>
403 inline UnaryOp_match<SrcTy, TargetOpcode::G_ANYEXT>
404 m_GAnyExt(const SrcTy &Src) {
406 }
407 
408 template <typename SrcTy>
411 }
412 
413 template <typename SrcTy>
416 }
417 
418 template <typename SrcTy>
421 }
422 
423 template <typename SrcTy>
426 }
427 
428 template <typename SrcTy>
429 inline UnaryOp_match<SrcTy, TargetOpcode::G_BITCAST>
430 m_GBitcast(const SrcTy &Src) {
432 }
433 
434 template <typename SrcTy>
435 inline UnaryOp_match<SrcTy, TargetOpcode::G_PTRTOINT>
436 m_GPtrToInt(const SrcTy &Src) {
438 }
439 
440 template <typename SrcTy>
441 inline UnaryOp_match<SrcTy, TargetOpcode::G_INTTOPTR>
442 m_GIntToPtr(const SrcTy &Src) {
444 }
445 
446 template <typename SrcTy>
447 inline UnaryOp_match<SrcTy, TargetOpcode::G_FPTRUNC>
448 m_GFPTrunc(const SrcTy &Src) {
450 }
451 
452 template <typename SrcTy>
455 }
456 
457 template <typename SrcTy>
460 }
461 
462 template <typename SrcTy>
464  return UnaryOp_match<SrcTy, TargetOpcode::COPY>(std::forward<SrcTy>(Src));
465 }
466 
467 // General helper for generic MI compares, i.e. G_ICMP and G_FCMP
468 // TODO: Allow checking a specific predicate.
469 template <typename Pred_P, typename LHS_P, typename RHS_P, unsigned Opcode>
471  Pred_P P;
472  LHS_P L;
473  RHS_P R;
474 
475  CompareOp_match(const Pred_P &Pred, const LHS_P &LHS, const RHS_P &RHS)
476  : P(Pred), L(LHS), R(RHS) {}
477 
478  template <typename OpTy>
479  bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
480  MachineInstr *TmpMI;
481  if (!mi_match(Op, MRI, m_MInstr(TmpMI)) || TmpMI->getOpcode() != Opcode)
482  return false;
483 
484  auto TmpPred =
485  static_cast<CmpInst::Predicate>(TmpMI->getOperand(1).getPredicate());
486  if (!P.match(MRI, TmpPred))
487  return false;
488 
489  return L.match(MRI, TmpMI->getOperand(2).getReg()) &&
490  R.match(MRI, TmpMI->getOperand(3).getReg());
491  }
492 };
493 
494 template <typename Pred, typename LHS, typename RHS>
495 inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP>
496 m_GICmp(const Pred &P, const LHS &L, const RHS &R) {
498 }
499 
500 template <typename Pred, typename LHS, typename RHS>
501 inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP>
502 m_GFCmp(const Pred &P, const LHS &L, const RHS &R) {
504 }
505 
506 // Helper for checking if a Reg is of specific type.
507 struct CheckType {
509  CheckType(const LLT Ty) : Ty(Ty) {}
510 
512  return MRI.getType(Reg) == Ty;
513  }
514 };
515 
516 inline CheckType m_SpecificType(LLT Ty) { return Ty; }
517 
518 template <typename Src0Ty, typename Src1Ty, typename Src2Ty, unsigned Opcode>
520  Src0Ty Src0;
521  Src1Ty Src1;
522  Src2Ty Src2;
523 
524  TernaryOp_match(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2)
525  : Src0(Src0), Src1(Src1), Src2(Src2) {}
526  template <typename OpTy>
527  bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
528  MachineInstr *TmpMI;
529  if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
530  if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 4) {
531  return (Src0.match(MRI, TmpMI->getOperand(1).getReg()) &&
532  Src1.match(MRI, TmpMI->getOperand(2).getReg()) &&
533  Src2.match(MRI, TmpMI->getOperand(3).getReg()));
534  }
535  }
536  return false;
537  }
538 };
539 template <typename Src0Ty, typename Src1Ty, typename Src2Ty>
540 inline TernaryOp_match<Src0Ty, Src1Ty, Src2Ty,
541  TargetOpcode::G_INSERT_VECTOR_ELT>
542 m_GInsertVecElt(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) {
543  return TernaryOp_match<Src0Ty, Src1Ty, Src2Ty,
544  TargetOpcode::G_INSERT_VECTOR_ELT>(Src0, Src1, Src2);
545 }
546 
547 template <typename Src0Ty, typename Src1Ty, typename Src2Ty>
548 inline TernaryOp_match<Src0Ty, Src1Ty, Src2Ty, TargetOpcode::G_SELECT>
549 m_GISelect(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) {
551  Src0, Src1, Src2);
552 }
553 
554 /// Matches a register negated by a G_SUB.
555 /// G_SUB 0, %negated_reg
556 template <typename SrcTy>
558 m_Neg(const SrcTy &&Src) {
559  return m_GSub(m_ZeroInt(), Src);
560 }
561 
562 /// Matches a register not-ed by a G_XOR.
563 /// G_XOR %not_reg, -1
564 template <typename SrcTy>
566 m_Not(const SrcTy &&Src) {
567  return m_GXor(Src, m_AllOnesInt());
568 }
569 
570 } // namespace MIPatternMatch
571 } // namespace llvm
572 
573 #endif
llvm::MIPatternMatch::CheckType
Definition: MIPatternMatch.h:507
llvm::MIPatternMatch::operand_type_match::match
bool match(const MachineRegisterInfo &MRI, MachineOperand *MO)
Definition: MIPatternMatch.h:122
llvm::MIPatternMatch::TernaryOp_match::match
bool match(const MachineRegisterInfo &MRI, OpTy &&Op)
Definition: MIPatternMatch.h:527
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:102
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::PatternMatch::BinaryOp_match
Definition: PatternMatch.h:983
llvm::MIPatternMatch::bind_helper< LLT >::bind
static bool bind(const MachineRegisterInfo &MRI, LLT Ty, Register Reg)
Definition: MIPatternMatch.h:198
llvm::MIPatternMatch::UnaryOp_match::UnaryOp_match
UnaryOp_match(const SrcTy &LHS)
Definition: MIPatternMatch.h:389
llvm::CmpInst::Predicate
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:720
llvm::MIPatternMatch::m_GFPExt
UnaryOp_match< SrcTy, TargetOpcode::G_FPEXT > m_GFPExt(const SrcTy &Src)
Definition: MIPatternMatch.h:419
llvm::MIPatternMatch::m_GFNeg
UnaryOp_match< SrcTy, TargetOpcode::G_FNEG > m_GFNeg(const SrcTy &Src)
Definition: MIPatternMatch.h:458
llvm::MIPatternMatch::m_Reg
operand_type_match m_Reg()
Definition: MIPatternMatch.h:127
llvm::MIPatternMatch::ConstantMatch::ConstantMatch
ConstantMatch(int64_t &C)
Definition: MIPatternMatch.h:64
llvm::MIPatternMatch::m_GAnd
BinaryOp_match< LHS, RHS, TargetOpcode::G_AND, true > m_GAnd(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:339
llvm::MIPatternMatch::m_GShl
BinaryOp_match< LHS, RHS, TargetOpcode::G_SHL, false > m_GShl(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:357
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::MIPatternMatch::Or< Pred, Preds... >::P
Pred P
Definition: MIPatternMatch.h:158
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::MIPatternMatch::m_GLShr
BinaryOp_match< LHS, RHS, TargetOpcode::G_LSHR, false > m_GLShr(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:363
llvm::MIPatternMatch::BinaryOpc_match::Opc
unsigned Opc
Definition: MIPatternMatch.h:261
llvm::MIPatternMatch::UnaryOp_match::L
SrcTy L
Definition: MIPatternMatch.h:387
llvm::MCID::Commutable
@ Commutable
Definition: MCInstrDesc.h:171
llvm::MIPatternMatch::m_OneNonDBGUse
OneNonDBGUse_match< SubPat > m_OneNonDBGUse(const SubPat &SP)
Definition: MIPatternMatch.h:58
llvm::MIPatternMatch::m_GSub
BinaryOp_match< LHS, RHS, TargetOpcode::G_SUB > m_GSub(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:308
llvm::MIPatternMatch::BinaryOpc_match::L
LHS_P L
Definition: MIPatternMatch.h:262
llvm::MIPatternMatch::m_GTrunc
UnaryOp_match< SrcTy, TargetOpcode::G_TRUNC > m_GTrunc(const SrcTy &Src)
Definition: MIPatternMatch.h:424
llvm::MIPatternMatch::BinaryOpc_match::R
RHS_P R
Definition: MIPatternMatch.h:263
llvm::MIPatternMatch::m_GFSub
BinaryOp_match< LHS, RHS, TargetOpcode::G_FSUB, false > m_GFSub(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:333
llvm::MIPatternMatch::m_GSMax
BinaryOp_match< LHS, RHS, TargetOpcode::G_SMAX, false > m_GSMax(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:375
llvm::MIPatternMatch::CheckType::CheckType
CheckType(const LLT Ty)
Definition: MIPatternMatch.h:509
llvm::MIPatternMatch::m_GICmp
CompareOp_match< Pred, LHS, RHS, TargetOpcode::G_ICMP > m_GICmp(const Pred &P, const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:496
llvm::LLT::isValid
bool isValid() const
Definition: LowLevelTypeImpl.h:117
llvm::MIPatternMatch::m_GFAdd
BinaryOp_match< LHS, RHS, TargetOpcode::G_FADD, true > m_GFAdd(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:321
llvm::MIPatternMatch::BinaryOpc_match::match
bool match(const MachineRegisterInfo &MRI, OpTy &&Op)
Definition: MIPatternMatch.h:268
llvm::MIPatternMatch::m_GSMin
BinaryOp_match< LHS, RHS, TargetOpcode::G_SMIN, false > m_GSMin(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:381
llvm::MIPatternMatch::bind_ty::match
bool match(const MachineRegisterInfo &MRI, ITy &&V)
Definition: MIPatternMatch.h:221
llvm::MIPatternMatch::SpecificConstantMatch::RequestedVal
int64_t RequestedVal
Definition: MIPatternMatch.h:94
preds
preds
Definition: README.txt:340
p
the resulting code requires compare and branches when and if * p
Definition: README.txt:396
llvm::MIPatternMatch::BinaryOpc_match::BinaryOpc_match
BinaryOpc_match(unsigned Opcode, const LHS_P &LHS, const RHS_P &RHS)
Definition: MIPatternMatch.h:265
llvm::MIPatternMatch::BinaryOp_match::R
RHS_P R
Definition: MIPatternMatch.h:240
llvm::MIPatternMatch::BinaryOp_match::L
LHS_P L
Definition: MIPatternMatch.h:239
llvm::MIPatternMatch::m_GPtrToInt
UnaryOp_match< SrcTy, TargetOpcode::G_PTRTOINT > m_GPtrToInt(const SrcTy &Src)
Definition: MIPatternMatch.h:436
llvm::MIPatternMatch::m_GFabs
UnaryOp_match< SrcTy, TargetOpcode::G_FABS > m_GFabs(const SrcTy &Src)
Definition: MIPatternMatch.h:453
F
#define F(x, y, z)
Definition: MD5.cpp:56
MachineRegisterInfo.h
llvm::MachineInstr::getNumDefs
unsigned getNumDefs() const
Returns the total number of definitions.
Definition: MachineInstr.h:567
llvm::MIPatternMatch::operand_type_match::match
bool match(const MachineRegisterInfo &MRI, Register Reg)
Definition: MIPatternMatch.h:121
llvm::MIPatternMatch::OneNonDBGUse_match
Definition: MIPatternMatch.h:48
llvm::MIPatternMatch::ConstantMatch::match
bool match(const MachineRegisterInfo &MRI, Register Reg)
Definition: MIPatternMatch.h:65
llvm::MIPatternMatch::m_GSExt
UnaryOp_match< SrcTy, TargetOpcode::G_SEXT > m_GSExt(const SrcTy &Src)
Definition: MIPatternMatch.h:409
llvm::MIPatternMatch::m_GMul
BinaryOp_match< LHS, RHS, TargetOpcode::G_MUL, true > m_GMul(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:315
llvm::MIPatternMatch::ConstantMatch
Definition: MIPatternMatch.h:62
llvm::MIPatternMatch::TernaryOp_match::TernaryOp_match
TernaryOp_match(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2)
Definition: MIPatternMatch.h:524
llvm::MIPatternMatch::ICstRegMatch::CR
Register & CR
Definition: MIPatternMatch.h:77
llvm::MIPatternMatch::m_GZExt
UnaryOp_match< SrcTy, TargetOpcode::G_ZEXT > m_GZExt(const SrcTy &Src)
Definition: MIPatternMatch.h:414
llvm::MIPatternMatch::OneNonDBGUse_match::OneNonDBGUse_match
OneNonDBGUse_match(const SubPatternT &SP)
Definition: MIPatternMatch.h:50
llvm::MIPatternMatch::m_GPtrAdd
BinaryOp_match< LHS, RHS, TargetOpcode::G_PTR_ADD, true > m_GPtrAdd(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:303
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
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const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:499
llvm::MIPatternMatch::Or::match
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src)
Definition: MIPatternMatch.h:151
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bool match(const MachineRegisterInfo &MRI, Register Reg)
Definition: MIPatternMatch.h:96
InstrTypes.h
Utils.h
llvm::MIPatternMatch::bind_ty
Definition: MIPatternMatch.h:216
llvm::MIPatternMatch::m_GIntToPtr
UnaryOp_match< SrcTy, TargetOpcode::G_INTTOPTR > m_GIntToPtr(const SrcTy &Src)
Definition: MIPatternMatch.h:442
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MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::MIPatternMatch::m_ZeroInt
SpecificConstantMatch m_ZeroInt()
{ Convenience matchers for specific integer values.
Definition: MIPatternMatch.h:109
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bool match(const MachineRegisterInfo &MRI, MatchSrc &&src)
Definition: MIPatternMatch.h:162
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ICstRegMatch(Register &C)
Definition: MIPatternMatch.h:78
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ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:257
llvm::MIPatternMatch::BinaryOpc_match
Definition: MIPatternMatch.h:260
llvm::MIPatternMatch::Or< Pred, Preds... >::Or
Or(Pred &&p, Preds &&... preds)
Definition: MIPatternMatch.h:159
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static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI, Register Reg)
Definition: MIPatternMatch.h:183
llvm::MIPatternMatch::m_SpecificICst
SpecificConstantMatch m_SpecificICst(int64_t RequestedValue)
Matches a constant equal to RequestedValue.
Definition: MIPatternMatch.h:103
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OneUse_match(const SubPatternT &SP)
Definition: MIPatternMatch.h:36
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bool match(const MachineRegisterInfo &MRI, OpTy &&Op)
Definition: MIPatternMatch.h:391
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bind_ty< MachineInstr * > m_MInstr(MachineInstr *&MI)
Definition: MIPatternMatch.h:227
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bool match(const MachineRegisterInfo &MRI, Register Reg)
Definition: MIPatternMatch.h:79
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bind_ty< CmpInst::Predicate > m_Pred(CmpInst::Predicate &P)
Definition: MIPatternMatch.h:229
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CheckType m_SpecificType(LLT Ty)
Definition: MIPatternMatch.h:516
llvm::MIPatternMatch::UnaryOp_match
Definition: MIPatternMatch.h:386
llvm::MIPatternMatch::m_GAnyExt
UnaryOp_match< SrcTy, TargetOpcode::G_ANYEXT > m_GAnyExt(const SrcTy &Src)
Definition: MIPatternMatch.h:404
llvm::MIPatternMatch::CompareOp_match::match
bool match(const MachineRegisterInfo &MRI, OpTy &&Op)
Definition: MIPatternMatch.h:479
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SpecificConstantMatch(int64_t RequestedVal)
Definition: MIPatternMatch.h:95
llvm::MIPatternMatch::m_GOr
BinaryOp_match< LHS, RHS, TargetOpcode::G_OR, true > m_GOr(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:350
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:321
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::MIPatternMatch::BinaryOp_match
Definition: MIPatternMatch.h:238
const
aarch64 promote const
Definition: AArch64PromoteConstant.cpp:232
llvm::MIPatternMatch::OneNonDBGUse_match::SubPat
SubPatternT SubPat
Definition: MIPatternMatch.h:49
llvm::MIPatternMatch::And< Pred, Preds... >::match
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src)
Definition: MIPatternMatch.h:144
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Class & VR
Definition: MIPatternMatch.h:217
llvm::MIPatternMatch::Or
Definition: MIPatternMatch.h:149
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BinaryOpc_match< LHS, RHS, true > m_CommutativeBinOp(unsigned Opcode, const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:291
llvm::MIPatternMatch::m_AllOnesInt
SpecificConstantMatch m_AllOnesInt()
Definition: MIPatternMatch.h:110
llvm::MIPatternMatch::And
Matching combinators.
Definition: MIPatternMatch.h:130
llvm::MIPatternMatch::CheckType::match
bool match(const MachineRegisterInfo &MRI, Register Reg)
Definition: MIPatternMatch.h:511
llvm::MachineOperand::getPredicate
unsigned getPredicate() const
Definition: MachineOperand.h:588
llvm::getConstantVRegSExtVal
Optional< int64_t > getConstantVRegSExtVal(Register VReg, const MachineRegisterInfo &MRI)
If VReg is defined by a G_CONSTANT fits in int64_t returns it.
Definition: Utils.cpp:281
llvm::MIPatternMatch::m_Type
bind_ty< LLT > m_Type(LLT Ty)
Definition: MIPatternMatch.h:228
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:360
llvm::MIPatternMatch::OneNonDBGUse_match::match
bool match(const MachineRegisterInfo &MRI, Register Reg)
Definition: MIPatternMatch.h:52
llvm::MIPatternMatch::bind_ty::bind_ty
bind_ty(Class &V)
Definition: MIPatternMatch.h:219
llvm::MIPatternMatch::TernaryOp_match::Src2
Src2Ty Src2
Definition: MIPatternMatch.h:522
llvm::MIPatternMatch::m_GFCst
bind_ty< const ConstantFP * > m_GFCst(const ConstantFP *&C)
Definition: MIPatternMatch.h:233
llvm::MIPatternMatch::BinaryOp_match::match
bool match(const MachineRegisterInfo &MRI, OpTy &&Op)
Definition: MIPatternMatch.h:244
llvm::MachineInstr::getOpcode
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:489
llvm::MIPatternMatch::m_any_of
Or< Preds... > m_any_of(Preds &&... preds)
Definition: MIPatternMatch.h:171
llvm::MIPatternMatch::m_GXor
BinaryOp_match< LHS, RHS, TargetOpcode::G_XOR, true > m_GXor(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:345
llvm::MIPatternMatch::TernaryOp_match::Src1
Src1Ty Src1
Definition: MIPatternMatch.h:521
llvm::MIPatternMatch::bind_helper::bind
static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V)
Definition: MIPatternMatch.h:176
llvm::MIPatternMatch::m_Copy
UnaryOp_match< SrcTy, TargetOpcode::COPY > m_Copy(SrcTy &&Src)
Definition: MIPatternMatch.h:463
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MIPatternMatch::m_GAShr
BinaryOp_match< LHS, RHS, TargetOpcode::G_ASHR, false > m_GAShr(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:369
llvm::MIPatternMatch::And::match
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src)
Definition: MIPatternMatch.h:132
std
Definition: BitVector.h:838
llvm::MIPatternMatch::m_GFCmp
CompareOp_match< Pred, LHS, RHS, TargetOpcode::G_FCMP > m_GFCmp(const Pred &P, const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:502
llvm::MIPatternMatch::m_GAdd
BinaryOp_match< LHS, RHS, TargetOpcode::G_ADD, true > m_GAdd(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:297
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:314
llvm::MIPatternMatch::CompareOp_match::P
Pred_P P
Definition: MIPatternMatch.h:471
llvm::MIPatternMatch::CompareOp_match
Definition: MIPatternMatch.h:470
llvm::MIPatternMatch::And< Pred, Preds... >::P
Pred P
Definition: MIPatternMatch.h:139
llvm::MIPatternMatch::m_GISelect
TernaryOp_match< Src0Ty, Src1Ty, Src2Ty, TargetOpcode::G_SELECT > m_GISelect(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2)
Definition: MIPatternMatch.h:549
llvm::MIPatternMatch::CompareOp_match::L
LHS_P L
Definition: MIPatternMatch.h:472
llvm::MIPatternMatch::m_ICst
ConstantMatch m_ICst(int64_t &Cst)
Definition: MIPatternMatch.h:74
llvm::MIPatternMatch::bind_helper
Definition: MIPatternMatch.h:175
llvm::MIPatternMatch::OneUse_match::SubPat
SubPatternT SubPat
Definition: MIPatternMatch.h:35
llvm::MIPatternMatch::CompareOp_match::CompareOp_match
CompareOp_match(const Pred_P &Pred, const LHS_P &LHS, const RHS_P &RHS)
Definition: MIPatternMatch.h:475
llvm::Pattern
Definition: FileCheckImpl.h:614
llvm::MIPatternMatch::bind_helper< const ConstantFP * >::bind
static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F, Register Reg)
Definition: MIPatternMatch.h:207
llvm::MIPatternMatch::m_GFPTrunc
UnaryOp_match< SrcTy, TargetOpcode::G_FPTRUNC > m_GFPTrunc(const SrcTy &Src)
Definition: MIPatternMatch.h:448
llvm::MIPatternMatch::m_GBitcast
UnaryOp_match< SrcTy, TargetOpcode::G_BITCAST > m_GBitcast(const SrcTy &Src)
Definition: MIPatternMatch.h:430
llvm::MIPatternMatch::operand_type_match
}
Definition: MIPatternMatch.h:120
llvm::MachineInstr::getNumOperands
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:492
llvm::MIPatternMatch::m_GFMul
BinaryOp_match< LHS, RHS, TargetOpcode::G_FMUL, true > m_GFMul(const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:327
llvm::MIPatternMatch::m_Neg
BinaryOp_match< SpecificConstantMatch, SrcTy, TargetOpcode::G_SUB > m_Neg(const SrcTy &&Src)
Matches a register negated by a G_SUB.
Definition: MIPatternMatch.h:558
llvm::MIPatternMatch::OneUse_match
Definition: MIPatternMatch.h:34
llvm::MIPatternMatch::BinaryOp_match::BinaryOp_match
BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS)
Definition: MIPatternMatch.h:242
llvm::MIPatternMatch::bind_helper< MachineInstr * >::bind
static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI, MachineInstr *Inst)
Definition: MIPatternMatch.h:190
llvm::getConstantFPVRegVal
const ConstantFP * getConstantFPVRegVal(Register VReg, const MachineRegisterInfo &MRI)
Definition: Utils.cpp:377
llvm::MIPatternMatch::m_all_of
And< Preds... > m_all_of(Preds &&... preds)
Definition: MIPatternMatch.h:167
llvm::MIPatternMatch::CheckType::Ty
LLT Ty
Definition: MIPatternMatch.h:508
llvm::MIPatternMatch::m_Not
BinaryOp_match< SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true > m_Not(const SrcTy &&Src)
Matches a register not-ed by a G_XOR.
Definition: MIPatternMatch.h:566
llvm::MIPatternMatch::OneUse_match::match
bool match(const MachineRegisterInfo &MRI, Register Reg)
Definition: MIPatternMatch.h:38
llvm::MIPatternMatch::mi_match
bool mi_match(Reg R, const MachineRegisterInfo &MRI, Pattern &&P)
Definition: MIPatternMatch.h:24
llvm::MIPatternMatch::TernaryOp_match
Definition: MIPatternMatch.h:519
llvm::MIPatternMatch::m_BinOp
BinaryOpc_match< LHS, RHS, false > m_BinOp(unsigned Opcode, const LHS &L, const RHS &R)
Definition: MIPatternMatch.h:284
llvm::MIPatternMatch::TernaryOp_match::Src0
Src0Ty Src0
Definition: MIPatternMatch.h:520
llvm::MIPatternMatch::ICstRegMatch
Definition: MIPatternMatch.h:76
llvm::MIPatternMatch::m_GInsertVecElt
TernaryOp_match< Src0Ty, Src1Ty, Src2Ty, TargetOpcode::G_INSERT_VECTOR_ELT > m_GInsertVecElt(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2)
Definition: MIPatternMatch.h:542
llvm::MIPatternMatch::m_OneUse
OneUse_match< SubPat > m_OneUse(const SubPat &SP)
Definition: MIPatternMatch.h:44
llvm::MIPatternMatch::SpecificConstantMatch
Matcher for a specific constant value.
Definition: MIPatternMatch.h:93
llvm::MIPatternMatch::ConstantMatch::CR
int64_t & CR
Definition: MIPatternMatch.h:63
llvm::getConstantVRegValWithLookThrough
Optional< ValueAndVReg > getConstantVRegValWithLookThrough(Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs=true, bool HandleFConstants=true, bool LookThroughAnyExt=false)
If VReg is defined by a statically evaluable chain of instructions rooted on a G_F/CONSTANT (LookThro...
Definition: Utils.cpp:289
llvm::MIPatternMatch::And< Pred, Preds... >::And
And(Pred &&p, Preds &&... preds)
Definition: MIPatternMatch.h:140
llvm::MIPatternMatch::CompareOp_match::R
RHS_P R
Definition: MIPatternMatch.h:473
llvm::LLT
Definition: LowLevelTypeImpl.h:40