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48 #define DEBUG_TYPE "mips"
94 Ret +=
"-i8:8:32-i16:16:32-i64:64";
99 if (
ABI.IsN64() ||
ABI.IsN32())
100 Ret +=
"-n32:64-S128";
109 if (!
RM.hasValue() ||
JIT)
131 Subtarget(nullptr), DefaultSubtarget(TT, CPU,
FS, isLittle, *
this,
None),
132 NoMips16Subtarget(TT, CPU,
FS.
empty() ?
"-mips16" :
FS.str() +
",-mips16",
134 Mips16Subtarget(TT, CPU,
FS.
empty() ?
"+mips16" :
FS.str() +
",+mips16",
136 Subtarget = &DefaultSubtarget;
145 void MipsebTargetMachine::anchor() {}
155 void MipselTargetMachine::anchor() {}
167 Attribute CPUAttr =
F.getFnAttribute(
"target-cpu");
168 Attribute FSAttr =
F.getFnAttribute(
"target-features");
174 bool hasMips16Attr =
F.getFnAttribute(
"mips16").isValid();
175 bool hasNoMips16Attr =
F.getFnAttribute(
"nomips16").isValid();
177 bool HasMicroMipsAttr =
F.getFnAttribute(
"micromips").isValid();
178 bool HasNoMicroMipsAttr =
F.getFnAttribute(
"nomicromips").isValid();
183 bool softFloat =
F.getFnAttribute(
"use-soft-float").getValueAsBool();
186 FS +=
FS.empty() ?
"+mips16" :
",+mips16";
187 else if (hasNoMips16Attr)
188 FS +=
FS.empty() ?
"-mips16" :
",-mips16";
189 if (HasMicroMipsAttr)
190 FS +=
FS.empty() ?
"+micromips" :
",+micromips";
191 else if (HasNoMicroMipsAttr)
192 FS +=
FS.empty() ?
"-micromips" :
",-micromips";
194 FS +=
FS.empty() ?
"+soft-float" :
",+soft-float";
196 auto &
I = SubtargetMap[CPU +
FS];
202 I = std::make_unique<MipsSubtarget>(
204 MaybeAlign(
F.getParent()->getOverrideStackAlignment()));
226 EnableTailMerge = !getMipsSubtarget().enableLongBranchPass();
230 return getTM<MipsTargetMachine>();
234 return *getMipsTargetMachine().getSubtargetImpl();
237 void addIRPasses()
override;
238 bool addInstSelector()
override;
239 void addPreEmitPass()
override;
240 void addPreRegAlloc()
override;
241 bool addIRTranslator()
override;
242 void addPreLegalizeMachineIR()
override;
243 bool addLegalizeMachineIR()
override;
244 void addPreRegBankSelect()
override;
245 bool addRegBankSelect()
override;
246 bool addGlobalInstructionSelect()
override;
248 std::unique_ptr<CSEConfigBase> getCSEConfig()
const override;
254 return new MipsPassConfig(*
this, PM);
257 std::unique_ptr<CSEConfigBase> MipsPassConfig::getCSEConfig()
const {
261 void MipsPassConfig::addIRPasses() {
264 if (getMipsSubtarget().os16())
266 if (getMipsSubtarget().inMips16HardFloat())
271 bool MipsPassConfig::addInstSelector() {
278 void MipsPassConfig::addPreRegAlloc() {
296 void MipsPassConfig::addPreEmitPass() {
326 bool MipsPassConfig::addIRTranslator() {
331 void MipsPassConfig::addPreLegalizeMachineIR() {
335 bool MipsPassConfig::addLegalizeMachineIR() {
340 void MipsPassConfig::addPreRegBankSelect() {
345 bool MipsPassConfig::addRegBankSelect() {
350 bool MipsPassConfig::addGlobalInstructionSelect() {
FunctionPass * createMipsExpandPseudoPass()
createMipsExpandPseudoPass - returns an instance of the pseudo instruction expansion pass.
MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT, bool isLittle)
Generic address nodes are lowered to some combination of target independent and machine specific ABI
This is an optimization pass for GlobalISel generic memory operations.
bool isValid() const
Return true if the attribute is any kind of attribute.
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTarget()
void initializeMipsDelaySlotFillerPass(PassRegistry &)
static cl::opt< bool > EnableMulMulFix("mfix4300", cl::init(false), cl::desc("Enable the VR4300 mulmul bug fix."), cl::Hidden)
ModulePass * createMipsOs16Pass()
Target - Wrapper for Target specific information.
bool allowMixed16_32() const
Triple - Helper class for working with autoconf configuration names.
void initializeGlobalISel(PassRegistry &)
Initialize all passes linked into the GlobalISel library.
raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
ModulePass * createMips16HardFloatPass()
MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
const MipsSubtarget * getSubtargetImpl() const
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
FunctionPass * createMipsPostLegalizeCombiner(bool IsOptNone)
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
void initializeMipsMulMulBugFixPass(PassRegistry &)
FunctionPass * createMipsOptimizePICCallPass()
Return an OptimizeCall object.
static MipsABIInfo computeTargetABI(const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
FunctionPass * createMipsPreLegalizeCombiner()
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
FunctionPass * createAtomicExpandPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
This pass is responsible for selecting generic machine instructions to target-specific instructions.
FunctionPass * createMipsModuleISelDagPass()
RegisterTargetMachine - Helper template for registering a target machine implementation,...
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
void initializeMicroMipsSizeReducePass(PassRegistry &)
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
FunctionPass * createMipsBranchExpansion()
StringRef getValueAsString() const
Return the attribute's value as a string.
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
Target-Independent Code Generator Pass Configuration Options.
static ARMBaseTargetMachine::ARMABI computeTargetABI(const Triple &TT, StringRef CPU, const TargetOptions &Options)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
static std::string computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle)
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
FunctionPass * createMipsSEISelDag(MipsTargetMachine &TM, CodeGenOpt::Level OptLevel)
#define LLVM_EXTERNAL_VISIBILITY
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
initializer< Ty > init(const Ty &Val)
Target & getTheMipsTarget()
FunctionPass * createMicroMipsSizeReducePass()
Returns an instance of the MicroMips size reduction pass.
void resetSubtarget(MachineFunction *MF)
Reset the subtarget for the Mips target.
StringRef - Represent a constant reference to a string, i.e.
Analysis the ScalarEvolution expression for r is this
std::unique_ptr< CSEConfigBase > getStandardCSEConfigForOpt(CodeGenOpt::Level Level)
Target & getTheMips64elTarget()
Target & getTheMips64Target()
static Reloc::Model getEffectiveRelocModel(Optional< Reloc::Model > RM)
CodeModel::Model getEffectiveCodeModel(Optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
constexpr bool empty(const T &RangeOrContainer)
Test whether RangeOrContainer is empty. Similar to C++17 std::empty.
void initializeMipsPreLegalizerCombinerPass(PassRegistry &)
This class describes a target machine that is implemented with the LLVM target-independent code gener...
FunctionPass * createMipsDelaySlotFillerPass()
createMipsDelaySlotFillerPass - Returns a pass that fills in delay slots in Mips MachineFunctions
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
~MipsTargetMachine() override
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
void initializeMipsBranchExpansionPass(PassRegistry &)
MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
const char LLVMTargetMachineRef TM
This pass implements the reg bank selector pass used in the GlobalISel pipeline.
void setSupportsDebugEntryValues(bool Enable)
FunctionPass * createMipsConstantIslandPass()
Returns a pass that converts branches to long branches.
FunctionPass * createMipsMulMulBugPass()
FunctionPass * createMips16ISelDag(MipsTargetMachine &TM, CodeGenOpt::Level OptLevel)
void initializeMipsPostLegalizerCombinerPass(PassRegistry &)
Target & getTheMipselTarget()