#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
#include <cassert>
#include <iterator>
#include <utility>

Include dependency graph for TwoAddressInstructionPass.cpp:

Macros
#define	DEBUG_TYPE "twoaddressinstruction"

Functions
	STATISTIC (NumTwoAddressInstrs, "Number of two-address instructions")

	STATISTIC (NumCommuted, "Number of instructions commuted to coalesce")

	STATISTIC (NumAggrCommuted, "Number of instructions aggressively commuted")

	STATISTIC (NumConvertedTo3Addr, "Number of instructions promoted to 3-address")

	STATISTIC (NumReSchedUps, "Number of instructions re-scheduled up")

	STATISTIC (NumReSchedDowns, "Number of instructions re-scheduled down")

	INITIALIZE_PASS_BEGIN (TwoAddressInstructionPass, DEBUG_TYPE, "Two-Address instruction pass", false, false) INITIALIZE_PASS_END(TwoAddressInstructionPass

Two Address instruction static false bool	isPlainlyKilled (MachineInstr MI, Register Reg, LiveIntervals LIS)
	Test if the given register value, which is used by the given instruction, is killed by the given instruction.

static MachineInstr *	getSingleDef (Register Reg, MachineBasicBlock BB, const MachineRegisterInfo MRI)
	Return the MachineInstr* if it is the single def of the Reg in current BB.

static bool	isCopyToReg (MachineInstr &MI, const TargetInstrInfo *TII, Register &SrcReg, Register &DstReg, bool &IsSrcPhys, bool &IsDstPhys)
	Return true if the specified MI is a copy instruction or an extract_subreg instruction.

static bool	isKilled (MachineInstr &MI, Register Reg, const MachineRegisterInfo MRI, const TargetInstrInfo TII, LiveIntervals *LIS, bool allowFalsePositives)
	Test if the given register value, which is used by the given instruction, is killed by the given instruction.

static bool	isTwoAddrUse (MachineInstr &MI, Register Reg, Register &DstReg)
	Return true if the specified MI uses the specified register as a two-address use.

static MachineInstr *	findOnlyInterestingUse (Register Reg, MachineBasicBlock MBB, MachineRegisterInfo MRI, const TargetInstrInfo TII, bool &IsCopy, Register &DstReg, bool &IsDstPhys, LiveIntervals LIS)
	Given a register, if all its uses are in the same basic block, return the last use instruction if it's a copy or a two-address use.

static MCRegister	getMappedReg (Register Reg, DenseMap< Register, Register > &RegMap)
	Return the physical register the specified virtual register might be mapped to.

static bool	regsAreCompatible (Register RegA, Register RegB, const TargetRegisterInfo *TRI)
	Return true if the two registers are equal or aliased.

static void	removeMapRegEntry (const MachineOperand &MO, DenseMap< Register, Register > &RegMap, const TargetRegisterInfo *TRI)
	From RegMap remove entries mapped to a physical register which overlaps MO.

static bool	regOverlapsSet (const SmallVectorImpl< Register > &Set, Register Reg, const TargetRegisterInfo *TRI)

Variables
static cl::opt< bool >	EnableRescheduling ("twoaddr-reschedule", cl::desc("Coalesce copies by rescheduling (default=true)"), cl::init(true), cl::Hidden)

static cl::opt< unsigned >	MaxDataFlowEdge ("dataflow-edge-limit", cl::Hidden, cl::init(3), cl::desc("Maximum number of dataflow edges to traverse when evaluating " "the benefit of commuting operands"))

	DEBUG_TYPE

Two Address instruction	pass

Two Address instruction	false

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "twoaddressinstruction"

Definition at line 65 of file TwoAddressInstructionPass.cpp.

Function Documentation

◆ findOnlyInterestingUse()

static MachineInstr * findOnlyInterestingUse	(	Register	Reg,
		MachineBasicBlock *	MBB,
		MachineRegisterInfo *	MRI,
		const TargetInstrInfo *	TII,
		bool &	IsCopy,
		Register &	DstReg,
		bool &	IsDstPhys,
		LiveIntervals *	LIS
	)

static

Given a register, if all its uses are in the same basic block, return the last use instruction if it's a copy or a two-address use.

Definition at line 378 of file TwoAddressInstructionPass.cpp.

References llvm::TargetInstrInfo::CommuteAnyOperandIndex, llvm::MachineOperand::getOperandNo(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), isCopyToReg(), llvm::Register::isPhysical(), isPlainlyKilled(), llvm::MachineOperand::isReg(), isTwoAddrUse(), llvm::MachineOperand::isUse(), MBB, MI, MRI, TII, and UseMI.

◆ getMappedReg()

static MCRegister getMappedReg	(	Register	Reg,
		DenseMap< Register, Register > &	RegMap
	)

static

Return the physical register the specified virtual register might be mapped to.

Definition at line 422 of file TwoAddressInstructionPass.cpp.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and SI.

◆ getSingleDef()

static MachineInstr * getSingleDef	(	Register	Reg,
		MachineBasicBlock *	BB,
		const MachineRegisterInfo *	MRI
	)

static

Return the MachineInstr* if it is the single def of the Reg in current BB.

Definition at line 204 of file TwoAddressInstructionPass.cpp.

References DefMI, and MRI.

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN	(	TwoAddressInstructionPass	,
		DEBUG_TYPE	,
		"Two-Address instruction pass"	,
		false	,
		false
	)

◆ isCopyToReg()

static bool isCopyToReg	(	MachineInstr &	MI,
		const TargetInstrInfo *	TII,
		Register &	SrcReg,
		Register &	DstReg,
		bool &	IsSrcPhys,
		bool &	IsDstPhys
	)

static

Return true if the specified MI is a copy instruction or an extract_subreg instruction.

It also returns the source and destination registers and whether they are physical registers by reference.

Definition at line 268 of file TwoAddressInstructionPass.cpp.

References llvm::Register::isPhysical(), and MI.

Referenced by findOnlyInterestingUse(), and isKilled().

◆ isKilled()

static bool isKilled	(	MachineInstr &	MI,
		Register	Reg,
		const MachineRegisterInfo *	MRI,
		const TargetInstrInfo *	TII,
		LiveIntervals *	LIS,
		bool	allowFalsePositives
	)

static

Test if the given register value, which is used by the given instruction, is killed by the given instruction.

This looks through coalescable copies to see if the original value is potentially not killed.

For example, in this code:

reg1034 = copy reg1024 reg1035 = copy killed reg1025 reg1036 = add killed reg1034, killed reg1035

reg1034 is not considered to be killed, since it is copied from a register which is not killed. Treating it as not killed lets the normal heuristics commute the (two-address) add, which lets coalescing eliminate the extra copy.

If allowFalsePositives is true then likely kills are treated as kills even if it can't be proven that they are kills.

Definition at line 331 of file TwoAddressInstructionPass.cpp.

References DefMI, llvm::MachineOperand::getParent(), isCopyToReg(), isPlainlyKilled(), MI, MRI, and TII.

◆ isPlainlyKilled()

static bool isPlainlyKilled	(	MachineInstr *	MI,
		Register	Reg,
		LiveIntervals *	LIS
	)

static

Test if the given register value, which is used by the given instruction, is killed by the given instruction.

Definition at line 290 of file TwoAddressInstructionPass.cpp.

References assert(), llvm::LiveRange::end(), llvm::LiveRange::find(), llvm::LiveIntervals::getInstructionIndex(), llvm::LiveIntervals::getInterval(), llvm::LiveRange::hasAtLeastOneValue(), I, llvm::LiveIntervals::isNotInMIMap(), llvm::SlotIndex::isSameInstr(), and MI.

Referenced by findOnlyInterestingUse(), and isKilled().

◆ isTwoAddrUse()

static bool isTwoAddrUse	(	MachineInstr &	MI,
		Register	Reg,
		Register &	DstReg
	)

static

Return true if the specified MI uses the specified register as a two-address use.

If so, return the destination register by reference.

Definition at line 361 of file TwoAddressInstructionPass.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), and MI.

Referenced by findOnlyInterestingUse().

◆ regOverlapsSet()

static bool regOverlapsSet	(	const SmallVectorImpl< Register > &	Set,
		Register	Reg,
		const TargetRegisterInfo *	TRI
	)

static

Definition at line 515 of file TwoAddressInstructionPass.cpp.

References TRI.

◆ regsAreCompatible()

static bool regsAreCompatible	(	Register	RegA,
		Register	RegB,
		const TargetRegisterInfo *	TRI
	)

static

Return true if the two registers are equal or aliased.

Definition at line 436 of file TwoAddressInstructionPass.cpp.

References TRI.

◆ removeMapRegEntry()

static void removeMapRegEntry	(	const MachineOperand &	MO,
		DenseMap< Register, Register > &	RegMap,
		const TargetRegisterInfo *	TRI
	)

static

From RegMap remove entries mapped to a physical register which overlaps MO.

Definition at line 446 of file TwoAddressInstructionPass.cpp.

References assert(), llvm::MachineOperand::clobbersPhysReg(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::erase(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), llvm::Register::isVirtual(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), SI, and TRI.

◆ STATISTIC() [1/6]

STATISTIC	(	NumAggrCommuted	,
		"Number of instructions aggressively commuted"
	)

◆ STATISTIC() [2/6]

STATISTIC	(	NumCommuted	,
		"Number of instructions commuted to coalesce"
	)

◆ STATISTIC() [3/6]

STATISTIC	(	NumConvertedTo3Addr	,
		"Number of instructions promoted to 3-address"
	)

◆ STATISTIC() [4/6]

STATISTIC	(	NumReSchedDowns	,
		"Number of instructions re-scheduled down"
	)

◆ STATISTIC() [5/6]

STATISTIC	(	NumReSchedUps	,
		"Number of instructions re-scheduled up"
	)

◆ STATISTIC() [6/6]

STATISTIC	(	NumTwoAddressInstrs	,
		"Number of two-address instructions"
	)

Variable Documentation

◆ DEBUG_TYPE

DEBUG_TYPE

Definition at line 198 of file TwoAddressInstructionPass.cpp.

◆ EnableRescheduling

cl::opt< bool > EnableRescheduling("twoaddr-reschedule", cl::desc("Coalesce copies by rescheduling (default=true)"), cl::init(true), cl::Hidden)	(	"twoaddr-reschedule"	,
		cl::desc("Coalesce copies by rescheduling (default=true)")	,
		cl::init(true)	,
		cl::Hidden
	)

static

◆ false

Two Address instruction false

Definition at line 199 of file TwoAddressInstructionPass.cpp.

◆ MaxDataFlowEdge

cl::opt< unsigned > MaxDataFlowEdge("dataflow-edge-limit", cl::Hidden, cl::init(3), cl::desc("Maximum number of dataflow edges to traverse when evaluating " "the benefit of commuting operands"))	(	"dataflow-edge-limit"	,
		cl::Hidden	,
		cl::init(3)	,
		cl::desc("Maximum number of dataflow edges to traverse when evaluating " "the benefit of commuting operands")
	)

static

◆ pass

Two Address instruction pass

Definition at line 199 of file TwoAddressInstructionPass.cpp.

Macros

Functions

Variables

Macro Definition Documentation

◆ DEBUG_TYPE

Function Documentation

◆ findOnlyInterestingUse()

◆ getMappedReg()

◆ getSingleDef()

◆ INITIALIZE_PASS_BEGIN()

◆ isCopyToReg()

◆ isKilled()

◆ isPlainlyKilled()

◆ isTwoAddrUse()

◆ regOverlapsSet()

◆ regsAreCompatible()

◆ removeMapRegEntry()

◆ STATISTIC() [1/6]

◆ STATISTIC() [2/6]

◆ STATISTIC() [3/6]

◆ STATISTIC() [4/6]

◆ STATISTIC() [5/6]

◆ STATISTIC() [6/6]

Variable Documentation

◆ DEBUG_TYPE

◆ EnableRescheduling

◆ false

◆ MaxDataFlowEdge

◆ pass