26#define DEBUG_TYPE "instcombine"
32 const APInt &Demanded) {
34 assert(OpNo < I->getNumOperands() &&
"Operand index too large");
43 if (
C->isSubsetOf(Demanded))
47 I->setOperand(OpNo, ConstantInt::get(
Op->getType(), *
C & Demanded));
59 const APInt &DemandedMask,
62 assert(
I->getOpcode() == Instruction::LShr &&
63 "Only lshr instruction supported");
67 if (!
match(
I->getOperand(0),
77 if (DemandedBitWidth > ShlAmt)
81 if (
Upper->getType()->getScalarSizeInBits() < ShlAmt + DemandedBitWidth)
88 Value *ShrAmt =
I->getOperand(1);
93 if (~KnownShrBits.
Zero != ShlAmt)
112 if (
unsigned BitWidth = Ty->getScalarSizeInBits())
115 return DL.getPointerTypeSizeInBits(Ty);
124 SQ.getWithInstruction(&Inst));
125 if (!V)
return false;
126 if (V == &Inst)
return true;
142 SQ.getWithInstruction(&Inst));
155 const APInt &DemandedMask,
159 Use &U =
I->getOperandUse(OpNo);
167 if (DemandedMask.
isZero()) {
192 if (!NewVal)
return false;
224 const APInt &DemandedMask,
228 assert(
I !=
nullptr &&
"Null pointer of Value???");
231 Type *VTy =
I->getType();
235 "Value *V, DemandedMask and Known must have same BitWidth");
241 auto disableWrapFlagsBasedOnUnusedHighBits = [](
Instruction *
I,
247 I->setHasNoSignedWrap(
false);
248 I->setHasNoUnsignedWrap(
false);
255 auto simplifyOperandsBasedOnUnusedHighBits = [&](
APInt &DemandedFromOps) {
264 disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
270 switch (
I->getOpcode()) {
274 case Instruction::And: {
292 return I->getOperand(0);
294 return I->getOperand(1);
302 case Instruction::Or: {
308 I->dropPoisonGeneratingFlags();
323 return I->getOperand(0);
325 return I->getOperand(1);
334 RHSCache(
I->getOperand(1), RHSKnown);
343 case Instruction::Xor: {
354 return Builder.CreateUnaryIntrinsic(Intrinsic::ctpop,
Xor);
368 return I->getOperand(0);
370 return I->getOperand(1);
377 BinaryOperator::CreateOr(
I->getOperand(0),
I->getOperand(1));
391 ~RHSKnown.
One & DemandedMask);
401 if ((*
C | ~DemandedMask).isAllOnes()) {
417 if (LHSInst->getOpcode() == Instruction::And && LHSInst->hasOneUse() &&
420 (LHSKnown.One & RHSKnown.
One & DemandedMask) != 0) {
421 APInt NewMask = ~(LHSKnown.One & RHSKnown.
One & DemandedMask);
424 Instruction *NewAnd = BinaryOperator::CreateAnd(
I->getOperand(0), AndC);
428 Instruction *NewXor = BinaryOperator::CreateXor(NewAnd, XorC);
434 case Instruction::Select: {
444 auto CanonicalizeSelectConstant = [](
Instruction *
I,
unsigned OpNo,
445 const APInt &DemandedMask) {
465 if ((*CmpC & DemandedMask) == (*SelC & DemandedMask)) {
466 I->setOperand(OpNo, ConstantInt::get(
I->getType(), *CmpC));
471 if (CanonicalizeSelectConstant(
I, 1, DemandedMask) ||
472 CanonicalizeSelectConstant(
I, 2, DemandedMask))
480 Known = LHSKnown.intersectWith(RHSKnown);
483 case Instruction::Trunc: {
497 return Builder.CreateLShr(Trunc,
C->getZExtValue());
502 case Instruction::ZExt: {
503 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
511 I->dropPoisonGeneratingFlags();
515 if (
I->getOpcode() == Instruction::ZExt &&
I->hasNonNeg() &&
522 case Instruction::SExt: {
524 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
526 APInt InputDemandedBits = DemandedMask.
trunc(SrcBitWidth);
531 InputDemandedBits.
setBit(SrcBitWidth-1);
552 case Instruction::Add: {
553 if ((DemandedMask & 1) == 0) {
559 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType()) {
569 return Builder.CreateSExt(AndNot, VTy);
574 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType() &&
575 (
I->getOperand(0)->hasOneUse() ||
I->getOperand(1)->hasOneUse())) {
596 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
602 APInt DemandedFromLHS = DemandedFromOps;
606 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
608 unsigned NtzLHS = (~DemandedMask & LHSKnown.Zero).
countr_one();
609 APInt DemandedFromRHS = DemandedFromOps;
612 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
617 return I->getOperand(0);
618 if (DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
619 return I->getOperand(1);
628 return Builder.CreateXor(
I->getOperand(0), ConstantInt::get(VTy, *
C));
638 case Instruction::Sub: {
645 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
651 APInt DemandedFromLHS = DemandedFromOps;
655 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
660 return I->getOperand(0);
663 if (DemandedFromOps.
isOne() && DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
664 return I->getOperand(1);
672 return Builder.CreateNot(
I->getOperand(1));
681 case Instruction::Mul: {
682 APInt DemandedFromOps;
683 if (simplifyOperandsBasedOnUnusedHighBits(DemandedFromOps))
693 Constant *ShiftC = ConstantInt::get(VTy, CTZ);
694 Instruction *Shl = BinaryOperator::CreateShl(
I->getOperand(0), ShiftC);
701 if (
I->getOperand(0) ==
I->getOperand(1) && DemandedMask.
ult(4)) {
702 Constant *One = ConstantInt::get(VTy, 1);
703 Instruction *And1 = BinaryOperator::CreateAnd(
I->getOperand(0), One);
710 case Instruction::Shl: {
717 DemandedMask,
Known))
721 if (
I->hasOneUse()) {
723 if (Inst->
getOpcode() == BinaryOperator::Or) {
725 auto [IID, FShiftArgs] = *Opt;
726 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
727 FShiftArgs[0] == FShiftArgs[1]) {
739 if (
I->hasNoSignedWrap()) {
743 if (SignBits > ShiftAmt && SignBits - ShiftAmt >= NumHiDemandedBits)
744 return I->getOperand(0);
754 Constant *LeftShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
758 LeftShiftAmtC,
DL) ==
C) {
759 Instruction *Lshr = BinaryOperator::CreateLShr(NewC,
X);
765 APInt DemandedMaskIn(DemandedMask.
lshr(ShiftAmt));
789 I->dropPoisonGeneratingFlags();
797 case Instruction::LShr: {
803 if (
I->hasOneUse()) {
805 if (Inst->
getOpcode() == BinaryOperator::Or) {
807 auto [IID, FShiftArgs] = *Opt;
808 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
809 FShiftArgs[0] == FShiftArgs[1]) {
825 if (SignBits >= NumHiDemandedBits)
826 return I->getOperand(0);
835 Constant *RightShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
839 RightShiftAmtC,
DL) ==
C) {
846 if (
match(
I->getOperand(0),
850 X, ConstantInt::get(
X->getType(), Factor->
lshr(ShiftAmt)));
856 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
859 I->dropPoisonGeneratingFlags();
864 Known.Zero.setHighBits(ShiftAmt);
874 case Instruction::AShr: {
880 if (SignBits >= NumHiDemandedBits)
881 return I->getOperand(0);
887 if (DemandedMask.
isOne()) {
890 I->getOperand(0),
I->getOperand(1),
I->getName());
899 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
902 bool ShiftedInBitsDemanded = DemandedMask.
countl_zero() < ShiftAmt;
903 if (ShiftedInBitsDemanded)
907 I->dropPoisonGeneratingFlags();
923 ShiftAmt != 0,
I->isExact());
929 case Instruction::UDiv: {
935 APInt DemandedMaskIn =
940 I->dropPoisonGeneratingFlags();
951 case Instruction::SRem: {
954 if (DemandedMask.
ult(*Rem))
955 return I->getOperand(0);
957 APInt LowBits = *Rem - 1;
968 case Instruction::Call: {
969 bool KnownBitsComputed =
false;
971 switch (
II->getIntrinsicID()) {
972 case Intrinsic::abs: {
973 if (DemandedMask == 1)
974 return II->getArgOperand(0);
977 case Intrinsic::ctpop: {
985 II->getModule(), Intrinsic::ctpop, VTy);
990 case Intrinsic::bswap: {
1007 NewVal = BinaryOperator::CreateLShr(
1008 II->getArgOperand(0), ConstantInt::get(VTy, NLZ - NTZ));
1010 NewVal = BinaryOperator::CreateShl(
1011 II->getArgOperand(0), ConstantInt::get(VTy, NTZ - NLZ));
1017 case Intrinsic::ptrmask: {
1018 unsigned MaskWidth =
I->getOperand(1)->getType()->getScalarSizeInBits();
1023 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth),
1024 RHSKnown, Q,
Depth + 1))
1030 Known = LHSKnown & RHSKnown;
1031 KnownBitsComputed =
true;
1046 if (DemandedMask.
isSubsetOf(RHSKnown.One | LHSKnown.Zero))
1047 return I->getOperand(0);
1051 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth)))
1060 uint64_t PtrMaskImmediate;
1066 if (!LHSKnown.isZero()) {
1067 const unsigned trailingZeros = LHSKnown.countMinTrailingZeros();
1068 uint64_t PointerAlignBits = (
uint64_t(1) << trailingZeros) - 1;
1070 uint64_t HighBitsGEPIndex = GEPIndex & ~PointerAlignBits;
1071 uint64_t MaskedLowBitsGEPIndex =
1072 GEPIndex & PointerAlignBits & PtrMaskImmediate;
1074 uint64_t MaskedGEPIndex = HighBitsGEPIndex | MaskedLowBitsGEPIndex;
1076 if (MaskedGEPIndex != GEPIndex) {
1079 Type *GEPIndexType =
1080 DL.getIndexType(
GEP->getPointerOperand()->getType());
1082 GEP->getSourceElementType(), InnerPtr,
1083 ConstantInt::get(GEPIndexType, MaskedGEPIndex),
1084 GEP->getName(),
GEP->isInBounds());
1095 case Intrinsic::fshr:
1096 case Intrinsic::fshl: {
1104 if (
II->getIntrinsicID() == Intrinsic::fshr)
1107 APInt DemandedMaskLHS(DemandedMask.
lshr(ShiftAmt));
1109 if (
I->getOperand(0) !=
I->getOperand(1)) {
1115 I->dropPoisonGeneratingAnnotations();
1122 if (DemandedMaskLHS.
isSubsetOf(LHSKnown.Zero | LHSKnown.One) &&
1126 I->dropPoisonGeneratingAnnotations();
1135 I->dropPoisonGeneratingAnnotations();
1140 LHSKnown <<= ShiftAmt;
1142 Known = LHSKnown.unionWith(RHSKnown);
1143 KnownBitsComputed =
true;
1146 case Intrinsic::umax: {
1153 CTZ >=
C->getActiveBits())
1154 return II->getArgOperand(0);
1157 case Intrinsic::umin: {
1165 CTZ >=
C->getBitWidth() -
C->countl_one())
1166 return II->getArgOperand(0);
1172 *
II, DemandedMask,
Known, KnownBitsComputed);
1180 if (!KnownBitsComputed)
1186 if (
I->getType()->isPointerTy()) {
1187 Align Alignment =
I->getPointerAlignment(
DL);
1195 if (!
I->getType()->isPointerTy() &&
1199 if (
CLOpts.verify_known_bits) {
1201 if (
Known != ReferenceKnown) {
1202 errs() <<
"Mismatched known bits for " << *
I <<
" in "
1203 <<
I->getFunction()->getName() <<
"\n";
1204 errs() <<
"computeKnownBits(): " << ReferenceKnown <<
"\n";
1205 errs() <<
"SimplifyDemandedBits(): " <<
Known <<
"\n";
1220 Type *ITy =
I->getType();
1229 switch (
I->getOpcode()) {
1230 case Instruction::And: {
1245 return I->getOperand(0);
1247 return I->getOperand(1);
1251 case Instruction::Or: {
1268 return I->getOperand(0);
1270 return I->getOperand(1);
1274 case Instruction::Xor: {
1290 return I->getOperand(0);
1292 return I->getOperand(1);
1296 case Instruction::Add: {
1304 return I->getOperand(0);
1308 return I->getOperand(1);
1316 case Instruction::Sub: {
1324 return I->getOperand(0);
1333 case Instruction::AShr: {
1346 const APInt *ShiftRC;
1347 const APInt *ShiftLC;
1395 if (!ShlOp1 || !ShrOp1)
1400 unsigned BitWidth = Ty->getScalarSizeInBits();
1407 Known.One.clearAllBits();
1408 Known.Zero.setLowBits(ShlAmt - 1);
1409 Known.Zero &= DemandedMask;
1414 bool isLshr = (Shr->
getOpcode() == Instruction::LShr);
1415 BitMask1 = isLshr ? (BitMask1.
lshr(ShrAmt) << ShlAmt) :
1416 (BitMask1.
ashr(ShrAmt) << ShlAmt);
1418 if (ShrAmt <= ShlAmt) {
1419 BitMask2 <<= (ShlAmt - ShrAmt);
1421 BitMask2 = isLshr ? BitMask2.
lshr(ShrAmt - ShlAmt):
1422 BitMask2.
ashr(ShrAmt - ShlAmt);
1426 if ((BitMask1 & DemandedMask) == (BitMask2 & DemandedMask)) {
1427 if (ShrAmt == ShlAmt)
1434 if (ShrAmt < ShlAmt) {
1436 New = BinaryOperator::CreateShl(VarX, Amt);
1442 New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) :
1443 BinaryOperator::CreateAShr(VarX, Amt);
1445 New->setIsExact(
true);
1460 unsigned DepthLimit) {
1463 if (!IE.hasOneUse())
1466 if (!UserIE || UserIE->getOperand(0) != &IE)
1474 if (!Idx || Idx->getValue().uge(VWidth))
1477 unsigned Index = Idx->getZExtValue();
1478 if (SeenIndices.
test(Index))
1481 SeenIndices.
set(Index);
1486 for (
unsigned I = 0;
I != DepthLimit; ++
I) {
1491 if (!HasNewIndexInRange(*Cur))
1499 if (!Cur || !Cur->hasOneUse())
1523 bool AllowMultipleUsers) {
1531 assert((DemandedElts & ~EltMask) == 0 &&
"Invalid DemandedElts!");
1535 PoisonElts = EltMask;
1539 if (DemandedElts.
isZero()) {
1540 PoisonElts = EltMask;
1555 for (
unsigned i = 0; i != VWidth; ++i) {
1556 if (!DemandedElts[i]) {
1562 Constant *Elt =
C->getAggregateElement(i);
1563 if (!Elt)
return nullptr;
1572 return NewCV !=
C ? NewCV :
nullptr;
1579 if (!AllowMultipleUsers) {
1583 if (!V->hasOneUse()) {
1592 DemandedElts = EltMask;
1597 if (!
I)
return nullptr;
1599 bool MadeChange =
false;
1600 auto simplifyAndSetOp = [&](
Instruction *Inst,
unsigned OpNum,
1610 APInt PoisonElts2(VWidth, 0);
1611 APInt PoisonElts3(VWidth, 0);
1612 switch (
I->getOpcode()) {
1615 case Instruction::GetElementPtr: {
1633 for (
unsigned i = 0; i <
I->getNumOperands(); i++) {
1637 PoisonElts = EltMask;
1640 if (
I->getOperand(i)->getType()->isVectorTy()) {
1641 APInt PoisonEltsOp(VWidth, 0);
1642 simplifyAndSetOp(
I, i, DemandedElts, PoisonEltsOp);
1647 PoisonElts |= PoisonEltsOp;
1653 case Instruction::InsertElement: {
1654 unsigned DepthLimit =
CLOpts.simplify_vector_elts_depth;
1657 if (
Depth == 0 && DemandedElts.
isAllOnes() && VWidth > DepthLimit &&
1667 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts2);
1674 APInt PreInsertDemandedElts = DemandedElts;
1676 PreInsertDemandedElts.
clearBit(IdxNo);
1684 if (PreInsertDemandedElts == 0 &&
1691 simplifyAndSetOp(
I, 0, PreInsertDemandedElts, PoisonElts);
1695 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) {
1697 return I->getOperand(0);
1704 case Instruction::ShuffleVector: {
1706 assert(Shuffle->getOperand(0)->getType() ==
1707 Shuffle->getOperand(1)->getType() &&
1708 "Expected shuffle operands to have same type");
1719 APInt LeftDemanded(OpWidth, 1);
1720 APInt LHSPoisonElts(OpWidth, 0);
1721 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1722 if (LHSPoisonElts[0])
1723 PoisonElts = EltMask;
1729 APInt LeftDemanded(OpWidth, 0), RightDemanded(OpWidth, 0);
1730 for (
unsigned i = 0; i < VWidth; i++) {
1731 if (DemandedElts[i]) {
1732 unsigned MaskVal = Shuffle->getMaskValue(i);
1733 if (MaskVal != -1u) {
1734 assert(MaskVal < OpWidth * 2 &&
1735 "shufflevector mask index out of range!");
1736 if (MaskVal < OpWidth)
1737 LeftDemanded.setBit(MaskVal);
1739 RightDemanded.
setBit(MaskVal - OpWidth);
1744 APInt LHSPoisonElts(OpWidth, 0);
1745 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1747 APInt RHSPoisonElts(OpWidth, 0);
1748 simplifyAndSetOp(
I, 1, RightDemanded, RHSPoisonElts);
1761 if (VWidth == OpWidth) {
1762 bool IsIdentityShuffle =
true;
1763 for (
unsigned i = 0; i < VWidth; i++) {
1764 unsigned MaskVal = Shuffle->getMaskValue(i);
1765 if (DemandedElts[i] && i != MaskVal) {
1766 IsIdentityShuffle =
false;
1770 if (IsIdentityShuffle)
1771 return Shuffle->getOperand(0);
1774 bool NewPoisonElts =
false;
1775 unsigned LHSIdx = -1u, LHSValIdx = -1u;
1776 unsigned RHSIdx = -1u, RHSValIdx = -1u;
1777 bool LHSUniform =
true;
1778 bool RHSUniform =
true;
1779 for (
unsigned i = 0; i < VWidth; i++) {
1780 unsigned MaskVal = Shuffle->getMaskValue(i);
1781 if (MaskVal == -1u) {
1783 }
else if (!DemandedElts[i]) {
1784 NewPoisonElts =
true;
1786 }
else if (MaskVal < OpWidth) {
1787 if (LHSPoisonElts[MaskVal]) {
1788 NewPoisonElts =
true;
1791 LHSIdx = LHSIdx == -1u ? i : OpWidth;
1792 LHSValIdx = LHSValIdx == -1u ? MaskVal : OpWidth;
1793 LHSUniform = LHSUniform && (MaskVal == i);
1796 if (RHSPoisonElts[MaskVal - OpWidth]) {
1797 NewPoisonElts =
true;
1800 RHSIdx = RHSIdx == -1u ? i : OpWidth;
1801 RHSValIdx = RHSValIdx == -1u ? MaskVal - OpWidth : OpWidth;
1802 RHSUniform = RHSUniform && (MaskVal - OpWidth == i);
1818 if (LHSIdx < OpWidth && RHSUniform) {
1820 Op = Shuffle->getOperand(1);
1821 Value = CV->getOperand(LHSValIdx);
1825 if (RHSIdx < OpWidth && LHSUniform) {
1827 Op = Shuffle->getOperand(0);
1828 Value = CV->getOperand(RHSValIdx);
1841 if (NewPoisonElts) {
1844 for (
unsigned i = 0; i < VWidth; ++i) {
1848 Elts.
push_back(Shuffle->getMaskValue(i));
1850 Shuffle->setShuffleMask(Elts);
1855 case Instruction::Select: {
1865 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1869 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts);
1871 for (
unsigned i = 0; i < VWidth; i++) {
1876 DemandedLHS.clearBit(i);
1882 simplifyAndSetOp(
I, 1, DemandedLHS, PoisonElts2);
1883 simplifyAndSetOp(
I, 2, DemandedRHS, PoisonElts3);
1887 PoisonElts = PoisonElts2 & PoisonElts3;
1890 case Instruction::BitCast: {
1895 APInt InputDemandedElts(InVWidth, 0);
1896 PoisonElts2 =
APInt(InVWidth, 0);
1899 if (VWidth == InVWidth) {
1903 InputDemandedElts = DemandedElts;
1904 }
else if ((VWidth % InVWidth) == 0) {
1908 Ratio = VWidth / InVWidth;
1909 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1910 if (DemandedElts[OutIdx])
1911 InputDemandedElts.
setBit(OutIdx / Ratio);
1912 }
else if ((InVWidth % VWidth) == 0) {
1916 Ratio = InVWidth / VWidth;
1917 for (
unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
1918 if (DemandedElts[InIdx / Ratio])
1919 InputDemandedElts.
setBit(InIdx);
1925 simplifyAndSetOp(
I, 0, InputDemandedElts, PoisonElts2);
1927 if (VWidth == InVWidth) {
1928 PoisonElts = PoisonElts2;
1929 }
else if ((VWidth % InVWidth) == 0) {
1933 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1934 if (PoisonElts2[OutIdx / Ratio])
1935 PoisonElts.
setBit(OutIdx);
1936 }
else if ((InVWidth % VWidth) == 0) {
1940 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
1943 PoisonElts.
setBit(OutIdx);
1950 case Instruction::FPTrunc:
1951 case Instruction::FPExt:
1952 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1955 case Instruction::Call: {
1958 switch (
II->getIntrinsicID()) {
1959 case Intrinsic::masked_gather:
1960 case Intrinsic::masked_load: {
1965 DemandedPassThrough(DemandedElts);
1967 for (
unsigned i = 0; i < VWidth; i++) {
1969 if (CElt->isNullValue())
1970 DemandedPtrs.clearBit(i);
1971 else if (CElt->isAllOnesValue())
1977 if (
II->getIntrinsicID() == Intrinsic::masked_gather)
1978 simplifyAndSetOp(
II, 0, DemandedPtrs, PoisonElts2);
1979 simplifyAndSetOp(
II, 2, DemandedPassThrough, PoisonElts3);
1983 PoisonElts = PoisonElts2 & PoisonElts3;
1986 case Intrinsic::smulh:
1987 case Intrinsic::umulh:
1988 simplifyAndSetOp(
II, 0, DemandedElts, PoisonElts);
1989 simplifyAndSetOp(
II, 1, DemandedElts, PoisonElts);
1990 PoisonElts = PoisonElts2 | PoisonElts3;
1995 *
II, DemandedElts, PoisonElts, PoisonElts2, PoisonElts3,
2029 if (DemandedElts == 1 && !
X->hasOneUse() && !
Y->hasOneUse() &&
2032 auto findShufBO = [&](
bool MatchShufAsOp0) ->
User * {
2037 Value *OtherOp = MatchShufAsOp0 ?
Y :
X;
2042 Value *ShufOp = MatchShufAsOp0 ?
X :
Y;
2053 if (
DT.dominates(U,
I))
2059 User *ShufBO = findShufBO(
true);
2061 ShufBO = findShufBO(
false);
2064 ShufBOI->andIRFlags(BO);
2070 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
2071 simplifyAndSetOp(
I, 1, DemandedElts, PoisonElts2);
2075 PoisonElts &= PoisonElts2;
2083 return MadeChange ?
I :
nullptr;
2089 bool IsCanonicalizing =
false) {
2097 if (Ty->isAggregateType())
2101 if (Mask ==
fcNan && IsCanonicalizing)
2140 Known.knownNot(~DemandedMask);
2174 return DemandedMask;
2192 if (InferredFMF != FMF) {
2222 Known.knownNot(~DemandedMask);
2234 if ((DemandedMask & ~NegOrZero) ==
fcNone &&
2238 if ((DemandedMask & ~PosOrZero) ==
fcNone &&
2258 bool OrderedZeroSign = !NSZ;
2262 case Intrinsic::maximum: {
2281 case Intrinsic::minimum: {
2300 case Intrinsic::maxnum:
2301 case Intrinsic::maximumnum: {
2319 case Intrinsic::minnum:
2320 case Intrinsic::minimumnum: {
2345 Known.knownNot(~DemandedMask);
2358 if (DemandedMask &
fcNan)
2359 SrcDemandedMask |=
fcNan;
2384 Known.knownNot(~DemandedMask);
2398 Type *VTy =
I->getType();
2402 FMF = FPOp->getFastMathFlags();
2406 switch (
I->getOpcode()) {
2407 case Instruction::FNeg: {
2410 Value *FNegSrc =
I->getOperand(0);
2425 Known, FNegFAbsSrc, ThisDemandedMask, KnownSrc, IsNSZ))
2449 Known.knownNot(~DemandedMask);
2452 case Instruction::FAdd:
2453 case Instruction::FSub: {
2457 if (
I->getOperand(0) ==
I->getOperand(1) &&
2458 I->getOpcode() == Instruction::FAdd &&
2465 if (DemandedMask &
fcNan)
2466 SrcDemandedMask |=
fcNan;
2479 if (Mode.inputsMayBePositiveZero() || Mode.outputsMayBePositiveZero())
2498 KnownRHS = KnownLHS;
2503 if (DemandedMask &
fcNan)
2506 if (DemandedMask &
fcInf)
2507 SrcDemandedMask |=
fcInf;
2518 Known =
I->getOpcode() == Instruction::FAdd
2523 Known.knownNot(~DemandedMask);
2530 bool ResultNotNan = (DemandedMask &
fcNan) ==
fcNone;
2533 if (ResultNotNan &&
I->getOpcode() == Instruction::FAdd &&
2535 return I->getOperand(1);
2541 return I->getOperand(0);
2544 FMF,
Known.getKnownFPClasses(), {KnownLHS, KnownRHS});
2545 if (InferredFMF != FMF) {
2546 I->setFastMathFlags(InferredFMF);
2552 case Instruction::FMul: {
2561 if (DemandedMask &
fcInf) {
2567 if (DemandedMask &
fcNan) {
2581 if (DemandedMask &
fcZero)
2593 Known.knownNot(~DemandedMask);
2628 bool NonNanResult = (DemandedMask &
fcNan) ==
fcNone;
2711 Known.knownNot(~DemandedMask);
2718 FMF,
Known.getKnownFPClasses(), {KnownLHS, KnownRHS});
2719 if (InferredFMF != FMF) {
2720 I->setFastMathFlags(InferredFMF);
2726 case Instruction::FDiv: {
2742 Value *IsInfOrZeroOrNan =
Builder.CreateOr(IsInfOrNan, IsZeroOrNan);
2744 return Builder.CreateSelectFMFWithUnknownProfile(
2765 if (DemandedMask &
fcNan) {
2776 if (DemandedMask &
fcZero)
2783 if (DemandedMask &
fcZero) {
2785 "should not have to worry about daz here");
2786 LHSDemandedMask |=
fcZero;
2787 RHSDemandedMask |=
fcInf;
2794 if (DemandedMask &
fcInf) {
2805 bool ResultNotNan = (DemandedMask &
fcNan) ==
fcNone;
2806 bool ResultNotInf = (DemandedMask &
fcInf) ==
fcNone;
2811 bool CanIgnoreZeroByZeroNan =
2820 CanIgnoreZeroByZeroNan) {
2831 if (!ResultNotInf &&
2852 Known.knownNot(~DemandedMask);
2859 FMF,
Known.getKnownFPClasses(), {KnownLHS, KnownRHS});
2860 if (InferredFMF != FMF) {
2861 I->setFastMathFlags(InferredFMF);
2867 case Instruction::FPTrunc:
2870 case Instruction::FPExt: {
2872 if (DemandedMask &
fcNan)
2873 SrcDemandedMask |=
fcNan;
2887 I->getOperand(0)->getType()->getScalarType()->getFltSemantics();
2890 Known.knownNot(~DemandedMask);
2895 case Instruction::Call: {
2899 case Intrinsic::fabs: {
2911 case Intrinsic::arithmetic_fence:
2915 case Intrinsic::copysign: {
2923 if ((DemandedMask &
fcNegative) == DemandedMask) {
2925 CI->
setOperand(1, ConstantFP::get(VTy, -1.0));
2929 if ((DemandedMask &
fcPositive) == DemandedMask) {
2959 CI->
setOperand(1, ConstantFP::get(VTy, -1.0));
2964 Known.knownNot(~DemandedMask);
2967 case Intrinsic::fma:
2968 case Intrinsic::fmuladd: {
2972 if (DemandedMask &
fcNan)
2973 SrcDemandedMask |=
fcNan;
2987 KnownSrc[1] = KnownSrc[0];
2991 for (
int OpIdx = 0; OpIdx != 3; ++OpIdx) {
2993 KnownSrc[OpIdx],
SQ,
Depth + 1))
3004 case Intrinsic::maximum:
3005 case Intrinsic::minimum:
3006 case Intrinsic::maximumnum:
3007 case Intrinsic::minimumnum:
3008 case Intrinsic::maxnum:
3009 case Intrinsic::minnum: {
3010 const bool PropagateNaN =
3011 IID == Intrinsic::maximum || IID == Intrinsic::minimum;
3017 PropagateNaN && ((DemandedMask &
fcNan) ==
fcNone)
3018 ? DemandedMask | ~
fcNan
3049 bool ResultNotLogical0 = (ValidResults & ZeroMask) ==
fcNone;
3058 ((PropagateNaN && (ValidResults &
fcNan) ==
fcNone) ||
3064 if (InferredFMF != FMF) {
3071 case Intrinsic::exp:
3072 case Intrinsic::exp2:
3073 case Intrinsic::exp10: {
3087 if (DemandedMask &
fcNan)
3088 SrcDemandedMask |=
fcNan;
3090 if (DemandedMask &
fcZero) {
3130 return ConstantFP::get(VTy, 1.0);
3145 ConstantFP::get(VTy, 1.0), FMF);
3160 Value *ZeroOrInf =
Builder.CreateSelectFMFWithUnknownProfile(
3166 Known.knownNot(~DemandedMask);
3171 case Intrinsic::log:
3172 case Intrinsic::log2:
3173 case Intrinsic::log10: {
3175 if (DemandedMask &
fcNan)
3176 DemandedSrcMask |=
fcNan;
3182 if (DemandedMask &
fcNan)
3187 DemandedSrcMask |=
fcZero;
3190 if (Mode.inputsMayBeZero())
3198 if (DemandedMask &
fcZero)
3207 Known.knownNot(~DemandedMask);
3212 case Intrinsic::sqrt: {
3216 if (DemandedMask &
fcNan)
3245 Known.knownNot(~DemandedMask);
3262 case Intrinsic::ldexp: {
3264 if (DemandedMask &
fcNan)
3265 SrcDemandedMask |=
fcNan;
3295 Known.knownNot(~DemandedMask);
3300 case Intrinsic::trunc:
3301 case Intrinsic::floor:
3302 case Intrinsic::ceil:
3303 case Intrinsic::rint:
3304 case Intrinsic::nearbyint:
3305 case Intrinsic::round:
3306 case Intrinsic::roundeven: {
3308 if (DemandedMask &
fcNan)
3309 DemandedSrcMask |=
fcNan;
3327 bool IsRoundNearestOrTrunc =
3328 IID == Intrinsic::round || IID == Intrinsic::roundeven ||
3329 IID == Intrinsic::nearbyint || IID == Intrinsic::rint ||
3330 IID == Intrinsic::trunc;
3333 if ((IID == Intrinsic::floor || IsRoundNearestOrTrunc) &&
3337 if ((IID == Intrinsic::ceil || IsRoundNearestOrTrunc) &&
3342 return ConstantFP::get(VTy, -1.0);
3345 return ConstantFP::get(VTy, 1.0);
3348 KnownSrc, IID == Intrinsic::trunc,
3351 Known.knownNot(~DemandedMask);
3358 if ((IID == Intrinsic::trunc || IsRoundNearestOrTrunc) &&
3371 if (InferredFMF != FMF) {
3379 case Intrinsic::fptrunc_round:
3382 case Intrinsic::canonicalize: {
3395 SrcDemandedMask |=
fcSNan;
3424 Known.knownNot(~DemandedMask);
3441 if (InferredFMF != FMF) {
3454 Known.knownNot(~DemandedMask);
3460 case Instruction::Select: {
3467 return I->getOperand(2);
3469 return I->getOperand(1);
3476 Known.knownNot(~DemandedMask);
3479 case Instruction::ExtractElement: {
3483 Known.knownNot(~DemandedMask);
3486 case Instruction::InsertElement: {
3494 Known = KnownVec | KnownInserted;
3495 Known.knownNot(~DemandedMask);
3498 case Instruction::ShuffleVector: {
3506 Known = KnownLHS | KnownRHS;
3507 Known.knownNot(~DemandedMask);
3510 case Instruction::InsertValue: {
3516 Known = KnownAgg | KnownElt;
3519 case Instruction::ExtractValue: {
3525 case Intrinsic::frexp: {
3527 if (DemandedMask &
fcNan)
3528 SrcDemandedMask |=
fcNan;
3547 Known.setKnownFPClasses(
Known.getKnownFPClasses() & DemandedMask);
3555 return II->getArgOperand(0);
3571 case Instruction::PHI: {
3573 if (
Depth >= PhiRecursionLimit)
3581 for (
unsigned I = 0, E =
P->getNumIncomingValues();
I != E; ++
I) {
3591 P,
P->getOperandNumForIncomingValue(
I), DemandedMask, KnownSrc,
3594 P->setIncomingValueForBlock(PredBB,
P->getIncomingValue(
I));
3609 Known.knownNot(~DemandedMask);
3614 Known.knownNot(~DemandedMask);
3629 FMF = FPOp->getFastMathFlags();
3633 switch (
I->getOpcode()) {
3634 case Instruction::Select: {
3640 return I->getOperand(1);
3645 return I->getOperand(2);
3652 Known.knownNot(~DemandedMask);
3655 case Instruction::FNeg: {
3659 Value *FNegSrc =
I->getOperand(0);
3674 Known, Src, ThisDemandedMask, KnownSrc,
false))
3678 case Instruction::Call: {
3682 case Intrinsic::fabs: {
3695 case Intrinsic::copysign: {
3707 Mag, DemandedMask, KnownMag,
false))
3725 case Intrinsic::maxnum:
3726 case Intrinsic::minnum:
3727 case Intrinsic::maximum:
3728 case Intrinsic::minimum:
3729 case Intrinsic::maximumnum:
3730 case Intrinsic::minimumnum: {
3741 KnownLHS, KnownRHS,
F,
3752 Known.knownNot(~DemandedMask);
3764 Use &U =
I->getOperandUse(OpNo);
3766 Type *VTy = V->getType();
3768 if (DemandedMask ==
fcNone) {
3780 Known.knownNot(~DemandedMask);
3796 if (!FoldedToConst || FoldedToConst == V)
3804 Known.knownNot(~DemandedMask);
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
AMDGPU Register Bank Select
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
This file provides internal interfaces used to implement the InstCombine.
static Constant * getFPClassConstant(Type *Ty, FPClassTest Mask, bool IsCanonicalizing=false)
For floating-point classes that resolve to a single bit pattern, return that value.
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
static Value * simplifyDemandedFPClassFabs(KnownFPClass &Known, Value *Src, FPClassTest DemandedMask, KnownFPClass KnownSrc, bool NSZ)
Perform multiple-use aware simplfications for fabs(Src).
static Value * simplifyDemandedUseFPClassFPTrunc(InstCombinerImpl &IC, Instruction &I, FastMathFlags FMF, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &SQ, unsigned Depth)
static Value * simplifyDemandedFPClassFnegFabs(KnownFPClass &Known, Value *Src, FPClassTest DemandedMask, KnownFPClass KnownSrc, bool NSZ)
Perform multiple-use aware simplfications for fneg(fabs(Src)).
static bool ShrinkDemandedConstant(Instruction *I, unsigned OpNo, const APInt &Demanded)
Check to see if the specified operand of the specified instruction is a constant integer.
static Value * simplifyShiftSelectingPackedElement(Instruction *I, const APInt &DemandedMask, InstCombinerImpl &IC, unsigned Depth)
Let N = 2 * M.
static Value * simplifyDemandedFPClassMinMax(KnownFPClass &Known, Intrinsic::ID IID, const CallInst *CI, FPClassTest DemandedMask, KnownFPClass KnownLHS, KnownFPClass KnownRHS, const Function &F, bool NSZ)
static bool canSkipDemandedEltsInInsertChain(InsertElementInst &IE, unsigned VWidth, unsigned DepthLimit)
Return true if the top-level all-lanes demanded-elements query can be skipped for an intermediate ins...
static Value * simplifyDemandedFPClassCopysignMag(Value *MagSrc, FPClassTest DemandedMask, KnownFPClass KnownSrc, bool NSZ)
static FPClassTest adjustDemandedMaskFromFlags(FPClassTest DemandedMask, FastMathFlags FMF)
static FastMathFlags inferFastMathValueFlags(FastMathFlags FMF, FPClassTest ValidResults, ArrayRef< KnownFPClass > Known)
Try to set an inferred no-nans or no-infs in FMF.
static Value * simplifyDemandedFPClassResult(Instruction *FPOp, FastMathFlags FMF, FPClassTest DemandedMask, KnownFPClass &Known, ArrayRef< KnownFPClass > KnownSrcs)
Apply epilog fixups to a floating-point intrinsic.
This file provides the interface for the instcombine pass implementation.
uint64_t IntrinsicInst * II
static cl::opt< RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode > Mode("regalloc-enable-advisor", cl::Hidden, cl::init(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default), cl::desc("Enable regalloc advisor mode"), cl::values(clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default, "default", "Default"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Release, "release", "precompiled"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Development, "development", "for training")))
This file implements the SmallBitVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
static APFloat getOne(const fltSemantics &Sem, bool Negative=false)
Factory for Positive and Negative One.
Class for arbitrary precision integers.
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
void clearBit(unsigned BitPosition)
Set a given bit to 0.
static APInt getSignMask(unsigned BitWidth)
Get the SignMask for a specific bit width.
uint64_t getZExtValue() const
Get zero extended value.
void setHighBits(unsigned hiBits)
Set the top hiBits bits.
unsigned popcount() const
Count the number of bits set.
LLVM_ABI APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
unsigned getActiveBits() const
Compute the number of active bits in the value.
LLVM_ABI APInt trunc(unsigned width) const
Truncate to new width.
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
bool isAllOnes() const
Determine if all bits are set. This is true for zero-width values.
bool isZero() const
Determine if this value is zero, i.e. all bits are clear.
LLVM_ABI APInt urem(const APInt &RHS) const
Unsigned remainder operation.
void setSignBit()
Set the sign bit to 1.
unsigned getBitWidth() const
Return the number of bits in the APInt.
bool ult(const APInt &RHS) const
Unsigned less than comparison.
void clearAllBits()
Set every bit to 0.
unsigned countr_zero() const
Count the number of trailing zero bits.
unsigned countl_zero() const
The APInt version of std::countl_zero.
void clearLowBits(unsigned loBits)
Set bottom loBits bits to 0.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
APInt ashr(unsigned ShiftAmt) const
Arithmetic right-shift function.
APInt shl(unsigned shiftAmt) const
Left-shift function.
bool isSubsetOf(const APInt &RHS) const
This operation checks that all bits set in this APInt are also set in RHS.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet)
Constructs an APInt value that has the bottom loBitsSet bits set.
static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet)
Constructs an APInt value that has the top hiBitsSet bits set.
bool isIntN(unsigned N) const
Check if this APInt has an N-bits unsigned integer value.
bool isOne() const
Determine if this is a value of 1.
APInt lshr(unsigned shiftAmt) const
Logical right-shift function.
bool uge(const APInt &RHS) const
Unsigned greater or equal comparison.
Represent a constant reference to an array (0 or more elements consecutively in memory),...
LLVM Basic Block Representation.
const Instruction * getTerminator() const LLVM_READONLY
Returns the terminator instruction; assumes that the block is well-formed.
BinaryOps getOpcode() const
Value * getArgOperand(unsigned i) const
LLVM_ABI Intrinsic::ID getIntrinsicID() const
Returns the intrinsic ID of the intrinsic called or Intrinsic::not_intrinsic if the called function i...
This class represents a function call, abstracting a target machine's calling convention.
static CallInst * Create(FunctionType *Ty, Value *F, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
This is the base class for all instructions that perform data casts.
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
static LLVM_ABI ConstantFP * getZero(Type *Ty, bool Negative=false)
static LLVM_ABI ConstantFP * getQNaN(Type *Ty, bool Negative=false, APInt *Payload=nullptr)
static LLVM_ABI ConstantFP * getInfinity(Type *Ty, bool Negative=false)
This is the shared class of boolean and integer constants.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
const APInt & getValue() const
Return the constant as an APInt value reference.
static LLVM_ABI Constant * get(ArrayRef< Constant * > V)
This is an important base class in LLVM.
static LLVM_ABI Constant * getIntegerValue(Type *Ty, const APInt &V)
Return the value for an integer or pointer constant, or a vector thereof, with the given scalar value...
bool isNullValue() const
Return true if this is the value that would be returned by getNullValue.
static LLVM_ABI Constant * getAllOnesValue(Type *Ty)
LLVM_ABI bool isOneValue() const
Returns true if the value is one.
static LLVM_ABI Constant * getNullValue(Type *Ty)
Constructor to create a '0' constant of arbitrary type.
LLVM_ABI Constant * getAggregateElement(unsigned Elt) const
For aggregates (struct/array/vector) return the constant that corresponds to the specified element if...
A parsed version of the target data layout string in and methods for querying it.
Convenience struct for specifying and reasoning about fast-math flags.
bool noSignedZeros() const
void setNoSignedZeros(bool B=true)
void setNoNaNs(bool B=true)
void setNoInfs(bool B=true)
an instruction for type-safe pointer arithmetic to access elements of arrays and structs
Value * CreateICmpEQ(Value *LHS, Value *RHS, const Twine &Name="")
LLVM_ABI Value * CreateSelectWithUnknownProfile(Value *C, Value *True, Value *False, StringRef PassName, const Twine &Name="")
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block.
This instruction inserts a single (scalar) element into a VectorType value.
static InsertElementInst * Create(Value *Vec, Value *NewElt, Value *Idx, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
bool SimplifyDemandedInstructionFPClass(Instruction &Inst)
Value * SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &PoisonElts, unsigned Depth=0, bool AllowMultipleUsers=false) override
The specified value produces a vector with any number of elements.
Value * SimplifyDemandedUseFPClass(Instruction *I, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth=0)
Attempts to replace V with a simpler value based on the demanded floating-point classes.
bool SimplifyDemandedBits(Instruction *I, unsigned Op, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0) override
This form of SimplifyDemandedBits simplifies the specified instruction operand if possible,...
std::optional< std::pair< Intrinsic::ID, SmallVector< Value *, 3 > > > convertOrOfShiftsToFunnelShift(Instruction &Or)
Value * SimplifyMultipleUseDemandedFPClass(Instruction *I, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth)
Helper routine of SimplifyDemandedUseFPClass.
const InstCombineCLOptions & CLOpts
Value * simplifyShrShlDemandedBits(Instruction *Shr, const APInt &ShrOp1, Instruction *Shl, const APInt &ShlOp1, const APInt &DemandedMask, KnownBits &Known)
Helper routine of SimplifyDemandedUseBits.
bool SimplifyDemandedFPClass(Instruction *I, unsigned Op, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth=0)
Value * SimplifyDemandedUseBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Attempts to replace I with a simpler value based on the demanded bits.
bool SimplifyDemandedInstructionBits(Instruction &Inst)
Tries to simplify operands to an integer instruction based on its demanded bits.
Value * SimplifyMultipleUseDemandedBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Helper routine of SimplifyDemandedUseBits.
Instruction * replaceInstUsesWith(Instruction &I, Value *V)
A combiner-aware RAUW-like routine.
void replaceUse(Use &U, Value *NewValue)
Replace use and add the previously used value to the worklist.
InstructionWorklist & Worklist
A worklist of the instructions that need to be simplified.
Instruction * InsertNewInstWith(Instruction *New, BasicBlock::iterator Old)
Same as InsertNewInstBefore, but also sets the debug loc.
unsigned ComputeNumSignBits(const Value *Op, const Instruction *CtxI=nullptr, unsigned Depth=0) const
LLVM_ABI std::optional< Value * > targetSimplifyDemandedVectorEltsIntrinsic(IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)
Instruction * replaceOperand(Instruction &I, unsigned OpNum, Value *V)
Replace operand of instruction and add old operand to the worklist.
LLVM_ABI std::optional< Value * > targetSimplifyDemandedUseBitsIntrinsic(IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)
void computeKnownBits(const Value *V, KnownBits &Known, const Instruction *CtxI, unsigned Depth=0) const
LLVM_ABI void dropUBImplyingAttrsAndMetadata(ArrayRef< unsigned > Keep={})
Drop any attributes or metadata that can cause immediate undefined behavior.
LLVM_ABI bool hasNoUnsignedWrap() const LLVM_READONLY
Determine whether the no unsigned wrap flag is set.
LLVM_ABI bool hasNoSignedWrap() const LLVM_READONLY
Determine whether the no signed wrap flag is set.
LLVM_ABI bool isCommutative() const LLVM_READONLY
Return true if the instruction is commutative:
LLVM_ABI void setFastMathFlags(FastMathFlags FMF)
Convenience function for setting multiple fast-math flags on this instruction, which must be an opera...
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
LLVM_ABI void setIsExact(bool b=true)
Set or clear the exact flag on this instruction, which must be an operator which supports this flag.
A wrapper class for inspecting calls to intrinsic functions.
bool hasNoSignedWrap() const
Test whether this operation is known to never undergo signed overflow, aka the nsw property.
bool hasNoUnsignedWrap() const
Test whether this operation is known to never undergo unsigned overflow, aka the nuw property.
static LLVM_ABI PoisonValue * get(Type *T)
Static factory methods - Return an 'poison' object of the specified type.
This class represents the LLVM 'select' instruction.
const Value * getCondition() const
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
bool test(unsigned Idx) const
Returns true if bit Idx is set.
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
The instances of the Type class are immutable: once they are created, they are never changed.
static LLVM_ABI IntegerType * getInt64Ty(LLVMContext &C)
bool isVectorTy() const
True if this is an instance of VectorType.
bool isIntOrIntVectorTy() const
Return true if this is an integer type or a vector of integer types.
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
bool isMultiUnitFPType() const
Returns true if this is a floating-point type that is an unevaluated sum of multiple floating-point u...
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
bool isIEEELikeFPTy() const
Return true if this is a well-behaved IEEE-like type, which has a IEEE compatible layout,...
LLVM_ABI const fltSemantics & getFltSemantics() const
static LLVM_ABI UndefValue * get(Type *T)
Static factory methods - Return an 'undef' object of the specified type.
A Use represents the edge between a Value definition and its users.
void setOperand(unsigned i, Value *Val)
Value * getOperand(unsigned i) const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
bool hasOneUse() const
Return true if there is exactly one use of this value.
iterator_range< user_iterator > users()
bool hasUseList() const
Check if this Value has a use-list.
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
LLVM_ABI void takeName(Value *V)
Transfer the name from V to this value.
Base class of all SIMD vector types.
This class represents zero extension of integer types.
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
LLVM_ABI Function * getOrInsertDeclaration(Module *M, ID id, ArrayRef< Type * > OverloadTys={})
Look up the Function declaration of the intrinsic id in the Module M.
BinaryOp_match< SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true > m_Not(const SrcTy &&Src)
Matches a register not-ed by a G_XOR.
OneUse_match< SubPat > m_OneUse(const SubPat &SP)
cst_pred_ty< is_lowbit_mask > m_LowBitMask()
Match an integer or vector with only the low bit(s) set.
PtrAdd_match< PointerOpTy, OffsetOpTy > m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp)
Matches GEP with i8 source element type.
BinaryOp_match< LHS, RHS, Instruction::Add > m_Add(const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::AShr > m_AShr(const LHS &L, const RHS &R)
auto m_Poison()
Match an arbitrary poison constant.
ap_match< APInt > m_APInt(const APInt *&Res)
Match a ConstantInt or splatted ConstantVector, binding the specified pointer to the contained APInt.
specific_intval< false > m_SpecificInt(const APInt &V)
Match a specific integer value or vector with all elements equal to the value.
bool match(Val *V, const Pattern &P)
specificval_ty m_Specific(const Value *V)
Match if we have a specific specified value.
BinOpPred_match< LHS, RHS, is_right_shift_op > m_Shr(const LHS &L, const RHS &R)
Matches logical shift operations.
TwoOps_match< Val_t, Idx_t, Instruction::ExtractElement > m_ExtractElt(const Val_t &Val, const Idx_t &Idx)
Matches ExtractElementInst.
auto m_BinOp()
Match an arbitrary binary operation and ignore it.
ExtractValue_match< Ind, Val_t > m_ExtractValue(const Val_t &V)
Match a single index ExtractValue instruction.
auto m_Value()
Match an arbitrary value and ignore it.
auto m_Ctpop(const Opnd0 &Op0)
BinaryOp_match< LHS, RHS, Instruction::Mul > m_Mul(const LHS &L, const RHS &R)
TwoOps_match< V1_t, V2_t, Instruction::ShuffleVector > m_Shuffle(const V1_t &v1, const V2_t &v2)
Matches ShuffleVectorInst independently of mask value.
CastInst_match< OpTy, ZExtInst > m_ZExt(const OpTy &Op)
Matches ZExt.
match_immconstant_ty m_ImmConstant()
Match an arbitrary immediate Constant and ignore it.
DisjointOr_match< LHS, RHS, true > m_c_DisjointOr(const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Add, true > m_c_Add(const LHS &L, const RHS &R)
Matches a Add with LHS and RHS in either order.
auto m_Intrinsic(const Ts &...Ops)
Match intrinsic calls like this: m_Intrinsic<Intrinsic::fabs>(m_Value(X))
auto m_FAbs(const Opnd0 &Op0)
AnyBinaryOp_match< LHS, RHS, true > m_c_BinOp(const LHS &L, const RHS &R)
Matches a BinaryOperator with LHS and RHS in either order.
BinaryOp_match< LHS, RHS, Instruction::LShr > m_LShr(const LHS &L, const RHS &R)
CmpClass_match< LHS, RHS, ICmpInst > m_ICmp(CmpPredicate &Pred, const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Shl > m_Shl(const LHS &L, const RHS &R)
auto m_Undef()
Match an arbitrary undef constant.
CastInst_match< OpTy, SExtInst > m_SExt(const OpTy &Op)
Matches SExt.
is_zero m_Zero()
Match any null constant or a vector with all elements equal to 0.
auto m_ConstantInt()
Match an arbitrary ConstantInt and ignore it.
This is an optimization pass for GlobalISel generic memory operations.
LLVM_ABI bool haveNoCommonBitsSet(const WithCache< const Value * > &LHSCache, const WithCache< const Value * > &RHSCache, const SimplifyQuery &SQ)
Return true if LHS and RHS have no common bits set.
LLVM_ABI KnownFPClass computeKnownFPClass(const Value *V, const APInt &DemandedElts, FPClassTest InterestedClasses, const SimplifyQuery &SQ, unsigned Depth=0)
Determine which floating-point classes are valid for V, and return them in KnownFPClass bit sets.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
LLVM_ABI void computeKnownBitsFromContext(const Value *V, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Merge bits known from context-dependent facts into Known.
@ Known
Known to have no common set bits.
@ Undef
Value of the register doesn't matter.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
int countr_one(T Value)
Count the number of ones from the least significant bit to the first zero bit.
LLVM_ABI void salvageDebugInfo(const MachineRegisterInfo &MRI, MachineInstr &MI)
Assuming the instruction MI is going to be deleted, attempt to salvage debug users of MI by writing t...
LLVM_ABI void computeKnownBits(const Value *V, KnownBits &Known, const DataLayout &DL, AssumptionCache *AC=nullptr, const Instruction *CtxI=nullptr, const DominatorTree *DT=nullptr, bool UseInstrInfo=true, unsigned Depth=0)
Determine which bits of V are known to be either zero or one and return them in the KnownZero/KnownOn...
constexpr T alignDown(U Value, V Align, W Skew=0)
Returns the largest unsigned integer less than or equal to Value and is Skew mod Align.
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
gep_type_iterator gep_type_end(const User *GEP)
constexpr auto equal_to(T &&Arg)
Functor variant of std::equal_to that can be used as a UnaryPredicate in functional algorithms like a...
LLVM_ABI bool isGuaranteedNotToBeUndef(const Value *V, AssumptionCache *AC=nullptr, const Instruction *CtxI=nullptr, const DominatorTree *DT=nullptr, unsigned Depth=0)
Returns true if V cannot be undef, but may be poison.
LLVM_ABI bool cannotOrderStrictlyLess(FPClassTest LHS, FPClassTest RHS, bool OrderedZeroSign=false)
Returns true if all values in LHS must be greater than or equal to those in RHS.
LLVM_ABI bool cannotOrderStrictlyGreater(FPClassTest LHS, FPClassTest RHS, bool OrderedZeroSign=false)
Returns true if all values in LHS must be less than or equal to those in RHS.
constexpr unsigned MaxAnalysisRecursionDepth
LLVM_ABI void adjustKnownBitsForSelectArm(KnownBits &Known, Value *Cond, Value *Arm, bool Invert, const SimplifyQuery &Q, unsigned Depth=0)
Adjust Known for the given select Arm to include information from the select Cond.
LLVM_ABI FPClassTest fneg(FPClassTest Mask)
Return the test mask which returns true if the value's sign bit is flipped.
FPClassTest
Floating-point class tests, supported by 'is_fpclass' intrinsic.
LLVM_ABI void adjustKnownFPClassForSelectArm(KnownFPClass &Known, Value *Cond, Value *Arm, bool Invert, const SimplifyQuery &Q, unsigned Depth=0)
Adjust Known for the given select Arm to include information from the select Cond.
LLVM_ABI FPClassTest inverse_fabs(FPClassTest Mask)
Return the test mask which returns true after fabs is applied to the value.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI Constant * ConstantFoldBinaryOpOperands(unsigned Opcode, Constant *LHS, Constant *RHS, const DataLayout &DL)
Attempt to constant fold a binary operation with the specified operands.
constexpr int PoisonMaskElem
LLVM_ABI raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
@ First
Helpers to iterate all locations in the MemoryEffectsBase class.
@ Mul
Product of integers.
@ Xor
Bitwise or logical XOR of integers.
LLVM_ABI FPClassTest unknown_sign(FPClassTest Mask)
Return the test mask which returns true if the value could have the same set of classes,...
DWARFExpression::Operation Op
constexpr unsigned BitWidth
LLVM_ABI KnownBits analyzeKnownBitsFromAndXorOr(const Operator *I, const KnownBits &KnownLHS, const KnownBits &KnownRHS, const SimplifyQuery &SQ, unsigned Depth=0)
Using KnownBits LHS/RHS produce the known bits for logic op (and/xor/or).
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
gep_type_iterator gep_type_begin(const User *GEP)
unsigned Log2(Align A)
Returns the log2 of the alignment.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Represent subnormal handling kind for floating point instruction inputs and outputs.
static constexpr DenormalMode getPreserveSign()
static constexpr DenormalMode getIEEE()
static KnownBits makeConstant(const APInt &C)
Create known bits from a known constant.
KnownBits anyextOrTrunc(unsigned BitWidth) const
Return known bits for an "any" extension or truncation of the value we're tracking.
bool isNonNegative() const
Returns true if this value is known to be non-negative.
void makeNonNegative()
Make this value non-negative.
static LLVM_ABI KnownBits ashr(const KnownBits &LHS, const KnownBits &RHS, bool ShAmtNonZero=false, bool Exact=false)
Compute known bits for ashr(LHS, RHS).
unsigned getBitWidth() const
Get the bit width of this value.
static KnownBits add(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false, bool SelfAdd=false)
Compute knownbits resulting from addition of LHS and RHS.
KnownBits sext(unsigned BitWidth) const
Return known bits for a sign extension of the value we're tracking.
KnownBits zextOrTrunc(unsigned BitWidth) const
Return known bits for a zero extension or truncation of the value we're tracking.
APInt getMaxValue() const
Return the maximal unsigned value possible given these KnownBits.
static LLVM_ABI KnownBits srem(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits for srem(LHS, RHS).
static LLVM_ABI KnownBits udiv(const KnownBits &LHS, const KnownBits &RHS, bool Exact=false)
Compute known bits for udiv(LHS, RHS).
bool isNegative() const
Returns true if this value is known to be negative.
static KnownBits sub(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from subtraction of LHS and RHS.
static LLVM_ABI KnownBits shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW=false, bool NSW=false, bool ShAmtNonZero=false)
Compute known bits for shl(LHS, RHS).
bool isKnownNeverInfOrNaN() const
Return true if it's known this can never be an infinity or nan.
bool isKnownNeverInfinity() const
Return true if it's known this can never be an infinity.
static constexpr FPClassTest OrderedGreaterThanZeroMask
static constexpr FPClassTest OrderedLessThanZeroMask
void knownNot(FPClassTest RuleOut)
static LLVM_ABI KnownFPClass fmul(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fmul.
static LLVM_ABI KnownFPClass fadd_self(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fadd x, x.
void copysign(const KnownFPClass &Sign)
static KnownFPClass square(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
static LLVM_ABI KnownFPClass fsub(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fsub.
bool isKnownNeverSubnormal() const
Return true if it's known this can never be a subnormal.
bool isKnownAlways(FPClassTest Mask) const
static LLVM_ABI KnownFPClass canonicalize(const KnownFPClass &Src, DenormalMode DenormMode=DenormalMode::getDynamic())
Apply the canonicalize intrinsic to this value.
LLVM_ABI bool isKnownNeverLogicalZero(DenormalMode Mode) const
Return true if it's known this can never be interpreted as a zero.
static LLVM_ABI KnownFPClass log(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for log/log2/log10.
static LLVM_ABI KnownFPClass fdiv(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fdiv.
static LLVM_ABI KnownFPClass roundToIntegral(const KnownFPClass &Src, bool IsTrunc, bool IsMultiUnitFPType)
Propagate known class for rounding intrinsics (trunc, floor, ceil, rint, nearbyint,...
static LLVM_ABI KnownFPClass minMaxLike(const KnownFPClass &LHS, const KnownFPClass &RHS, MinMaxKind Kind, DenormalMode DenormMode=DenormalMode::getDynamic())
KnownFPClass intersectWith(const KnownFPClass &RHS) const
static LLVM_ABI KnownFPClass exp(const KnownFPClass &Src)
Report known values for exp, exp2 and exp10.
static LLVM_ABI KnownFPClass frexp_mant(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for mantissa component of frexp.
bool isKnownNeverNaN() const
Return true if it's known this can never be a nan.
bool isKnownNever(FPClassTest Mask) const
Return true if it's known this can never be one of the mask entries.
std::optional< bool > getSignBit() const
std::nullopt if the sign bit is unknown, true if the sign bit is definitely set or false if the sign ...
static LLVM_ABI KnownFPClass fpext(const KnownFPClass &KnownSrc, const fltSemantics &DstTy, const fltSemantics &SrcTy)
Propagate known class for fpext.
FPClassTest getKnownFPClasses() const
Floating-point classes the value could be one of.
static LLVM_ABI KnownFPClass fma(const KnownFPClass &LHS, const KnownFPClass &RHS, const KnownFPClass &Addend, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fma.
static LLVM_ABI KnownFPClass fptrunc(const KnownFPClass &KnownSrc)
Propagate known class for fptrunc.
static LLVM_ABI KnownFPClass sqrt(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for sqrt.
LLVM_ABI bool isKnownNeverLogicalPosZero(DenormalMode Mode) const
Return true if it's known this can never be interpreted as a positive zero.
bool cannotBeOrderedGreaterEqZero(DenormalMode Mode) const
Return true if it's know this can never be a negative value or a logical 0.
static LLVM_ABI KnownFPClass fadd(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fadd.
LLVM_ABI bool isKnownNeverLogicalNegZero(DenormalMode Mode) const
Return true if it's known this can never be interpreted as a negative zero.
static LLVM_ABI KnownFPClass fma_square(const KnownFPClass &Squared, const KnownFPClass &Addend, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fma squared, squared, addend.
static LLVM_ABI KnownFPClass ldexp(const KnownFPClass &Src, const APInt &ConstantRangeMin, const APInt &ConstantRangeMax, const fltSemantics &Flt, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for ldexp, assuming the exponent is known to be within [ConstantRangeMin,...
SimplifyQuery getWithInstruction(const Instruction *I) const