LLVM  16.0.0git
LoongArchISelLowering.h
Go to the documentation of this file.
1 //=- LoongArchISelLowering.h - LoongArch DAG Lowering Interface -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the interfaces that LoongArch uses to lower LLVM code into
10 // a selection DAG.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELLOWERING_H
15 #define LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELLOWERING_H
16 
17 #include "LoongArch.h"
21 
22 namespace llvm {
23 class LoongArchSubtarget;
24 struct LoongArchRegisterInfo;
25 namespace LoongArchISD {
26 enum NodeType : unsigned {
28 
29  // TODO: add more LoongArchISDs
31  RET,
32  // 32-bit shifts, directly matching the semantics of the named LoongArch
33  // instructions.
37 
40 
41  // FPR<->GPR transfer operations
44 
46 
47  // Bit counting operations
50 
53 
54  // Byte-swapping and bit-reversal
59 };
60 } // end namespace LoongArchISD
61 
63  const LoongArchSubtarget &Subtarget;
64 
65 public:
67  const LoongArchSubtarget &STI);
68 
69  const LoongArchSubtarget &getSubtarget() const { return Subtarget; }
70 
71  bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
72 
73  // Provide custom lowering hooks for some operations.
74  SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
76  SelectionDAG &DAG) const override;
77 
78  SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
79 
80  // This method returns the name of a target specific DAG node.
81  const char *getTargetNodeName(unsigned Opcode) const override;
82 
83  // Lower incoming arguments, copy physregs into vregs.
85  bool IsVarArg,
87  const SDLoc &DL, SelectionDAG &DAG,
88  SmallVectorImpl<SDValue> &InVals) const override;
90  bool IsVarArg,
92  LLVMContext &Context) const override;
93  SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
95  const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
96  SelectionDAG &DAG) const override;
98  SmallVectorImpl<SDValue> &InVals) const override;
99  bool isCheapToSpeculateCttz() const override;
100  bool isCheapToSpeculateCtlz() const override;
101 
102 private:
103  /// Target-specific function used to lower LoongArch calling conventions.
104  typedef bool LoongArchCCAssignFn(const DataLayout &DL, LoongArchABI::ABI ABI,
105  unsigned ValNo, MVT ValVT,
106  CCValAssign::LocInfo LocInfo,
107  ISD::ArgFlagsTy ArgFlags, CCState &State,
108  bool IsFixed, bool IsReg, Type *OrigTy);
109 
110  void analyzeInputArgs(MachineFunction &MF, CCState &CCInfo,
111  const SmallVectorImpl<ISD::InputArg> &Ins, bool IsRet,
112  LoongArchCCAssignFn Fn) const;
113  void analyzeOutputArgs(MachineFunction &MF, CCState &CCInfo,
115  bool IsRet, CallLoweringInfo *CLI,
116  LoongArchCCAssignFn Fn) const;
117 
118  SDValue lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
119  SDValue lowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const;
120  SDValue lowerShiftRightParts(SDValue Op, SelectionDAG &DAG, bool IsSRA) const;
121 
123  EmitInstrWithCustomInserter(MachineInstr &MI,
124  MachineBasicBlock *BB) const override;
125  SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
126  SDValue lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const;
127  SDValue lowerBITCAST(SDValue Op, SelectionDAG &DAG) const;
128  SDValue lowerUINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
129  SDValue lowerVASTART(SDValue Op, SelectionDAG &DAG) const;
130 
131  bool isFPImmLegal(const APFloat &Imm, EVT VT,
132  bool ForCodeSize) const override;
133 
134  bool shouldInsertFencesForAtomic(const Instruction *I) const override {
135  return isa<LoadInst>(I) || isa<StoreInst>(I);
136  }
137 };
138 
139 } // end namespace llvm
140 
141 #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELLOWERING_H
llvm::LoongArchTargetLowering::LowerOperation
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override
This callback is invoked for operations that are unsupported by the target, which are registered to u...
Definition: LoongArchISelLowering.cpp:147
llvm::LoongArchISD::SRA_W
@ SRA_W
Definition: LoongArchISelLowering.h:35
ABI
Generic address nodes are lowered to some combination of target independent and machine specific ABI
Definition: Relocation.txt:34
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::LoongArchTargetLowering::getTargetNodeName
const char * getTargetNodeName(unsigned Opcode) const override
This method returns the name of a target specific DAG node.
Definition: LoongArchISelLowering.cpp:954
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1094
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::CCState
CCState - This class holds information needed while lowering arguments and return values.
Definition: CallingConvLower.h:189
llvm::LoongArchTargetLowering::isCheapToSpeculateCttz
bool isCheapToSpeculateCttz() const override
Return true if it is cheap to speculate a call to intrinsic cttz.
Definition: LoongArchISelLowering.cpp:1719
llvm::LoongArchISD::MOVGR2FR_W_LA64
@ MOVGR2FR_W_LA64
Definition: LoongArchISelLowering.h:42
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:458
llvm::LoongArchISD::BITREV_W
@ BITREV_W
Definition: LoongArchISelLowering.h:58
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
llvm::LoongArchISD::FIRST_NUMBER
@ FIRST_NUMBER
Definition: LoongArchISelLowering.h:27
Results
Function Alias Analysis Results
Definition: AliasAnalysis.cpp:794
llvm::LoongArchISD::SLL_W
@ SLL_W
Definition: LoongArchISelLowering.h:34
llvm::LoongArchTargetLowering::LoongArchTargetLowering
LoongArchTargetLowering(const TargetMachine &TM, const LoongArchSubtarget &STI)
Definition: LoongArchISelLowering.cpp:35
SelectionDAG.h
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
TargetLowering.h
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:220
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:34
llvm::LoongArchISD::REVB_2H
@ REVB_2H
Definition: LoongArchISelLowering.h:55
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3417
llvm::LoongArchTargetLowering::ReplaceNodeResults
void ReplaceNodeResults(SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG) const override
This callback is invoked when a node result type is illegal for the target, and the operation was reg...
Definition: LoongArchISelLowering.cpp:423
llvm::Instruction
Definition: Instruction.h:42
llvm::LoongArchISD::FTINT
@ FTINT
Definition: LoongArchISelLowering.h:45
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::LoongArchTargetLowering::LowerCall
SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl< SDValue > &InVals) const override
This hook must be implemented to lower calls into the specified DAG.
Definition: LoongArchISelLowering.cpp:1445
llvm::LoongArchTargetLowering::LowerReturn
SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl< ISD::OutputArg > &Outs, const SmallVectorImpl< SDValue > &OutVals, const SDLoc &DL, SelectionDAG &DAG) const override
This hook must be implemented to lower outgoing return values, described by the Outs array,...
Definition: LoongArchISelLowering.cpp:1667
llvm::APFloat
Definition: APFloat.h:701
llvm::CCValAssign::LocInfo
LocInfo
Definition: CallingConvLower.h:33
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
llvm::LoongArchSubtarget
Definition: LoongArchSubtarget.h:32
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
llvm::LoongArchTargetLowering::LowerFormalArguments
SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl< ISD::InputArg > &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) const override
This hook must be implemented to lower the incoming (formal) arguments, described by the Ins array,...
Definition: LoongArchISelLowering.cpp:1316
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::LoongArchTargetLowering::isCheapToSpeculateCtlz
bool isCheapToSpeculateCtlz() const override
Return true if it is cheap to speculate a call to intrinsic ctlz.
Definition: LoongArchISelLowering.cpp:1721
llvm::LoongArchISD::ROTR_W
@ ROTR_W
Definition: LoongArchISelLowering.h:39
llvm::LoongArchISD::ROTL_W
@ ROTL_W
Definition: LoongArchISelLowering.h:38
llvm::TargetLowering::CallLoweringInfo
This structure contains all information that is necessary for lowering calls.
Definition: TargetLowering.h:4030
llvm::LoongArchABI::ABI
ABI
Definition: LoongArchBaseInfo.h:26
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
llvm::LoongArchTargetLowering::PerformDAGCombine
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override
This method will be invoked for all target nodes and for any target-independent nodes that the target...
Definition: LoongArchISelLowering.cpp:868
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::LoongArchISD::CALL
@ CALL
Definition: LoongArchISelLowering.h:30
llvm::LoongArchTargetLowering
Definition: LoongArchISelLowering.h:62
llvm::MachineFunction
Definition: MachineFunction.h:257
LoongArch.h
llvm::ISD::ArgFlagsTy
Definition: TargetCallingConv.h:27
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1307
llvm::LoongArchISD::RET
@ RET
Definition: LoongArchISelLowering.h:31
llvm::LoongArchTargetLowering::isOffsetFoldingLegal
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override
Return true if folding a constant offset with the given GlobalAddress is legal.
Definition: LoongArchISelLowering.cpp:138
llvm::GlobalAddressSDNode
Definition: SelectionDAGNodes.h:1742
llvm::LoongArchISD::NodeType
NodeType
Definition: LoongArchISelLowering.h:26
CallingConvLower.h
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::LoongArchISD::BSTRPICK
@ BSTRPICK
Definition: LoongArchISelLowering.h:52
llvm::LoongArchISD::CTZ_W
@ CTZ_W
Definition: LoongArchISelLowering.h:49
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:141
llvm::LoongArchISD::SRL_W
@ SRL_W
Definition: LoongArchISelLowering.h:36
llvm::LoongArchTargetLowering::getSubtarget
const LoongArchSubtarget & getSubtarget() const
Definition: LoongArchISelLowering.h:69
llvm::RISCVMatInt::Imm
@ Imm
Definition: RISCVMatInt.h:23
N
#define N
llvm::LoongArchISD::BSTRINS
@ BSTRINS
Definition: LoongArchISelLowering.h:51
llvm::MipsISD::Ins
@ Ins
Definition: MipsISelLowering.h:160
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::LoongArchISD::REVB_2W
@ REVB_2W
Definition: LoongArchISelLowering.h:56
llvm::LoongArchISD::BITREV_4B
@ BITREV_4B
Definition: LoongArchISelLowering.h:57
llvm::LoongArchISD::MOVFR2GR_S_LA64
@ MOVFR2GR_S_LA64
Definition: LoongArchISelLowering.h:43
llvm::LoongArchTargetLowering::CanLowerReturn
bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, const SmallVectorImpl< ISD::OutputArg > &Outs, LLVMContext &Context) const override
This hook should be implemented to check whether the return values described by the Outs array can fi...
Definition: LoongArchISelLowering.cpp:1650
llvm::LoongArchISD::CLZ_W
@ CLZ_W
Definition: LoongArchISelLowering.h:48