13#ifndef LLVM_CODEGEN_SDPATTERNMATCH_H
14#define LLVM_CODEGEN_SDPATTERNMATCH_H
31template <
typename Pattern>
36template <
typename Pattern>
73template <
unsigned ResNo,
typename Pattern>
104template <
typename... Preds>
struct And {
108template <
typename Pred,
typename... Preds>
109struct And<Pred, Preds...> :
And<Preds...> {
111 And(
const Pred &p,
const Preds &...preds) :
And<Preds...>(preds...),
P(p) {}
116template <
typename... Preds>
struct Or {
120template <
typename Pred,
typename... Preds>
121struct Or<Pred, Preds...> :
Or<Preds...> {
123 Or(
const Pred &p,
const Preds &...preds) :
Or<Preds...>(preds...),
P(p) {}
128template <
typename Pred>
struct Not {
143template <
typename... Preds>
And<Preds...>
m_AllOf(
const Preds &...preds) {
144 return And<Preds...>(preds...);
147template <
typename... Preds>
Or<Preds...>
m_AnyOf(
const Preds &...preds) {
148 return Or<Preds...>(preds...);
151template <
typename... Preds>
auto m_NoneOf(
const Preds &...preds) {
174 return P.match(
N) &&
N->hasNUsesOfValue(NumUses,
N.getResNo());
178template <
typename Pattern>
182template <
unsigned N,
typename Pattern>
207template <
typename PredPattern>
223template <
typename PredFuncT,
typename Pattern>
228template <
typename Pattern>
232 N->getOpcode(),
N.getValueType());
251template <
typename Pattern>
272template <
typename PredFuncT,
typename Pattern>
277template <
typename Pattern>
289template <
typename Pattern>
300template <
typename Pattern>
303 return VT.isVector() &&
304 VT.getVectorElementType() == RefVT;
310 return VT.isVector() &&
311 VT.getVectorElementType() == RefVT;
360template <
typename Pattern>
373 return N->getNumOperands() == OpIdx;
377template <
unsigned OpIdx,
typename OpndPred,
typename... OpndPreds>
386 if (OpIdx < N->getNumOperands())
387 return P.match(
N->getOperand(OpIdx)) &&
395template <
typename... OpndPreds>
396auto m_Node(
unsigned Opcode,
const OpndPreds &...preds) {
410 if (
Size != 0 &&
N->getOperand(
Size - 1).getValueType() == MVT::Glue)
413 if (
Size != 0 &&
N->getOperand(0).getValueType() == MVT::Other) {
422template <
typename T0_P,
typename T1_P,
typename T2_P,
bool Commutable =
false,
423 bool ExcludeChain =
false>
483template <
typename T0_P,
typename T1_P>
491template <
typename T0_P,
typename T1_P>
492inline TernaryOpc_match<T0_P, T1_P, CondCode_match>
499template <
typename T0_P,
typename T1_P>
500inline TernaryOpc_match<T0_P, T1_P, CondCode_match>
508template <
typename T0_P,
typename T1_P>
509inline TernaryOpc_match<T0_P, T1_P, CondCode_match, true, false>
517template <
typename T0_P,
typename T1_P>
518inline TernaryOpc_match<T0_P, T1_P, CondCode_match, true, false>
526template <
typename T0_P,
typename T1_P>
527inline TernaryOpc_match<T0_P, T1_P, CondCode_match, true, false>
533template <
typename T0_P,
typename T1_P,
typename T2_P>
534inline TernaryOpc_match<T0_P, T1_P, T2_P>
539template <
typename T0_P,
typename T1_P,
typename T2_P>
540inline TernaryOpc_match<T0_P, T1_P, T2_P>
545template <
typename T0_P,
typename T1_P,
typename T2_P>
550template <
typename T0_P,
typename T1_P,
typename T2_P>
551inline Result_match<0, TernaryOpc_match<T0_P, T1_P, T2_P>>
557template <
typename T0_P,
typename T1_P,
typename T2_P>
558inline TernaryOpc_match<T0_P, T1_P, T2_P>
564template <
typename LHS,
typename RHS,
typename IDX>
565inline TernaryOpc_match<LHS, RHS, IDX>
570template <
typename T0_P,
typename T1_P,
typename T2_P>
571inline TernaryOpc_match<T0_P, T1_P, T2_P>
577template <
typename T0_P,
typename T1_P,
typename T2_P>
578inline TernaryOpc_match<T0_P, T1_P, T2_P>
583template <
typename T0_P,
typename T1_P,
typename T2_P>
584inline TernaryOpc_match<T0_P, T1_P, T2_P, true>
590template <
typename LTy,
typename RTy,
typename TTy,
typename FTy>
591inline auto m_SelectCC(
const LTy &L,
const RTy &R,
const TTy &
T,
const FTy &
F) {
597template <
typename LTy,
typename RTy,
typename TTy,
typename FTy>
599 const TTy &
T,
const FTy &
F) {
604template <
typename LTy,
typename RTy,
typename TTy,
typename FTy>
606 const TTy &
T,
const FTy &
F) {
611template <
typename LTy,
typename RTy,
typename TTy,
typename FTy>
619template <
typename LTy,
typename RTy,
typename TTy,
typename FTy>
621 const TTy &
T,
const FTy &
F) {
626template <
typename LTy,
typename RTy,
typename TTy,
typename FTy>
628 const TTy &
T,
const FTy &
F) {
634template <
typename LHS_P,
typename RHS_P,
bool Commutable =
false,
635 bool ExcludeChain =
false>
673 return Op1.match(
I->getOperand(0)) &&
Op2.match(
I->getOperand(1)) &&
674 Mask.match(
I->getMask());
694template <
typename LHS_P,
typename RHS_P,
typename Pred_t,
695 bool Commutable =
false>
706 if ((TrueValue != L || FalseValue != R) &&
707 (TrueValue != R || FalseValue != L))
711 TrueValue == L ? CC : getSetCCInverse(CC, L.getValueType());
712 if (!Pred_t::match(
Cond))
715 return (
LHS.match(L) &&
RHS.match(R)) ||
716 (Commutable &&
LHS.match(R) &&
RHS.match(L));
720 assert(
N.getNumOperands() == 3);
722 SDValue TrueValue =
N.getOperand(1);
723 SDValue FalseValue =
N.getOperand(2);
730 return MatchMinMax(L, R, TrueValue, FalseValue, CC);
735 assert(
N.getNumOperands() == 5);
738 SDValue TrueValue =
N.getOperand(2);
739 SDValue FalseValue =
N.getOperand(3);
741 return MatchMinMax(L, R, TrueValue, FalseValue, CC);
776template <
typename LHS,
typename RHS>
782template <
typename LHS,
typename RHS>
789template <
typename LHS,
typename RHS>
794template <
typename LHS,
typename RHS>
801template <
typename LHS,
typename RHS>
806template <
typename LHS,
typename RHS>
812template <
typename LHS,
typename RHS>
818template <
typename LHS,
typename RHS>
823template <
typename LHS,
typename RHS>
828template <
typename LHS,
typename RHS>
833template <
typename LHS,
typename RHS>
838template <
typename LHS,
typename RHS>
844template <
typename LHS,
typename RHS>
849template <
typename LHS,
typename RHS>
854template <
typename LHS,
typename RHS>
859template <
typename LHS,
typename RHS>
864template <
typename LHS,
typename RHS>
869template <
unsigned Opc,
typename Pred,
typename LHS,
typename RHS>
875template <
typename LHS,
typename RHS>
880template <
typename LHS,
typename RHS>
885template <
typename LHS,
typename RHS>
890template <
typename LHS,
typename RHS>
895template <
typename LHS,
typename RHS>
900template <
typename LHS,
typename RHS>
905template <
typename LHS,
typename RHS>
910template <
typename LHS,
typename RHS>
915template <
typename LHS,
typename RHS>
919template <
typename LHS,
typename RHS>
924template <
typename LHS,
typename RHS>
928template <
typename LHS,
typename RHS>
933template <
typename LHS,
typename RHS>
938template <
typename LHS,
typename RHS>
942template <
typename LHS,
typename RHS>
946template <
typename LHS,
typename RHS>
952template <
typename LHS,
typename RHS>
957template <
typename LHS,
typename RHS>
962template <
typename T0_P,
typename T1_P,
typename T2_P>
963inline TernaryOpc_match<T0_P, T1_P, T2_P>
964m_FShL(
const T0_P &Op0,
const T1_P &Op1,
const T2_P &Op2) {
968template <
typename T0_P,
typename T1_P,
typename T2_P>
969inline TernaryOpc_match<T0_P, T1_P, T2_P>
970m_FShR(
const T0_P &Op0,
const T1_P &Op1,
const T2_P &Op2) {
974template <
typename T0_P,
typename T1_P,
typename T2_P,
bool Left>
988 if (BitWidthBits > SumWidth)
991 return ShlV.
zext(SumWidth) + SrlV.
zext(SumWidth) ==
996 return Op0.match(
X) &&
Op1.match(
Y) &&
Op2.match(Z);
1014template <
typename T0_P,
typename T1_P,
typename T2_P>
1015inline FunnelShiftLike_match<T0_P, T1_P, T2_P, true>
1020template <
typename T0_P,
typename T1_P,
typename T2_P>
1021inline FunnelShiftLike_match<T0_P, T1_P, T2_P, false>
1026template <
typename LHS,
typename RHS>
1031template <
typename LHS,
typename RHS>
1036template <
typename LHS,
typename RHS>
1041template <
typename LHS,
typename RHS>
1046template <
typename LHS,
typename RHS>
1051template <
typename LHS,
typename RHS>
1056template <
typename V1_t,
typename V2_t>
1061template <
typename V1_t,
typename V2_t,
typename Mask_t>
1062inline SDShuffle_match<V1_t, V2_t, Mask_t>
1067template <
typename LHS,
typename RHS>
1072template <
typename LHS,
typename RHS>
1101template <
typename Opnd>
1105template <
typename Opnd>
1115template <
typename Opnd>
1120template <
typename Opnd>
1129template <
typename Opnd>
1134template <
typename Opnd>
inline auto m_SExt(
const Opnd &
Op) {
1146template <
typename Opnd>
inline auto m_Abs(
const Opnd &
Op) {
1173template <
typename Opnd>
1180template <
typename Opnd>
1213template <
typename Opnd>
1242 static_assert(
sizeof(
T) == 8,
"T must be 64 bits wide");
1253 if constexpr (std::is_signed_v<T>) {
1254 if (std::optional<int64_t> TrySExt = V.trySExtValue()) {
1260 if constexpr (std::is_unsigned_v<T>) {
1261 if (std::optional<uint64_t> TryZExt = V.tryZExtValue()) {
1289template <
typename T0_P,
typename T1_P,
typename T2_P,
bool Left>
1293 APInt ShlConst, SrlConst;
1331 return CFP->isExactlyValue(
Val);
1396 auto Res =
DAG.isBoolConstant(
N);
1410template <
typename ValTy>
1416template <
typename ValTy>
1421template <
unsigned IntrinsicId,
typename... OpndPreds>
1437 return LHS->getAPIntValue() == -
RHS->getAPIntValue();
1452 std::tuple_size_v<std::tuple<PatternTs...>>;
1464 std::array<SDValue, NumPatterns> Leaves;
1465 size_t LeavesIdx = 0;
1471 [&](
auto &...
P) ->
bool {
1478 std::size_t &LeafIdx) {
1480 for (
size_t I = 0,
N = V->getNumOperands();
I <
N;
I++)
1485 Leaves[LeafIdx] = V;
1492 template <
typename PatternHd,
typename... PatternTl>
1493 [[nodiscard]]
inline bool
1495 PatternHd &HeadPattern,
1496 PatternTl &...TailPatterns) {
1497 for (
size_t Match = 0,
N = Used.size(); Match <
N; Match++) {
1498 if (Used[Match] || !(
sd_match(Leaves[Match], HeadPattern)))
1508 [[nodiscard]]
inline bool
1515template <
typename... PatternTs>
1516inline ReassociatableOpc_match<PatternTs...>
1521template <
typename... PatternTs>
1522inline ReassociatableOpc_match<PatternTs...>
1527template <
typename... PatternTs>
1528inline ReassociatableOpc_match<PatternTs...>
1533template <
typename... PatternTs>
1534inline ReassociatableOpc_match<PatternTs...>
1539template <
typename... PatternTs>
1540inline ReassociatableOpc_match<PatternTs...>
1546template <
typename... PatternTs>
1547inline ReassociatableOpc_match<PatternTs...>
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file implements a class to represent arbitrary precision integral constant values and operations...
static constexpr unsigned long long mask(BlockVerifier::State S)
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
const SmallVectorImpl< MachineOperand > & Cond
This file implements the SmallBitVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
This file describes how to lower LLVM code to machine code.
This file implements the C++20 <bit> header.
Class for arbitrary precision integers.
LLVM_ABI APInt zext(unsigned width) const
Zero extend to a new width.
unsigned getBitWidth() const
Return the number of bits in the APInt.
static bool isSameValue(const APInt &I1, const APInt &I2, bool SignedCompare=false)
Determine if two APInts have the same value, after zero-extending or sign-extending (if SignedCompare...
Represent a constant reference to an array (0 or more elements consecutively in memory),...
This is a constexpr reimplementation of a subset of std::bitset.
Tagged union holding either a T or a Error.
Represents one node in the SelectionDAG.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
const TargetLowering & getTargetLoweringInfo() const
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
@ POISON
POISON - A poison node.
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
@ BSWAP
Byte Swap and Counting operators.
@ ADD
Simple integer binary arithmetic operators.
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
@ FADD
Simple binary floating point operators.
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
@ CLMUL
Carry-less multiplication operations.
@ SIGN_EXTEND
Conversion operators.
@ FNEG
Perform various unary floating-point operations inspired by libm.
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
@ UNDEF
UNDEF - An undefined node.
@ SHL
Shift and rotation operations.
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
@ AND
Bitwise operators - logical and, logical or, logical xor.
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
@ VECTOR_SPLICE_RIGHT
VECTOR_SPLICE_RIGHT(VEC1, VEC2, OFFSET) - Shifts CONCAT_VECTORS(VEC1,VEC2) right by OFFSET elements a...
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
@ ABS_MIN_POISON
ABS with a poison result for INT_MIN.
LLVM_ABI bool matchBinaryPredicate(SDValue LHS, SDValue RHS, const APInt &DemandedElts, std::function< bool(ConstantSDNode *, ConstantSDNode *)> Match, bool AllowUndefs=false, bool AllowTypeMismatch=false)
Attempt to match a binary predicate against a pair of scalar/splat constants or every element of a pa...
LLVM_ABI bool isConstantSplatVector(const SDNode *N, APInt &SplatValue)
Node predicates.
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
AllOnesConstantMatch m_AllOnes()
cst_pred_ty< is_one > m_One()
Match an integer 1 or a vector with all elements equal to 1.
auto m_BinOp()
Match an arbitrary binary operation and ignore it.
auto m_VScale()
Matches a call to llvm.vscale().
is_zero m_Zero()
Match any null constant or a vector with all elements equal to 0.
BinaryOpc_match< Zero_match, ValTy, false > m_Neg(const ValTy &V)
Match a negate as a sub(0, v)
Result_match< 0, TernaryOpc_match< T0_P, T1_P, T2_P > > m_Load(const T0_P &Ch, const T1_P &Ptr, const T2_P &Offset)
ReassociatableOpc_match< PatternTs... > m_ReassociatableMul(const PatternTs &...Patterns)
auto m_ExactSr(const LHS &L, const RHS &R)
BinaryOpc_match< LHS, RHS > m_Srl(const LHS &L, const RHS &R)
auto m_SExtLike(const Opnd &Op)
auto m_SpecificVT(EVT RefVT, const Pattern &P)
Match a specific ValueType.
Opcode_match m_SpecificOpc(unsigned Opcode)
BinaryOpc_match< LHS, RHS > m_Sra(const LHS &L, const RHS &R)
BinaryOpc_match< LHS, RHS > m_FRem(const LHS &L, const RHS &R)
auto m_False(const SelectionDAG &DAG)
Match false boolean value based on the information provided by TargetLowering.
TLI_pred_match(const PredFuncT &Pred, const Pattern &P) -> TLI_pred_match< Pattern, PredFuncT >
TernaryOpc_match< T0_P, T1_P, CondCode_match, true, false > m_c_SetCC(const T0_P &LHS, const T1_P &RHS)
Match a SETCC with any condition code, allowing the operands to be commuted.
auto m_Abs(const Opnd &Op)
Result_match< ResNo, Pattern > m_Result(const Pattern &P)
Match only if the SDValue is a certain result at ResNo.
auto m_MaxMinLike(const LHS &L, const RHS &R)
BinaryOpc_match< LHS, RHS, true > m_c_BinOp(unsigned Opc, const LHS &L, const RHS &R, SDNodeFlags Flgs=SDNodeFlags())
BinaryOpc_match< LHS, RHS, true > m_Mul(const LHS &L, const RHS &R)
BinaryOpc_match< LHS, RHS, true > m_Clmul(const LHS &L, const RHS &R)
auto m_UMinLike(const LHS &L, const RHS &R)
auto m_SelectCC(const LTy &L, const RTy &R, const TTy &T, const FTy &F)
Match a SELECT_CC with any condition code.
auto m_SelectLike(const T0_P &Cond, const T1_P &T, const T2_P &F)
TernaryOpc_match< LHS, RHS, IDX > m_InsertSubvector(const LHS &Base, const RHS &Sub, const IDX &Idx)
auto m_UMaxLike(const LHS &L, const RHS &R)
BinaryOpc_match< LHS, RHS, true > m_Or(const LHS &L, const RHS &R)
TernaryOpc_match< T0_P, T1_P, T2_P > m_TernaryOp(unsigned Opc, const T0_P &Op0, const T1_P &Op1, const T2_P &Op2)
TernaryOpc_match< T0_P, T1_P, T2_P > m_InsertElt(const T0_P &Vec, const T1_P &Val, const T2_P &Idx)
BinaryOpc_match< LHS, RHS, false, true > m_ChainedBinOp(unsigned Opc, const LHS &L, const RHS &R)
BinaryOpc_match< LHS, RHS, true > m_SMin(const LHS &L, const RHS &R)
auto m_IntrinsicWOChain(const OpndPreds &...Opnds)
UnaryOpc_match< Opnd > m_Trunc(const Opnd &Op)
BinaryOpc_match< LHS, RHS > m_FSub(const LHS &L, const RHS &R)
auto m_AddLike(const LHS &L, const RHS &R)
auto m_SpecificSelectCCLike(ISD::CondCode CC, const LTy &L, const RTy &R, const TTy &T, const FTy &F)
Match a SELECT of a SETCC or a SELECT_CC with a specific condition code.
BinaryOpc_match< LHS, RHS > m_URem(const LHS &L, const RHS &R)
AnyZeroFP_match m_AnyZeroFP()
Match a floating-point +0.0 or -0.0 constant or splat.
UnaryOpc_match< Opnd > m_BSwap(const Opnd &Op)
Or< Preds... > m_AnyOf(const Preds &...preds)
BinaryOpc_match< LHS, RHS, true, true > m_c_ChainedBinOp(unsigned Opc, const LHS &L, const RHS &R)
Or< UnaryOpc_match< Opnd >, Opnd > m_TruncOrSelf(const Opnd &Op)
Match a trunc or identity Allows to peek through optional truncations.
UnaryOpc_match< Opnd > m_NNegZExt(const Opnd &Op)
TernaryOpc_match< T0_P, T1_P, T2_P > m_FShR(const T0_P &Op0, const T1_P &Op1, const T2_P &Op2)
And< Preds... > m_AllOf(const Preds &...preds)
UnaryOpc_match< Opnd > m_VectorReverse(const Opnd &Op)
auto m_ScalableVectorVT()
BinaryOpc_match< LHS, RHS > m_FDiv(const LHS &L, const RHS &R)
auto m_NSWAdd(const LHS &L, const RHS &R)
UnaryOpc_match< Opnd > m_BitCast(const Opnd &Op)
UnaryOpc_match< Opnd > m_FNeg(const Opnd &Op)
FunnelShiftLike_match< T0_P, T1_P, T2_P, false > m_FShRLike(const T0_P &Op0, const T1_P &Op1, const T2_P &Op2)
auto m_LegalType(const SelectionDAG &DAG, const Pattern &P)
Match legal ValueTypes based on the information provided by TargetLowering.
BinaryOpc_match< LHS, RHS, true > m_UMin(const LHS &L, const RHS &R)
Not< Pred > m_Unless(const Pred &P)
Match if the inner pattern does NOT match.
BinaryOpc_match< LHS, RHS, true > m_SMax(const LHS &L, const RHS &R)
auto m_SpecificScalarVT(EVT RefVT, const Pattern &P)
Match a scalar ValueType.
auto m_True(const SelectionDAG &DAG)
Match true boolean value based on the information provided by TargetLowering.
NUses_match< N, Value_match > m_NUses()
UnaryOpc_match< Opnd, true > m_ChainedUnaryOp(unsigned Opc, const Opnd &Op)
ValueType_match(const PredFuncT &Pred, const Pattern &P) -> ValueType_match< Pattern, PredFuncT >
SpecificInt_match m_SpecificInt(APInt V)
Match a specific integer constant or constant splat value.
UnaryOpc_match< Opnd > m_FPToUI(const Opnd &Op)
auto m_NUWAddLike(const LHS &L, const RHS &R)
SpecificFP_match m_SpecificFP(APFloat V)
Match a specific float constant.
Value_match m_Specific(SDValue N)
BinaryOpc_match< LHS, RHS > m_ExtractElt(const LHS &Vec, const RHS &Idx)
BinaryOpc_match< LHS, RHS > m_ExtractSubvector(const LHS &Vec, const RHS &Idx)
UnaryOpc_match< Opnd > m_BitReverse(const Opnd &Op)
BinaryOpc_match< LHS, RHS, true > m_And(const LHS &L, const RHS &R)
BinaryOpc_match< LHS, RHS > m_Sub(const LHS &L, const RHS &R)
TernaryOpc_match< T0_P, T1_P, CondCode_match > m_SpecificSetCC(ISD::CondCode CC, const T0_P &LHS, const T1_P &RHS)
Match a SETCC with a specific condition code.
TernaryOpc_match< T0_P, T1_P, T2_P, true > m_c_TernaryOp(unsigned Opc, const T0_P &Op0, const T1_P &Op1, const T2_P &Op2)
ReassociatableOpc_match< PatternTs... > m_ReassociatableNUWAdd(const PatternTs &...Patterns)
auto m_NSWAddLike(const LHS &L, const RHS &R)
auto m_VT(EVT &VT)
Retreive the ValueType of the current SDValue.
BinaryOpc_match< ValTy, AllOnes_match, true > m_Not(const ValTy &V)
Match a Not as a xor(v, -1) or xor(-1, v)
ReassociatableOpc_match< PatternTs... > m_ReassociatableOr(const PatternTs &...Patterns)
BinaryOpc_match< LHS, RHS > m_Rotr(const LHS &L, const RHS &R)
ReassociatableOpc_match< PatternTs... > m_ReassociatableAdd(const PatternTs &...Patterns)
UnaryOpc_match< Opnd > m_AnyExt(const Opnd &Op)
BinaryOpc_match< LHS, RHS > m_Rotl(const LHS &L, const RHS &R)
UnaryOpc_match< Opnd > m_Cttz(const Opnd &Op)
auto m_SelectCCLike(const LTy &L, const RTy &R, const TTy &T, const FTy &F)
Match a SELECT of a SETCC or a SELECT_CC with any condition code.
TernaryOpc_match< T0_P, T1_P, CondCode_match, true, false > m_c_SpecificSetCC(ISD::CondCode CC, const T0_P &LHS, const T1_P &RHS)
Match a SETCC with a specific condition code, allowing the operands to be commuted.
auto m_Node(unsigned Opcode, const OpndPreds &...preds)
BinaryOpc_match< LHS, RHS, true > m_DisjointOr(const LHS &L, const RHS &R)
auto m_SMaxLike(const LHS &L, const RHS &R)
TernaryOpc_match< T0_P, T1_P, T2_P > m_Select(const T0_P &Cond, const T1_P &T, const T2_P &F)
BinaryOpc_match< LHS, RHS > m_UDiv(const LHS &L, const RHS &R)
UnaryOpc_match< Opnd > m_Ctlz(const Opnd &Op)
SpecificNeg_match m_SpecificNeg(SDValue V)
Match a negation of a specific value V, either as sub(0, V) or as constant(s) that are the negation o...
BinaryOpc_match< LHS, RHS > m_SDiv(const LHS &L, const RHS &R)
BinaryOpc_match< LHS, RHS, true > m_FAdd(const LHS &L, const RHS &R)
Or< UnaryOpc_match< Opnd >, Opnd > m_AExtOrSelf(const Opnd &Op)
Match a aext or identity Allows to peek through optional extensions.
BinaryOpc_match< LHS, RHS, true > m_UMax(const LHS &L, const RHS &R)
TernaryOpc_match< T0_P, T1_P, T2_P > m_VSelect(const T0_P &Cond, const T1_P &T, const T2_P &F)
TernaryOpc_match< T0_P, T1_P, T2_P > m_FShL(const T0_P &Op0, const T1_P &Op1, const T2_P &Op2)
UnaryOpc_match< Opnd > m_UnaryOp(unsigned Opc, const Opnd &Op)
auto m_SExt(const Opnd &Op)
bool sd_match(SDValue N, Pattern &&P)
ReassociatableOpc_match< PatternTs... > m_ReassociatableNSWAdd(const PatternTs &...Patterns)
BinaryOpc_match< LHS, RHS, true > m_Xor(const LHS &L, const RHS &R)
auto m_SMinLike(const LHS &L, const RHS &R)
BinaryOpc_match< LHS, RHS > m_SRem(const LHS &L, const RHS &R)
auto m_NoneOf(const Preds &...preds)
CondCode_match m_SpecificCondCode(ISD::CondCode CC)
Match a conditional code SDNode with a specific ISD::CondCode.
UnaryOpc_match< Opnd > m_ZExt(const Opnd &Op)
Value_match m_Value()
Match any valid SDValue.
BinaryOpc_match< LHS, RHS, true > m_Add(const LHS &L, const RHS &R)
auto m_SpecificVectorElementVT(EVT RefVT, const Pattern &P)
Match a vector ValueType.
BinaryOpc_match< LHS, RHS > m_Shl(const LHS &L, const RHS &R)
auto m_BitwiseLogic(const LHS &L, const RHS &R)
UnaryOpc_match< Opnd > m_Ctpop(const Opnd &Op)
auto m_LegalOp(const SelectionDAG &DAG, const Pattern &P)
Match legal SDNodes based on the information provided by TargetLowering.
TernaryOpc_match< T0_P, T1_P, CondCode_match > m_SetCC(const T0_P &LHS, const T1_P &RHS)
Match a SETCC with any condition code.
ReassociatableOpc_match< PatternTs... > m_ReassociatableAnd(const PatternTs &...Patterns)
TernaryOpc_match< T0_P, T1_P, T2_P > m_SpliceRight(const T0_P &V1, const T1_P &V2, const T2_P &Offset)
UnaryOpc_match< Opnd > m_FPToSI(const Opnd &Op)
NUses_match< 1, Value_match > m_OneUse()
auto m_NUWAdd(const LHS &L, const RHS &R)
auto m_SExtOrSelf(const Opnd &Op)
Match a sext or identity Allows to peek through optional extensions.
CondCode_match m_CondCode()
Match any conditional code SDNode.
UnaryOpc_match< Opnd > m_FAbs(const Opnd &Op)
Not(const Pred &P) -> Not< Pred >
DeferredValue_match m_Deferred(SDValue &V)
Similar to m_Specific, but the specific value to match is determined by another sub-pattern in the sa...
BinaryOpc_match< LHS, RHS, true > m_FMul(const LHS &L, const RHS &R)
BinaryOpc_match< V1_t, V2_t > m_Shuffle(const V1_t &v1, const V2_t &v2)
auto m_SpecificSelectCC(ISD::CondCode CC, const LTy &L, const RTy &R, const TTy &T, const FTy &F)
Match a SELECT_CC with a specific condition code.
ValueType_bind(const Pattern &P) -> ValueType_bind< Pattern >
ConstantInt_match m_ConstInt()
Match any integer constants or splat of an integer constant.
FunnelShiftLike_match< T0_P, T1_P, T2_P, true > m_FShLLike(const T0_P &Op0, const T1_P &Op1, const T2_P &Op2)
auto m_ZExtOrSelf(const Opnd &Op)
Match a zext or identity Allows to peek through optional extensions.
This is an optimization pass for GlobalISel generic memory operations.
LLVM_ABI bool isAllOnesOrAllOnesSplat(const MachineInstr &MI, const MachineRegisterInfo &MRI, bool AllowUndefs=false)
Return true if the value is a constant -1 integer or a splatted vector of a constant -1 integer (with...
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
int bit_width(T Value)
Returns the number of bits needed to represent Value if Value is nonzero.
LLVM_ABI ConstantFPSDNode * isConstOrConstSplatFP(SDValue N, bool AllowUndefs=false)
Returns the SDNode if it is a constant splat BuildVector or constant float.
auto dyn_cast_or_null(const Y &Val)
@ Sub
Subtraction of integers.
DWARFExpression::Operation Op
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
LLVM_ABI bool isZeroOrZeroSplat(SDValue N, bool AllowUndefs=false)
Return true if the value is a constant 0 integer or a splatted vector of a constant 0 integer (with n...
LLVM_ABI bool isOnesOrOnesSplat(SDValue N, bool AllowUndefs=false)
Return true if the value is a constant 1 integer or a splatted vector of a constant 1 integer (with n...
Implement std::hash so that hash_code can be used in STL containers.
These are IR-level optimization flags that may be propagated to SDNodes.
AllOnes_match(bool AllowUndefs)
And(const Pred &p, const Preds &...preds)
BinaryOpc_match(unsigned Opc, const LHS_P &L, const RHS_P &R, SDNodeFlags Flgs=SDNodeFlags())
Bool_match(const SelectionDAG &DAG)
CondCode_match(ISD::CondCode CC)
CondCode_match(ISD::CondCode *CC)
std::optional< ISD::CondCode > CCToMatch
ConstantInt_match(APInt *V)
DeferredValue_match(SDValue &Match)
Provide number of operands that are not chain or glue, as well as the first index of such operand.
EffectiveOperands(SDValue N)
bool matchShiftOr(SDValue N, unsigned BitWidth)
bool matchOperands(SDValue X, SDValue Y, SDValue Z)
static bool hasComplementaryConstantShifts(const APInt &ShlV, const APInt &SrlV, unsigned BitWidth)
FunnelShiftLike_match(const T0_P &Op0, const T1_P &Op1, const T2_P &Op2)
MaxMin_match(const LHS_P &L, const RHS_P &R)
NUses_match(const Pattern &P)
Ones_match(bool AllowUndefs)
Opcode_match(unsigned Opc)
Operands_match(const OpndPred &p, const OpndPreds &...preds)
Or(const Pred &p, const Preds &...preds)
bool reassociatableMatchHelper(ArrayRef< SDValue > Leaves, Bitset< NumPatterns > &Used)
bool reassociatableMatchHelper(ArrayRef< SDValue > Leaves, Bitset< NumPatterns > &Used, PatternHd &HeadPattern, PatternTl &...TailPatterns)
static constexpr size_t NumPatterns
std::tuple< PatternTs... > Patterns
bool collectLeaves(SDValue V, std::array< SDValue, NumPatterns > &Leaves, std::size_t &LeafIdx)
ReassociatableOpc_match(unsigned Opcode, const PatternTs &...Patterns)
ReassociatableOpc_match(unsigned Opcode, SDNodeFlags Flags, const PatternTs &...Patterns)
Result_match(const Pattern &P)
Matching while capturing mask.
SDShuffle_match(const T0 &Op1, const T1 &Op2, const T2 &Mask)
SpecificFP_match(APFloat V)
SpecificInt_match(APInt APV)
SpecificNeg_match(SDValue V)
TLI_pred_match(const PredFuncT &Pred, const Pattern &P)
TernaryOpc_match(unsigned Opc, const T0_P &Op0, const T1_P &Op1, const T2_P &Op2)
UnaryOpc_match(unsigned Opc, const Opnd_P &Op, SDNodeFlags Flgs=SDNodeFlags())
ValueType_bind(EVT &Bind, const Pattern &P)
ValueType_match(const PredFuncT &Pred, const Pattern &P)
Value_match(SDValue Match)
Zero_match(bool AllowUndefs)
bool match(SDValue N) const
bool match(ArrayRef< int > Mask)
ArrayRef< int > & MaskRef
m_Mask(ArrayRef< int > &MaskRef)
m_SpecificMask(ArrayRef< int > MaskRef)
bool match(ArrayRef< int > Mask)
static bool match(ISD::CondCode Cond)
static bool match(ISD::CondCode Cond)
static bool match(ISD::CondCode Cond)
static bool match(ISD::CondCode Cond)