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SelectionDAGBuilder.h
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1 //===- SelectionDAGBuilder.h - Selection-DAG building -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements routines for translating from LLVM IR into SelectionDAG IR.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
14 #define LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
15 
16 #include "StatepointLowering.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/MapVector.h"
20 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/IR/DebugLoc.h"
27 #include "llvm/IR/Instruction.h"
29 #include "llvm/Support/CodeGen.h"
32 #include <algorithm>
33 #include <cassert>
34 #include <cstdint>
35 #include <utility>
36 #include <vector>
37 
38 namespace llvm {
39 
40 class AAResults;
41 class AllocaInst;
42 class AtomicCmpXchgInst;
43 class AtomicRMWInst;
44 class BasicBlock;
45 class BranchInst;
46 class CallInst;
47 class CallBrInst;
48 class CatchPadInst;
49 class CatchReturnInst;
50 class CatchSwitchInst;
51 class CleanupPadInst;
52 class CleanupReturnInst;
53 class Constant;
54 class ConstrainedFPIntrinsic;
55 class DbgValueInst;
56 class DataLayout;
57 class DIExpression;
58 class DILocalVariable;
59 class DILocation;
60 class FenceInst;
61 class FunctionLoweringInfo;
62 class GCFunctionInfo;
63 class GCRelocateInst;
64 class GCResultInst;
65 class GCStatepointInst;
66 class IndirectBrInst;
67 class InvokeInst;
68 class LandingPadInst;
69 class LLVMContext;
70 class LoadInst;
71 class MachineBasicBlock;
72 class PHINode;
73 class ResumeInst;
74 class ReturnInst;
75 class SDDbgValue;
76 class SelectionDAG;
77 class StoreInst;
78 class SwiftErrorValueTracking;
79 class SwitchInst;
80 class TargetLibraryInfo;
81 class TargetMachine;
82 class Type;
83 class VAArgInst;
84 class UnreachableInst;
85 class Use;
86 class User;
87 class Value;
88 
89 //===----------------------------------------------------------------------===//
90 /// SelectionDAGBuilder - This is the common target-independent lowering
91 /// implementation that is parameterized by a TargetLowering object.
92 ///
94  /// The current instruction being visited.
95  const Instruction *CurInst = nullptr;
96 
98 
99  /// Maps argument value for unused arguments. This is used
100  /// to preserve debug information for incoming arguments.
101  DenseMap<const Value*, SDValue> UnusedArgNodeMap;
102 
103  /// Helper type for DanglingDebugInfoMap.
104  class DanglingDebugInfo {
105  const DbgValueInst* DI = nullptr;
106  DebugLoc dl;
107  unsigned SDNodeOrder = 0;
108 
109  public:
110  DanglingDebugInfo() = default;
111  DanglingDebugInfo(const DbgValueInst *di, DebugLoc DL, unsigned SDNO)
112  : DI(di), dl(std::move(DL)), SDNodeOrder(SDNO) {}
113 
114  const DbgValueInst* getDI() { return DI; }
115  DebugLoc getdl() { return dl; }
116  unsigned getSDNodeOrder() { return SDNodeOrder; }
117  };
118 
119  /// Helper type for DanglingDebugInfoMap.
120  typedef std::vector<DanglingDebugInfo> DanglingDebugInfoVector;
121 
122  /// Keeps track of dbg_values for which we have not yet seen the referent.
123  /// We defer handling these until we do see it.
125 
126 public:
127  /// Loads are not emitted to the program immediately. We bunch them up and
128  /// then emit token factor nodes when possible. This allows us to get simple
129  /// disambiguation between loads without worrying about alias analysis.
131 
132  /// State used while lowering a statepoint sequence (gc_statepoint,
133  /// gc_relocate, and gc_result). See StatepointLowering.hpp/cpp for details.
135 
136 private:
137  /// CopyToReg nodes that copy values to virtual registers for export to other
138  /// blocks need to be emitted before any terminator instruction, but they have
139  /// no other ordering requirements. We bunch them up and the emit a single
140  /// tokenfactor for them just before terminator instructions.
141  SmallVector<SDValue, 8> PendingExports;
142 
143  /// Similar to loads, nodes corresponding to constrained FP intrinsics are
144  /// bunched up and emitted when necessary. These can be moved across each
145  /// other and any (normal) memory operation (load or store), but not across
146  /// calls or instructions having unspecified side effects. As a special
147  /// case, constrained FP intrinsics using fpexcept.strict may not be deleted
148  /// even if otherwise unused, so they need to be chained before any
149  /// terminator instruction (like PendingExports). We track the latter
150  /// set of nodes in a separate list.
151  SmallVector<SDValue, 8> PendingConstrainedFP;
152  SmallVector<SDValue, 8> PendingConstrainedFPStrict;
153 
154  /// Update root to include all chains from the Pending list.
155  SDValue updateRoot(SmallVectorImpl<SDValue> &Pending);
156 
157  /// A unique monotonically increasing number used to order the SDNodes we
158  /// create.
159  unsigned SDNodeOrder;
160 
161  /// Determine the rank by weight of CC in [First,Last]. If CC has more weight
162  /// than each cluster in the range, its rank is 0.
163  unsigned caseClusterRank(const SwitchCG::CaseCluster &CC,
166 
167  /// Emit comparison and split W into two subtrees.
168  void splitWorkItem(SwitchCG::SwitchWorkList &WorkList,
170  MachineBasicBlock *SwitchMBB);
171 
172  /// Lower W.
173  void lowerWorkItem(SwitchCG::SwitchWorkListItem W, Value *Cond,
174  MachineBasicBlock *SwitchMBB,
175  MachineBasicBlock *DefaultMBB);
176 
177  /// Peel the top probability case if it exceeds the threshold
179  peelDominantCaseCluster(const SwitchInst &SI,
180  SwitchCG::CaseClusterVector &Clusters,
181  BranchProbability &PeeledCaseProb);
182 
183  /// A class which encapsulates all of the information needed to generate a
184  /// stack protector check and signals to isel via its state being initialized
185  /// that a stack protector needs to be generated.
186  ///
187  /// *NOTE* The following is a high level documentation of SelectionDAG Stack
188  /// Protector Generation. The reason that it is placed here is for a lack of
189  /// other good places to stick it.
190  ///
191  /// High Level Overview of SelectionDAG Stack Protector Generation:
192  ///
193  /// Previously, generation of stack protectors was done exclusively in the
194  /// pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
195  /// splitting basic blocks at the IR level to create the success/failure basic
196  /// blocks in the tail of the basic block in question. As a result of this,
197  /// calls that would have qualified for the sibling call optimization were no
198  /// longer eligible for optimization since said calls were no longer right in
199  /// the "tail position" (i.e. the immediate predecessor of a ReturnInst
200  /// instruction).
201  ///
202  /// Then it was noticed that since the sibling call optimization causes the
203  /// callee to reuse the caller's stack, if we could delay the generation of
204  /// the stack protector check until later in CodeGen after the sibling call
205  /// decision was made, we get both the tail call optimization and the stack
206  /// protector check!
207  ///
208  /// A few goals in solving this problem were:
209  ///
210  /// 1. Preserve the architecture independence of stack protector generation.
211  ///
212  /// 2. Preserve the normal IR level stack protector check for platforms like
213  /// OpenBSD for which we support platform-specific stack protector
214  /// generation.
215  ///
216  /// The main problem that guided the present solution is that one can not
217  /// solve this problem in an architecture independent manner at the IR level
218  /// only. This is because:
219  ///
220  /// 1. The decision on whether or not to perform a sibling call on certain
221  /// platforms (for instance i386) requires lower level information
222  /// related to available registers that can not be known at the IR level.
223  ///
224  /// 2. Even if the previous point were not true, the decision on whether to
225  /// perform a tail call is done in LowerCallTo in SelectionDAG which
226  /// occurs after the Stack Protector Pass. As a result, one would need to
227  /// put the relevant callinst into the stack protector check success
228  /// basic block (where the return inst is placed) and then move it back
229  /// later at SelectionDAG/MI time before the stack protector check if the
230  /// tail call optimization failed. The MI level option was nixed
231  /// immediately since it would require platform-specific pattern
232  /// matching. The SelectionDAG level option was nixed because
233  /// SelectionDAG only processes one IR level basic block at a time
234  /// implying one could not create a DAG Combine to move the callinst.
235  ///
236  /// To get around this problem a few things were realized:
237  ///
238  /// 1. While one can not handle multiple IR level basic blocks at the
239  /// SelectionDAG Level, one can generate multiple machine basic blocks
240  /// for one IR level basic block. This is how we handle bit tests and
241  /// switches.
242  ///
243  /// 2. At the MI level, tail calls are represented via a special return
244  /// MIInst called "tcreturn". Thus if we know the basic block in which we
245  /// wish to insert the stack protector check, we get the correct behavior
246  /// by always inserting the stack protector check right before the return
247  /// statement. This is a "magical transformation" since no matter where
248  /// the stack protector check intrinsic is, we always insert the stack
249  /// protector check code at the end of the BB.
250  ///
251  /// Given the aforementioned constraints, the following solution was devised:
252  ///
253  /// 1. On platforms that do not support SelectionDAG stack protector check
254  /// generation, allow for the normal IR level stack protector check
255  /// generation to continue.
256  ///
257  /// 2. On platforms that do support SelectionDAG stack protector check
258  /// generation:
259  ///
260  /// a. Use the IR level stack protector pass to decide if a stack
261  /// protector is required/which BB we insert the stack protector check
262  /// in by reusing the logic already therein. If we wish to generate a
263  /// stack protector check in a basic block, we place a special IR
264  /// intrinsic called llvm.stackprotectorcheck right before the BB's
265  /// returninst or if there is a callinst that could potentially be
266  /// sibling call optimized, before the call inst.
267  ///
268  /// b. Then when a BB with said intrinsic is processed, we codegen the BB
269  /// normally via SelectBasicBlock. In said process, when we visit the
270  /// stack protector check, we do not actually emit anything into the
271  /// BB. Instead, we just initialize the stack protector descriptor
272  /// class (which involves stashing information/creating the success
273  /// mbbb and the failure mbb if we have not created one for this
274  /// function yet) and export the guard variable that we are going to
275  /// compare.
276  ///
277  /// c. After we finish selecting the basic block, in FinishBasicBlock if
278  /// the StackProtectorDescriptor attached to the SelectionDAGBuilder is
279  /// initialized, we produce the validation code with one of these
280  /// techniques:
281  /// 1) with a call to a guard check function
282  /// 2) with inlined instrumentation
283  ///
284  /// 1) We insert a call to the check function before the terminator.
285  ///
286  /// 2) We first find a splice point in the parent basic block
287  /// before the terminator and then splice the terminator of said basic
288  /// block into the success basic block. Then we code-gen a new tail for
289  /// the parent basic block consisting of the two loads, the comparison,
290  /// and finally two branches to the success/failure basic blocks. We
291  /// conclude by code-gening the failure basic block if we have not
292  /// code-gened it already (all stack protector checks we generate in
293  /// the same function, use the same failure basic block).
294  class StackProtectorDescriptor {
295  public:
296  StackProtectorDescriptor() = default;
297 
298  /// Returns true if all fields of the stack protector descriptor are
299  /// initialized implying that we should/are ready to emit a stack protector.
300  bool shouldEmitStackProtector() const {
301  return ParentMBB && SuccessMBB && FailureMBB;
302  }
303 
304  bool shouldEmitFunctionBasedCheckStackProtector() const {
305  return ParentMBB && !SuccessMBB && !FailureMBB;
306  }
307 
308  /// Initialize the stack protector descriptor structure for a new basic
309  /// block.
310  void initialize(const BasicBlock *BB, MachineBasicBlock *MBB,
311  bool FunctionBasedInstrumentation) {
312  // Make sure we are not initialized yet.
313  assert(!shouldEmitStackProtector() && "Stack Protector Descriptor is "
314  "already initialized!");
315  ParentMBB = MBB;
316  if (!FunctionBasedInstrumentation) {
317  SuccessMBB = AddSuccessorMBB(BB, MBB, /* IsLikely */ true);
318  FailureMBB = AddSuccessorMBB(BB, MBB, /* IsLikely */ false, FailureMBB);
319  }
320  }
321 
322  /// Reset state that changes when we handle different basic blocks.
323  ///
324  /// This currently includes:
325  ///
326  /// 1. The specific basic block we are generating a
327  /// stack protector for (ParentMBB).
328  ///
329  /// 2. The successor machine basic block that will contain the tail of
330  /// parent mbb after we create the stack protector check (SuccessMBB). This
331  /// BB is visited only on stack protector check success.
332  void resetPerBBState() {
333  ParentMBB = nullptr;
334  SuccessMBB = nullptr;
335  }
336 
337  /// Reset state that only changes when we switch functions.
338  ///
339  /// This currently includes:
340  ///
341  /// 1. FailureMBB since we reuse the failure code path for all stack
342  /// protector checks created in an individual function.
343  ///
344  /// 2.The guard variable since the guard variable we are checking against is
345  /// always the same.
346  void resetPerFunctionState() {
347  FailureMBB = nullptr;
348  }
349 
350  MachineBasicBlock *getParentMBB() { return ParentMBB; }
351  MachineBasicBlock *getSuccessMBB() { return SuccessMBB; }
352  MachineBasicBlock *getFailureMBB() { return FailureMBB; }
353 
354  private:
355  /// The basic block for which we are generating the stack protector.
356  ///
357  /// As a result of stack protector generation, we will splice the
358  /// terminators of this basic block into the successor mbb SuccessMBB and
359  /// replace it with a compare/branch to the successor mbbs
360  /// SuccessMBB/FailureMBB depending on whether or not the stack protector
361  /// was violated.
362  MachineBasicBlock *ParentMBB = nullptr;
363 
364  /// A basic block visited on stack protector check success that contains the
365  /// terminators of ParentMBB.
366  MachineBasicBlock *SuccessMBB = nullptr;
367 
368  /// This basic block visited on stack protector check failure that will
369  /// contain a call to __stack_chk_fail().
370  MachineBasicBlock *FailureMBB = nullptr;
371 
372  /// Add a successor machine basic block to ParentMBB. If the successor mbb
373  /// has not been created yet (i.e. if SuccMBB = 0), then the machine basic
374  /// block will be created. Assign a large weight if IsLikely is true.
375  MachineBasicBlock *AddSuccessorMBB(const BasicBlock *BB,
376  MachineBasicBlock *ParentMBB,
377  bool IsLikely,
378  MachineBasicBlock *SuccMBB = nullptr);
379  };
380 
381 private:
382  const TargetMachine &TM;
383 
384 public:
385  /// Lowest valid SDNodeOrder. The special case 0 is reserved for scheduling
386  /// nodes without a corresponding SDNode.
387  static const unsigned LowestSDNodeOrder = 1;
388 
390  const DataLayout *DL = nullptr;
391  AAResults *AA = nullptr;
393 
395  public:
397  : SwitchCG::SwitchLowering(funcinfo), SDB(sdb) {}
398 
399  virtual void addSuccessorWithProb(
402  SDB->addSuccessorWithProb(Src, Dst, Prob);
403  }
404 
405  private:
406  SelectionDAGBuilder *SDB;
407  };
408 
409  // Data related to deferred switch lowerings. Used to construct additional
410  // Basic Blocks in SelectionDAGISel::FinishBasicBlock.
411  std::unique_ptr<SDAGSwitchLowering> SL;
412 
413  /// A StackProtectorDescriptor structure used to communicate stack protector
414  /// information in between SelectBasicBlock and FinishBasicBlock.
415  StackProtectorDescriptor SPDescriptor;
416 
417  // Emit PHI-node-operand constants only once even if used by multiple
418  // PHI nodes.
420 
421  /// Information about the function as a whole.
423 
424  /// Information about the swifterror values used throughout the function.
426 
427  /// Garbage collection metadata for the function.
429 
430  /// Map a landing pad to the call site indexes.
432 
433  /// This is set to true if a call in the current block has been translated as
434  /// a tail call. In this case, no subsequent DAG nodes should be created.
435  bool HasTailCall = false;
436 
438 
441  : SDNodeOrder(LowestSDNodeOrder), TM(dag.getTarget()), DAG(dag),
442  SL(std::make_unique<SDAGSwitchLowering>(this, funcinfo)), FuncInfo(funcinfo),
443  SwiftError(swifterror) {}
444 
445  void init(GCFunctionInfo *gfi, AAResults *AA,
446  const TargetLibraryInfo *li);
447 
448  /// Clear out the current SelectionDAG and the associated state and prepare
449  /// this SelectionDAGBuilder object to be used for a new block. This doesn't
450  /// clear out information about additional blocks that are needed to complete
451  /// switch lowering or PHI node updating; that information is cleared out as
452  /// it is consumed.
453  void clear();
454 
455  /// Clear the dangling debug information map. This function is separated from
456  /// the clear so that debug information that is dangling in a basic block can
457  /// be properly resolved in a different basic block. This allows the
458  /// SelectionDAG to resolve dangling debug information attached to PHI nodes.
459  void clearDanglingDebugInfo();
460 
461  /// Return the current virtual root of the Selection DAG, flushing any
462  /// PendingLoad items. This must be done before emitting a store or any other
463  /// memory node that may need to be ordered after any prior load instructions.
465 
466  /// Similar to getMemoryRoot, but also flushes PendingConstrainedFP(Strict)
467  /// items. This must be done before emitting any call other any other node
468  /// that may need to be ordered after FP instructions due to other side
469  /// effects.
470  SDValue getRoot();
471 
472  /// Similar to getRoot, but instead of flushing all the PendingLoad items,
473  /// flush all the PendingExports (and PendingConstrainedFPStrict) items.
474  /// It is necessary to do this before emitting a terminator instruction.
476 
477  SDLoc getCurSDLoc() const {
478  return SDLoc(CurInst, SDNodeOrder);
479  }
480 
482  return CurInst ? CurInst->getDebugLoc() : DebugLoc();
483  }
484 
485  void CopyValueToVirtualRegister(const Value *V, unsigned Reg);
486 
487  void visit(const Instruction &I);
488 
489  void visit(unsigned Opcode, const User &I);
490 
491  /// If there was virtual register allocated for the value V emit CopyFromReg
492  /// of the specified type Ty. Return empty SDValue() otherwise.
493  SDValue getCopyFromRegs(const Value *V, Type *Ty);
494 
495  /// Register a dbg_value which relies on a Value which we have not yet seen.
497  unsigned Order);
498 
499  /// If we have dangling debug info that describes \p Variable, or an
500  /// overlapping part of variable considering the \p Expr, then this method
501  /// will drop that debug info as it isn't valid any longer.
502  void dropDanglingDebugInfo(const DILocalVariable *Variable,
503  const DIExpression *Expr);
504 
505  /// If we saw an earlier dbg_value referring to V, generate the debug data
506  /// structures now that we've seen its definition.
507  void resolveDanglingDebugInfo(const Value *V, SDValue Val);
508 
509  /// For the given dangling debuginfo record, perform last-ditch efforts to
510  /// resolve the debuginfo to something that is represented in this DAG. If
511  /// this cannot be done, produce an Undef debug value record.
512  void salvageUnresolvedDbgValue(DanglingDebugInfo &DDI);
513 
514  /// For a given list of Values, attempt to create and record a SDDbgValue in
515  /// the SelectionDAG.
517  DIExpression *Expr, DebugLoc CurDL, DebugLoc InstDL,
518  unsigned Order, bool IsVariadic);
519 
520  /// Evict any dangling debug information, attempting to salvage it first.
521  void resolveOrClearDbgInfo();
522 
523  SDValue getValue(const Value *V);
524 
526  SDValue getValueImpl(const Value *V);
527 
528  void setValue(const Value *V, SDValue NewN) {
529  SDValue &N = NodeMap[V];
530  assert(!N.getNode() && "Already set a value for this node!");
531  N = NewN;
532  }
533 
534  void setUnusedArgValue(const Value *V, SDValue NewN) {
535  SDValue &N = UnusedArgNodeMap[V];
536  assert(!N.getNode() && "Already set a value for this node!");
537  N = NewN;
538  }
539 
542  MachineBasicBlock *SwitchBB,
544  BranchProbability FProb, bool InvertCond);
546  MachineBasicBlock *FBB,
547  MachineBasicBlock *CurBB,
548  MachineBasicBlock *SwitchBB,
550  bool InvertCond);
551  bool ShouldEmitAsBranches(const std::vector<SwitchCG::CaseBlock> &Cases);
552  bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB);
553  void CopyToExportRegsIfNeeded(const Value *V);
554  void ExportFromCurrentBlock(const Value *V);
555  void LowerCallTo(const CallBase &CB, SDValue Callee, bool IsTailCall,
556  bool IsMustTailCall, const BasicBlock *EHPadBB = nullptr);
557 
558  // Lower range metadata from 0 to N to assert zext to an integer of nearest
559  // floor power of two.
561  SDValue Op);
562 
564  const CallBase *Call, unsigned ArgIdx,
565  unsigned NumArgs, SDValue Callee,
566  Type *ReturnTy, bool IsPatchPoint);
567 
568  std::pair<SDValue, SDValue>
570  const BasicBlock *EHPadBB = nullptr);
571 
572  /// When an MBB was split during scheduling, update the
573  /// references that need to refer to the last resulting block.
575 
576  /// Describes a gc.statepoint or a gc.statepoint like thing for the purposes
577  /// of lowering into a STATEPOINT node.
579  /// Bases[i] is the base pointer for Ptrs[i]. Together they denote the set
580  /// of gc pointers this STATEPOINT has to relocate.
583 
584  /// The set of gc.relocate calls associated with this gc.statepoint.
586 
587  /// The full list of gc arguments to the gc.statepoint being lowered.
589 
590  /// The gc.statepoint instruction.
591  const Instruction *StatepointInstr = nullptr;
592 
593  /// The list of gc transition arguments present in the gc.statepoint being
594  /// lowered.
596 
597  /// The ID that the resulting STATEPOINT instruction has to report.
598  unsigned ID = -1;
599 
600  /// Information regarding the underlying call instruction.
602 
603  /// The deoptimization state associated with this gc.statepoint call, if
604  /// any.
606 
607  /// Flags associated with the meta arguments being lowered.
608  uint64_t StatepointFlags = -1;
609 
610  /// The number of patchable bytes the call needs to get lowered into.
611  unsigned NumPatchBytes = -1;
612 
613  /// The exception handling unwind destination, in case this represents an
614  /// invoke of gc.statepoint.
615  const BasicBlock *EHPadBB = nullptr;
616 
618  };
619 
620  /// Lower \p SLI into a STATEPOINT instruction.
621  SDValue LowerAsSTATEPOINT(StatepointLoweringInfo &SI);
622 
623  // This function is responsible for the whole statepoint lowering process.
624  // It uniformly handles invoke and call statepoints.
625  void LowerStatepoint(const GCStatepointInst &I,
626  const BasicBlock *EHPadBB = nullptr);
627 
628  void LowerCallSiteWithDeoptBundle(const CallBase *Call, SDValue Callee,
629  const BasicBlock *EHPadBB);
630 
631  void LowerDeoptimizeCall(const CallInst *CI);
633 
634  void LowerCallSiteWithDeoptBundleImpl(const CallBase *Call, SDValue Callee,
635  const BasicBlock *EHPadBB,
636  bool VarArgDisallowed,
637  bool ForceVoidReturnTy);
638 
639  /// Returns the type of FrameIndex and TargetFrameIndex nodes.
642  }
643 
644 private:
645  // Terminator instructions.
646  void visitRet(const ReturnInst &I);
647  void visitBr(const BranchInst &I);
648  void visitSwitch(const SwitchInst &I);
649  void visitIndirectBr(const IndirectBrInst &I);
650  void visitUnreachable(const UnreachableInst &I);
651  void visitCleanupRet(const CleanupReturnInst &I);
652  void visitCatchSwitch(const CatchSwitchInst &I);
653  void visitCatchRet(const CatchReturnInst &I);
654  void visitCatchPad(const CatchPadInst &I);
655  void visitCleanupPad(const CleanupPadInst &CPI);
656 
657  BranchProbability getEdgeProbability(const MachineBasicBlock *Src,
658  const MachineBasicBlock *Dst) const;
659  void addSuccessorWithProb(
662 
663 public:
665  void visitSPDescriptorParent(StackProtectorDescriptor &SPD,
666  MachineBasicBlock *ParentBB);
667  void visitSPDescriptorFailure(StackProtectorDescriptor &SPD);
669  MachineBasicBlock *SwitchBB);
671  BranchProbability BranchProbToNext, unsigned Reg,
676  MachineBasicBlock *SwitchBB);
677 
678 private:
679  // These all get lowered before this pass.
680  void visitInvoke(const InvokeInst &I);
681  void visitCallBr(const CallBrInst &I);
682  void visitResume(const ResumeInst &I);
683 
684  void visitUnary(const User &I, unsigned Opcode);
685  void visitFNeg(const User &I) { visitUnary(I, ISD::FNEG); }
686 
687  void visitBinary(const User &I, unsigned Opcode);
688  void visitShift(const User &I, unsigned Opcode);
689  void visitAdd(const User &I) { visitBinary(I, ISD::ADD); }
690  void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); }
691  void visitSub(const User &I) { visitBinary(I, ISD::SUB); }
692  void visitFSub(const User &I) { visitBinary(I, ISD::FSUB); }
693  void visitMul(const User &I) { visitBinary(I, ISD::MUL); }
694  void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); }
695  void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
696  void visitSRem(const User &I) { visitBinary(I, ISD::SREM); }
697  void visitFRem(const User &I) { visitBinary(I, ISD::FREM); }
698  void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); }
699  void visitSDiv(const User &I);
700  void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); }
701  void visitAnd (const User &I) { visitBinary(I, ISD::AND); }
702  void visitOr (const User &I) { visitBinary(I, ISD::OR); }
703  void visitXor (const User &I) { visitBinary(I, ISD::XOR); }
704  void visitShl (const User &I) { visitShift(I, ISD::SHL); }
705  void visitLShr(const User &I) { visitShift(I, ISD::SRL); }
706  void visitAShr(const User &I) { visitShift(I, ISD::SRA); }
707  void visitICmp(const User &I);
708  void visitFCmp(const User &I);
709  // Visit the conversion instructions
710  void visitTrunc(const User &I);
711  void visitZExt(const User &I);
712  void visitSExt(const User &I);
713  void visitFPTrunc(const User &I);
714  void visitFPExt(const User &I);
715  void visitFPToUI(const User &I);
716  void visitFPToSI(const User &I);
717  void visitUIToFP(const User &I);
718  void visitSIToFP(const User &I);
719  void visitPtrToInt(const User &I);
720  void visitIntToPtr(const User &I);
721  void visitBitCast(const User &I);
722  void visitAddrSpaceCast(const User &I);
723 
724  void visitExtractElement(const User &I);
725  void visitInsertElement(const User &I);
726  void visitShuffleVector(const User &I);
727 
728  void visitExtractValue(const User &I);
729  void visitInsertValue(const User &I);
730  void visitLandingPad(const LandingPadInst &LP);
731 
732  void visitGetElementPtr(const User &I);
733  void visitSelect(const User &I);
734 
735  void visitAlloca(const AllocaInst &I);
736  void visitLoad(const LoadInst &I);
737  void visitStore(const StoreInst &I);
738  void visitMaskedLoad(const CallInst &I, bool IsExpanding = false);
739  void visitMaskedStore(const CallInst &I, bool IsCompressing = false);
740  void visitMaskedGather(const CallInst &I);
741  void visitMaskedScatter(const CallInst &I);
742  void visitAtomicCmpXchg(const AtomicCmpXchgInst &I);
743  void visitAtomicRMW(const AtomicRMWInst &I);
744  void visitFence(const FenceInst &I);
745  void visitPHI(const PHINode &I);
746  void visitCall(const CallInst &I);
747  bool visitMemCmpBCmpCall(const CallInst &I);
748  bool visitMemPCpyCall(const CallInst &I);
749  bool visitMemChrCall(const CallInst &I);
750  bool visitStrCpyCall(const CallInst &I, bool isStpcpy);
751  bool visitStrCmpCall(const CallInst &I);
752  bool visitStrLenCall(const CallInst &I);
753  bool visitStrNLenCall(const CallInst &I);
754  bool visitUnaryFloatCall(const CallInst &I, unsigned Opcode);
755  bool visitBinaryFloatCall(const CallInst &I, unsigned Opcode);
756  void visitAtomicLoad(const LoadInst &I);
757  void visitAtomicStore(const StoreInst &I);
758  void visitLoadFromSwiftError(const LoadInst &I);
759  void visitStoreToSwiftError(const StoreInst &I);
760  void visitFreeze(const FreezeInst &I);
761 
762  void visitInlineAsm(const CallBase &Call,
763  const BasicBlock *EHPadBB = nullptr);
764  void visitIntrinsicCall(const CallInst &I, unsigned Intrinsic);
765  void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic);
766  void visitConstrainedFPIntrinsic(const ConstrainedFPIntrinsic &FPI);
767  void visitVectorPredicationIntrinsic(const VPIntrinsic &VPIntrin);
768 
769  void visitVAStart(const CallInst &I);
770  void visitVAArg(const VAArgInst &I);
771  void visitVAEnd(const CallInst &I);
772  void visitVACopy(const CallInst &I);
773  void visitStackmap(const CallInst &I);
774  void visitPatchpoint(const CallBase &CB, const BasicBlock *EHPadBB = nullptr);
775 
776  // These two are implemented in StatepointLowering.cpp
777  void visitGCRelocate(const GCRelocateInst &Relocate);
778  void visitGCResult(const GCResultInst &I);
779 
780  void visitVectorReduce(const CallInst &I, unsigned Intrinsic);
781  void visitVectorReverse(const CallInst &I);
782  void visitVectorSplice(const CallInst &I);
783  void visitStepVector(const CallInst &I);
784 
785  void visitUserOp1(const Instruction &I) {
786  llvm_unreachable("UserOp1 should not exist at instruction selection time!");
787  }
788  void visitUserOp2(const Instruction &I) {
789  llvm_unreachable("UserOp2 should not exist at instruction selection time!");
790  }
791 
792  void processIntegerCallValue(const Instruction &I,
793  SDValue Value, bool IsSigned);
794 
795  void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
796 
797  void emitInlineAsmError(const CallBase &Call, const Twine &Message);
798 
799  /// If V is an function argument then create corresponding DBG_VALUE machine
800  /// instruction for it now. At the end of instruction selection, they will be
801  /// inserted to the entry BB.
802  bool EmitFuncArgumentDbgValue(const Value *V, DILocalVariable *Variable,
803  DIExpression *Expr, DILocation *DL,
804  bool IsDbgDeclare, const SDValue &N);
805 
806  /// Return the next block after MBB, or nullptr if there is none.
807  MachineBasicBlock *NextBlock(MachineBasicBlock *MBB);
808 
809  /// Update the DAG and DAG builder with the relevant information after
810  /// a new root node has been created which could be a tail call.
811  void updateDAGForMaybeTailCall(SDValue MaybeTC);
812 
813  /// Return the appropriate SDDbgValue based on N.
814  SDDbgValue *getDbgValue(SDValue N, DILocalVariable *Variable,
815  DIExpression *Expr, const DebugLoc &dl,
816  unsigned DbgSDNodeOrder);
817 
818  /// Lowers CallInst to an external symbol.
819  void lowerCallToExternalSymbol(const CallInst &I, const char *FunctionName);
820 
821  SDValue lowerStartEH(SDValue Chain, const BasicBlock *EHPadBB,
822  MCSymbol *&BeginLabel);
823  SDValue lowerEndEH(SDValue Chain, const InvokeInst *II,
824  const BasicBlock *EHPadBB, MCSymbol *BeginLabel);
825 };
826 
827 /// This struct represents the registers (physical or virtual)
828 /// that a particular set of values is assigned, and the type information about
829 /// the value. The most common situation is to represent one value at a time,
830 /// but struct or array values are handled element-wise as multiple values. The
831 /// splitting of aggregates is performed recursively, so that we never have
832 /// aggregate-typed registers. The values at this point do not necessarily have
833 /// legal types, so each value may require one or more registers of some legal
834 /// type.
835 ///
836 struct RegsForValue {
837  /// The value types of the values, which may not be legal, and
838  /// may need be promoted or synthesized from one or more registers.
840 
841  /// The value types of the registers. This is the same size as ValueVTs and it
842  /// records, for each value, what the type of the assigned register or
843  /// registers are. (Individual values are never synthesized from more than one
844  /// type of register.)
845  ///
846  /// With virtual registers, the contents of RegVTs is redundant with TLI's
847  /// getRegisterType member function, however when with physical registers
848  /// it is necessary to have a separate record of the types.
850 
851  /// This list holds the registers assigned to the values.
852  /// Each legal or promoted value requires one register, and each
853  /// expanded value requires multiple registers.
855 
856  /// This list holds the number of registers for each value.
858 
859  /// Records if this value needs to be treated in an ABI dependant manner,
860  /// different to normal type legalization.
862 
863  RegsForValue() = default;
864  RegsForValue(const SmallVector<unsigned, 4> &regs, MVT regvt, EVT valuevt,
867  const DataLayout &DL, unsigned Reg, Type *Ty,
869 
870  bool isABIMangled() const {
871  return CallConv.hasValue();
872  }
873 
874  /// Add the specified values to this one.
875  void append(const RegsForValue &RHS) {
876  ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
877  RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
878  Regs.append(RHS.Regs.begin(), RHS.Regs.end());
879  RegCount.push_back(RHS.Regs.size());
880  }
881 
882  /// Emit a series of CopyFromReg nodes that copies from this value and returns
883  /// the result as a ValueVTs value. This uses Chain/Flag as the input and
884  /// updates them for the output Chain/Flag. If the Flag pointer is NULL, no
885  /// flag is used.
887  const SDLoc &dl, SDValue &Chain, SDValue *Flag,
888  const Value *V = nullptr) const;
889 
890  /// Emit a series of CopyToReg nodes that copies the specified value into the
891  /// registers specified by this object. This uses Chain/Flag as the input and
892  /// updates them for the output Chain/Flag. If the Flag pointer is nullptr, no
893  /// flag is used. If V is not nullptr, then it is used in printing better
894  /// diagnostic messages on error.
895  void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl,
896  SDValue &Chain, SDValue *Flag, const Value *V = nullptr,
897  ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
898 
899  /// Add this value to the specified inlineasm node operand list. This adds the
900  /// code marker, matching input operand index (if applicable), and includes
901  /// the number of values added into it.
902  void AddInlineAsmOperands(unsigned Code, bool HasMatching,
903  unsigned MatchingIdx, const SDLoc &dl,
904  SelectionDAG &DAG, std::vector<SDValue> &Ops) const;
905 
906  /// Check if the total RegCount is greater than one.
907  bool occupiesMultipleRegs() const {
908  return std::accumulate(RegCount.begin(), RegCount.end(), 0) > 1;
909  }
910 
911  /// Return a list of registers and their sizes.
913 };
914 
915 } // end namespace llvm
916 
917 #endif // LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
llvm::ISD::SUB
@ SUB
Definition: ISDOpcodes.h:240
llvm::SelectionDAGBuilder::LowerStatepoint
void LowerStatepoint(const GCStatepointInst &I, const BasicBlock *EHPadBB=nullptr)
Definition: StatepointLowering.cpp:994
llvm::SelectionDAGBuilder::LPadToCallSiteMap
DenseMap< MachineBasicBlock *, SmallVector< unsigned, 4 > > LPadToCallSiteMap
Map a landing pad to the call site indexes.
Definition: SelectionDAGBuilder.h:431
ValueTypes.h
llvm::objcarc::ARCInstKind::User
@ User
could "use" a pointer
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::ReturnInst
Return a value (possibly void), from a function.
Definition: Instructions.h:2950
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1078
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:112
llvm::ISD::OR
@ OR
Definition: ISDOpcodes.h:633
llvm::SelectionDAGBuilder::setValue
void setValue(const Value *V, SDValue NewN)
Definition: SelectionDAGBuilder.h:528
llvm::SelectionDAGBuilder::PendingLoads
SmallVector< SDValue, 8 > PendingLoads
Loads are not emitted to the program immediately.
Definition: SelectionDAGBuilder.h:130
llvm::HexagonISD::JT
@ JT
Definition: HexagonISelLowering.h:52
llvm::SwitchCG::SwitchLowering::SwitchLowering
SwitchLowering(FunctionLoweringInfo &funcinfo)
Definition: SwitchLoweringUtils.h:251
llvm::SwitchCG::CaseBlock
This structure is used to communicate between SelectionDAGBuilder and SDISel for the code generation ...
Definition: SwitchLoweringUtils.h:109
llvm::ISD::UDIV
@ UDIV
Definition: ISDOpcodes.h:243
llvm::SelectionDAGBuilder::CopyToExportRegsIfNeeded
void CopyToExportRegsIfNeeded(const Value *V)
CopyToExportRegsIfNeeded - If the given value has virtual registers created for it,...
Definition: SelectionDAGBuilder.cpp:2043
llvm::SelectionDAGBuilder::StatepointLoweringInfo::Bases
SmallVector< const Value *, 16 > Bases
Bases[i] is the base pointer for Ptrs[i].
Definition: SelectionDAGBuilder.h:581
llvm::RegsForValue::occupiesMultipleRegs
bool occupiesMultipleRegs() const
Check if the total RegCount is greater than one.
Definition: SelectionDAGBuilder.h:907
llvm::SwitchCG::SwitchLowering
Definition: SwitchLoweringUtils.h:249
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::RISCVFenceField::W
@ W
Definition: RISCVBaseInfo.h:181
llvm::SelectionDAGBuilder::visitJumpTable
void visitJumpTable(SwitchCG::JumpTable &JT)
visitJumpTable - Emit JumpTable node in the current MBB
Definition: SelectionDAGBuilder.cpp:2529
llvm::SelectionDAGBuilder::getValue
SDValue getValue(const Value *V)
getValue - Return an SDValue for the given Value.
Definition: SelectionDAGBuilder.cpp:1471
ErrorHandling.h
MapVector.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::GCTransitionArgs
ArrayRef< const Use > GCTransitionArgs
The list of gc transition arguments present in the gc.statepoint being lowered.
Definition: SelectionDAGBuilder.h:595
llvm::SelectionDAGBuilder::StatepointLoweringInfo::NumPatchBytes
unsigned NumPatchBytes
The number of patchable bytes the call needs to get lowered into.
Definition: SelectionDAGBuilder.h:611
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:732
llvm::GCFunctionInfo
Garbage collection metadata for a single function.
Definition: GCMetadata.h:77
llvm::SwitchCG::SwitchWorkListItem
Definition: SwitchLoweringUtils.h:239
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
DenseMap.h
llvm::SelectionDAGBuilder::LowerCallSiteWithDeoptBundle
void LowerCallSiteWithDeoptBundle(const CallBase *Call, SDValue Callee, const BasicBlock *EHPadBB)
Definition: StatepointLowering.cpp:1149
llvm::SelectionDAGBuilder::StatepointLoweringInfo::EHPadBB
const BasicBlock * EHPadBB
The exception handling unwind destination, in case this represents an invoke of gc....
Definition: SelectionDAGBuilder.h:615
llvm::SwitchCG::CaseClusterIt
CaseClusterVector::iterator CaseClusterIt
Definition: SwitchLoweringUtils.h:87
llvm::Optional< CallingConv::ID >
llvm::MapVector
This class implements a map that also provides access to all stored values in a deterministic order.
Definition: MapVector.h:37
initialize
static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T, ArrayRef< StringLiteral > StandardNames)
Initialize the set of available library functions based on the specified target triple.
Definition: TargetLibraryInfo.cpp:116
llvm::DIExpression
DWARF expression.
Definition: DebugInfoMetadata.h:2557
llvm::SelectionDAGBuilder::addDanglingDebugInfo
void addDanglingDebugInfo(const DbgValueInst *DI, DebugLoc DL, unsigned Order)
Register a dbg_value which relies on a Value which we have not yet seen.
Definition: SelectionDAGBuilder.cpp:1141
llvm::RegsForValue::getCopyFromRegs
SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V=nullptr) const
Emit a series of CopyFromReg nodes that copies from this value and returns the result as a ValueVTs v...
Definition: SelectionDAGBuilder.cpp:806
llvm::SelectionDAGBuilder::ConstantsOut
DenseMap< const Constant *, unsigned > ConstantsOut
Definition: SelectionDAGBuilder.h:419
llvm::RegsForValue::isABIMangled
bool isABIMangled() const
Definition: SelectionDAGBuilder.h:870
llvm::SelectionDAGBuilder::visitSwitchCase
void visitSwitchCase(SwitchCG::CaseBlock &CB, MachineBasicBlock *SwitchBB)
visitSwitchCase - Emits the necessary code to represent a single node in the binary search tree resul...
Definition: SelectionDAGBuilder.cpp:2436
llvm::RegsForValue::getCopyToRegs
void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V=nullptr, ISD::NodeType PreferredExtendType=ISD::ANY_EXTEND) const
Emit a series of CopyToReg nodes that copies the specified value into the registers specified by this...
Definition: SelectionDAGBuilder.cpp:893
llvm::SelectionDAGBuilder::visitBitTestHeader
void visitBitTestHeader(SwitchCG::BitTestBlock &B, MachineBasicBlock *SwitchBB)
visitBitTestHeader - This function emits necessary code to produce value suitable for "bit tests"
Definition: SelectionDAGBuilder.cpp:2745
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
MachineValueType.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::GCArgs
ArrayRef< const Use > GCArgs
The full list of gc arguments to the gc.statepoint being lowered.
Definition: SelectionDAGBuilder.h:588
llvm::Optional::hasValue
constexpr bool hasValue() const
Definition: Optional.h:288
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
llvm::GCStatepointInst
Represents a gc.statepoint intrinsic call.
Definition: Statepoint.h:63
Instruction.h
TargetLowering.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::Ptrs
SmallVector< const Value *, 16 > Ptrs
Definition: SelectionDAGBuilder.h:582
llvm::SelectionDAGBuilder::DL
const DataLayout * DL
Definition: SelectionDAGBuilder.h:390
llvm::SelectionDAGBuilder::DAG
SelectionDAG & DAG
Definition: SelectionDAGBuilder.h:389
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:216
SelectionDAGNodes.h
llvm::SelectionDAGBuilder::lowerRangeToAssertZExt
SDValue lowerRangeToAssertZExt(SelectionDAG &DAG, const Instruction &I, SDValue Op)
Definition: SelectionDAGBuilder.cpp:8990
llvm::ISD::Constant
@ Constant
Definition: ISDOpcodes.h:76
llvm::AAResults
Definition: AliasAnalysis.h:456
llvm::DbgValueInst
This represents the llvm.dbg.value instruction.
Definition: IntrinsicInst.h:347
llvm::DILocalVariable
Local variable.
Definition: DebugInfoMetadata.h:3053
llvm::SmallVectorImpl::append
void append(in_iter in_start, in_iter in_end)
Add the specified range to the end of the SmallVector.
Definition: SmallVector.h:648
llvm::RegsForValue::Regs
SmallVector< unsigned, 4 > Regs
This list holds the registers assigned to the values.
Definition: SelectionDAGBuilder.h:854
llvm::User
Definition: User.h:44
llvm::SelectionDAG::getTargetLoweringInfo
const TargetLowering & getTargetLoweringInfo() const
Definition: SelectionDAG.h:443
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:35
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3165
llvm::ISD::SRA
@ SRA
Definition: ISDOpcodes.h:658
llvm::SelectionDAGBuilder::StatepointLoweringInfo::ID
unsigned ID
The ID that the resulting STATEPOINT instruction has to report.
Definition: SelectionDAGBuilder.h:598
llvm::SelectionDAGBuilder::handleDebugValue
bool handleDebugValue(ArrayRef< const Value * > Values, DILocalVariable *Var, DIExpression *Expr, DebugLoc CurDL, DebugLoc InstDL, unsigned Order, bool IsVariadic)
For a given list of Values, attempt to create and record a SDDbgValue in the SelectionDAG.
Definition: SelectionDAGBuilder.cpp:1317
llvm::SelectionDAGBuilder::resolveOrClearDbgInfo
void resolveOrClearDbgInfo()
Evict any dangling debug information, attempting to salvage it first.
Definition: SelectionDAGBuilder.cpp:1441
llvm::SelectionDAGBuilder::SDAGSwitchLowering
Definition: SelectionDAGBuilder.h:394
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::ISD::NodeType
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:40
llvm::Instruction
Definition: Instruction.h:45
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:146
llvm::SelectionDAGBuilder::setUnusedArgValue
void setUnusedArgValue(const Value *V, SDValue NewN)
Definition: SelectionDAGBuilder.h:534
llvm::SelectionDAGBuilder::clearDanglingDebugInfo
void clearDanglingDebugInfo()
Clear the dangling debug information map.
Definition: SelectionDAGBuilder.cpp:1040
SwitchLoweringUtils.h
llvm::SelectionDAGBuilder::LowerDeoptimizeCall
void LowerDeoptimizeCall(const CallInst *CI)
Definition: StatepointLowering.cpp:1262
DebugLoc.h
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:632
llvm::None
const NoneType None
Definition: None.h:23
llvm::SelectionDAGBuilder::SelectionDAGBuilder
SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo, SwiftErrorValueTracking &swifterror, CodeGenOpt::Level ol)
Definition: SelectionDAGBuilder.h:439
llvm::BranchProbability::getUnknown
static BranchProbability getUnknown()
Definition: BranchProbability.h:51
BranchProbability.h
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::SelectionDAGBuilder::getMemoryRoot
SDValue getMemoryRoot()
Return the current virtual root of the Selection DAG, flushing any PendingLoad items.
Definition: SelectionDAGBuilder.cpp:1075
llvm::InvokeInst
Invoke instruction.
Definition: Instructions.h:3713
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition: ISDOpcodes.h:377
llvm::RegsForValue
This struct represents the registers (physical or virtual) that a particular set of values is assigne...
Definition: SelectionDAGBuilder.h:836
llvm::CleanupPadInst
Definition: Instructions.h:4398
llvm::TargetLoweringBase::getFrameIndexTy
MVT getFrameIndexTy(const DataLayout &DL) const
Return the type for frame index, which is determined by the alloca address space specified through th...
Definition: TargetLowering.h:358
llvm::SelectionDAGBuilder::getValueImpl
SDValue getValueImpl(const Value *V)
getValueImpl - Helper function for getValue and getNonRegisterValue.
Definition: SelectionDAGBuilder.cpp:1515
llvm::SelectionDAGBuilder::visitJumpTableHeader
void visitJumpTableHeader(SwitchCG::JumpTable &JT, SwitchCG::JumpTableHeader &JTH, MachineBasicBlock *SwitchBB)
visitJumpTableHeader - This function emits necessary code to produce index in the JumpTable from swit...
Definition: SelectionDAGBuilder.cpp:2544
llvm::SelectionDAGBuilder::salvageUnresolvedDbgValue
void salvageUnresolvedDbgValue(DanglingDebugInfo &DDI)
For the given dangling debuginfo record, perform last-ditch efforts to resolve the debuginfo to somet...
Definition: SelectionDAGBuilder.cpp:1250
llvm::CatchReturnInst
Definition: Instructions.h:4490
llvm::CallBrInst
CallBr instruction, tracking function calls that may not return control but instead transfer it to a ...
Definition: Instructions.h:3922
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
llvm::DenseMap
Definition: DenseMap.h:714
llvm::SelectionDAGBuilder::getCopyFromRegs
SDValue getCopyFromRegs(const Value *V, Type *Ty)
If there was virtual register allocated for the value V emit CopyFromReg of the specified type Ty.
Definition: SelectionDAGBuilder.cpp:1451
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::SwiftErrorValueTracking
Definition: SwiftErrorValueTracking.h:36
ArrayRef.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::StatepointLoweringInfo
StatepointLoweringInfo(SelectionDAG &DAG)
Definition: SelectionDAGBuilder.h:617
TemplateParamKind::Type
@ Type
llvm::SelectionDAGBuilder::CopyValueToVirtualRegister
void CopyValueToVirtualRegister(const Value *V, unsigned Reg)
Definition: SelectionDAGBuilder.cpp:9829
llvm::SelectionDAGBuilder::LowerAsSTATEPOINT
SDValue LowerAsSTATEPOINT(StatepointLoweringInfo &SI)
Lower SLI into a STATEPOINT instruction.
Definition: StatepointLowering.cpp:725
llvm::SelectionDAGBuilder::SDAGSwitchLowering::addSuccessorWithProb
virtual void addSuccessorWithProb(MachineBasicBlock *Src, MachineBasicBlock *Dst, BranchProbability Prob=BranchProbability::getUnknown()) override
Definition: SelectionDAGBuilder.h:399
llvm::SelectionDAGBuilder::StatepointLowering
StatepointLoweringState StatepointLowering
State used while lowering a statepoint sequence (gc_statepoint, gc_relocate, and gc_result).
Definition: SelectionDAGBuilder.h:134
llvm::SelectionDAGBuilder::LibInfo
const TargetLibraryInfo * LibInfo
Definition: SelectionDAGBuilder.h:392
llvm::TargetLowering::CallLoweringInfo
This structure contains all information that is necessary for lowering calls.
Definition: TargetLowering.h:3723
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::FunctionLoweringInfo
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
Definition: FunctionLoweringInfo.h:53
llvm::SelectionDAGBuilder::getFrameIndexTy
MVT getFrameIndexTy()
Returns the type of FrameIndex and TargetFrameIndex nodes.
Definition: SelectionDAGBuilder.h:640
SI
StandardInstrumentations SI(Debug, VerifyEach)
llvm::SelectionDAGBuilder::SDAGSwitchLowering::SDAGSwitchLowering
SDAGSwitchLowering(SelectionDAGBuilder *sdb, FunctionLoweringInfo &funcinfo)
Definition: SelectionDAGBuilder.h:396
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
llvm::SwitchCG::JumpTableHeader
Definition: SwitchLoweringUtils.h:180
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::RegsForValue::getRegsAndSizes
SmallVector< std::pair< unsigned, TypeSize >, 4 > getRegsAndSizes() const
Return a list of registers and their sizes.
Definition: SelectionDAGBuilder.cpp:1003
llvm::SelectionDAGBuilder::isExportableFromCurrentBlock
bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB)
Definition: SelectionDAGBuilder.cpp:2069
llvm::SelectionDAGBuilder::StatepointLoweringInfo
Describes a gc.statepoint or a gc.statepoint like thing for the purposes of lowering into a STATEPOIN...
Definition: SelectionDAGBuilder.h:578
StatepointLowering.h
llvm::SelectionDAGBuilder::SwiftError
SwiftErrorValueTracking & SwiftError
Information about the swifterror values used throughout the function.
Definition: SelectionDAGBuilder.h:425
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::RegsForValue::RegVTs
SmallVector< MVT, 4 > RegVTs
The value types of the registers.
Definition: SelectionDAGBuilder.h:849
Cond
SmallVector< MachineOperand, 4 > Cond
Definition: BasicBlockSections.cpp:167
this
Analysis the ScalarEvolution expression for r is this
Definition: README.txt:8
llvm::SelectionDAGBuilder
SelectionDAGBuilder - This is the common target-independent lowering implementation that is parameter...
Definition: SelectionDAGBuilder.h:93
llvm::SwitchCG::CaseClusterVector
std::vector< CaseCluster > CaseClusterVector
Definition: SwitchLoweringUtils.h:86
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
llvm::ISD::SREM
@ SREM
Definition: ISDOpcodes.h:244
llvm::BranchProbability
Definition: BranchProbability.h:30
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::SelectionDAGBuilder::Context
LLVMContext * Context
Definition: SelectionDAGBuilder.h:437
llvm::SelectionDAGBuilder::getCurSDLoc
SDLoc getCurSDLoc() const
Definition: SelectionDAGBuilder.h:477
llvm::SelectionDAGBuilder::LowestSDNodeOrder
static const unsigned LowestSDNodeOrder
Lowest valid SDNodeOrder.
Definition: SelectionDAGBuilder.h:387
llvm::SelectionDAGBuilder::init
void init(GCFunctionInfo *gfi, AAResults *AA, const TargetLibraryInfo *li)
Definition: SelectionDAGBuilder.cpp:1016
llvm::SwitchCG::BitTestCase
Definition: SwitchLoweringUtils.h:195
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::SelectionDAGBuilder::resolveDanglingDebugInfo
void resolveDanglingDebugInfo(const Value *V, SDValue Val)
If we saw an earlier dbg_value referring to V, generate the debug data structures now that we've seen...
Definition: SelectionDAGBuilder.cpp:1196
llvm::ISD::FMUL
@ FMUL
Definition: ISDOpcodes.h:379
llvm::SwitchCG::BitTestBlock
Definition: SwitchLoweringUtils.h:208
llvm::SelectionDAGBuilder::HasTailCall
bool HasTailCall
This is set to true if a call in the current block has been translated as a tail call.
Definition: SelectionDAGBuilder.h:435
llvm::ISD::XOR
@ XOR
Definition: ISDOpcodes.h:634
llvm::SwitchCG::JumpTable
Definition: SwitchLoweringUtils.h:165
llvm::SelectionDAGBuilder::SPDescriptor
StackProtectorDescriptor SPDescriptor
A StackProtectorDescriptor structure used to communicate stack protector information in between Selec...
Definition: SelectionDAGBuilder.h:415
llvm::SelectionDAGBuilder::StatepointLoweringInfo::CLI
TargetLowering::CallLoweringInfo CLI
Information regarding the underlying call instruction.
Definition: SelectionDAGBuilder.h:601
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::SelectionDAGBuilder::StatepointLoweringInfo::DeoptState
ArrayRef< const Use > DeoptState
The deoptimization state associated with this gc.statepoint call, if any.
Definition: SelectionDAGBuilder.h:605
llvm::ResumeInst
Resume the propagation of an exception.
Definition: Instructions.h:4163
llvm::RegsForValue::AddInlineAsmOperands
void AddInlineAsmOperands(unsigned Code, bool HasMatching, unsigned MatchingIdx, const SDLoc &dl, SelectionDAG &DAG, std::vector< SDValue > &Ops) const
Add this value to the specified inlineasm node operand list.
Definition: SelectionDAGBuilder.cpp:949
llvm::SelectionDAGBuilder::visitSPDescriptorParent
void visitSPDescriptorParent(StackProtectorDescriptor &SPD, MachineBasicBlock *ParentBB)
Codegen a new tail for a stack protector check ParentMBB which has had its tail spliced into a stack ...
Definition: SelectionDAGBuilder.cpp:2628
std
Definition: BitVector.h:838
llvm::RegsForValue::append
void append(const RegsForValue &RHS)
Add the specified values to this one.
Definition: SelectionDAGBuilder.h:875
llvm::SelectionDAGBuilder::LowerCallTo
void LowerCallTo(const CallBase &CB, SDValue Callee, bool IsTailCall, bool IsMustTailCall, const BasicBlock *EHPadBB=nullptr)
Definition: SelectionDAGBuilder.cpp:7457
llvm::SelectionDAGBuilder::AA
AAResults * AA
Definition: SelectionDAGBuilder.h:391
llvm::SelectionDAGBuilder::StatepointLoweringInfo::StatepointInstr
const Instruction * StatepointInstr
The gc.statepoint instruction.
Definition: SelectionDAGBuilder.h:591
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:314
llvm::RegsForValue::ValueVTs
SmallVector< EVT, 4 > ValueVTs
The value types of the values, which may not be legal, and may need be promoted or synthesized from o...
Definition: SelectionDAGBuilder.h:839
llvm::SelectionDAG::getDataLayout
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:440
ISDOpcodes.h
llvm::SelectionDAGBuilder::FuncInfo
FunctionLoweringInfo & FuncInfo
Information about the function as a whole.
Definition: SelectionDAGBuilder.h:422
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::TargetLibraryInfo
Provides information about what library functions are available for the current target.
Definition: TargetLibraryInfo.h:219
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:138
llvm::SelectionDAGBuilder::LowerCallSiteWithDeoptBundleImpl
void LowerCallSiteWithDeoptBundleImpl(const CallBase *Call, SDValue Callee, const BasicBlock *EHPadBB, bool VarArgDisallowed, bool ForceVoidReturnTy)
Definition: StatepointLowering.cpp:1116
llvm::RegsForValue::CallConv
Optional< CallingConv::ID > CallConv
Records if this value needs to be treated in an ABI dependant manner, different to normal type legali...
Definition: SelectionDAGBuilder.h:861
llvm::CleanupReturnInst
Definition: Instructions.h:4571
llvm::IndirectBrInst
Indirect Branch Instruction.
Definition: Instructions.h:3578
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:239
llvm::SelectionDAGBuilder::StatepointLoweringInfo::GCRelocates
SmallVector< const GCRelocateInst *, 16 > GCRelocates
The set of gc.relocate calls associated with this gc.statepoint.
Definition: SelectionDAGBuilder.h:585
llvm::StatepointFlags
StatepointFlags
The statepoint intrinsic accepts a set of flags as its third argument.
Definition: Statepoint.h:40
CodeGen.h
llvm::CatchPadInst
Definition: Instructions.h:4439
llvm::Instruction::BinaryOps
BinaryOps
Definition: Instruction.h:778
llvm::StatepointLoweringState
This class tracks both per-statepoint and per-selectiondag information.
Definition: StatepointLowering.h:33
llvm::ISD::FSUB
@ FSUB
Definition: ISDOpcodes.h:378
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition: ISDOpcodes.h:657
SmallVector.h
llvm::SelectionDAGBuilder::visitBitTestCase
void visitBitTestCase(SwitchCG::BitTestBlock &BB, MachineBasicBlock *NextMBB, BranchProbability BranchProbToNext, unsigned Reg, SwitchCG::BitTestCase &B, MachineBasicBlock *SwitchBB)
visitBitTestCase - this function produces one "bit test"
Definition: SelectionDAGBuilder.cpp:2807
llvm::ISD::FREM
@ FREM
Definition: ISDOpcodes.h:381
llvm::Instruction::getDebugLoc
const DebugLoc & getDebugLoc() const
Return the debug location for this node as a DebugLoc.
Definition: Instruction.h:370
llvm::ISD::MUL
@ MUL
Definition: ISDOpcodes.h:241
llvm::ISD::UREM
@ UREM
Definition: ISDOpcodes.h:245
N
#define N
llvm::ISD::SRL
@ SRL
Definition: ISDOpcodes.h:659
llvm::SelectionDAGBuilder::getNonRegisterValue
SDValue getNonRegisterValue(const Value *V)
getNonRegisterValue - Return an SDValue for the given Value, but don't look in FuncInfo....
Definition: SelectionDAGBuilder.cpp:1492
llvm::SelectionDAGBuilder::LowerDeoptimizingReturn
void LowerDeoptimizingReturn()
Definition: StatepointLowering.cpp:1275
llvm::SelectionDAGBuilder::FindMergedConditions
void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB, Instruction::BinaryOps Opc, BranchProbability TProb, BranchProbability FProb, bool InvertCond)
Definition: SelectionDAGBuilder.cpp:2181
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::CallBase
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Definition: InstrTypes.h:1161
llvm::RegsForValue::RegsForValue
RegsForValue()=default
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::CallInst
This class represents a function call, abstracting a target machine's calling convention.
Definition: Instructions.h:1475
llvm::ISD::FNEG
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition: ISDOpcodes.h:866
llvm::SelectionDAGBuilder::visitSPDescriptorFailure
void visitSPDescriptorFailure(StackProtectorDescriptor &SPD)
Codegen the failure basic block for a stack protector check.
Definition: SelectionDAGBuilder.cpp:2722
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::UnreachableInst
This function has undefined behavior.
Definition: Instructions.h:4679
llvm::SelectionDAGBuilder::EmitBranchForMergedCondition
void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB, BranchProbability TProb, BranchProbability FProb, bool InvertCond)
EmitBranchForMergedCondition - Helper method for FindMergedConditions.
Definition: SelectionDAGBuilder.cpp:2134
llvm::SelectionDAGBuilder::SL
std::unique_ptr< SDAGSwitchLowering > SL
Definition: SelectionDAGBuilder.h:411
llvm::SwitchInst
Multiway switch.
Definition: Instructions.h:3176
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::SelectionDAGBuilder::lowerInvokable
std::pair< SDValue, SDValue > lowerInvokable(TargetLowering::CallLoweringInfo &CLI, const BasicBlock *EHPadBB=nullptr)
Definition: SelectionDAGBuilder.cpp:7417
llvm::SelectionDAGBuilder::clear
void clear()
Clear out the current SelectionDAG and the associated state and prepare this SelectionDAGBuilder obje...
Definition: SelectionDAGBuilder.cpp:1027
llvm::BranchInst
Conditional or Unconditional Branch instruction.
Definition: Instructions.h:3032
llvm::CatchSwitchInst
Definition: Instructions.h:4220
llvm::SelectionDAGBuilder::visit
void visit(const Instruction &I)
Definition: SelectionDAGBuilder.cpp:1104
llvm::SelectionDAGBuilder::getCurDebugLoc
DebugLoc getCurDebugLoc() const
Definition: SelectionDAGBuilder.h:481
llvm::SelectionDAGBuilder::ShouldEmitAsBranches
bool ShouldEmitAsBranches(const std::vector< SwitchCG::CaseBlock > &Cases)
If the set of cases should be emitted as a series of branches, return true.
Definition: SelectionDAGBuilder.cpp:2312
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
llvm::RegsForValue::RegCount
SmallVector< unsigned, 4 > RegCount
This list holds the number of registers for each value.
Definition: SelectionDAGBuilder.h:857
llvm::SelectionDAGBuilder::getRoot
SDValue getRoot()
Similar to getMemoryRoot, but also flushes PendingConstrainedFP(Strict) items.
Definition: SelectionDAGBuilder.cpp:1079
llvm::SelectionDAGBuilder::UpdateSplitBlock
void UpdateSplitBlock(MachineBasicBlock *First, MachineBasicBlock *Last)
When an MBB was split during scheduling, update the references that need to refer to the last resulti...
Definition: SelectionDAGBuilder.cpp:3041
llvm::SelectionDAGBuilder::ExportFromCurrentBlock
void ExportFromCurrentBlock(const Value *V)
ExportFromCurrentBlock - If this condition isn't known to be exported from the current basic block,...
Definition: SelectionDAGBuilder.cpp:2058
llvm::SelectionDAGBuilder::populateCallLoweringInfo
void populateCallLoweringInfo(TargetLowering::CallLoweringInfo &CLI, const CallBase *Call, unsigned ArgIdx, unsigned NumArgs, SDValue Callee, Type *ReturnTy, bool IsPatchPoint)
Populate a CallLowerinInfo (into CLI) based on the properties of the call being lowered.
Definition: SelectionDAGBuilder.cpp:9034
llvm::ISD::MCSymbol
@ MCSymbol
Definition: ISDOpcodes.h:172
llvm::SelectionDAGBuilder::dropDanglingDebugInfo
void dropDanglingDebugInfo(const DILocalVariable *Variable, const DIExpression *Expr)
If we have dangling debug info that describes Variable, or an overlapping part of variable considerin...
Definition: SelectionDAGBuilder.cpp:1168
llvm::SwitchCG::CaseCluster
A cluster of case labels.
Definition: SwitchLoweringUtils.h:42
llvm::SelectionDAGBuilder::getControlRoot
SDValue getControlRoot()
Similar to getRoot, but instead of flushing all the PendingLoad items, flush all the PendingExports (...
Definition: SelectionDAGBuilder.cpp:1095
llvm::ISD::FDIV
@ FDIV
Definition: ISDOpcodes.h:380
llvm::SelectionDAGBuilder::GFI
GCFunctionInfo * GFI
Garbage collection metadata for the function.
Definition: SelectionDAGBuilder.h:428