LLVM  14.0.0git
SelectionDAGBuilder.h
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1 //===- SelectionDAGBuilder.h - Selection-DAG building -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements routines for translating from LLVM IR into SelectionDAG IR.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
14 #define LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
15 
16 #include "StatepointLowering.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/MapVector.h"
20 #include "llvm/ADT/SmallVector.h"
27 #include "llvm/IR/DebugLoc.h"
28 #include "llvm/IR/Instruction.h"
30 #include "llvm/Support/CodeGen.h"
33 #include <algorithm>
34 #include <cassert>
35 #include <cstdint>
36 #include <utility>
37 #include <vector>
38 
39 namespace llvm {
40 
41 class AAResults;
42 class AllocaInst;
43 class AtomicCmpXchgInst;
44 class AtomicRMWInst;
45 class BasicBlock;
46 class BranchInst;
47 class CallInst;
48 class CallBrInst;
49 class CatchPadInst;
50 class CatchReturnInst;
51 class CatchSwitchInst;
52 class CleanupPadInst;
53 class CleanupReturnInst;
54 class Constant;
55 class ConstrainedFPIntrinsic;
56 class DbgValueInst;
57 class DataLayout;
58 class DIExpression;
59 class DILocalVariable;
60 class DILocation;
61 class FenceInst;
62 class FunctionLoweringInfo;
63 class GCFunctionInfo;
64 class GCRelocateInst;
65 class GCResultInst;
66 class GCStatepointInst;
67 class IndirectBrInst;
68 class InvokeInst;
69 class LandingPadInst;
70 class LLVMContext;
71 class LoadInst;
72 class MachineBasicBlock;
73 class PHINode;
74 class ResumeInst;
75 class ReturnInst;
76 class SDDbgValue;
77 class SelectionDAG;
78 class StoreInst;
79 class SwiftErrorValueTracking;
80 class SwitchInst;
81 class TargetLibraryInfo;
82 class TargetMachine;
83 class Type;
84 class VAArgInst;
85 class UnreachableInst;
86 class Use;
87 class User;
88 class Value;
89 
90 //===----------------------------------------------------------------------===//
91 /// SelectionDAGBuilder - This is the common target-independent lowering
92 /// implementation that is parameterized by a TargetLowering object.
93 ///
95  /// The current instruction being visited.
96  const Instruction *CurInst = nullptr;
97 
99 
100  /// Maps argument value for unused arguments. This is used
101  /// to preserve debug information for incoming arguments.
102  DenseMap<const Value*, SDValue> UnusedArgNodeMap;
103 
104  /// Helper type for DanglingDebugInfoMap.
105  class DanglingDebugInfo {
106  const DbgValueInst* DI = nullptr;
107  DebugLoc dl;
108  unsigned SDNodeOrder = 0;
109 
110  public:
111  DanglingDebugInfo() = default;
112  DanglingDebugInfo(const DbgValueInst *di, DebugLoc DL, unsigned SDNO)
113  : DI(di), dl(std::move(DL)), SDNodeOrder(SDNO) {}
114 
115  const DbgValueInst* getDI() { return DI; }
116  DebugLoc getdl() { return dl; }
117  unsigned getSDNodeOrder() { return SDNodeOrder; }
118  };
119 
120  /// Helper type for DanglingDebugInfoMap.
121  typedef std::vector<DanglingDebugInfo> DanglingDebugInfoVector;
122 
123  /// Keeps track of dbg_values for which we have not yet seen the referent.
124  /// We defer handling these until we do see it.
126 
127 public:
128  /// Loads are not emitted to the program immediately. We bunch them up and
129  /// then emit token factor nodes when possible. This allows us to get simple
130  /// disambiguation between loads without worrying about alias analysis.
132 
133  /// State used while lowering a statepoint sequence (gc_statepoint,
134  /// gc_relocate, and gc_result). See StatepointLowering.hpp/cpp for details.
136 
137 private:
138  /// CopyToReg nodes that copy values to virtual registers for export to other
139  /// blocks need to be emitted before any terminator instruction, but they have
140  /// no other ordering requirements. We bunch them up and the emit a single
141  /// tokenfactor for them just before terminator instructions.
142  SmallVector<SDValue, 8> PendingExports;
143 
144  /// Similar to loads, nodes corresponding to constrained FP intrinsics are
145  /// bunched up and emitted when necessary. These can be moved across each
146  /// other and any (normal) memory operation (load or store), but not across
147  /// calls or instructions having unspecified side effects. As a special
148  /// case, constrained FP intrinsics using fpexcept.strict may not be deleted
149  /// even if otherwise unused, so they need to be chained before any
150  /// terminator instruction (like PendingExports). We track the latter
151  /// set of nodes in a separate list.
152  SmallVector<SDValue, 8> PendingConstrainedFP;
153  SmallVector<SDValue, 8> PendingConstrainedFPStrict;
154 
155  /// Update root to include all chains from the Pending list.
156  SDValue updateRoot(SmallVectorImpl<SDValue> &Pending);
157 
158  /// A unique monotonically increasing number used to order the SDNodes we
159  /// create.
160  unsigned SDNodeOrder;
161 
162  /// Determine the rank by weight of CC in [First,Last]. If CC has more weight
163  /// than each cluster in the range, its rank is 0.
164  unsigned caseClusterRank(const SwitchCG::CaseCluster &CC,
167 
168  /// Emit comparison and split W into two subtrees.
169  void splitWorkItem(SwitchCG::SwitchWorkList &WorkList,
171  MachineBasicBlock *SwitchMBB);
172 
173  /// Lower W.
174  void lowerWorkItem(SwitchCG::SwitchWorkListItem W, Value *Cond,
175  MachineBasicBlock *SwitchMBB,
176  MachineBasicBlock *DefaultMBB);
177 
178  /// Peel the top probability case if it exceeds the threshold
180  peelDominantCaseCluster(const SwitchInst &SI,
181  SwitchCG::CaseClusterVector &Clusters,
182  BranchProbability &PeeledCaseProb);
183 
184 private:
185  const TargetMachine &TM;
186 
187 public:
188  /// Lowest valid SDNodeOrder. The special case 0 is reserved for scheduling
189  /// nodes without a corresponding SDNode.
190  static const unsigned LowestSDNodeOrder = 1;
191 
193  const DataLayout *DL = nullptr;
194  AAResults *AA = nullptr;
196 
198  public:
200  : SwitchCG::SwitchLowering(funcinfo), SDB(sdb) {}
201 
202  virtual void addSuccessorWithProb(
205  SDB->addSuccessorWithProb(Src, Dst, Prob);
206  }
207 
208  private:
209  SelectionDAGBuilder *SDB;
210  };
211 
212  // Data related to deferred switch lowerings. Used to construct additional
213  // Basic Blocks in SelectionDAGISel::FinishBasicBlock.
214  std::unique_ptr<SDAGSwitchLowering> SL;
215 
216  /// A StackProtectorDescriptor structure used to communicate stack protector
217  /// information in between SelectBasicBlock and FinishBasicBlock.
219 
220  // Emit PHI-node-operand constants only once even if used by multiple
221  // PHI nodes.
223 
224  /// Information about the function as a whole.
226 
227  /// Information about the swifterror values used throughout the function.
229 
230  /// Garbage collection metadata for the function.
232 
233  /// Map a landing pad to the call site indexes.
235 
236  /// This is set to true if a call in the current block has been translated as
237  /// a tail call. In this case, no subsequent DAG nodes should be created.
238  bool HasTailCall = false;
239 
241 
244  : SDNodeOrder(LowestSDNodeOrder), TM(dag.getTarget()), DAG(dag),
245  SL(std::make_unique<SDAGSwitchLowering>(this, funcinfo)), FuncInfo(funcinfo),
246  SwiftError(swifterror) {}
247 
248  void init(GCFunctionInfo *gfi, AAResults *AA,
249  const TargetLibraryInfo *li);
250 
251  /// Clear out the current SelectionDAG and the associated state and prepare
252  /// this SelectionDAGBuilder object to be used for a new block. This doesn't
253  /// clear out information about additional blocks that are needed to complete
254  /// switch lowering or PHI node updating; that information is cleared out as
255  /// it is consumed.
256  void clear();
257 
258  /// Clear the dangling debug information map. This function is separated from
259  /// the clear so that debug information that is dangling in a basic block can
260  /// be properly resolved in a different basic block. This allows the
261  /// SelectionDAG to resolve dangling debug information attached to PHI nodes.
262  void clearDanglingDebugInfo();
263 
264  /// Return the current virtual root of the Selection DAG, flushing any
265  /// PendingLoad items. This must be done before emitting a store or any other
266  /// memory node that may need to be ordered after any prior load instructions.
268 
269  /// Similar to getMemoryRoot, but also flushes PendingConstrainedFP(Strict)
270  /// items. This must be done before emitting any call other any other node
271  /// that may need to be ordered after FP instructions due to other side
272  /// effects.
273  SDValue getRoot();
274 
275  /// Similar to getRoot, but instead of flushing all the PendingLoad items,
276  /// flush all the PendingExports (and PendingConstrainedFPStrict) items.
277  /// It is necessary to do this before emitting a terminator instruction.
279 
280  SDLoc getCurSDLoc() const {
281  return SDLoc(CurInst, SDNodeOrder);
282  }
283 
285  return CurInst ? CurInst->getDebugLoc() : DebugLoc();
286  }
287 
288  void CopyValueToVirtualRegister(const Value *V, unsigned Reg);
289 
290  void visit(const Instruction &I);
291 
292  void visit(unsigned Opcode, const User &I);
293 
294  /// If there was virtual register allocated for the value V emit CopyFromReg
295  /// of the specified type Ty. Return empty SDValue() otherwise.
296  SDValue getCopyFromRegs(const Value *V, Type *Ty);
297 
298  /// Register a dbg_value which relies on a Value which we have not yet seen.
300  unsigned Order);
301 
302  /// If we have dangling debug info that describes \p Variable, or an
303  /// overlapping part of variable considering the \p Expr, then this method
304  /// will drop that debug info as it isn't valid any longer.
305  void dropDanglingDebugInfo(const DILocalVariable *Variable,
306  const DIExpression *Expr);
307 
308  /// If we saw an earlier dbg_value referring to V, generate the debug data
309  /// structures now that we've seen its definition.
310  void resolveDanglingDebugInfo(const Value *V, SDValue Val);
311 
312  /// For the given dangling debuginfo record, perform last-ditch efforts to
313  /// resolve the debuginfo to something that is represented in this DAG. If
314  /// this cannot be done, produce an Undef debug value record.
315  void salvageUnresolvedDbgValue(DanglingDebugInfo &DDI);
316 
317  /// For a given list of Values, attempt to create and record a SDDbgValue in
318  /// the SelectionDAG.
320  DIExpression *Expr, DebugLoc CurDL, DebugLoc InstDL,
321  unsigned Order, bool IsVariadic);
322 
323  /// Evict any dangling debug information, attempting to salvage it first.
324  void resolveOrClearDbgInfo();
325 
326  SDValue getValue(const Value *V);
327 
329  SDValue getValueImpl(const Value *V);
330 
331  void setValue(const Value *V, SDValue NewN) {
332  SDValue &N = NodeMap[V];
333  assert(!N.getNode() && "Already set a value for this node!");
334  N = NewN;
335  }
336 
337  void setUnusedArgValue(const Value *V, SDValue NewN) {
338  SDValue &N = UnusedArgNodeMap[V];
339  assert(!N.getNode() && "Already set a value for this node!");
340  N = NewN;
341  }
342 
345  MachineBasicBlock *SwitchBB,
347  BranchProbability FProb, bool InvertCond);
349  MachineBasicBlock *FBB,
350  MachineBasicBlock *CurBB,
351  MachineBasicBlock *SwitchBB,
353  bool InvertCond);
354  bool ShouldEmitAsBranches(const std::vector<SwitchCG::CaseBlock> &Cases);
355  bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB);
356  void CopyToExportRegsIfNeeded(const Value *V);
357  void ExportFromCurrentBlock(const Value *V);
358  void LowerCallTo(const CallBase &CB, SDValue Callee, bool IsTailCall,
359  bool IsMustTailCall, const BasicBlock *EHPadBB = nullptr);
360 
361  // Lower range metadata from 0 to N to assert zext to an integer of nearest
362  // floor power of two.
364  SDValue Op);
365 
367  const CallBase *Call, unsigned ArgIdx,
368  unsigned NumArgs, SDValue Callee,
369  Type *ReturnTy, bool IsPatchPoint);
370 
371  std::pair<SDValue, SDValue>
373  const BasicBlock *EHPadBB = nullptr);
374 
375  /// When an MBB was split during scheduling, update the
376  /// references that need to refer to the last resulting block.
378 
379  /// Describes a gc.statepoint or a gc.statepoint like thing for the purposes
380  /// of lowering into a STATEPOINT node.
382  /// Bases[i] is the base pointer for Ptrs[i]. Together they denote the set
383  /// of gc pointers this STATEPOINT has to relocate.
386 
387  /// The set of gc.relocate calls associated with this gc.statepoint.
389 
390  /// The full list of gc arguments to the gc.statepoint being lowered.
392 
393  /// The gc.statepoint instruction.
394  const Instruction *StatepointInstr = nullptr;
395 
396  /// The list of gc transition arguments present in the gc.statepoint being
397  /// lowered.
399 
400  /// The ID that the resulting STATEPOINT instruction has to report.
401  unsigned ID = -1;
402 
403  /// Information regarding the underlying call instruction.
405 
406  /// The deoptimization state associated with this gc.statepoint call, if
407  /// any.
409 
410  /// Flags associated with the meta arguments being lowered.
412 
413  /// The number of patchable bytes the call needs to get lowered into.
414  unsigned NumPatchBytes = -1;
415 
416  /// The exception handling unwind destination, in case this represents an
417  /// invoke of gc.statepoint.
418  const BasicBlock *EHPadBB = nullptr;
419 
421  };
422 
423  /// Lower \p SLI into a STATEPOINT instruction.
424  SDValue LowerAsSTATEPOINT(StatepointLoweringInfo &SI);
425 
426  // This function is responsible for the whole statepoint lowering process.
427  // It uniformly handles invoke and call statepoints.
428  void LowerStatepoint(const GCStatepointInst &I,
429  const BasicBlock *EHPadBB = nullptr);
430 
431  void LowerCallSiteWithDeoptBundle(const CallBase *Call, SDValue Callee,
432  const BasicBlock *EHPadBB);
433 
434  void LowerDeoptimizeCall(const CallInst *CI);
436 
437  void LowerCallSiteWithDeoptBundleImpl(const CallBase *Call, SDValue Callee,
438  const BasicBlock *EHPadBB,
439  bool VarArgDisallowed,
440  bool ForceVoidReturnTy);
441 
442  /// Returns the type of FrameIndex and TargetFrameIndex nodes.
445  }
446 
447 private:
448  // Terminator instructions.
449  void visitRet(const ReturnInst &I);
450  void visitBr(const BranchInst &I);
451  void visitSwitch(const SwitchInst &I);
452  void visitIndirectBr(const IndirectBrInst &I);
453  void visitUnreachable(const UnreachableInst &I);
454  void visitCleanupRet(const CleanupReturnInst &I);
455  void visitCatchSwitch(const CatchSwitchInst &I);
456  void visitCatchRet(const CatchReturnInst &I);
457  void visitCatchPad(const CatchPadInst &I);
458  void visitCleanupPad(const CleanupPadInst &CPI);
459 
460  BranchProbability getEdgeProbability(const MachineBasicBlock *Src,
461  const MachineBasicBlock *Dst) const;
462  void addSuccessorWithProb(
465 
466 public:
469  MachineBasicBlock *ParentBB);
472  MachineBasicBlock *SwitchBB);
474  BranchProbability BranchProbToNext, unsigned Reg,
479  MachineBasicBlock *SwitchBB);
480 
481 private:
482  // These all get lowered before this pass.
483  void visitInvoke(const InvokeInst &I);
484  void visitCallBr(const CallBrInst &I);
485  void visitResume(const ResumeInst &I);
486 
487  void visitUnary(const User &I, unsigned Opcode);
488  void visitFNeg(const User &I) { visitUnary(I, ISD::FNEG); }
489 
490  void visitBinary(const User &I, unsigned Opcode);
491  void visitShift(const User &I, unsigned Opcode);
492  void visitAdd(const User &I) { visitBinary(I, ISD::ADD); }
493  void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); }
494  void visitSub(const User &I) { visitBinary(I, ISD::SUB); }
495  void visitFSub(const User &I) { visitBinary(I, ISD::FSUB); }
496  void visitMul(const User &I) { visitBinary(I, ISD::MUL); }
497  void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); }
498  void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
499  void visitSRem(const User &I) { visitBinary(I, ISD::SREM); }
500  void visitFRem(const User &I) { visitBinary(I, ISD::FREM); }
501  void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); }
502  void visitSDiv(const User &I);
503  void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); }
504  void visitAnd (const User &I) { visitBinary(I, ISD::AND); }
505  void visitOr (const User &I) { visitBinary(I, ISD::OR); }
506  void visitXor (const User &I) { visitBinary(I, ISD::XOR); }
507  void visitShl (const User &I) { visitShift(I, ISD::SHL); }
508  void visitLShr(const User &I) { visitShift(I, ISD::SRL); }
509  void visitAShr(const User &I) { visitShift(I, ISD::SRA); }
510  void visitICmp(const User &I);
511  void visitFCmp(const User &I);
512  // Visit the conversion instructions
513  void visitTrunc(const User &I);
514  void visitZExt(const User &I);
515  void visitSExt(const User &I);
516  void visitFPTrunc(const User &I);
517  void visitFPExt(const User &I);
518  void visitFPToUI(const User &I);
519  void visitFPToSI(const User &I);
520  void visitUIToFP(const User &I);
521  void visitSIToFP(const User &I);
522  void visitPtrToInt(const User &I);
523  void visitIntToPtr(const User &I);
524  void visitBitCast(const User &I);
525  void visitAddrSpaceCast(const User &I);
526 
527  void visitExtractElement(const User &I);
528  void visitInsertElement(const User &I);
529  void visitShuffleVector(const User &I);
530 
531  void visitExtractValue(const User &I);
532  void visitInsertValue(const User &I);
533  void visitLandingPad(const LandingPadInst &LP);
534 
535  void visitGetElementPtr(const User &I);
536  void visitSelect(const User &I);
537 
538  void visitAlloca(const AllocaInst &I);
539  void visitLoad(const LoadInst &I);
540  void visitStore(const StoreInst &I);
541  void visitMaskedLoad(const CallInst &I, bool IsExpanding = false);
542  void visitMaskedStore(const CallInst &I, bool IsCompressing = false);
543  void visitMaskedGather(const CallInst &I);
544  void visitMaskedScatter(const CallInst &I);
545  void visitAtomicCmpXchg(const AtomicCmpXchgInst &I);
546  void visitAtomicRMW(const AtomicRMWInst &I);
547  void visitFence(const FenceInst &I);
548  void visitPHI(const PHINode &I);
549  void visitCall(const CallInst &I);
550  bool visitMemCmpBCmpCall(const CallInst &I);
551  bool visitMemPCpyCall(const CallInst &I);
552  bool visitMemChrCall(const CallInst &I);
553  bool visitStrCpyCall(const CallInst &I, bool isStpcpy);
554  bool visitStrCmpCall(const CallInst &I);
555  bool visitStrLenCall(const CallInst &I);
556  bool visitStrNLenCall(const CallInst &I);
557  bool visitUnaryFloatCall(const CallInst &I, unsigned Opcode);
558  bool visitBinaryFloatCall(const CallInst &I, unsigned Opcode);
559  void visitAtomicLoad(const LoadInst &I);
560  void visitAtomicStore(const StoreInst &I);
561  void visitLoadFromSwiftError(const LoadInst &I);
562  void visitStoreToSwiftError(const StoreInst &I);
563  void visitFreeze(const FreezeInst &I);
564 
565  void visitInlineAsm(const CallBase &Call,
566  const BasicBlock *EHPadBB = nullptr);
567  void visitIntrinsicCall(const CallInst &I, unsigned Intrinsic);
568  void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic);
569  void visitConstrainedFPIntrinsic(const ConstrainedFPIntrinsic &FPI);
570  void visitVPLoadGather(const VPIntrinsic &VPIntrin, EVT VT,
571  SmallVector<SDValue, 7> &OpValues, bool isGather);
572  void visitVPStoreScatter(const VPIntrinsic &VPIntrin,
573  SmallVector<SDValue, 7> &OpValues, bool isScatter);
574  void visitVectorPredicationIntrinsic(const VPIntrinsic &VPIntrin);
575 
576  void visitVAStart(const CallInst &I);
577  void visitVAArg(const VAArgInst &I);
578  void visitVAEnd(const CallInst &I);
579  void visitVACopy(const CallInst &I);
580  void visitStackmap(const CallInst &I);
581  void visitPatchpoint(const CallBase &CB, const BasicBlock *EHPadBB = nullptr);
582 
583  // These two are implemented in StatepointLowering.cpp
584  void visitGCRelocate(const GCRelocateInst &Relocate);
585  void visitGCResult(const GCResultInst &I);
586 
587  void visitVectorReduce(const CallInst &I, unsigned Intrinsic);
588  void visitVectorReverse(const CallInst &I);
589  void visitVectorSplice(const CallInst &I);
590  void visitStepVector(const CallInst &I);
591 
592  void visitUserOp1(const Instruction &I) {
593  llvm_unreachable("UserOp1 should not exist at instruction selection time!");
594  }
595  void visitUserOp2(const Instruction &I) {
596  llvm_unreachable("UserOp2 should not exist at instruction selection time!");
597  }
598 
599  void processIntegerCallValue(const Instruction &I,
600  SDValue Value, bool IsSigned);
601 
602  void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
603 
604  void emitInlineAsmError(const CallBase &Call, const Twine &Message);
605 
606  /// If V is an function argument then create corresponding DBG_VALUE machine
607  /// instruction for it now. At the end of instruction selection, they will be
608  /// inserted to the entry BB.
609  bool EmitFuncArgumentDbgValue(const Value *V, DILocalVariable *Variable,
610  DIExpression *Expr, DILocation *DL,
611  bool IsDbgDeclare, const SDValue &N);
612 
613  /// Return the next block after MBB, or nullptr if there is none.
614  MachineBasicBlock *NextBlock(MachineBasicBlock *MBB);
615 
616  /// Update the DAG and DAG builder with the relevant information after
617  /// a new root node has been created which could be a tail call.
618  void updateDAGForMaybeTailCall(SDValue MaybeTC);
619 
620  /// Return the appropriate SDDbgValue based on N.
621  SDDbgValue *getDbgValue(SDValue N, DILocalVariable *Variable,
622  DIExpression *Expr, const DebugLoc &dl,
623  unsigned DbgSDNodeOrder);
624 
625  /// Lowers CallInst to an external symbol.
626  void lowerCallToExternalSymbol(const CallInst &I, const char *FunctionName);
627 
628  SDValue lowerStartEH(SDValue Chain, const BasicBlock *EHPadBB,
629  MCSymbol *&BeginLabel);
630  SDValue lowerEndEH(SDValue Chain, const InvokeInst *II,
631  const BasicBlock *EHPadBB, MCSymbol *BeginLabel);
632 };
633 
634 /// This struct represents the registers (physical or virtual)
635 /// that a particular set of values is assigned, and the type information about
636 /// the value. The most common situation is to represent one value at a time,
637 /// but struct or array values are handled element-wise as multiple values. The
638 /// splitting of aggregates is performed recursively, so that we never have
639 /// aggregate-typed registers. The values at this point do not necessarily have
640 /// legal types, so each value may require one or more registers of some legal
641 /// type.
642 ///
643 struct RegsForValue {
644  /// The value types of the values, which may not be legal, and
645  /// may need be promoted or synthesized from one or more registers.
647 
648  /// The value types of the registers. This is the same size as ValueVTs and it
649  /// records, for each value, what the type of the assigned register or
650  /// registers are. (Individual values are never synthesized from more than one
651  /// type of register.)
652  ///
653  /// With virtual registers, the contents of RegVTs is redundant with TLI's
654  /// getRegisterType member function, however when with physical registers
655  /// it is necessary to have a separate record of the types.
657 
658  /// This list holds the registers assigned to the values.
659  /// Each legal or promoted value requires one register, and each
660  /// expanded value requires multiple registers.
662 
663  /// This list holds the number of registers for each value.
665 
666  /// Records if this value needs to be treated in an ABI dependant manner,
667  /// different to normal type legalization.
669 
670  RegsForValue() = default;
671  RegsForValue(const SmallVector<unsigned, 4> &regs, MVT regvt, EVT valuevt,
674  const DataLayout &DL, unsigned Reg, Type *Ty,
676 
677  bool isABIMangled() const {
678  return CallConv.hasValue();
679  }
680 
681  /// Add the specified values to this one.
682  void append(const RegsForValue &RHS) {
683  ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
684  RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
685  Regs.append(RHS.Regs.begin(), RHS.Regs.end());
686  RegCount.push_back(RHS.Regs.size());
687  }
688 
689  /// Emit a series of CopyFromReg nodes that copies from this value and returns
690  /// the result as a ValueVTs value. This uses Chain/Flag as the input and
691  /// updates them for the output Chain/Flag. If the Flag pointer is NULL, no
692  /// flag is used.
694  const SDLoc &dl, SDValue &Chain, SDValue *Flag,
695  const Value *V = nullptr) const;
696 
697  /// Emit a series of CopyToReg nodes that copies the specified value into the
698  /// registers specified by this object. This uses Chain/Flag as the input and
699  /// updates them for the output Chain/Flag. If the Flag pointer is nullptr, no
700  /// flag is used. If V is not nullptr, then it is used in printing better
701  /// diagnostic messages on error.
702  void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl,
703  SDValue &Chain, SDValue *Flag, const Value *V = nullptr,
704  ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
705 
706  /// Add this value to the specified inlineasm node operand list. This adds the
707  /// code marker, matching input operand index (if applicable), and includes
708  /// the number of values added into it.
709  void AddInlineAsmOperands(unsigned Code, bool HasMatching,
710  unsigned MatchingIdx, const SDLoc &dl,
711  SelectionDAG &DAG, std::vector<SDValue> &Ops) const;
712 
713  /// Check if the total RegCount is greater than one.
714  bool occupiesMultipleRegs() const {
715  return std::accumulate(RegCount.begin(), RegCount.end(), 0) > 1;
716  }
717 
718  /// Return a list of registers and their sizes.
720 };
721 
722 } // end namespace llvm
723 
724 #endif // LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
llvm::ISD::SUB
@ SUB
Definition: ISDOpcodes.h:240
llvm::SelectionDAGBuilder::LowerStatepoint
void LowerStatepoint(const GCStatepointInst &I, const BasicBlock *EHPadBB=nullptr)
Definition: StatepointLowering.cpp:994
llvm::SelectionDAGBuilder::LPadToCallSiteMap
DenseMap< MachineBasicBlock *, SmallVector< unsigned, 4 > > LPadToCallSiteMap
Map a landing pad to the call site indexes.
Definition: SelectionDAGBuilder.h:234
ValueTypes.h
llvm::objcarc::ARCInstKind::User
@ User
could "use" a pointer
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::ReturnInst
Return a value (possibly void), from a function.
Definition: Instructions.h:2986
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1086
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::ISD::OR
@ OR
Definition: ISDOpcodes.h:633
llvm::SelectionDAGBuilder::setValue
void setValue(const Value *V, SDValue NewN)
Definition: SelectionDAGBuilder.h:331
llvm::SelectionDAGBuilder::PendingLoads
SmallVector< SDValue, 8 > PendingLoads
Loads are not emitted to the program immediately.
Definition: SelectionDAGBuilder.h:131
llvm::HexagonISD::JT
@ JT
Definition: HexagonISelLowering.h:52
llvm::SwitchCG::SwitchLowering::SwitchLowering
SwitchLowering(FunctionLoweringInfo &funcinfo)
Definition: SwitchLoweringUtils.h:251
llvm::SwitchCG::CaseBlock
This structure is used to communicate between SelectionDAGBuilder and SDISel for the code generation ...
Definition: SwitchLoweringUtils.h:109
llvm::ISD::UDIV
@ UDIV
Definition: ISDOpcodes.h:243
llvm::SelectionDAGBuilder::CopyToExportRegsIfNeeded
void CopyToExportRegsIfNeeded(const Value *V)
CopyToExportRegsIfNeeded - If the given value has virtual registers created for it,...
Definition: SelectionDAGBuilder.cpp:2060
llvm::SelectionDAGBuilder::StatepointLoweringInfo::Bases
SmallVector< const Value *, 16 > Bases
Bases[i] is the base pointer for Ptrs[i].
Definition: SelectionDAGBuilder.h:384
llvm::RegsForValue::occupiesMultipleRegs
bool occupiesMultipleRegs() const
Check if the total RegCount is greater than one.
Definition: SelectionDAGBuilder.h:714
llvm::SwitchCG::SwitchLowering
Definition: SwitchLoweringUtils.h:249
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::RISCVFenceField::W
@ W
Definition: RISCVBaseInfo.h:199
llvm::SelectionDAGBuilder::visitJumpTable
void visitJumpTable(SwitchCG::JumpTable &JT)
visitJumpTable - Emit JumpTable node in the current MBB
Definition: SelectionDAGBuilder.cpp:2546
llvm::SelectionDAGBuilder::getValue
SDValue getValue(const Value *V)
getValue - Return an SDValue for the given Value.
Definition: SelectionDAGBuilder.cpp:1491
ErrorHandling.h
MapVector.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::GCTransitionArgs
ArrayRef< const Use > GCTransitionArgs
The list of gc transition arguments present in the gc.statepoint being lowered.
Definition: SelectionDAGBuilder.h:398
llvm::SelectionDAGBuilder::StatepointLoweringInfo::NumPatchBytes
unsigned NumPatchBytes
The number of patchable bytes the call needs to get lowered into.
Definition: SelectionDAGBuilder.h:414
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:732
llvm::GCFunctionInfo
Garbage collection metadata for a single function.
Definition: GCMetadata.h:77
llvm::SwitchCG::SwitchWorkListItem
Definition: SwitchLoweringUtils.h:239
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
DenseMap.h
llvm::SelectionDAGBuilder::LowerCallSiteWithDeoptBundle
void LowerCallSiteWithDeoptBundle(const CallBase *Call, SDValue Callee, const BasicBlock *EHPadBB)
Definition: StatepointLowering.cpp:1149
llvm::SelectionDAGBuilder::StatepointLoweringInfo::EHPadBB
const BasicBlock * EHPadBB
The exception handling unwind destination, in case this represents an invoke of gc....
Definition: SelectionDAGBuilder.h:418
llvm::SwitchCG::CaseClusterIt
CaseClusterVector::iterator CaseClusterIt
Definition: SwitchLoweringUtils.h:87
llvm::Optional< CallingConv::ID >
llvm::MapVector
This class implements a map that also provides access to all stored values in a deterministic order.
Definition: MapVector.h:37
llvm::DIExpression
DWARF expression.
Definition: DebugInfoMetadata.h:2586
llvm::SelectionDAGBuilder::addDanglingDebugInfo
void addDanglingDebugInfo(const DbgValueInst *DI, DebugLoc DL, unsigned Order)
Register a dbg_value which relies on a Value which we have not yet seen.
Definition: SelectionDAGBuilder.cpp:1159
llvm::RegsForValue::getCopyFromRegs
SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V=nullptr) const
Emit a series of CopyFromReg nodes that copies from this value and returns the result as a ValueVTs v...
Definition: SelectionDAGBuilder.cpp:824
llvm::SelectionDAGBuilder::ConstantsOut
DenseMap< const Constant *, unsigned > ConstantsOut
Definition: SelectionDAGBuilder.h:222
llvm::RegsForValue::isABIMangled
bool isABIMangled() const
Definition: SelectionDAGBuilder.h:677
llvm::isGather
bool isGather(IntrinsicInst *IntInst)
Definition: ARMBaseInstrInfo.h:899
llvm::SelectionDAGBuilder::visitSwitchCase
void visitSwitchCase(SwitchCG::CaseBlock &CB, MachineBasicBlock *SwitchBB)
visitSwitchCase - Emits the necessary code to represent a single node in the binary search tree resul...
Definition: SelectionDAGBuilder.cpp:2453
llvm::RegsForValue::getCopyToRegs
void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V=nullptr, ISD::NodeType PreferredExtendType=ISD::ANY_EXTEND) const
Emit a series of CopyToReg nodes that copies the specified value into the registers specified by this...
Definition: SelectionDAGBuilder.cpp:911
llvm::SelectionDAGBuilder::visitBitTestHeader
void visitBitTestHeader(SwitchCG::BitTestBlock &B, MachineBasicBlock *SwitchBB)
visitBitTestHeader - This function emits necessary code to produce value suitable for "bit tests"
Definition: SelectionDAGBuilder.cpp:2762
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
MachineValueType.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::GCArgs
ArrayRef< const Use > GCArgs
The full list of gc arguments to the gc.statepoint being lowered.
Definition: SelectionDAGBuilder.h:391
llvm::Optional::hasValue
constexpr bool hasValue() const
Definition: Optional.h:288
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
llvm::GCStatepointInst
Represents a gc.statepoint intrinsic call.
Definition: Statepoint.h:63
Instruction.h
TargetLowering.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::Ptrs
SmallVector< const Value *, 16 > Ptrs
Definition: SelectionDAGBuilder.h:385
llvm::SelectionDAGBuilder::DL
const DataLayout * DL
Definition: SelectionDAGBuilder.h:193
llvm::SelectionDAGBuilder::DAG
SelectionDAG & DAG
Definition: SelectionDAGBuilder.h:192
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:216
SelectionDAGNodes.h
llvm::SelectionDAGBuilder::lowerRangeToAssertZExt
SDValue lowerRangeToAssertZExt(SelectionDAG &DAG, const Instruction &I, SDValue Op)
Definition: SelectionDAGBuilder.cpp:9123
llvm::ISD::Constant
@ Constant
Definition: ISDOpcodes.h:76
llvm::AAResults
Definition: AliasAnalysis.h:508
llvm::DbgValueInst
This represents the llvm.dbg.value instruction.
Definition: IntrinsicInst.h:347
llvm::DILocalVariable
Local variable.
Definition: DebugInfoMetadata.h:3097
llvm::SmallVectorImpl::append
void append(in_iter in_start, in_iter in_end)
Add the specified range to the end of the SmallVector.
Definition: SmallVector.h:648
llvm::RegsForValue::Regs
SmallVector< unsigned, 4 > Regs
This list holds the registers assigned to the values.
Definition: SelectionDAGBuilder.h:661
llvm::User
Definition: User.h:44
llvm::SelectionDAG::getTargetLoweringInfo
const TargetLowering & getTargetLoweringInfo() const
Definition: SelectionDAG.h:443
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:35
llvm::StackProtectorDescriptor
Encapsulates all of the information needed to generate a stack protector check, and signals to isel w...
Definition: CodeGenCommonISel.h:115
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3187
llvm::ISD::SRA
@ SRA
Definition: ISDOpcodes.h:658
llvm::SelectionDAGBuilder::StatepointLoweringInfo::ID
unsigned ID
The ID that the resulting STATEPOINT instruction has to report.
Definition: SelectionDAGBuilder.h:401
llvm::SelectionDAGBuilder::handleDebugValue
bool handleDebugValue(ArrayRef< const Value * > Values, DILocalVariable *Var, DIExpression *Expr, DebugLoc CurDL, DebugLoc InstDL, unsigned Order, bool IsVariadic)
For a given list of Values, attempt to create and record a SDDbgValue in the SelectionDAG.
Definition: SelectionDAGBuilder.cpp:1337
llvm::SelectionDAGBuilder::resolveOrClearDbgInfo
void resolveOrClearDbgInfo()
Evict any dangling debug information, attempting to salvage it first.
Definition: SelectionDAGBuilder.cpp:1461
llvm::SelectionDAGBuilder::SDAGSwitchLowering
Definition: SelectionDAGBuilder.h:197
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::ISD::NodeType
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:40
llvm::Instruction
Definition: Instruction.h:45
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:146
llvm::SelectionDAGBuilder::setUnusedArgValue
void setUnusedArgValue(const Value *V, SDValue NewN)
Definition: SelectionDAGBuilder.h:337
llvm::SelectionDAGBuilder::clearDanglingDebugInfo
void clearDanglingDebugInfo()
Clear the dangling debug information map.
Definition: SelectionDAGBuilder.cpp:1058
SwitchLoweringUtils.h
llvm::SelectionDAGBuilder::LowerDeoptimizeCall
void LowerDeoptimizeCall(const CallInst *CI)
Definition: StatepointLowering.cpp:1262
DebugLoc.h
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:632
llvm::None
const NoneType None
Definition: None.h:23
llvm::SelectionDAGBuilder::SelectionDAGBuilder
SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo, SwiftErrorValueTracking &swifterror, CodeGenOpt::Level ol)
Definition: SelectionDAGBuilder.h:242
llvm::BranchProbability::getUnknown
static BranchProbability getUnknown()
Definition: BranchProbability.h:51
BranchProbability.h
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::SelectionDAGBuilder::getMemoryRoot
SDValue getMemoryRoot()
Return the current virtual root of the Selection DAG, flushing any PendingLoad items.
Definition: SelectionDAGBuilder.cpp:1093
llvm::InvokeInst
Invoke instruction.
Definition: Instructions.h:3749
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition: ISDOpcodes.h:377
llvm::RegsForValue
This struct represents the registers (physical or virtual) that a particular set of values is assigne...
Definition: SelectionDAGBuilder.h:643
llvm::CleanupPadInst
Definition: Instructions.h:4432
llvm::TargetLoweringBase::getFrameIndexTy
MVT getFrameIndexTy(const DataLayout &DL) const
Return the type for frame index, which is determined by the alloca address space specified through th...
Definition: TargetLowering.h:359
llvm::SelectionDAGBuilder::getValueImpl
SDValue getValueImpl(const Value *V)
getValueImpl - Helper function for getValue and getNonRegisterValue.
Definition: SelectionDAGBuilder.cpp:1535
llvm::SelectionDAGBuilder::visitJumpTableHeader
void visitJumpTableHeader(SwitchCG::JumpTable &JT, SwitchCG::JumpTableHeader &JTH, MachineBasicBlock *SwitchBB)
visitJumpTableHeader - This function emits necessary code to produce index in the JumpTable from swit...
Definition: SelectionDAGBuilder.cpp:2561
llvm::SelectionDAGBuilder::salvageUnresolvedDbgValue
void salvageUnresolvedDbgValue(DanglingDebugInfo &DDI)
For the given dangling debuginfo record, perform last-ditch efforts to resolve the debuginfo to somet...
Definition: SelectionDAGBuilder.cpp:1268
uint64_t
llvm::CatchReturnInst
Definition: Instructions.h:4524
llvm::CallBrInst
CallBr instruction, tracking function calls that may not return control but instead transfer it to a ...
Definition: Instructions.h:3958
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
llvm::DenseMap
Definition: DenseMap.h:714
llvm::SelectionDAGBuilder::getCopyFromRegs
SDValue getCopyFromRegs(const Value *V, Type *Ty)
If there was virtual register allocated for the value V emit CopyFromReg of the specified type Ty.
Definition: SelectionDAGBuilder.cpp:1471
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::SwiftErrorValueTracking
Definition: SwiftErrorValueTracking.h:36
ArrayRef.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::StatepointLoweringInfo
StatepointLoweringInfo(SelectionDAG &DAG)
Definition: SelectionDAGBuilder.h:420
TemplateParamKind::Type
@ Type
llvm::SelectionDAGBuilder::CopyValueToVirtualRegister
void CopyValueToVirtualRegister(const Value *V, unsigned Reg)
Definition: SelectionDAGBuilder.cpp:9963
llvm::SelectionDAGBuilder::LowerAsSTATEPOINT
SDValue LowerAsSTATEPOINT(StatepointLoweringInfo &SI)
Lower SLI into a STATEPOINT instruction.
Definition: StatepointLowering.cpp:725
llvm::SelectionDAGBuilder::SDAGSwitchLowering::addSuccessorWithProb
virtual void addSuccessorWithProb(MachineBasicBlock *Src, MachineBasicBlock *Dst, BranchProbability Prob=BranchProbability::getUnknown()) override
Definition: SelectionDAGBuilder.h:202
llvm::SelectionDAGBuilder::StatepointLowering
StatepointLoweringState StatepointLowering
State used while lowering a statepoint sequence (gc_statepoint, gc_relocate, and gc_result).
Definition: SelectionDAGBuilder.h:135
llvm::SelectionDAGBuilder::LibInfo
const TargetLibraryInfo * LibInfo
Definition: SelectionDAGBuilder.h:195
llvm::TargetLowering::CallLoweringInfo
This structure contains all information that is necessary for lowering calls.
Definition: TargetLowering.h:3745
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:79
llvm::FunctionLoweringInfo
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
Definition: FunctionLoweringInfo.h:52
llvm::SelectionDAGBuilder::getFrameIndexTy
MVT getFrameIndexTy()
Returns the type of FrameIndex and TargetFrameIndex nodes.
Definition: SelectionDAGBuilder.h:443
SI
StandardInstrumentations SI(Debug, VerifyEach)
llvm::SelectionDAGBuilder::SDAGSwitchLowering::SDAGSwitchLowering
SDAGSwitchLowering(SelectionDAGBuilder *sdb, FunctionLoweringInfo &funcinfo)
Definition: SelectionDAGBuilder.h:199
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
llvm::SwitchCG::JumpTableHeader
Definition: SwitchLoweringUtils.h:180
CodeGenCommonISel.h
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::RegsForValue::getRegsAndSizes
SmallVector< std::pair< unsigned, TypeSize >, 4 > getRegsAndSizes() const
Return a list of registers and their sizes.
Definition: SelectionDAGBuilder.cpp:1021
llvm::SelectionDAGBuilder::isExportableFromCurrentBlock
bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB)
Definition: SelectionDAGBuilder.cpp:2086
llvm::SelectionDAGBuilder::StatepointLoweringInfo
Describes a gc.statepoint or a gc.statepoint like thing for the purposes of lowering into a STATEPOIN...
Definition: SelectionDAGBuilder.h:381
StatepointLowering.h
llvm::SelectionDAGBuilder::SwiftError
SwiftErrorValueTracking & SwiftError
Information about the swifterror values used throughout the function.
Definition: SelectionDAGBuilder.h:228
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::RegsForValue::RegVTs
SmallVector< MVT, 4 > RegVTs
The value types of the registers.
Definition: SelectionDAGBuilder.h:656
Cond
SmallVector< MachineOperand, 4 > Cond
Definition: BasicBlockSections.cpp:179
this
Analysis the ScalarEvolution expression for r is this
Definition: README.txt:8
llvm::SelectionDAGBuilder
SelectionDAGBuilder - This is the common target-independent lowering implementation that is parameter...
Definition: SelectionDAGBuilder.h:94
llvm::SwitchCG::CaseClusterVector
std::vector< CaseCluster > CaseClusterVector
Definition: SwitchLoweringUtils.h:86
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:134
llvm::ISD::SREM
@ SREM
Definition: ISDOpcodes.h:244
llvm::BranchProbability
Definition: BranchProbability.h:30
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::SelectionDAGBuilder::Context
LLVMContext * Context
Definition: SelectionDAGBuilder.h:240
llvm::SelectionDAGBuilder::getCurSDLoc
SDLoc getCurSDLoc() const
Definition: SelectionDAGBuilder.h:280
llvm::SelectionDAGBuilder::LowestSDNodeOrder
static const unsigned LowestSDNodeOrder
Lowest valid SDNodeOrder.
Definition: SelectionDAGBuilder.h:190
llvm::SelectionDAGBuilder::init
void init(GCFunctionInfo *gfi, AAResults *AA, const TargetLibraryInfo *li)
Definition: SelectionDAGBuilder.cpp:1034
llvm::SwitchCG::BitTestCase
Definition: SwitchLoweringUtils.h:195
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::SelectionDAGBuilder::resolveDanglingDebugInfo
void resolveDanglingDebugInfo(const Value *V, SDValue Val)
If we saw an earlier dbg_value referring to V, generate the debug data structures now that we've seen...
Definition: SelectionDAGBuilder.cpp:1214
llvm::ISD::FMUL
@ FMUL
Definition: ISDOpcodes.h:379
llvm::SwitchCG::BitTestBlock
Definition: SwitchLoweringUtils.h:208
llvm::SelectionDAGBuilder::HasTailCall
bool HasTailCall
This is set to true if a call in the current block has been translated as a tail call.
Definition: SelectionDAGBuilder.h:238
llvm::ISD::XOR
@ XOR
Definition: ISDOpcodes.h:634
llvm::SwitchCG::JumpTable
Definition: SwitchLoweringUtils.h:165
llvm::SelectionDAGBuilder::SPDescriptor
StackProtectorDescriptor SPDescriptor
A StackProtectorDescriptor structure used to communicate stack protector information in between Selec...
Definition: SelectionDAGBuilder.h:218
llvm::SelectionDAGBuilder::StatepointLoweringInfo::CLI
TargetLowering::CallLoweringInfo CLI
Information regarding the underlying call instruction.
Definition: SelectionDAGBuilder.h:404
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::SelectionDAGBuilder::StatepointLoweringInfo::DeoptState
ArrayRef< const Use > DeoptState
The deoptimization state associated with this gc.statepoint call, if any.
Definition: SelectionDAGBuilder.h:408
llvm::ResumeInst
Resume the propagation of an exception.
Definition: Instructions.h:4197
llvm::RegsForValue::AddInlineAsmOperands
void AddInlineAsmOperands(unsigned Code, bool HasMatching, unsigned MatchingIdx, const SDLoc &dl, SelectionDAG &DAG, std::vector< SDValue > &Ops) const
Add this value to the specified inlineasm node operand list.
Definition: SelectionDAGBuilder.cpp:967
llvm::SelectionDAGBuilder::visitSPDescriptorParent
void visitSPDescriptorParent(StackProtectorDescriptor &SPD, MachineBasicBlock *ParentBB)
Codegen a new tail for a stack protector check ParentMBB which has had its tail spliced into a stack ...
Definition: SelectionDAGBuilder.cpp:2645
std
Definition: BitVector.h:838
llvm::RegsForValue::append
void append(const RegsForValue &RHS)
Add the specified values to this one.
Definition: SelectionDAGBuilder.h:682
llvm::SelectionDAGBuilder::LowerCallTo
void LowerCallTo(const CallBase &CB, SDValue Callee, bool IsTailCall, bool IsMustTailCall, const BasicBlock *EHPadBB=nullptr)
Definition: SelectionDAGBuilder.cpp:7587
llvm::SelectionDAGBuilder::AA
AAResults * AA
Definition: SelectionDAGBuilder.h:194
llvm::SelectionDAGBuilder::StatepointLoweringInfo::StatepointInstr
const Instruction * StatepointInstr
The gc.statepoint instruction.
Definition: SelectionDAGBuilder.h:394
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:324
llvm::RegsForValue::ValueVTs
SmallVector< EVT, 4 > ValueVTs
The value types of the values, which may not be legal, and may need be promoted or synthesized from o...
Definition: SelectionDAGBuilder.h:646
llvm::SelectionDAG::getDataLayout
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:440
ISDOpcodes.h
llvm::SelectionDAGBuilder::FuncInfo
FunctionLoweringInfo & FuncInfo
Information about the function as a whole.
Definition: SelectionDAGBuilder.h:225
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::TargetLibraryInfo
Provides information about what library functions are available for the current target.
Definition: TargetLibraryInfo.h:221
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:138
llvm::SelectionDAGBuilder::LowerCallSiteWithDeoptBundleImpl
void LowerCallSiteWithDeoptBundleImpl(const CallBase *Call, SDValue Callee, const BasicBlock *EHPadBB, bool VarArgDisallowed, bool ForceVoidReturnTy)
Definition: StatepointLowering.cpp:1116
llvm::isScatter
bool isScatter(IntrinsicInst *IntInst)
Definition: ARMBaseInstrInfo.h:913
llvm::RegsForValue::CallConv
Optional< CallingConv::ID > CallConv
Records if this value needs to be treated in an ABI dependant manner, different to normal type legali...
Definition: SelectionDAGBuilder.h:668
llvm::CleanupReturnInst
Definition: Instructions.h:4605
llvm::IndirectBrInst
Indirect Branch Instruction.
Definition: Instructions.h:3614
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:239
llvm::SelectionDAGBuilder::StatepointLoweringInfo::GCRelocates
SmallVector< const GCRelocateInst *, 16 > GCRelocates
The set of gc.relocate calls associated with this gc.statepoint.
Definition: SelectionDAGBuilder.h:388
llvm::StatepointFlags
StatepointFlags
The statepoint intrinsic accepts a set of flags as its third argument.
Definition: Statepoint.h:40
CodeGen.h
llvm::CatchPadInst
Definition: Instructions.h:4473
llvm::Instruction::BinaryOps
BinaryOps
Definition: Instruction.h:785
llvm::StatepointLoweringState
This class tracks both per-statepoint and per-selectiondag information.
Definition: StatepointLowering.h:33
llvm::ISD::FSUB
@ FSUB
Definition: ISDOpcodes.h:378
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition: ISDOpcodes.h:657
SmallVector.h
llvm::SelectionDAGBuilder::visitBitTestCase
void visitBitTestCase(SwitchCG::BitTestBlock &BB, MachineBasicBlock *NextMBB, BranchProbability BranchProbToNext, unsigned Reg, SwitchCG::BitTestCase &B, MachineBasicBlock *SwitchBB)
visitBitTestCase - this function produces one "bit test"
Definition: SelectionDAGBuilder.cpp:2824
llvm::ISD::FREM
@ FREM
Definition: ISDOpcodes.h:381
llvm::Instruction::getDebugLoc
const DebugLoc & getDebugLoc() const
Return the debug location for this node as a DebugLoc.
Definition: Instruction.h:370
llvm::ISD::MUL
@ MUL
Definition: ISDOpcodes.h:241
llvm::ISD::UREM
@ UREM
Definition: ISDOpcodes.h:245
N
#define N
llvm::ISD::SRL
@ SRL
Definition: ISDOpcodes.h:659
llvm::SelectionDAGBuilder::getNonRegisterValue
SDValue getNonRegisterValue(const Value *V)
getNonRegisterValue - Return an SDValue for the given Value, but don't look in FuncInfo....
Definition: SelectionDAGBuilder.cpp:1512
llvm::SelectionDAGBuilder::LowerDeoptimizingReturn
void LowerDeoptimizingReturn()
Definition: StatepointLowering.cpp:1275
llvm::SelectionDAGBuilder::FindMergedConditions
void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB, Instruction::BinaryOps Opc, BranchProbability TProb, BranchProbability FProb, bool InvertCond)
Definition: SelectionDAGBuilder.cpp:2198
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::CallBase
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Definition: InstrTypes.h:1161
llvm::RegsForValue::RegsForValue
RegsForValue()=default
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::CallInst
This class represents a function call, abstracting a target machine's calling convention.
Definition: Instructions.h:1475
llvm::ISD::FNEG
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition: ISDOpcodes.h:866
llvm::SelectionDAGBuilder::visitSPDescriptorFailure
void visitSPDescriptorFailure(StackProtectorDescriptor &SPD)
Codegen the failure basic block for a stack protector check.
Definition: SelectionDAGBuilder.cpp:2739
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::UnreachableInst
This function has undefined behavior.
Definition: Instructions.h:4713
llvm::SelectionDAGBuilder::EmitBranchForMergedCondition
void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB, BranchProbability TProb, BranchProbability FProb, bool InvertCond)
EmitBranchForMergedCondition - Helper method for FindMergedConditions.
Definition: SelectionDAGBuilder.cpp:2151
llvm::SelectionDAGBuilder::SL
std::unique_ptr< SDAGSwitchLowering > SL
Definition: SelectionDAGBuilder.h:214
llvm::SwitchInst
Multiway switch.
Definition: Instructions.h:3212
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::SelectionDAGBuilder::lowerInvokable
std::pair< SDValue, SDValue > lowerInvokable(TargetLowering::CallLoweringInfo &CLI, const BasicBlock *EHPadBB=nullptr)
Definition: SelectionDAGBuilder.cpp:7547
llvm::SelectionDAGBuilder::clear
void clear()
Clear out the current SelectionDAG and the associated state and prepare this SelectionDAGBuilder obje...
Definition: SelectionDAGBuilder.cpp:1045
llvm::BranchInst
Conditional or Unconditional Branch instruction.
Definition: Instructions.h:3068
llvm::CatchSwitchInst
Definition: Instructions.h:4254
llvm::SelectionDAGBuilder::visit
void visit(const Instruction &I)
Definition: SelectionDAGBuilder.cpp:1122
llvm::SelectionDAGBuilder::getCurDebugLoc
DebugLoc getCurDebugLoc() const
Definition: SelectionDAGBuilder.h:284
llvm::SelectionDAGBuilder::ShouldEmitAsBranches
bool ShouldEmitAsBranches(const std::vector< SwitchCG::CaseBlock > &Cases)
If the set of cases should be emitted as a series of branches, return true.
Definition: SelectionDAGBuilder.cpp:2329
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::RegsForValue::RegCount
SmallVector< unsigned, 4 > RegCount
This list holds the number of registers for each value.
Definition: SelectionDAGBuilder.h:664
llvm::SelectionDAGBuilder::getRoot
SDValue getRoot()
Similar to getMemoryRoot, but also flushes PendingConstrainedFP(Strict) items.
Definition: SelectionDAGBuilder.cpp:1097
llvm::SelectionDAGBuilder::UpdateSplitBlock
void UpdateSplitBlock(MachineBasicBlock *First, MachineBasicBlock *Last)
When an MBB was split during scheduling, update the references that need to refer to the last resulti...
Definition: SelectionDAGBuilder.cpp:3058
llvm::SelectionDAGBuilder::ExportFromCurrentBlock
void ExportFromCurrentBlock(const Value *V)
ExportFromCurrentBlock - If this condition isn't known to be exported from the current basic block,...
Definition: SelectionDAGBuilder.cpp:2075
llvm::SelectionDAGBuilder::populateCallLoweringInfo
void populateCallLoweringInfo(TargetLowering::CallLoweringInfo &CLI, const CallBase *Call, unsigned ArgIdx, unsigned NumArgs, SDValue Callee, Type *ReturnTy, bool IsPatchPoint)
Populate a CallLowerinInfo (into CLI) based on the properties of the call being lowered.
Definition: SelectionDAGBuilder.cpp:9167
llvm::ISD::MCSymbol
@ MCSymbol
Definition: ISDOpcodes.h:172
llvm::SelectionDAGBuilder::dropDanglingDebugInfo
void dropDanglingDebugInfo(const DILocalVariable *Variable, const DIExpression *Expr)
If we have dangling debug info that describes Variable, or an overlapping part of variable considerin...
Definition: SelectionDAGBuilder.cpp:1186
llvm::SwitchCG::CaseCluster
A cluster of case labels.
Definition: SwitchLoweringUtils.h:42
llvm::SelectionDAGBuilder::getControlRoot
SDValue getControlRoot()
Similar to getRoot, but instead of flushing all the PendingLoad items, flush all the PendingExports (...
Definition: SelectionDAGBuilder.cpp:1113
llvm::ISD::FDIV
@ FDIV
Definition: ISDOpcodes.h:380
llvm::SelectionDAGBuilder::GFI
GCFunctionInfo * GFI
Garbage collection metadata for the function.
Definition: SelectionDAGBuilder.h:231