VEInstrInfo.cpp File Reference

#include "VEInstrInfo.h"
#include "VE.h"
#include "VEMachineFunctionInfo.h"
#include "VESubtarget.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "VEGenInstrInfo.inc"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "ve-instr-info"
#define	GET_INSTRINFO_CTOR_DTOR
#define	BRKIND(NAME)
#define	BRKIND(NAME)
#define	BRKIND(NAME)
#define	INSTRKIND(NAME)
#define	NCINSTRKIND(NAME)

Functions
static bool	IsIntegerCC (unsigned CC)
static VECC::CondCode	GetOppositeBranchCondition (VECC::CondCode CC)
static bool	isUncondBranchOpcode (int Opc)
static bool	isCondBranchOpcode (int Opc)
static bool	isIndirectBranchOpcode (int Opc)
static void	parseCondBranch (MachineInstr *LastInst, MachineBasicBlock *&Target, SmallVectorImpl< MachineOperand > &Cond)
static bool	IsAliasOfSX (Register Reg)
static void	copyPhysSubRegs (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc, const MCInstrDesc &MCID, unsigned int NumSubRegs, const unsigned *SubRegIdx, const TargetRegisterInfo *TRI)
static Register	getVM512Upper (Register reg)
static Register	getVM512Lower (Register reg)
static void	expandPseudoLogM (MachineInstr &MI, const MCInstrDesc &MCID)
static void	addOperandsForVFMK (MachineInstrBuilder &MIB, MachineInstr &MI, bool Upper)
static void	expandPseudoVFMK (const TargetInstrInfo &TI, MachineInstr &MI)

Macro Definition Documentation

BRKIND [1/3]

#define BRKIND

(

NAME

)

Value:

(Opc == NAME##a || Opc == NAME##a_nt || Opc == NAME##a_t)

Referenced by isCondBranchOpcode(), isIndirectBranchOpcode(), and isUncondBranchOpcode().

BRKIND [2/3]

#define BRKIND

(

NAME

)

Value:

  (Opc == NAME##rr || Opc == NAME##rr_nt || Opc == NAME##rr_t ||               \
   Opc == NAME##ir || Opc == NAME##ir_nt || Opc == NAME##ir_t)

BRKIND [3/3]

#define BRKIND

(

NAME

)

Value:

  (Opc == NAME##ari || Opc == NAME##ari_nt || Opc == NAME##ari_t)

DEBUG_TYPE

#define DEBUG_TYPE   "ve-instr-info"

Definition at line 27 of file VEInstrInfo.cpp.

GET_INSTRINFO_CTOR_DTOR

#define GET_INSTRINFO_CTOR_DTOR

Definition at line 31 of file VEInstrInfo.cpp.

INSTRKIND

#define INSTRKIND

(

NAME

)

Value:

  case NAME##rr:                                                               \
    NewUseOpcSImm7 = NAME##ri;                                                 \
    NewUseOpcMImm = NAME##rm;                                                  \
    InstType = rr2ri_rm;                                                       \
    break

Referenced by llvm::VEInstrInfo::foldImmediate().

NCINSTRKIND

#define NCINSTRKIND

(

NAME

)

Value:

  case NAME##rr:                                                               \
    NewUseOpcSImm7 = NAME##ir;                                                 \
    NewUseOpcMImm = NAME##rm;                                                  \
    InstType = rr2ir_rm;                                                       \
    break

Referenced by llvm::VEInstrInfo::foldImmediate().

Function Documentation

addOperandsForVFMK()

void addOperandsForVFMK ( MachineInstrBuilder & MIB, MachineInstr & MI, bool Upper )

static

Definition at line 805 of file VEInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), getVM512Lower(), getVM512Upper(), MI, llvm::report_fatal_error(), and llvm::Upper.

Referenced by expandPseudoVFMK().

copyPhysSubRegs()

void copyPhysSubRegs ( MachineBasicBlock & MBB, MachineBasicBlock::iterator I, const DebugLoc & DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc, const MCInstrDesc & MCID, unsigned int NumSubRegs, const unsigned * SubRegIdx, const TargetRegisterInfo * TRI )

static

Definition at line 325 of file VEInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), assert(), llvm::BuildMI(), DL, llvm::MachineInstrBuilder::getInstr(), I, llvm_unreachable, MBB, and TRI.

Referenced by llvm::VEInstrInfo::copyPhysReg().

expandPseudoLogM()

void expandPseudoLogM ( MachineInstr & MI, const MCInstrDesc & MCID )

static

Definition at line 780 of file VEInstrInfo.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addUse(), llvm::BuildMI(), DL, getVM512Lower(), getVM512Upper(), MBB, and MI.

Referenced by llvm::VEInstrInfo::expandPostRAPseudo().

expandPseudoVFMK()

void expandPseudoVFMK ( const TargetInstrInfo & TI, MachineInstr & MI )

static

Definition at line 840 of file VEInstrInfo.cpp.

References addOperandsForVFMK(), llvm::BuildMI(), DL, llvm::find_if(), llvm::MCInstrInfo::get(), MBB, MI, P, and llvm::report_fatal_error().

Referenced by llvm::VEInstrInfo::expandPostRAPseudo().

GetOppositeBranchCondition()

VECC::CondCode GetOppositeBranchCondition ( VECC::CondCode CC )

static

Definition at line 42 of file VEInstrInfo.cpp.

References llvm::VECC::CC_AF, llvm::VECC::CC_AT, llvm::VECC::CC_EQ, llvm::VECC::CC_EQNAN, llvm::VECC::CC_G, llvm::VECC::CC_GE, llvm::VECC::CC_GENAN, llvm::VECC::CC_GNAN, llvm::VECC::CC_IEQ, llvm::VECC::CC_IG, llvm::VECC::CC_IGE, llvm::VECC::CC_IL, llvm::VECC::CC_ILE, llvm::VECC::CC_INE, llvm::VECC::CC_L, llvm::VECC::CC_LE, llvm::VECC::CC_LENAN, llvm::VECC::CC_LNAN, llvm::VECC::CC_NAN, llvm::VECC::CC_NE, llvm::VECC::CC_NENAN, llvm::VECC::CC_NUM, llvm_unreachable, and llvm::VECC::UNKNOWN.

getVM512Lower()

Register getVM512Lower ( Register reg )

static

Definition at line 777 of file VEInstrInfo.cpp.

References getVM512Upper().

Referenced by addOperandsForVFMK(), llvm::VEInstrInfo::expandPostRAPseudo(), and expandPseudoLogM().

getVM512Upper()

Register getVM512Upper ( Register reg )

static

Definition at line 773 of file VEInstrInfo.cpp.

Referenced by addOperandsForVFMK(), llvm::VEInstrInfo::expandPostRAPseudo(), expandPseudoLogM(), and getVM512Lower().

IsAliasOfSX()

bool IsAliasOfSX ( Register Reg )

static

Definition at line 320 of file VEInstrInfo.cpp.

References Reg.

Referenced by llvm::VEInstrInfo::copyPhysReg().

isCondBranchOpcode()

bool isCondBranchOpcode ( int Opc )

static

Definition at line 111 of file VEInstrInfo.cpp.

References BRKIND, and Opc.

isIndirectBranchOpcode()

bool isIndirectBranchOpcode ( int Opc )

static

Definition at line 123 of file VEInstrInfo.cpp.

References assert(), BRKIND, and Opc.

IsIntegerCC()

bool IsIntegerCC ( unsigned CC )

static

Definition at line 40 of file VEInstrInfo.cpp.

References llvm::VECC::CC_AF.

Referenced by llvm::VEInstrInfo::insertBranch().

isUncondBranchOpcode()

bool isUncondBranchOpcode ( int Opc )

static

Definition at line 96 of file VEInstrInfo.cpp.

References assert(), BRKIND, and Opc.

parseCondBranch()

void parseCondBranch ( MachineInstr * LastInst, MachineBasicBlock *& Target, SmallVectorImpl< MachineOperand > & Cond )

static

Definition at line 136 of file VEInstrInfo.cpp.

References Cond, llvm::MachineOperand::CreateImm(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getMBB(), and llvm::MachineInstr::getOperand().