LLVM 17.0.0git
Macros | Functions | Variables
X86ISelDAGToDAG.cpp File Reference
#include "X86.h"
#include "X86MachineFunctionInfo.h"
#include "X86RegisterInfo.h"
#include "X86Subtarget.h"
#include "X86TargetMachine.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/IR/ConstantRange.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsX86.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Support/MathExtras.h"
#include <cstdint>
#include "X86GenDAGISel.inc"
Include dependency graph for X86ISelDAGToDAG.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "x86-isel"
 
#define PASS_NAME   "X86 DAG->DAG Instruction Selection"
 
#define VPTESTM_CASE(VT, SUFFIX)
 
#define VPTESTM_BROADCAST_CASES(SUFFIX)
 
#define VPTESTM_FULL_CASES(SUFFIX)
 

Functions

 STATISTIC (NumLoadMoved, "Number of loads moved below TokenFactor")
 
static bool isLegalMaskCompare (SDNode *N, const X86Subtarget *Subtarget)
 
static void moveBelowOrigChain (SelectionDAG *CurDAG, SDValue Load, SDValue Call, SDValue OrigChain)
 Replace the original chain operand of the call with load's chain operand and move load below the call's chain operand.
 
static bool isCalleeLoad (SDValue Callee, SDValue &Chain, bool HasCallSeq)
 Return true if call address is a load and it can be moved below CALLSEQ_START and the chains leading up to the call.
 
static bool isEndbrImm64 (uint64_t Imm)
 
static bool isDispSafeForFrameIndex (int64_t Val)
 
static void insertDAGNode (SelectionDAG &DAG, SDValue Pos, SDValue N)
 
static bool foldMaskAndShiftToExtract (SelectionDAG &DAG, SDValue N, uint64_t Mask, SDValue Shift, SDValue X, X86ISelAddressMode &AM)
 
static bool foldMaskedShiftToScaledMask (SelectionDAG &DAG, SDValue N, X86ISelAddressMode &AM)
 
static bool foldMaskAndShiftToScale (SelectionDAG &DAG, SDValue N, uint64_t Mask, SDValue Shift, SDValue X, X86ISelAddressMode &AM)
 
static bool foldMaskedShiftToBEXTR (SelectionDAG &DAG, SDValue N, uint64_t Mask, SDValue Shift, SDValue X, X86ISelAddressMode &AM, const X86Subtarget &Subtarget)
 
static bool mayUseCarryFlag (X86::CondCode CC)
 
static bool isFusableLoadOpStorePattern (StoreSDNode *StoreNode, SDValue StoredVal, SelectionDAG *CurDAG, unsigned LoadOpNo, LoadSDNode *&LoadNode, SDValue &InputChain)
 Check whether or not the chain ending in StoreNode is suitable for doing the {load; op; store} to modify transformation.
 
static unsigned getVPTESTMOpc (MVT TestVT, bool IsTestN, bool FoldedLoad, bool FoldedBCast, bool Masked)
 

Variables

static cl::opt< boolAndImmShrink ("x86-and-imm-shrink", cl::init(true), cl::desc("Enable setting constant bits to reduce size of mask immediates"), cl::Hidden)
 
static cl::opt< boolEnablePromoteAnyextLoad ("x86-promote-anyext-load", cl::init(true), cl::desc("Enable promoting aligned anyext load to wider load"), cl::Hidden)
 
cl::opt< boolIndirectBranchTracking
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "x86-isel"

Definition at line 37 of file X86ISelDAGToDAG.cpp.

◆ PASS_NAME

#define PASS_NAME   "X86 DAG->DAG Instruction Selection"

Definition at line 38 of file X86ISelDAGToDAG.cpp.

◆ VPTESTM_BROADCAST_CASES

#define VPTESTM_BROADCAST_CASES (   SUFFIX)
Value:
default: llvm_unreachable("Unexpected VT!"); \
VPTESTM_CASE(v4i32, DZ128##SUFFIX) \
VPTESTM_CASE(v2i64, QZ128##SUFFIX) \
VPTESTM_CASE(v8i32, DZ256##SUFFIX) \
VPTESTM_CASE(v4i64, QZ256##SUFFIX) \
VPTESTM_CASE(v16i32, DZ##SUFFIX) \
VPTESTM_CASE(v8i64, QZ##SUFFIX)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.

◆ VPTESTM_CASE

#define VPTESTM_CASE (   VT,
  SUFFIX 
)
Value:
case MVT::VT: \
if (Masked) \
return IsTestN ? X86::VPTESTNM##SUFFIX##k: X86::VPTESTM##SUFFIX##k; \
return IsTestN ? X86::VPTESTNM##SUFFIX : X86::VPTESTM##SUFFIX;

◆ VPTESTM_FULL_CASES

#define VPTESTM_FULL_CASES (   SUFFIX)
Value:
VPTESTM_CASE(v16i8, BZ128##SUFFIX) \
VPTESTM_CASE(v8i16, WZ128##SUFFIX) \
VPTESTM_CASE(v32i8, BZ256##SUFFIX) \
VPTESTM_CASE(v16i16, WZ256##SUFFIX) \
VPTESTM_CASE(v64i8, BZ##SUFFIX) \
VPTESTM_CASE(v32i16, WZ##SUFFIX)
#define VPTESTM_BROADCAST_CASES(SUFFIX)

Function Documentation

◆ foldMaskAndShiftToExtract()

static bool foldMaskAndShiftToExtract ( SelectionDAG DAG,
SDValue  N,
uint64_t  Mask,
SDValue  Shift,
SDValue  X,
X86ISelAddressMode &  AM 
)
static

◆ foldMaskAndShiftToScale()

static bool foldMaskAndShiftToScale ( SelectionDAG DAG,
SDValue  N,
uint64_t  Mask,
SDValue  Shift,
SDValue  X,
X86ISelAddressMode &  AM 
)
static

◆ foldMaskedShiftToBEXTR()

static bool foldMaskedShiftToBEXTR ( SelectionDAG DAG,
SDValue  N,
uint64_t  Mask,
SDValue  Shift,
SDValue  X,
X86ISelAddressMode &  AM,
const X86Subtarget Subtarget 
)
static

◆ foldMaskedShiftToScaledMask()

static bool foldMaskedShiftToScaledMask ( SelectionDAG DAG,
SDValue  N,
X86ISelAddressMode &  AM 
)
static

◆ getVPTESTMOpc()

static unsigned getVPTESTMOpc ( MVT  TestVT,
bool  IsTestN,
bool  FoldedLoad,
bool  FoldedBCast,
bool  Masked 
)
static

◆ insertDAGNode()

static void insertDAGNode ( SelectionDAG DAG,
SDValue  Pos,
SDValue  N 
)
static

◆ isCalleeLoad()

static bool isCalleeLoad ( SDValue  Callee,
SDValue Chain,
bool  HasCallSeq 
)
static

Return true if call address is a load and it can be moved below CALLSEQ_START and the chains leading up to the call.

Return the CALLSEQ_START by reference as a second output. In the case of a tail call, there isn't a callseq node between the call chain and the load.

Definition at line 823 of file X86ISelDAGToDAG.cpp.

References Callee, llvm::ISD::CALLSEQ_START, llvm::SDValue::getNode(), llvm::SDValue::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::hasOneUse(), llvm::ISD::NON_EXTLOAD, llvm::ISD::TokenFactor, and llvm::ISD::UNINDEXED.

◆ isDispSafeForFrameIndex()

static bool isDispSafeForFrameIndex ( int64_t  Val)
static

Definition at line 1655 of file X86ISelDAGToDAG.cpp.

◆ isEndbrImm64()

static bool isEndbrImm64 ( uint64_t  Imm)
static

Definition at line 860 of file X86ISelDAGToDAG.cpp.

References llvm::is_contained().

◆ isFusableLoadOpStorePattern()

static bool isFusableLoadOpStorePattern ( StoreSDNode StoreNode,
SDValue  StoredVal,
SelectionDAG CurDAG,
unsigned  LoadOpNo,
LoadSDNode *&  LoadNode,
SDValue InputChain 
)
static

◆ isLegalMaskCompare()

static bool isLegalMaskCompare ( SDNode N,
const X86Subtarget Subtarget 
)
static

◆ mayUseCarryFlag()

static bool mayUseCarryFlag ( X86::CondCode  CC)
static

◆ moveBelowOrigChain()

static void moveBelowOrigChain ( SelectionDAG CurDAG,
SDValue  Load,
SDValue  Call,
SDValue  OrigChain 
)
static

◆ STATISTIC()

STATISTIC ( NumLoadMoved  ,
"Number of loads moved below TokenFactor"   
)

Variable Documentation

◆ AndImmShrink

cl::opt< bool > AndImmShrink("x86-and-imm-shrink", cl::init(true), cl::desc("Enable setting constant bits to reduce size of mask immediates"), cl::Hidden) ( "x86-and-imm-shrink"  ,
cl::init(true ,
cl::desc("Enable setting constant bits to reduce size of mask immediates")  ,
cl::Hidden   
)
static

◆ EnablePromoteAnyextLoad

cl::opt< bool > EnablePromoteAnyextLoad("x86-promote-anyext-load", cl::init(true), cl::desc("Enable promoting aligned anyext load to wider load"), cl::Hidden) ( "x86-promote-anyext-load"  ,
cl::init(true ,
cl::desc("Enable promoting aligned anyext load to wider load")  ,
cl::Hidden   
)
static

◆ IndirectBranchTracking

cl::opt<bool> IndirectBranchTracking
extern