LLVM 17.0.0git
Public Member Functions | Static Public Attributes | Protected Member Functions | List of all members
AMDGPUDAGToDAGISel Class Reference

AMDGPU specific code to select AMDGPU machine instructions for SelectionDAG operations. More...

#include "Target/AMDGPU/AMDGPUISelDAGToDAG.h"

Inheritance diagram for AMDGPUDAGToDAGISel:
Inheritance graph
[legend]

Public Member Functions

 AMDGPUDAGToDAGISel ()=delete
 
 AMDGPUDAGToDAGISel (TargetMachine &TM, CodeGenOpt::Level OptLevel)
 
 ~AMDGPUDAGToDAGISel () override=default
 
void getAnalysisUsage (AnalysisUsage &AU) const override
 getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
 
bool matchLoadD16FromBuildVector (SDNode *N) const
 
bool runOnMachineFunction (MachineFunction &MF) override
 runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.
 
void PreprocessISelDAG () override
 PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.
 
void Select (SDNode *N) override
 Main hook for targets to transform nodes into machine nodes.
 
StringRef getPassName () const override
 getPassName - Return a nice clean name for a pass.
 
void PostprocessISelDAG () override
 PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.
 
- Public Member Functions inherited from llvm::SelectionDAGISel
 SelectionDAGISel (char &ID, TargetMachine &tm, CodeGenOpt::Level OL=CodeGenOpt::Default)
 
 ~SelectionDAGISel () override
 
const TargetLowering * getTargetLowering () const
 
void getAnalysisUsage (AnalysisUsage &AU) const override
 getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
 
bool runOnMachineFunction (MachineFunction &MF) override
 runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.
 
virtual void emitFunctionEntryCode ()
 
virtual void PreprocessISelDAG ()
 PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.
 
virtual void PostprocessISelDAG ()
 PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.
 
virtual void Select (SDNode *N)=0
 Main hook for targets to transform nodes into machine nodes.
 
virtual bool SelectInlineAsmMemoryOperand (const SDValue &Op, unsigned ConstraintID, std::vector< SDValue > &OutOps)
 SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.
 
virtual bool IsProfitableToFold (SDValue N, SDNode *U, SDNode *Root) const
 IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root.
 
bool CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckAndMask - The isel is trying to match something like (and X, 255).
 
bool CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckOrMask - The isel is trying to match something like (or X, 255).
 
virtual bool CheckPatternPredicate (unsigned PredNo) const
 CheckPatternPredicate - This function is generated by tblgen in the target.
 
virtual bool CheckNodePredicate (SDNode *N, unsigned PredNo) const
 CheckNodePredicate - This function is generated by tblgen in the target.
 
virtual bool CheckNodePredicateWithOperands (SDNode *N, unsigned PredNo, const SmallVectorImpl< SDValue > &Operands) const
 CheckNodePredicateWithOperands - This function is generated by tblgen in the target.
 
virtual bool CheckComplexPattern (SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result)
 
virtual SDValue RunSDNodeXForm (SDValue V, unsigned XFormNo)
 
void SelectCodeCommon (SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize)
 
virtual bool ComplexPatternFuncMutatesDAG () const
 Return true if complex patterns for this target can mutate the DAG.
 
bool mayRaiseFPException (SDNode *Node) const
 Return whether the node may raise an FP exception.
 
bool isOrEquivalentToAdd (const SDNode *N) const
 
- Public Member Functions inherited from llvm::MachineFunctionPass
bool doInitialization (Module &) override
 doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run.
 
- Public Member Functions inherited from llvm::FunctionPass
 FunctionPass (char &pid)
 
Pass * createPrinterPass (raw_ostream &OS, const std::string &Banner) const override
 createPrinterPass - Get a function printer pass.
 
virtual bool runOnFunction (Function &F)=0
 runOnFunction - Virtual method overriden by subclasses to do the per-function processing of the pass.
 
void assignPassManager (PMStack &PMS, PassManagerType T) override
 Find appropriate Function Pass Manager or Call Graph Pass Manager in the PM Stack and add self into that manager.
 
PassManagerType getPotentialPassManagerType () const override
 Return what kind of Pass Manager can manage this pass.
 
- Public Member Functions inherited from llvm::Pass
 Pass (PassKind K, char &pid)
 
 Pass (const Pass &)=delete
 
Pass & operator= (const Pass &)=delete
 
virtual ~Pass ()
 
PassKind getPassKind () const
 
virtual StringRef getPassName () const
 getPassName - Return a nice clean name for a pass.
 
AnalysisID getPassID () const
 getPassID - Return the PassID number that corresponds to this pass.
 
virtual bool doInitialization (Module &)
 doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run.
 
virtual bool doFinalization (Module &)
 doFinalization - Virtual method overriden by subclasses to do any necessary clean up after all passes have run.
 
virtual void print (raw_ostream &OS, const Module *M) const
 print - Print out the internal state of the pass.
 
void dump () const
 
virtual Pass * createPrinterPass (raw_ostream &OS, const std::string &Banner) const =0
 createPrinterPass - Get a Pass appropriate to print the IR this pass operates on (Module, Function or MachineFunction).
 
virtual void assignPassManager (PMStack &, PassManagerType)
 Each pass is responsible for assigning a pass manager to itself.
 
virtual void preparePassManager (PMStack &)
 Check if available pass managers are suitable for this pass or not.
 
virtual PassManagerType getPotentialPassManagerType () const
 Return what kind of Pass Manager can manage this pass.
 
void setResolver (AnalysisResolver *AR)
 
AnalysisResolver * getResolver () const
 
virtual void getAnalysisUsage (AnalysisUsage &) const
 getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job.
 
virtual void releaseMemory ()
 releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memory when it is no longer needed.
 
virtual void * getAdjustedAnalysisPointer (AnalysisID ID)
 getAdjustedAnalysisPointer - This method is used when a pass implements an analysis interface through multiple inheritance.
 
virtual ImmutablePass * getAsImmutablePass ()
 
virtual PMDataManager * getAsPMDataManager ()
 
virtual void verifyAnalysis () const
 verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis information.
 
virtual void dumpPassStructure (unsigned Offset=0)
 
template<typename AnalysisType >
AnalysisType * getAnalysisIfAvailable () const
 getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to get analysis information that might be around, for example to update it.
 
bool mustPreserveAnalysisID (char &AID) const
 mustPreserveAnalysisID - This method serves the same function as getAnalysisIfAvailable, but works if you just have an AnalysisID.
 
template<typename AnalysisType >
AnalysisType & getAnalysis () const
 getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function.
 
template<typename AnalysisType >
AnalysisType & getAnalysis (Function &F, bool *Changed=nullptr)
 getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function.
 
template<typename AnalysisType >
AnalysisType & getAnalysisID (AnalysisID PI) const
 
template<typename AnalysisType >
AnalysisType & getAnalysisID (AnalysisID PI, Function &F, bool *Changed=nullptr)
 

Static Public Attributes

static char ID = 0
 

Protected Member Functions

void SelectBuildVector (SDNode *N, unsigned RegClassID)
 
- Protected Member Functions inherited from llvm::SelectionDAGISel
void ReplaceUses (SDValue F, SDValue T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T.
 
void ReplaceUses (const SDValue *F, const SDValue *T, unsigned Num)
 ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.
 
void ReplaceUses (SDNode *F, SDNode *T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T.
 
void ReplaceNode (SDNode *F, SDNode *T)
 Replace all uses of F with T, then remove F from the DAG.
 
void SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops, const SDLoc &DL)
 SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen.
 
virtual StringRef getPatternForIndex (unsigned index)
 getPatternForIndex - Patterns selected by tablegen during ISEL
 
virtual StringRef getIncludePathForIndex (unsigned index)
 getIncludePathForIndex - get the td source location of pattern instantiation
 
bool shouldOptForSize (const MachineFunction *MF) const
 
- Protected Member Functions inherited from llvm::MachineFunctionPass
 MachineFunctionPass (char &ID)
 
virtual bool runOnMachineFunction (MachineFunction &MF)=0
 runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.
 
void getAnalysisUsage (AnalysisUsage &AU) const override
 getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
 
virtual MachineFunctionProperties getRequiredProperties () const
 
virtual MachineFunctionProperties getSetProperties () const
 
virtual MachineFunctionProperties getClearedProperties () const
 
- Protected Member Functions inherited from llvm::FunctionPass
bool skipFunction (const Function &F) const
 Optional passes call this function to check whether the pass should be skipped.
 

Additional Inherited Members

- Public Types inherited from llvm::SelectionDAGISel
enum  BuiltinOpcodes {
  OPC_Scope , OPC_RecordNode , OPC_RecordChild0 , OPC_RecordChild1 ,
  OPC_RecordChild2 , OPC_RecordChild3 , OPC_RecordChild4 , OPC_RecordChild5 ,
  OPC_RecordChild6 , OPC_RecordChild7 , OPC_RecordMemRef , OPC_CaptureGlueInput ,
  OPC_MoveChild , OPC_MoveChild0 , OPC_MoveChild1 , OPC_MoveChild2 ,
  OPC_MoveChild3 , OPC_MoveChild4 , OPC_MoveChild5 , OPC_MoveChild6 ,
  OPC_MoveChild7 , OPC_MoveParent , OPC_CheckSame , OPC_CheckChild0Same ,
  OPC_CheckChild1Same , OPC_CheckChild2Same , OPC_CheckChild3Same , OPC_CheckPatternPredicate ,
  OPC_CheckPredicate , OPC_CheckPredicateWithOperands , OPC_CheckOpcode , OPC_SwitchOpcode ,
  OPC_CheckType , OPC_CheckTypeRes , OPC_SwitchType , OPC_CheckChild0Type ,
  OPC_CheckChild1Type , OPC_CheckChild2Type , OPC_CheckChild3Type , OPC_CheckChild4Type ,
  OPC_CheckChild5Type , OPC_CheckChild6Type , OPC_CheckChild7Type , OPC_CheckInteger ,
  OPC_CheckChild0Integer , OPC_CheckChild1Integer , OPC_CheckChild2Integer , OPC_CheckChild3Integer ,
  OPC_CheckChild4Integer , OPC_CheckCondCode , OPC_CheckChild2CondCode , OPC_CheckValueType ,
  OPC_CheckComplexPat , OPC_CheckAndImm , OPC_CheckOrImm , OPC_CheckImmAllOnesV ,
  OPC_CheckImmAllZerosV , OPC_CheckFoldableChainNode , OPC_EmitInteger , OPC_EmitStringInteger ,
  OPC_EmitRegister , OPC_EmitRegister2 , OPC_EmitConvertToTarget , OPC_EmitMergeInputChains ,
  OPC_EmitMergeInputChains1_0 , OPC_EmitMergeInputChains1_1 , OPC_EmitMergeInputChains1_2 , OPC_EmitCopyToReg ,
  OPC_EmitCopyToReg2 , OPC_EmitNodeXForm , OPC_EmitNode , OPC_EmitNode0 ,
  OPC_EmitNode1 , OPC_EmitNode2 , OPC_MorphNodeTo , OPC_MorphNodeTo0 ,
  OPC_MorphNodeTo1 , OPC_MorphNodeTo2 , OPC_CompleteMatch , OPC_Coverage
}
 
enum  {
  OPFL_None = 0 , OPFL_Chain = 1 , OPFL_GlueInput = 2 , OPFL_GlueOutput = 4 ,
  OPFL_MemRefs = 8 , OPFL_Variadic0 = 1<<4 , OPFL_Variadic1 = 2<<4 , OPFL_Variadic2 = 3<<4 ,
  OPFL_Variadic3 = 4<<4 , OPFL_Variadic4 = 5<<4 , OPFL_Variadic5 = 6<<4 , OPFL_Variadic6 = 7<<4 ,
  OPFL_VariadicInfo = OPFL_Variadic6
}
 
- Static Public Member Functions inherited from llvm::SelectionDAGISel
static bool IsLegalToFold (SDValue N, SDNode *U, SDNode *Root, CodeGenOpt::Level OptLevel, bool IgnoreChains=false)
 IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root.
 
static void InvalidateNodeId (SDNode *N)
 
static int getUninvalidatedNodeId (SDNode *N)
 
static void EnforceNodeIdInvariant (SDNode *N)
 
static int getNumFixedFromVariadicInfo (unsigned Flags)
 getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root.
 
- Static Public Member Functions inherited from llvm::Pass
static const PassInfo * lookupPassInfo (const void *TI)
 
static const PassInfo * lookupPassInfo (StringRef Arg)
 
static Pass * createPass (AnalysisID ID)
 
- Public Attributes inherited from llvm::SelectionDAGISel
TargetMachine & TM
 
const TargetLibraryInfo * LibInfo
 
std::unique_ptr< FunctionLoweringInfo > FuncInfo
 
SwiftErrorValueTracking * SwiftError
 
MachineFunction * MF
 
MachineRegisterInfo * RegInfo
 
SelectionDAG * CurDAG
 
std::unique_ptr< SelectionDAGBuilder > SDB
 
AAResults * AA = nullptr
 
AssumptionCache * AC = nullptr
 
GCFunctionInfo * GFI = nullptr
 
CodeGenOpt::Level OptLevel
 
const TargetInstrInfo * TII
 
const TargetLowering * TLI
 
bool FastISelFailed
 
SmallPtrSet< const Instruction *, 4 > ElidedArgCopyInstrs
 
std::unique_ptr< OptimizationRemarkEmitter > ORE
 Current optimization remark emitter.
 
- Protected Attributes inherited from llvm::SelectionDAGISel
unsigned DAGSize = 0
 DAGSize - Size of DAG being instruction selected.
 

Detailed Description

AMDGPU specific code to select AMDGPU machine instructions for SelectionDAG operations.

Definition at line 76 of file AMDGPUISelDAGToDAG.h.

Constructor & Destructor Documentation

◆ AMDGPUDAGToDAGISel() [1/2]

AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel ( )
delete

◆ AMDGPUDAGToDAGISel() [2/2]

AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel ( TargetMachine &  TM,
CodeGenOpt::Level  OptLevel 
)
explicit

Definition at line 120 of file AMDGPUISelDAGToDAG.cpp.

References llvm::AMDGPUTargetMachine::EnableLateStructurizeCFG.

◆ ~AMDGPUDAGToDAGISel()

AMDGPUDAGToDAGISel::~AMDGPUDAGToDAGISel ( )
overridedefault

Member Function Documentation

◆ getAnalysisUsage()

void AMDGPUDAGToDAGISel::getAnalysisUsage ( AnalysisUsage &  AU) const
overridevirtual

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

For MachineFunctionPasses, calling AU.preservesCFG() indicates that the pass does not modify the MachineBasicBlock CFG.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 201 of file AMDGPUISelDAGToDAG.cpp.

References llvm::AnalysisUsage::addRequired(), and llvm::SelectionDAGISel::getAnalysisUsage().

◆ getPassName()

StringRef AMDGPUDAGToDAGISel::getPassName ( ) const
overridevirtual

getPassName - Return a nice clean name for a pass.

This usually implemented in terms of the name that is registered by one of the Registration templates, but can be overloaded directly.

Reimplemented from llvm::Pass.

Definition at line 766 of file AMDGPUISelDAGToDAG.cpp.

◆ matchLoadD16FromBuildVector()

bool AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector ( SDNode *  N) const

Definition at line 211 of file AMDGPUISelDAGToDAG.cpp.

References assert(), llvm::ISD::BITCAST, llvm::SelectionDAGISel::CurDAG, llvm::GCNSubtarget::d16PreservesUnusedBits(), llvm::LoadSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getMemIntrinsicNode(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValue(), llvm::SelectionDAG::getVTList(), llvm::Hi, llvm::SDNode::isPredecessorOf(), llvm::Lo, llvm::AMDGPUISD::LOAD_D16_HI, llvm::AMDGPUISD::LOAD_D16_HI_I8, llvm::AMDGPUISD::LOAD_D16_HI_U8, llvm::AMDGPUISD::LOAD_D16_LO, llvm::AMDGPUISD::LOAD_D16_LO_I8, llvm::AMDGPUISD::LOAD_D16_LO_U8, N, llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::ISD::SCALAR_TO_VECTOR, and llvm::ISD::SEXTLOAD.

Referenced by PreprocessISelDAG().

◆ PostprocessISelDAG()

void AMDGPUDAGToDAGISel::PostprocessISelDAG ( )
overridevirtual

PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 2968 of file AMDGPUISelDAGToDAG.cpp.

References llvm::SelectionDAG::allnodes_begin(), llvm::SelectionDAG::allnodes_end(), llvm::SelectionDAGISel::CurDAG, llvm::SelectionDAGISel::getTargetLowering(), Lowering, llvm::SelectionDAG::RemoveDeadNodes(), and llvm::SelectionDAGISel::ReplaceUses().

◆ PreprocessISelDAG()

void AMDGPUDAGToDAGISel::PreprocessISelDAG ( )
overridevirtual

PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 291 of file AMDGPUISelDAGToDAG.cpp.

References llvm::SelectionDAG::allnodes_begin(), llvm::SelectionDAG::allnodes_end(), llvm::ISD::BUILD_VECTOR, llvm::SelectionDAGISel::CurDAG, llvm::GCNSubtarget::d16PreservesUnusedBits(), llvm::dbgs(), llvm::SelectionDAG::dump(), LLVM_DEBUG, matchLoadD16FromBuildVector(), N, and llvm::SelectionDAG::RemoveDeadNodes().

◆ runOnMachineFunction()

bool AMDGPUDAGToDAGISel::runOnMachineFunction ( MachineFunction &  MF)
overridevirtual

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 126 of file AMDGPUISelDAGToDAG.cpp.

References assert(), llvm::MachineFunction::getFunction(), llvm::LoopInfoBase< BlockT, LoopT >::getLoopsInPreorder(), llvm::MachineFunction::getSubtarget(), llvm::SelectionDAGISel::MF, and llvm::SelectionDAGISel::runOnMachineFunction().

◆ Select()

void AMDGPUDAGToDAGISel::Select ( SDNode *  N)
overridevirtual

Main hook for targets to transform nodes into machine nodes.

Implements llvm::SelectionDAGISel.

Definition at line 497 of file AMDGPUISelDAGToDAG.cpp.

References llvm::ISD::ADDC, llvm::ISD::ADDE, llvm::ISD::AND, assert(), llvm::AMDGPUISD::ATOMIC_LOAD_FMAX, llvm::AMDGPUISD::ATOMIC_LOAD_FMIN, llvm::AMDGPUISD::BFE_I32, llvm::AMDGPUISD::BFE_U32, llvm::EVT::bitsEq(), llvm::ISD::BRCOND, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::CallingConv::C, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::ISD::CopyToReg, llvm::SelectionDAGISel::CurDAG, llvm::AMDGPUISD::CVT_PK_I16_I32, llvm::AMDGPUISD::CVT_PK_U16_U32, llvm::AMDGPUISD::CVT_PKNORM_I16_F32, llvm::AMDGPUISD::CVT_PKNORM_U16_F32, llvm::AMDGPUISD::CVT_PKRTZ_F16_F32, llvm::AMDGPUISD::DIV_SCALE, DL, llvm::AMDGPUISD::FMA_W_CHAIN, llvm::AMDGPUISD::FMUL_W_CHAIN, FP, llvm::TargetRegisterClass::getID(), llvm::SelectionDAG::getMachineNode(), llvm::EVT::getScalarSizeInBits(), llvm::SIRegisterInfo::getSGPRClassForBitWidth(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAGISel::getTargetLowering(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::SelectionDAG::getVTList(), llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm_unreachable, llvm::ISD::LOAD, Lowering, llvm::AMDGPUISD::MAD_I64_I32, llvm::AMDGPUISD::MAD_U64_U32, llvm::SelectionDAG::MorphNodeTo(), N, llvm::Offset, llvm::SelectionDAGISel::ReplaceNode(), llvm::ISD::SCALAR_TO_VECTOR, SelectBuildVector(), llvm::ISD::SIGN_EXTEND_INREG, Signed, llvm::ISD::SMUL_LOHI, llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::STORE, llvm::ISD::SUBC, llvm::ISD::SUBE, llvm::ISD::UADDO, llvm::ISD::UADDO_CARRY, llvm::ISD::UMUL_LOHI, llvm::ISD::USUBO, and llvm::ISD::USUBO_CARRY.

◆ SelectBuildVector()

void AMDGPUDAGToDAGISel::SelectBuildVector ( SDNode *  N,
unsigned  RegClassID 
)
protected

Definition at line 442 of file AMDGPUISelDAGToDAG.cpp.

References llvm::Triple::amdgcn, assert(), llvm::SelectionDAGISel::CurDAG, DL, llvm::Triple::getArch(), llvm::SelectionDAG::getMachineNode(), llvm::R600RegisterInfo::getSubRegFromChannel(), llvm::SIRegisterInfo::getSubRegFromChannel(), llvm::SelectionDAG::getSubtarget(), llvm::SelectionDAG::getTargetConstant(), llvm::MCSubtargetInfo::getTargetTriple(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), N, llvm::ISD::SCALAR_TO_VECTOR, and llvm::SelectionDAG::SelectNodeTo().

Referenced by Select().

Member Data Documentation

◆ ID

char AMDGPUDAGToDAGISel::ID = 0
static

Definition at line 91 of file AMDGPUISelDAGToDAG.h.

The documentation for this class was generated from the following files:
Generated on Sat May 27 2023 15:19:32 for LLVM by doxygen 1.9.6