LLVM  14.0.0git
Public Member Functions | Protected Member Functions | List of all members
AMDGPUDAGToDAGISel Class Reference

AMDGPU specific code to select AMDGPU machine instructions for SelectionDAG operations. More...

#include "Target/AMDGPU/AMDGPUISelDAGToDAG.h"

Inheritance diagram for AMDGPUDAGToDAGISel:
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Collaboration diagram for AMDGPUDAGToDAGISel:
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Public Member Functions

 AMDGPUDAGToDAGISel (TargetMachine *TM=nullptr, CodeGenOpt::Level OptLevel=CodeGenOpt::Default)
 
 ~AMDGPUDAGToDAGISel () override=default
 
void getAnalysisUsage (AnalysisUsage &AU) const override
 getAnalysisUsage - Subclasses that override getAnalysisUsage must call this. More...
 
bool matchLoadD16FromBuildVector (SDNode *N) const
 
bool runOnMachineFunction (MachineFunction &MF) override
 runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis. More...
 
void PreprocessISelDAG () override
 PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts. More...
 
void Select (SDNode *N) override
 Main hook for targets to transform nodes into machine nodes. More...
 
StringRef getPassName () const override
 getPassName - Return a nice clean name for a pass. More...
 
void PostprocessISelDAG () override
 PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection. More...
 
- Public Member Functions inherited from llvm::SelectionDAGISel
 SelectionDAGISel (TargetMachine &tm, CodeGenOpt::Level OL=CodeGenOpt::Default)
 
 ~SelectionDAGISel () override
 
const TargetLoweringgetTargetLowering () const
 
virtual void emitFunctionEntryCode ()
 
virtual bool SelectInlineAsmMemoryOperand (const SDValue &Op, unsigned ConstraintID, std::vector< SDValue > &OutOps)
 SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint. More...
 
virtual bool IsProfitableToFold (SDValue N, SDNode *U, SDNode *Root) const
 IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root. More...
 
bool CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckAndMask - The isel is trying to match something like (and X, 255). More...
 
bool CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckOrMask - The isel is trying to match something like (or X, 255). More...
 
virtual bool CheckPatternPredicate (unsigned PredNo) const
 CheckPatternPredicate - This function is generated by tblgen in the target. More...
 
virtual bool CheckNodePredicate (SDNode *N, unsigned PredNo) const
 CheckNodePredicate - This function is generated by tblgen in the target. More...
 
virtual bool CheckNodePredicateWithOperands (SDNode *N, unsigned PredNo, const SmallVectorImpl< SDValue > &Operands) const
 CheckNodePredicateWithOperands - This function is generated by tblgen in the target. More...
 
virtual bool CheckComplexPattern (SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result)
 
virtual SDValue RunSDNodeXForm (SDValue V, unsigned XFormNo)
 
void SelectCodeCommon (SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize)
 
virtual bool ComplexPatternFuncMutatesDAG () const
 Return true if complex patterns for this target can mutate the DAG. More...
 
bool mayRaiseFPException (SDNode *Node) const
 Return whether the node may raise an FP exception. More...
 
bool isOrEquivalentToAdd (const SDNode *N) const
 
- Public Member Functions inherited from llvm::MachineFunctionPass
bool doInitialization (Module &) override
 doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run. More...
 
- Public Member Functions inherited from llvm::FunctionPass
 FunctionPass (char &pid)
 
PasscreatePrinterPass (raw_ostream &OS, const std::string &Banner) const override
 createPrinterPass - Get a function printer pass. More...
 
void assignPassManager (PMStack &PMS, PassManagerType T) override
 Find appropriate Function Pass Manager or Call Graph Pass Manager in the PM Stack and add self into that manager. More...
 
PassManagerType getPotentialPassManagerType () const override
 Return what kind of Pass Manager can manage this pass. More...
 
- Public Member Functions inherited from llvm::Pass
 Pass (PassKind K, char &pid)
 
 Pass (const Pass &)=delete
 
Passoperator= (const Pass &)=delete
 
virtual ~Pass ()
 
PassKind getPassKind () const
 
AnalysisID getPassID () const
 getPassID - Return the PassID number that corresponds to this pass. More...
 
virtual bool doFinalization (Module &)
 doFinalization - Virtual method overriden by subclasses to do any necessary clean up after all passes have run. More...
 
virtual void print (raw_ostream &OS, const Module *M) const
 print - Print out the internal state of the pass. More...
 
void dump () const
 
virtual void preparePassManager (PMStack &)
 Check if available pass managers are suitable for this pass or not. More...
 
void setResolver (AnalysisResolver *AR)
 
AnalysisResolvergetResolver () const
 
virtual void releaseMemory ()
 releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memory when it is no longer needed. More...
 
virtual void * getAdjustedAnalysisPointer (AnalysisID ID)
 getAdjustedAnalysisPointer - This method is used when a pass implements an analysis interface through multiple inheritance. More...
 
virtual ImmutablePassgetAsImmutablePass ()
 
virtual PMDataManagergetAsPMDataManager ()
 
virtual void verifyAnalysis () const
 verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis information. More...
 
virtual void dumpPassStructure (unsigned Offset=0)
 
template<typename AnalysisType >
AnalysisType * getAnalysisIfAvailable () const
 getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to get analysis information that might be around, for example to update it. More...
 
bool mustPreserveAnalysisID (char &AID) const
 mustPreserveAnalysisID - This method serves the same function as getAnalysisIfAvailable, but works if you just have an AnalysisID. More...
 
template<typename AnalysisType >
AnalysisType & getAnalysis () const
 getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function. More...
 
template<typename AnalysisType >
AnalysisType & getAnalysis (Function &F, bool *Changed=nullptr)
 getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function. More...
 
template<typename AnalysisType >
AnalysisType & getAnalysisID (AnalysisID PI) const
 
template<typename AnalysisType >
AnalysisType & getAnalysisID (AnalysisID PI, Function &F, bool *Changed=nullptr)
 

Protected Member Functions

void SelectBuildVector (SDNode *N, unsigned RegClassID)
 
- Protected Member Functions inherited from llvm::SelectionDAGISel
void ReplaceUses (SDValue F, SDValue T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T. More...
 
void ReplaceUses (const SDValue *F, const SDValue *T, unsigned Num)
 ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T. More...
 
void ReplaceUses (SDNode *F, SDNode *T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T. More...
 
void ReplaceNode (SDNode *F, SDNode *T)
 Replace all uses of F with T, then remove F from the DAG. More...
 
void SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops, const SDLoc &DL)
 SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen. More...
 
virtual StringRef getPatternForIndex (unsigned index)
 getPatternForIndex - Patterns selected by tablegen during ISEL More...
 
virtual StringRef getIncludePathForIndex (unsigned index)
 getIncludePathForIndex - get the td source location of pattern instantiation More...
 
bool shouldOptForSize (const MachineFunction *MF) const
 
- Protected Member Functions inherited from llvm::MachineFunctionPass
 MachineFunctionPass (char &ID)
 
virtual MachineFunctionProperties getRequiredProperties () const
 
virtual MachineFunctionProperties getSetProperties () const
 
virtual MachineFunctionProperties getClearedProperties () const
 
- Protected Member Functions inherited from llvm::FunctionPass
bool skipFunction (const Function &F) const
 Optional passes call this function to check whether the pass should be skipped. More...
 

Additional Inherited Members

- Public Types inherited from llvm::SelectionDAGISel
enum  BuiltinOpcodes {
  OPC_Scope, OPC_RecordNode, OPC_RecordChild0, OPC_RecordChild1,
  OPC_RecordChild2, OPC_RecordChild3, OPC_RecordChild4, OPC_RecordChild5,
  OPC_RecordChild6, OPC_RecordChild7, OPC_RecordMemRef, OPC_CaptureGlueInput,
  OPC_MoveChild, OPC_MoveChild0, OPC_MoveChild1, OPC_MoveChild2,
  OPC_MoveChild3, OPC_MoveChild4, OPC_MoveChild5, OPC_MoveChild6,
  OPC_MoveChild7, OPC_MoveParent, OPC_CheckSame, OPC_CheckChild0Same,
  OPC_CheckChild1Same, OPC_CheckChild2Same, OPC_CheckChild3Same, OPC_CheckPatternPredicate,
  OPC_CheckPredicate, OPC_CheckPredicateWithOperands, OPC_CheckOpcode, OPC_SwitchOpcode,
  OPC_CheckType, OPC_CheckTypeRes, OPC_SwitchType, OPC_CheckChild0Type,
  OPC_CheckChild1Type, OPC_CheckChild2Type, OPC_CheckChild3Type, OPC_CheckChild4Type,
  OPC_CheckChild5Type, OPC_CheckChild6Type, OPC_CheckChild7Type, OPC_CheckInteger,
  OPC_CheckChild0Integer, OPC_CheckChild1Integer, OPC_CheckChild2Integer, OPC_CheckChild3Integer,
  OPC_CheckChild4Integer, OPC_CheckCondCode, OPC_CheckChild2CondCode, OPC_CheckValueType,
  OPC_CheckComplexPat, OPC_CheckAndImm, OPC_CheckOrImm, OPC_CheckImmAllOnesV,
  OPC_CheckImmAllZerosV, OPC_CheckFoldableChainNode, OPC_EmitInteger, OPC_EmitStringInteger,
  OPC_EmitRegister, OPC_EmitRegister2, OPC_EmitConvertToTarget, OPC_EmitMergeInputChains,
  OPC_EmitMergeInputChains1_0, OPC_EmitMergeInputChains1_1, OPC_EmitMergeInputChains1_2, OPC_EmitCopyToReg,
  OPC_EmitCopyToReg2, OPC_EmitNodeXForm, OPC_EmitNode, OPC_EmitNode0,
  OPC_EmitNode1, OPC_EmitNode2, OPC_MorphNodeTo, OPC_MorphNodeTo0,
  OPC_MorphNodeTo1, OPC_MorphNodeTo2, OPC_CompleteMatch, OPC_Coverage
}
 
enum  {
  OPFL_None = 0, OPFL_Chain = 1, OPFL_GlueInput = 2, OPFL_GlueOutput = 4,
  OPFL_MemRefs = 8, OPFL_Variadic0 = 1<<4, OPFL_Variadic1 = 2<<4, OPFL_Variadic2 = 3<<4,
  OPFL_Variadic3 = 4<<4, OPFL_Variadic4 = 5<<4, OPFL_Variadic5 = 6<<4, OPFL_Variadic6 = 7<<4,
  OPFL_VariadicInfo = OPFL_Variadic6
}
 
- Static Public Member Functions inherited from llvm::SelectionDAGISel
static bool IsLegalToFold (SDValue N, SDNode *U, SDNode *Root, CodeGenOpt::Level OptLevel, bool IgnoreChains=false)
 IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root. More...
 
static void InvalidateNodeId (SDNode *N)
 
static int getUninvalidatedNodeId (SDNode *N)
 
static void EnforceNodeIdInvariant (SDNode *N)
 
static int getNumFixedFromVariadicInfo (unsigned Flags)
 getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root. More...
 
- Static Public Member Functions inherited from llvm::Pass
static const PassInfolookupPassInfo (const void *TI)
 
static const PassInfolookupPassInfo (StringRef Arg)
 
static PasscreatePass (AnalysisID ID)
 
- Public Attributes inherited from llvm::SelectionDAGISel
TargetMachineTM
 
const TargetLibraryInfoLibInfo
 
std::unique_ptr< FunctionLoweringInfoFuncInfo
 
SwiftErrorValueTrackingSwiftError
 
MachineFunctionMF
 
MachineRegisterInfoRegInfo
 
SelectionDAGCurDAG
 
std::unique_ptr< SelectionDAGBuilderSDB
 
AAResultsAA
 
GCFunctionInfoGFI
 
CodeGenOpt::Level OptLevel
 
const TargetInstrInfoTII
 
const TargetLoweringTLI
 
bool FastISelFailed
 
SmallPtrSet< const Instruction *, 4 > ElidedArgCopyInstrs
 
std::unique_ptr< OptimizationRemarkEmitterORE
 Current optimization remark emitter. More...
 
- Static Public Attributes inherited from llvm::SelectionDAGISel
static char ID = 0
 
- Protected Attributes inherited from llvm::SelectionDAGISel
unsigned DAGSize
 DAGSize - Size of DAG being instruction selected. More...
 

Detailed Description

AMDGPU specific code to select AMDGPU machine instructions for SelectionDAG operations.

Definition at line 79 of file AMDGPUISelDAGToDAG.h.

Constructor & Destructor Documentation

◆ AMDGPUDAGToDAGISel()

AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel ( TargetMachine TM = nullptr,
CodeGenOpt::Level  OptLevel = CodeGenOpt::Default 
)
explicit

Definition at line 117 of file AMDGPUISelDAGToDAG.cpp.

◆ ~AMDGPUDAGToDAGISel()

AMDGPUDAGToDAGISel::~AMDGPUDAGToDAGISel ( )
overridedefault

Member Function Documentation

◆ getAnalysisUsage()

void AMDGPUDAGToDAGISel::getAnalysisUsage ( AnalysisUsage AU) const
overridevirtual

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

For MachineFunctionPasses, calling AU.preservesCFG() indicates that the pass does not modify the MachineBasicBlock CFG.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 199 of file AMDGPUISelDAGToDAG.cpp.

References llvm::AnalysisUsage::addRequired().

◆ getPassName()

StringRef AMDGPUDAGToDAGISel::getPassName ( ) const
overridevirtual

getPassName - Return a nice clean name for a pass.

This usually implemented in terms of the name that is registered by one of the Registration templates, but can be overloaded directly.

Reimplemented from llvm::Pass.

Definition at line 784 of file AMDGPUISelDAGToDAG.cpp.

◆ matchLoadD16FromBuildVector()

bool AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector ( SDNode N) const

◆ PostprocessISelDAG()

void AMDGPUDAGToDAGISel::PostprocessISelDAG ( )
overridevirtual

PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 2879 of file AMDGPUISelDAGToDAG.cpp.

References llvm::SelectionDAG::allnodes_begin(), llvm::SelectionDAG::allnodes_end(), llvm::SelectionDAGISel::CurDAG, llvm::SelectionDAGISel::getTargetLowering(), and Lowering.

◆ PreprocessISelDAG()

void AMDGPUDAGToDAGISel::PreprocessISelDAG ( )
overridevirtual

◆ runOnMachineFunction()

bool AMDGPUDAGToDAGISel::runOnMachineFunction ( MachineFunction MF)
overridevirtual

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.

Reimplemented from llvm::SelectionDAGISel.

Reimplemented in R600DAGToDAGISel.

Definition at line 124 of file AMDGPUISelDAGToDAG.cpp.

References assert(), llvm::MachineFunction::getFunction(), llvm::LoopInfoBase< BlockT, LoopT >::getLoopsInPreorder(), llvm::MachineFunction::getSubtarget(), and llvm::SelectionDAGISel::MF.

◆ Select()

void AMDGPUDAGToDAGISel::Select ( SDNode N)
overridevirtual

Main hook for targets to transform nodes into machine nodes.

Implements llvm::SelectionDAGISel.

Reimplemented in R600DAGToDAGISel.

Definition at line 506 of file AMDGPUISelDAGToDAG.cpp.

References llvm::ISD::ADDC, llvm::ISD::ADDCARRY, llvm::ISD::ADDE, llvm::ISD::AND, assert(), llvm::ISD::ATOMIC_CMP_SWAP, llvm::AMDGPUISD::ATOMIC_DEC, llvm::AMDGPUISD::ATOMIC_INC, llvm::ISD::ATOMIC_LOAD_FADD, llvm::AMDGPUISD::ATOMIC_LOAD_FMAX, llvm::AMDGPUISD::ATOMIC_LOAD_FMIN, llvm::AMDGPUISD::BFE_I32, llvm::AMDGPUISD::BFE_U32, llvm::EVT::bitsEq(), llvm::ISD::BRCOND, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::ISD::CopyToReg, llvm::SelectionDAGISel::CurDAG, llvm::AMDGPUISD::CVT_PK_I16_I32, llvm::AMDGPUISD::CVT_PK_U16_U32, llvm::AMDGPUISD::CVT_PKNORM_I16_F32, llvm::AMDGPUISD::CVT_PKNORM_U16_F32, llvm::AMDGPUISD::CVT_PKRTZ_F16_F32, llvm::AMDGPUISD::DIV_SCALE, DL, llvm::ISD::FMA, llvm::AMDGPUISD::FMA_W_CHAIN, llvm::ISD::FMAD, llvm::AMDGPUISD::FMUL_W_CHAIN, FP, llvm::SelectionDAG::getMachineNode(), llvm::EVT::getScalarSizeInBits(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAGISel::getTargetLowering(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::SelectionDAG::getVTList(), i32, i64, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm_unreachable, llvm::ISD::LOAD, Lowering, llvm::AMDGPUISD::MAD_I64_I32, llvm::AMDGPUISD::MAD_U64_U32, llvm::SelectionDAG::MorphNodeTo(), N, Offset, llvm::SelectionDAGISel::ReplaceNode(), llvm::ISD::SCALAR_TO_VECTOR, SelectBuildVector(), llvm::ISD::SIGN_EXTEND_INREG, Signed, llvm::ISD::SMUL_LOHI, llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::STORE, llvm::ISD::SUBC, llvm::ISD::SUBCARRY, llvm::ISD::SUBE, llvm::ISD::UADDO, llvm::ISD::UMUL_LOHI, and llvm::ISD::USUBO.

◆ SelectBuildVector()

void AMDGPUDAGToDAGISel::SelectBuildVector ( SDNode N,
unsigned  RegClassID 
)
protected

The documentation for this class was generated from the following files: