LLVM 19.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
30#include "llvm/Config/llvm-config.h"
31#include "llvm/IR/BasicBlock.h"
32#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugLoc.h"
35#include "llvm/IR/Function.h"
36#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/Value.h"
42#include "llvm/Support/Debug.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58std::string SDNode::getOperationName(const SelectionDAG *G) const {
59 switch (getOpcode()) {
60 default:
62 return "<<Unknown DAG Node>>";
63 if (isMachineOpcode()) {
64 if (G)
65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66 if (getMachineOpcode() < TII->getNumOpcodes())
67 return std::string(TII->getName(getMachineOpcode()));
68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69 }
70 if (G) {
71 const TargetLowering &TLI = G->getTargetLoweringInfo();
72 const char *Name = TLI.getTargetNodeName(getOpcode());
73 if (Name) return Name;
74 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
75 }
76 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
77
78#ifndef NDEBUG
79 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
80#endif
81 case ISD::PREFETCH: return "Prefetch";
82 case ISD::MEMBARRIER: return "MemBarrier";
83 case ISD::ATOMIC_FENCE: return "AtomicFence";
84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
86 case ISD::ATOMIC_SWAP: return "AtomicSwap";
87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
99 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
100 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
102 return "AtomicLoadUIncWrap";
104 return "AtomicLoadUDecWrap";
105 case ISD::ATOMIC_LOAD: return "AtomicLoad";
106 case ISD::ATOMIC_STORE: return "AtomicStore";
107 case ISD::PCMARKER: return "PCMarker";
108 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
109 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
110 case ISD::SRCVALUE: return "SrcValue";
111 case ISD::MDNODE_SDNODE: return "MDNode";
112 case ISD::EntryToken: return "EntryToken";
113 case ISD::TokenFactor: return "TokenFactor";
114 case ISD::AssertSext: return "AssertSext";
115 case ISD::AssertZext: return "AssertZext";
116 case ISD::AssertAlign: return "AssertAlign";
117
118 case ISD::BasicBlock: return "BasicBlock";
119 case ISD::VALUETYPE: return "ValueType";
120 case ISD::Register: return "Register";
121 case ISD::RegisterMask: return "RegisterMask";
122 case ISD::Constant:
123 if (cast<ConstantSDNode>(this)->isOpaque())
124 return "OpaqueConstant";
125 return "Constant";
126 case ISD::ConstantFP: return "ConstantFP";
127 case ISD::GlobalAddress: return "GlobalAddress";
128 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
129 case ISD::FrameIndex: return "FrameIndex";
130 case ISD::JumpTable: return "JumpTable";
132 return "JUMP_TABLE_DEBUG_INFO";
133 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
134 case ISD::RETURNADDR: return "RETURNADDR";
135 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
136 case ISD::FRAMEADDR: return "FRAMEADDR";
137 case ISD::SPONENTRY: return "SPONENTRY";
138 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
139 case ISD::READ_REGISTER: return "READ_REGISTER";
140 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
141 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
142 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
143 case ISD::EH_RETURN: return "EH_RETURN";
144 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
145 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
146 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
147 case ISD::ConstantPool: return "ConstantPool";
148 case ISD::TargetIndex: return "TargetIndex";
149 case ISD::ExternalSymbol: return "ExternalSymbol";
150 case ISD::BlockAddress: return "BlockAddress";
154 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
155 unsigned IID = getOperand(OpNo)->getAsZExtVal();
156 if (IID < Intrinsic::num_intrinsics)
158 if (!G)
159 return "Unknown intrinsic";
160 if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
161 return TII->getName(IID);
162 llvm_unreachable("Invalid intrinsic ID");
163 }
164
165 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
167 if (cast<ConstantSDNode>(this)->isOpaque())
168 return "OpaqueTargetConstant";
169 return "TargetConstant";
170
171 // clang-format off
172
173 case ISD::TargetConstantFP: return "TargetConstantFP";
174 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
175 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
176 case ISD::TargetFrameIndex: return "TargetFrameIndex";
177 case ISD::TargetJumpTable: return "TargetJumpTable";
178 case ISD::TargetConstantPool: return "TargetConstantPool";
179 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
180 case ISD::MCSymbol: return "MCSymbol";
181 case ISD::TargetBlockAddress: return "TargetBlockAddress";
182
183 case ISD::CopyToReg: return "CopyToReg";
184 case ISD::CopyFromReg: return "CopyFromReg";
185 case ISD::UNDEF: return "undef";
186 case ISD::VSCALE: return "vscale";
187 case ISD::MERGE_VALUES: return "merge_values";
188 case ISD::INLINEASM: return "inlineasm";
189 case ISD::INLINEASM_BR: return "inlineasm_br";
190 case ISD::EH_LABEL: return "eh_label";
191 case ISD::ANNOTATION_LABEL: return "annotation_label";
192 case ISD::HANDLENODE: return "handlenode";
193
194 // Unary operators
195 case ISD::FABS: return "fabs";
196 case ISD::FMINNUM: return "fminnum";
197 case ISD::STRICT_FMINNUM: return "strict_fminnum";
198 case ISD::FMAXNUM: return "fmaxnum";
199 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
200 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
201 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
202 case ISD::FMINIMUM: return "fminimum";
203 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
204 case ISD::FMAXIMUM: return "fmaximum";
205 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
206 case ISD::FNEG: return "fneg";
207 case ISD::FSQRT: return "fsqrt";
208 case ISD::STRICT_FSQRT: return "strict_fsqrt";
209 case ISD::FCBRT: return "fcbrt";
210 case ISD::FSIN: return "fsin";
211 case ISD::STRICT_FSIN: return "strict_fsin";
212 case ISD::FCOS: return "fcos";
213 case ISD::STRICT_FCOS: return "strict_fcos";
214 case ISD::FSINCOS: return "fsincos";
215 case ISD::FTAN: return "ftan";
216 case ISD::STRICT_FTAN: return "strict_ftan";
217 case ISD::FTRUNC: return "ftrunc";
218 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
219 case ISD::FFLOOR: return "ffloor";
220 case ISD::STRICT_FFLOOR: return "strict_ffloor";
221 case ISD::FCEIL: return "fceil";
222 case ISD::STRICT_FCEIL: return "strict_fceil";
223 case ISD::FRINT: return "frint";
224 case ISD::STRICT_FRINT: return "strict_frint";
225 case ISD::FNEARBYINT: return "fnearbyint";
226 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
227 case ISD::FROUND: return "fround";
228 case ISD::STRICT_FROUND: return "strict_fround";
229 case ISD::FROUNDEVEN: return "froundeven";
230 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
231 case ISD::FEXP: return "fexp";
232 case ISD::STRICT_FEXP: return "strict_fexp";
233 case ISD::FEXP2: return "fexp2";
234 case ISD::STRICT_FEXP2: return "strict_fexp2";
235 case ISD::FEXP10: return "fexp10";
236 case ISD::FLOG: return "flog";
237 case ISD::STRICT_FLOG: return "strict_flog";
238 case ISD::FLOG2: return "flog2";
239 case ISD::STRICT_FLOG2: return "strict_flog2";
240 case ISD::FLOG10: return "flog10";
241 case ISD::STRICT_FLOG10: return "strict_flog10";
242
243 // Binary operators
244 case ISD::ADD: return "add";
245 case ISD::SUB: return "sub";
246 case ISD::MUL: return "mul";
247 case ISD::MULHU: return "mulhu";
248 case ISD::MULHS: return "mulhs";
249 case ISD::AVGFLOORU: return "avgflooru";
250 case ISD::AVGFLOORS: return "avgfloors";
251 case ISD::AVGCEILU: return "avgceilu";
252 case ISD::AVGCEILS: return "avgceils";
253 case ISD::ABDS: return "abds";
254 case ISD::ABDU: return "abdu";
255 case ISD::SDIV: return "sdiv";
256 case ISD::UDIV: return "udiv";
257 case ISD::SREM: return "srem";
258 case ISD::UREM: return "urem";
259 case ISD::SMUL_LOHI: return "smul_lohi";
260 case ISD::UMUL_LOHI: return "umul_lohi";
261 case ISD::SDIVREM: return "sdivrem";
262 case ISD::UDIVREM: return "udivrem";
263 case ISD::AND: return "and";
264 case ISD::OR: return "or";
265 case ISD::XOR: return "xor";
266 case ISD::SHL: return "shl";
267 case ISD::SRA: return "sra";
268 case ISD::SRL: return "srl";
269 case ISD::ROTL: return "rotl";
270 case ISD::ROTR: return "rotr";
271 case ISD::FSHL: return "fshl";
272 case ISD::FSHR: return "fshr";
273 case ISD::FADD: return "fadd";
274 case ISD::STRICT_FADD: return "strict_fadd";
275 case ISD::FSUB: return "fsub";
276 case ISD::STRICT_FSUB: return "strict_fsub";
277 case ISD::FMUL: return "fmul";
278 case ISD::STRICT_FMUL: return "strict_fmul";
279 case ISD::FDIV: return "fdiv";
280 case ISD::STRICT_FDIV: return "strict_fdiv";
281 case ISD::FMA: return "fma";
282 case ISD::STRICT_FMA: return "strict_fma";
283 case ISD::FMAD: return "fmad";
284 case ISD::FREM: return "frem";
285 case ISD::STRICT_FREM: return "strict_frem";
286 case ISD::FCOPYSIGN: return "fcopysign";
287 case ISD::FGETSIGN: return "fgetsign";
288 case ISD::FCANONICALIZE: return "fcanonicalize";
289 case ISD::IS_FPCLASS: return "is_fpclass";
290 case ISD::FPOW: return "fpow";
291 case ISD::STRICT_FPOW: return "strict_fpow";
292 case ISD::SMIN: return "smin";
293 case ISD::SMAX: return "smax";
294 case ISD::UMIN: return "umin";
295 case ISD::UMAX: return "umax";
296 case ISD::SCMP: return "scmp";
297 case ISD::UCMP: return "ucmp";
298
299 case ISD::FLDEXP: return "fldexp";
300 case ISD::STRICT_FLDEXP: return "strict_fldexp";
301 case ISD::FFREXP: return "ffrexp";
302 case ISD::FPOWI: return "fpowi";
303 case ISD::STRICT_FPOWI: return "strict_fpowi";
304 case ISD::SETCC: return "setcc";
305 case ISD::SETCCCARRY: return "setcccarry";
306 case ISD::STRICT_FSETCC: return "strict_fsetcc";
307 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
308 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
309 case ISD::SELECT: return "select";
310 case ISD::VSELECT: return "vselect";
311 case ISD::SELECT_CC: return "select_cc";
312 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
313 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
314 case ISD::CONCAT_VECTORS: return "concat_vectors";
315 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
316 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
317 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
318 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
319 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
320 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
321 case ISD::VECTOR_SPLICE: return "vector_splice";
322 case ISD::SPLAT_VECTOR: return "splat_vector";
323 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
324 case ISD::VECTOR_REVERSE: return "vector_reverse";
325 case ISD::STEP_VECTOR: return "step_vector";
326 case ISD::CARRY_FALSE: return "carry_false";
327 case ISD::ADDC: return "addc";
328 case ISD::ADDE: return "adde";
329 case ISD::UADDO_CARRY: return "uaddo_carry";
330 case ISD::SADDO_CARRY: return "saddo_carry";
331 case ISD::SADDO: return "saddo";
332 case ISD::UADDO: return "uaddo";
333 case ISD::SSUBO: return "ssubo";
334 case ISD::USUBO: return "usubo";
335 case ISD::SMULO: return "smulo";
336 case ISD::UMULO: return "umulo";
337 case ISD::SUBC: return "subc";
338 case ISD::SUBE: return "sube";
339 case ISD::USUBO_CARRY: return "usubo_carry";
340 case ISD::SSUBO_CARRY: return "ssubo_carry";
341 case ISD::SHL_PARTS: return "shl_parts";
342 case ISD::SRA_PARTS: return "sra_parts";
343 case ISD::SRL_PARTS: return "srl_parts";
344
345 case ISD::SADDSAT: return "saddsat";
346 case ISD::UADDSAT: return "uaddsat";
347 case ISD::SSUBSAT: return "ssubsat";
348 case ISD::USUBSAT: return "usubsat";
349 case ISD::SSHLSAT: return "sshlsat";
350 case ISD::USHLSAT: return "ushlsat";
351
352 case ISD::SMULFIX: return "smulfix";
353 case ISD::SMULFIXSAT: return "smulfixsat";
354 case ISD::UMULFIX: return "umulfix";
355 case ISD::UMULFIXSAT: return "umulfixsat";
356
357 case ISD::SDIVFIX: return "sdivfix";
358 case ISD::SDIVFIXSAT: return "sdivfixsat";
359 case ISD::UDIVFIX: return "udivfix";
360 case ISD::UDIVFIXSAT: return "udivfixsat";
361
362 // Conversion operators.
363 case ISD::SIGN_EXTEND: return "sign_extend";
364 case ISD::ZERO_EXTEND: return "zero_extend";
365 case ISD::ANY_EXTEND: return "any_extend";
366 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
367 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
368 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
369 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
370 case ISD::TRUNCATE: return "truncate";
371 case ISD::FP_ROUND: return "fp_round";
372 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
373 case ISD::FP_EXTEND: return "fp_extend";
374 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
375
376 case ISD::SINT_TO_FP: return "sint_to_fp";
377 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
378 case ISD::UINT_TO_FP: return "uint_to_fp";
379 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
380 case ISD::FP_TO_SINT: return "fp_to_sint";
381 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
382 case ISD::FP_TO_UINT: return "fp_to_uint";
383 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
384 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
385 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
386 case ISD::BITCAST: return "bitcast";
387 case ISD::ADDRSPACECAST: return "addrspacecast";
388 case ISD::FP16_TO_FP: return "fp16_to_fp";
389 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
390 case ISD::FP_TO_FP16: return "fp_to_fp16";
391 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
392 case ISD::BF16_TO_FP: return "bf16_to_fp";
393 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
394 case ISD::FP_TO_BF16: return "fp_to_bf16";
395 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
396 case ISD::LROUND: return "lround";
397 case ISD::STRICT_LROUND: return "strict_lround";
398 case ISD::LLROUND: return "llround";
399 case ISD::STRICT_LLROUND: return "strict_llround";
400 case ISD::LRINT: return "lrint";
401 case ISD::STRICT_LRINT: return "strict_lrint";
402 case ISD::LLRINT: return "llrint";
403 case ISD::STRICT_LLRINT: return "strict_llrint";
404
405 // Control flow instructions
406 case ISD::BR: return "br";
407 case ISD::BRIND: return "brind";
408 case ISD::BR_JT: return "br_jt";
409 case ISD::BRCOND: return "brcond";
410 case ISD::BR_CC: return "br_cc";
411 case ISD::CALLSEQ_START: return "callseq_start";
412 case ISD::CALLSEQ_END: return "callseq_end";
413
414 // EH instructions
415 case ISD::CATCHRET: return "catchret";
416 case ISD::CLEANUPRET: return "cleanupret";
417
418 // Other operators
419 case ISD::LOAD: return "load";
420 case ISD::STORE: return "store";
421 case ISD::MLOAD: return "masked_load";
422 case ISD::MSTORE: return "masked_store";
423 case ISD::MGATHER: return "masked_gather";
424 case ISD::MSCATTER: return "masked_scatter";
425 case ISD::VAARG: return "vaarg";
426 case ISD::VACOPY: return "vacopy";
427 case ISD::VAEND: return "vaend";
428 case ISD::VASTART: return "vastart";
429 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
430 case ISD::EXTRACT_ELEMENT: return "extract_element";
431 case ISD::BUILD_PAIR: return "build_pair";
432 case ISD::STACKSAVE: return "stacksave";
433 case ISD::STACKRESTORE: return "stackrestore";
434 case ISD::TRAP: return "trap";
435 case ISD::DEBUGTRAP: return "debugtrap";
436 case ISD::UBSANTRAP: return "ubsantrap";
437 case ISD::LIFETIME_START: return "lifetime.start";
438 case ISD::LIFETIME_END: return "lifetime.end";
440 return "pseudoprobe";
441 case ISD::GC_TRANSITION_START: return "gc_transition.start";
442 case ISD::GC_TRANSITION_END: return "gc_transition.end";
443 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
444 case ISD::FREEZE: return "freeze";
446 return "call_setup";
448 return "call_alloc";
449
450 // Floating point environment manipulation
451 case ISD::GET_ROUNDING: return "get_rounding";
452 case ISD::SET_ROUNDING: return "set_rounding";
453 case ISD::GET_FPENV: return "get_fpenv";
454 case ISD::SET_FPENV: return "set_fpenv";
455 case ISD::RESET_FPENV: return "reset_fpenv";
456 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
457 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
458 case ISD::GET_FPMODE: return "get_fpmode";
459 case ISD::SET_FPMODE: return "set_fpmode";
460 case ISD::RESET_FPMODE: return "reset_fpmode";
461
462 // Convergence control instructions
463 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
464 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
465 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
466 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
467
468 // Bit manipulation
469 case ISD::ABS: return "abs";
470 case ISD::BITREVERSE: return "bitreverse";
471 case ISD::BSWAP: return "bswap";
472 case ISD::CTPOP: return "ctpop";
473 case ISD::CTTZ: return "cttz";
474 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
475 case ISD::CTLZ: return "ctlz";
476 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
477 case ISD::PARITY: return "parity";
478
479 // Trampolines
480 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
481 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
482
483 // clang-format on
484
485 case ISD::CONDCODE:
486 switch (cast<CondCodeSDNode>(this)->get()) {
487 default: llvm_unreachable("Unknown setcc condition!");
488 case ISD::SETOEQ: return "setoeq";
489 case ISD::SETOGT: return "setogt";
490 case ISD::SETOGE: return "setoge";
491 case ISD::SETOLT: return "setolt";
492 case ISD::SETOLE: return "setole";
493 case ISD::SETONE: return "setone";
494
495 case ISD::SETO: return "seto";
496 case ISD::SETUO: return "setuo";
497 case ISD::SETUEQ: return "setueq";
498 case ISD::SETUGT: return "setugt";
499 case ISD::SETUGE: return "setuge";
500 case ISD::SETULT: return "setult";
501 case ISD::SETULE: return "setule";
502 case ISD::SETUNE: return "setune";
503
504 case ISD::SETEQ: return "seteq";
505 case ISD::SETGT: return "setgt";
506 case ISD::SETGE: return "setge";
507 case ISD::SETLT: return "setlt";
508 case ISD::SETLE: return "setle";
509 case ISD::SETNE: return "setne";
510
511 case ISD::SETTRUE: return "settrue";
512 case ISD::SETTRUE2: return "settrue2";
513 case ISD::SETFALSE: return "setfalse";
514 case ISD::SETFALSE2: return "setfalse2";
515 }
516 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
517 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
518 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
519 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
520 case ISD::VECREDUCE_ADD: return "vecreduce_add";
521 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
522 case ISD::VECREDUCE_AND: return "vecreduce_and";
523 case ISD::VECREDUCE_OR: return "vecreduce_or";
524 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
525 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
526 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
527 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
528 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
529 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
530 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
531 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
532 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
533 case ISD::STACKMAP:
534 return "stackmap";
535 case ISD::PATCHPOINT:
536 return "patchpoint";
537 case ISD::CLEAR_CACHE:
538 return "clear_cache";
539
541 return "histogram";
542
543 // Vector Predication
544#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
545 case ISD::SDID: \
546 return #NAME;
547#include "llvm/IR/VPIntrinsics.def"
548 }
549}
550
552 switch (AM) {
553 default: return "";
554 case ISD::PRE_INC: return "<pre-inc>";
555 case ISD::PRE_DEC: return "<pre-dec>";
556 case ISD::POST_INC: return "<post-inc>";
557 case ISD::POST_DEC: return "<post-dec>";
558 }
559}
560
562 return Printable([&Node](raw_ostream &OS) {
563#ifndef NDEBUG
564 OS << 't' << Node.PersistentId;
565#else
566 OS << (const void*)&Node;
567#endif
568 });
569}
570
571// Print the MMO with more information from the SelectionDAG.
573 const MachineFunction *MF, const Module *M,
574 const MachineFrameInfo *MFI,
575 const TargetInstrInfo *TII, LLVMContext &Ctx) {
576 ModuleSlotTracker MST(M);
577 if (MF)
580 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
581}
582
584 const SelectionDAG *G) {
585 if (G) {
586 const MachineFunction *MF = &G->getMachineFunction();
587 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
588 &MF->getFrameInfo(),
589 G->getSubtarget().getInstrInfo(), *G->getContext());
590 }
591
592 LLVMContext Ctx;
593 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
594 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
595}
596
597#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
598LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
599
601 print(dbgs(), G);
602 dbgs() << '\n';
603}
604#endif
605
607 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
608 if (i) OS << ",";
609 if (getValueType(i) == MVT::Other)
610 OS << "ch";
611 else
613 }
614}
615
618 OS << " nuw";
619
621 OS << " nsw";
622
623 if (getFlags().hasExact())
624 OS << " exact";
625
626 if (getFlags().hasDisjoint())
627 OS << " disjoint";
628
629 if (getFlags().hasNonNeg())
630 OS << " nneg";
631
632 if (getFlags().hasNoNaNs())
633 OS << " nnan";
634
635 if (getFlags().hasNoInfs())
636 OS << " ninf";
637
638 if (getFlags().hasNoSignedZeros())
639 OS << " nsz";
640
641 if (getFlags().hasAllowReciprocal())
642 OS << " arcp";
643
644 if (getFlags().hasAllowContract())
645 OS << " contract";
646
647 if (getFlags().hasApproximateFuncs())
648 OS << " afn";
649
650 if (getFlags().hasAllowReassociation())
651 OS << " reassoc";
652
653 if (getFlags().hasNoFPExcept())
654 OS << " nofpexcept";
655
656 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
657 if (!MN->memoperands_empty()) {
658 OS << "<";
659 OS << "Mem:";
660 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
661 e = MN->memoperands_end(); i != e; ++i) {
662 printMemOperand(OS, **i, G);
663 if (std::next(i) != e)
664 OS << " ";
665 }
666 OS << ">";
667 }
668 } else if (const ShuffleVectorSDNode *SVN =
669 dyn_cast<ShuffleVectorSDNode>(this)) {
670 OS << "<";
671 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
672 int Idx = SVN->getMaskElt(i);
673 if (i) OS << ",";
674 if (Idx < 0)
675 OS << "u";
676 else
677 OS << Idx;
678 }
679 OS << ">";
680 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
681 OS << '<' << CSDN->getAPIntValue() << '>';
682 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
683 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
684 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
685 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
686 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
687 else {
688 OS << "<APFloat(";
689 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
690 OS << ")>";
691 }
692 } else if (const GlobalAddressSDNode *GADN =
693 dyn_cast<GlobalAddressSDNode>(this)) {
694 int64_t offset = GADN->getOffset();
695 OS << '<';
696 GADN->getGlobal()->printAsOperand(OS);
697 OS << '>';
698 if (offset > 0)
699 OS << " + " << offset;
700 else
701 OS << " " << offset;
702 if (unsigned int TF = GADN->getTargetFlags())
703 OS << " [TF=" << TF << ']';
704 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
705 OS << "<" << FIDN->getIndex() << ">";
706 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
707 OS << "<" << JTDN->getIndex() << ">";
708 if (unsigned int TF = JTDN->getTargetFlags())
709 OS << " [TF=" << TF << ']';
710 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
711 int offset = CP->getOffset();
712 if (CP->isMachineConstantPoolEntry())
713 OS << "<" << *CP->getMachineCPVal() << ">";
714 else
715 OS << "<" << *CP->getConstVal() << ">";
716 if (offset > 0)
717 OS << " + " << offset;
718 else
719 OS << " " << offset;
720 if (unsigned int TF = CP->getTargetFlags())
721 OS << " [TF=" << TF << ']';
722 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
723 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
724 if (unsigned TF = TI->getTargetFlags())
725 OS << " [TF=" << TF << ']';
726 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
727 OS << "<";
728 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
729 if (LBB)
730 OS << LBB->getName() << " ";
731 OS << (const void*)BBDN->getBasicBlock() << ">";
732 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
733 OS << ' ' << printReg(R->getReg(),
734 G ? G->getSubtarget().getRegisterInfo() : nullptr);
735 } else if (const ExternalSymbolSDNode *ES =
736 dyn_cast<ExternalSymbolSDNode>(this)) {
737 OS << "'" << ES->getSymbol() << "'";
738 if (unsigned int TF = ES->getTargetFlags())
739 OS << " [TF=" << TF << ']';
740 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
741 if (M->getValue())
742 OS << "<" << M->getValue() << ">";
743 else
744 OS << "<null>";
745 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
746 if (MD->getMD())
747 OS << "<" << MD->getMD() << ">";
748 else
749 OS << "<null>";
750 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
751 OS << ":" << N->getVT();
752 }
753 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
754 OS << "<";
755
756 printMemOperand(OS, *LD->getMemOperand(), G);
757
758 bool doExt = true;
759 switch (LD->getExtensionType()) {
760 default: doExt = false; break;
761 case ISD::EXTLOAD: OS << ", anyext"; break;
762 case ISD::SEXTLOAD: OS << ", sext"; break;
763 case ISD::ZEXTLOAD: OS << ", zext"; break;
764 }
765 if (doExt)
766 OS << " from " << LD->getMemoryVT();
767
768 const char *AM = getIndexedModeName(LD->getAddressingMode());
769 if (*AM)
770 OS << ", " << AM;
771
772 OS << ">";
773 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
774 OS << "<";
775 printMemOperand(OS, *ST->getMemOperand(), G);
776
777 if (ST->isTruncatingStore())
778 OS << ", trunc to " << ST->getMemoryVT();
779
780 const char *AM = getIndexedModeName(ST->getAddressingMode());
781 if (*AM)
782 OS << ", " << AM;
783
784 OS << ">";
785 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
786 OS << "<";
787
788 printMemOperand(OS, *MLd->getMemOperand(), G);
789
790 bool doExt = true;
791 switch (MLd->getExtensionType()) {
792 default: doExt = false; break;
793 case ISD::EXTLOAD: OS << ", anyext"; break;
794 case ISD::SEXTLOAD: OS << ", sext"; break;
795 case ISD::ZEXTLOAD: OS << ", zext"; break;
796 }
797 if (doExt)
798 OS << " from " << MLd->getMemoryVT();
799
800 const char *AM = getIndexedModeName(MLd->getAddressingMode());
801 if (*AM)
802 OS << ", " << AM;
803
804 if (MLd->isExpandingLoad())
805 OS << ", expanding";
806
807 OS << ">";
808 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
809 OS << "<";
810 printMemOperand(OS, *MSt->getMemOperand(), G);
811
812 if (MSt->isTruncatingStore())
813 OS << ", trunc to " << MSt->getMemoryVT();
814
815 const char *AM = getIndexedModeName(MSt->getAddressingMode());
816 if (*AM)
817 OS << ", " << AM;
818
819 if (MSt->isCompressingStore())
820 OS << ", compressing";
821
822 OS << ">";
823 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
824 OS << "<";
825 printMemOperand(OS, *MGather->getMemOperand(), G);
826
827 bool doExt = true;
828 switch (MGather->getExtensionType()) {
829 default: doExt = false; break;
830 case ISD::EXTLOAD: OS << ", anyext"; break;
831 case ISD::SEXTLOAD: OS << ", sext"; break;
832 case ISD::ZEXTLOAD: OS << ", zext"; break;
833 }
834 if (doExt)
835 OS << " from " << MGather->getMemoryVT();
836
837 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
838 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
839 OS << ", " << Signed << " " << Scaled << " offset";
840
841 OS << ">";
842 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
843 OS << "<";
844 printMemOperand(OS, *MScatter->getMemOperand(), G);
845
846 if (MScatter->isTruncatingStore())
847 OS << ", trunc to " << MScatter->getMemoryVT();
848
849 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
850 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
851 OS << ", " << Signed << " " << Scaled << " offset";
852
853 OS << ">";
854 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
855 OS << "<";
856 printMemOperand(OS, *M->getMemOperand(), G);
857 if (auto *A = dyn_cast<AtomicSDNode>(M))
858 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
859 bool doExt = true;
860 switch (A->getExtensionType()) {
861 default: doExt = false; break;
862 case ISD::EXTLOAD: OS << ", anyext"; break;
863 case ISD::SEXTLOAD: OS << ", sext"; break;
864 case ISD::ZEXTLOAD: OS << ", zext"; break;
865 }
866 if (doExt)
867 OS << " from " << A->getMemoryVT();
868 }
869 OS << ">";
870 } else if (const BlockAddressSDNode *BA =
871 dyn_cast<BlockAddressSDNode>(this)) {
872 int64_t offset = BA->getOffset();
873 OS << "<";
874 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
875 OS << ", ";
876 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
877 OS << ">";
878 if (offset > 0)
879 OS << " + " << offset;
880 else
881 OS << " " << offset;
882 if (unsigned int TF = BA->getTargetFlags())
883 OS << " [TF=" << TF << ']';
884 } else if (const AddrSpaceCastSDNode *ASC =
885 dyn_cast<AddrSpaceCastSDNode>(this)) {
886 OS << '['
887 << ASC->getSrcAddressSpace()
888 << " -> "
889 << ASC->getDestAddressSpace()
890 << ']';
891 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
892 if (LN->hasOffset())
893 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
894 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
895 OS << '<' << AA->getAlign().value() << '>';
896 }
897
898 if (VerboseDAGDumping) {
899 if (unsigned Order = getIROrder())
900 OS << " [ORD=" << Order << ']';
901
902 if (getNodeId() != -1)
903 OS << " [ID=" << getNodeId() << ']';
904 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
905 OS << " # D:" << isDivergent();
906
907 if (G && !G->GetDbgValues(this).empty()) {
908 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
909 for (SDDbgValue *Dbg : G->GetDbgValues(this))
910 if (!Dbg->isInvalidated())
911 Dbg->print(OS);
912 } else if (getHasDebugValue())
913 OS << " [NoOfDbgValues>0]";
914
915 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
916 OS << " [pcsections ";
917 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
918 OS << ']';
919 }
920
921 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
922 OS << " [mmra ";
923 MMRA->printAsOperand(OS,
924 G->getMachineFunction().getFunction().getParent());
925 OS << ']';
926 }
927 }
928}
929
931 OS << " DbgVal(Order=" << getOrder() << ')';
932 if (isInvalidated())
933 OS << "(Invalidated)";
934 if (isEmitted())
935 OS << "(Emitted)";
936 OS << "(";
937 bool Comma = false;
938 for (const SDDbgOperand &Op : getLocationOps()) {
939 if (Comma)
940 OS << ", ";
941 switch (Op.getKind()) {
943 if (Op.getSDNode())
944 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
945 else
946 OS << "SDNODE";
947 break;
949 OS << "CONST";
950 break;
952 OS << "FRAMEIX=" << Op.getFrameIx();
953 break;
955 OS << "VREG=" << Op.getVReg();
956 break;
957 }
958 Comma = true;
959 }
960 OS << ")";
961 if (isIndirect()) OS << "(Indirect)";
962 if (isVariadic())
963 OS << "(Variadic)";
964 OS << ":\"" << Var->getName() << '"';
965#ifndef NDEBUG
966 if (Expr->getNumElements())
967 Expr->dump();
968#endif
969}
970
971#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
973 if (isInvalidated())
974 return;
975 print(dbgs());
976 dbgs() << "\n";
977}
978#endif
979
980/// Return true if this node is so simple that we should just print it inline
981/// if it appears as an operand.
982static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
983 // Avoid lots of cluttering when inline printing nodes with associated
984 // DbgValues in verbose mode.
985 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
986 return false;
987 if (Node.getOpcode() == ISD::EntryToken)
988 return false;
989 return Node.getNumOperands() == 0;
990}
991
992#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
993static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
994 for (const SDValue &Op : N->op_values()) {
995 if (shouldPrintInline(*Op.getNode(), G))
996 continue;
997 if (Op.getNode()->hasOneUse())
998 DumpNodes(Op.getNode(), indent+2, G);
999 }
1000
1001 dbgs().indent(indent);
1002 N->dump(G);
1003}
1004
1006 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1007
1008 for (const SDNode &N : allnodes()) {
1009 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1010 (!shouldPrintInline(N, this) || N.use_empty()))
1011 DumpNodes(&N, 2, this);
1012 }
1013
1014 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1015 dbgs() << "\n";
1016
1017 if (VerboseDAGDumping) {
1018 if (DbgBegin() != DbgEnd())
1019 dbgs() << "SDDbgValues:\n";
1020 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1021 Dbg->dump();
1023 dbgs() << "Byval SDDbgValues:\n";
1024 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1025 Dbg->dump();
1026 }
1027 dbgs() << "\n";
1028}
1029#endif
1030
1032 OS << PrintNodeId(*this) << ": ";
1033 print_types(OS, G);
1034 OS << " = " << getOperationName(G);
1035 print_details(OS, G);
1036}
1037
1039 const SDValue Value) {
1040 if (!Value.getNode()) {
1041 OS << "<null>";
1042 return false;
1043 }
1044
1045 if (shouldPrintInline(*Value.getNode(), G)) {
1046 OS << Value->getOperationName(G) << ':';
1047 Value->print_types(OS, G);
1048 Value->print_details(OS, G);
1049 return true;
1050 }
1051
1052 OS << PrintNodeId(*Value.getNode());
1053 if (unsigned RN = Value.getResNo())
1054 OS << ':' << RN;
1055 return false;
1056}
1057
1058#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1060
1061static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1062 const SelectionDAG *G, VisitedSDNodeSet &once) {
1063 if (!once.insert(N).second) // If we've been here before, return now.
1064 return;
1065
1066 // Dump the current SDNode, but don't end the line yet.
1067 OS.indent(indent);
1068 N->printr(OS, G);
1069
1070 // Having printed this SDNode, walk the children:
1071 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1072 if (i) OS << ",";
1073 OS << " ";
1074
1075 const SDValue Op = N->getOperand(i);
1076 bool printedInline = printOperand(OS, G, Op);
1077 if (printedInline)
1078 once.insert(Op.getNode());
1079 }
1080
1081 OS << "\n";
1082
1083 // Dump children that have grandchildren on their own line(s).
1084 for (const SDValue &Op : N->op_values())
1085 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1086}
1087
1089 VisitedSDNodeSet once;
1090 DumpNodesr(dbgs(), this, 0, nullptr, once);
1091}
1092
1094 VisitedSDNodeSet once;
1095 DumpNodesr(dbgs(), this, 0, G, once);
1096}
1097#endif
1098
1100 const SelectionDAG *G, unsigned depth,
1101 unsigned indent) {
1102 if (depth == 0)
1103 return;
1104
1105 OS.indent(indent);
1106
1107 N->print(OS, G);
1108
1109 for (const SDValue &Op : N->op_values()) {
1110 // Don't follow chain operands.
1111 if (Op.getValueType() == MVT::Other)
1112 continue;
1113 OS << '\n';
1114 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1115 }
1116}
1117
1119 unsigned depth) const {
1120 printrWithDepthHelper(OS, this, G, depth, 0);
1121}
1122
1124 // Don't print impossibly deep things.
1125 printrWithDepth(OS, G, 10);
1126}
1127
1128#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1130void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1131 printrWithDepth(dbgs(), G, depth);
1132}
1133
1135 // Don't print impossibly deep things.
1136 dumprWithDepth(G, 10);
1137}
1138#endif
1139
1141 printr(OS, G);
1142 // Under VerboseDAGDumping divergence will be printed always.
1144 OS << " # D:1";
1145 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1146 if (i) OS << ", "; else OS << " ";
1148 }
1149 if (DebugLoc DL = getDebugLoc()) {
1150 OS << ", ";
1151 DL.print(OS);
1152 }
1153}
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file declares a class to represent arbitrary precision floating point values and provide a varie...
This file implements a class to represent arbitrary precision integral constant values and operations...
@ Scaled
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition: Compiler.h:537
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static bool hasNoInfs(const TargetOptions &Options, SDValue N)
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
std::string Name
const HexagonInstrInfo * TII
static bool hasNoSignedWrap(BinaryOperator &I)
static bool hasNoUnsignedWrap(BinaryOperator &I)
#define G(x, y, z)
Definition: MD5.cpp:56
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
raw_pwrite_stream & OS
static Printable PrintNodeId(const SDNode &Node)
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
This file defines the SmallPtrSet class.
This file contains some functions that are useful when dealing with strings.
This file describes how to lower LLVM code to machine code.
unsigned getNumElements() const
StringRef getName() const
This class represents an Operation in the Expression.
A debug info location.
Definition: DebugLoc.h:33
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:655
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
This SDNode is used for LIFETIME_START/LIFETIME_END values, which indicate the offet and size that ar...
This class is used to represent ISD::LOAD nodes.
Metadata node.
Definition: Metadata.h:1067
void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
A description of a memory reference used in the backend.
void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
An SDNode that represents everything that will be needed to construct a MachineInstr.
This class is used to represent an MLOAD node.
This class is used to represent an MSTORE node.
This is an abstract virtual class for memory operations.
void dump() const
User-friendly dump.
Definition: AsmWriter.cpp:5298
Manage lifetime of a slot tracker for printing IR.
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:902
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
Simple wrapper around std::function<void(raw_ostream&)>.
Definition: Printable.h:38
Holds the information for a single machine location through SDISel; either an SDNode,...
@ VREG
Value is a virtual register.
@ FRAMEIX
Value is contents of a stack location.
@ SDNODE
Value is the result of an expression.
@ CONST
Value is a constant.
Holds the information from a dbg_value node through SDISel.
bool isEmitted() const
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
unsigned getOrder() const
Returns the SDNodeOrder.
LLVM_DUMP_METHOD void dump() const
bool isInvalidated() const
ArrayRef< SDDbgOperand > getLocationOps() const
bool isIndirect() const
Returns whether this is an indirect value.
bool isVariadic() const
Represents one node in the SelectionDAG.
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
int getNodeId() const
Return the unique node id.
void dump() const
Dump this node, for debugging.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
bool isDivergent() const
static const char * getIndexedModeName(ISD::MemIndexedMode AM)
unsigned getIROrder() const
Return the node ordering.
bool getHasDebugValue() const
void dumpr() const
Dump (recursively) this node and its use-def subgraph.
SDNodeFlags getFlags() const
std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
unsigned getNumOperands() const
Return the number of values used by this operation.
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
const SDValue & getOperand(unsigned Num) const
void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
const DebugLoc & getDebugLoc() const
Return the source location info.
void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
void print_details(raw_ostream &OS, const SelectionDAG *G) const
void print_types(raw_ostream &OS, const SelectionDAG *G) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:227
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
Definition: SelectionDAG.h:565
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
SDDbgInfo::DbgIterator DbgEnd() const
SDDbgInfo::DbgIterator DbgBegin() const
iterator_range< allnodes_iterator > allnodes()
Definition: SelectionDAG.h:557
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:342
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:427
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
An SDNode that holds an arbitrary LLVM IR Value.
This class is used to represent ISD::STORE nodes.
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:223
Completely target-dependent object reference.
TargetInstrInfo - Interface to description of machine instruction set.
TargetIntrinsicInfo - Interface to description of machine instruction set.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
This class is used to represent EVT's, which are used to parameterize some operations.
LLVM Value Representation.
Definition: Value.h:74
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:309
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition: ISDOpcodes.h:758
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition: ISDOpcodes.h:237
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
Definition: ISDOpcodes.h:1141
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition: ISDOpcodes.h:1137
@ CTLZ_ZERO_UNDEF
Definition: ISDOpcodes.h:731
@ TargetConstantPool
Definition: ISDOpcodes.h:168
@ CONVERGENCECTRL_ANCHOR
Definition: ISDOpcodes.h:1405
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
Definition: ISDOpcodes.h:1186
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition: ISDOpcodes.h:478
@ ATOMIC_LOAD_FMAX
Definition: ISDOpcodes.h:1291
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition: ISDOpcodes.h:44
@ SET_FPENV
Sets the current floating-point environment.
Definition: ISDOpcodes.h:1013
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
Definition: ISDOpcodes.h:1354
@ VECREDUCE_SMIN
Definition: ISDOpcodes.h:1385
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition: ISDOpcodes.h:147
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition: ISDOpcodes.h:499
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition: ISDOpcodes.h:251
@ ATOMIC_LOAD_NAND
Definition: ISDOpcodes.h:1284
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition: ISDOpcodes.h:561
@ JUMP_TABLE_DEBUG_INFO
JUMP_TABLE_DEBUG_INFO - Jumptable debug info.
Definition: ISDOpcodes.h:1075
@ BSWAP
Byte Swap and Counting operators.
Definition: ISDOpcodes.h:722
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition: ISDOpcodes.h:368
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
Definition: ISDOpcodes.h:1170
@ TargetBlockAddress
Definition: ISDOpcodes.h:170
@ ConstantFP
Definition: ISDOpcodes.h:77
@ ATOMIC_LOAD_MAX
Definition: ISDOpcodes.h:1286
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
Definition: ISDOpcodes.h:1256
@ STRICT_FCEIL
Definition: ISDOpcodes.h:428
@ ATOMIC_LOAD_UMIN
Definition: ISDOpcodes.h:1287
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:270
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition: ISDOpcodes.h:124
@ RESET_FPENV
Set floating-point environment to default state.
Definition: ISDOpcodes.h:1017
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition: ISDOpcodes.h:489
@ FMAXNUM_IEEE
Definition: ISDOpcodes.h:994
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:240
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition: ISDOpcodes.h:1046
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:374
@ SET_FPMODE
Sets the current dynamic floating-point control modes.
Definition: ISDOpcodes.h:1036
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:791
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:485
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition: ISDOpcodes.h:199
@ RETURNADDR
Definition: ISDOpcodes.h:95
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition: ISDOpcodes.h:151
@ GlobalAddress
Definition: ISDOpcodes.h:78
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition: ISDOpcodes.h:1269
@ STRICT_FMINIMUM
Definition: ISDOpcodes.h:438
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition: ISDOpcodes.h:798
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition: ISDOpcodes.h:545
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition: ISDOpcodes.h:1370
@ FADD
Simple binary floating point operators.
Definition: ISDOpcodes.h:391
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
Definition: ISDOpcodes.h:1374
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition: ISDOpcodes.h:696
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
Definition: ISDOpcodes.h:1243
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition: ISDOpcodes.h:1248
@ RESET_FPMODE
Sets default dynamic floating-point control modes.
Definition: ISDOpcodes.h:1040
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition: ISDOpcodes.h:828
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition: ISDOpcodes.h:256
@ VECREDUCE_SMAX
Definition: ISDOpcodes.h:1384
@ STRICT_FSETCCS
Definition: ISDOpcodes.h:479
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition: ISDOpcodes.h:921
@ STRICT_FLOG2
Definition: ISDOpcodes.h:423
@ FPTRUNC_ROUND
Definition: ISDOpcodes.h:482
@ ATOMIC_LOAD_OR
Definition: ISDOpcodes.h:1282
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition: ISDOpcodes.h:911
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition: ISDOpcodes.h:230
@ ATOMIC_LOAD_XOR
Definition: ISDOpcodes.h:1283
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition: ISDOpcodes.h:1214
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
Definition: ISDOpcodes.h:948
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition: ISDOpcodes.h:381
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition: ISDOpcodes.h:412
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1425
@ ATOMIC_LOAD_FADD
Definition: ISDOpcodes.h:1289
@ GlobalTLSAddress
Definition: ISDOpcodes.h:79
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition: ISDOpcodes.h:1182
@ FrameIndex
Definition: ISDOpcodes.h:80
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition: ISDOpcodes.h:1117
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition: ISDOpcodes.h:135
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
Definition: ISDOpcodes.h:1123
@ SET_ROUNDING
Set rounding mode.
Definition: ISDOpcodes.h:893
@ CONVERGENCECTRL_GLUE
Definition: ISDOpcodes.h:1411
@ SIGN_EXTEND
Conversion operators.
Definition: ISDOpcodes.h:782
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition: ISDOpcodes.h:664
@ STRICT_UINT_TO_FP
Definition: ISDOpcodes.h:452
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition: ISDOpcodes.h:622
@ PREALLOCATED_SETUP
Definition: ISDOpcodes.h:1175
@ READSTEADYCOUNTER
READSTEADYCOUNTER - This corresponds to the readfixedcounter intrinsic.
Definition: ISDOpcodes.h:1203
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition: ISDOpcodes.h:101
@ TargetExternalSymbol
Definition: ISDOpcodes.h:169
@ CONVERGENCECTRL_ENTRY
Definition: ISDOpcodes.h:1406
@ BR
Control flow instructions. These all have token chains.
Definition: ISDOpcodes.h:1062
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
Definition: ISDOpcodes.h:1367
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition: ISDOpcodes.h:730
@ TargetJumpTable
Definition: ISDOpcodes.h:167
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition: ISDOpcodes.h:177
@ WRITE_REGISTER
Definition: ISDOpcodes.h:119
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
Definition: ISDOpcodes.h:1236
@ VECREDUCE_FMIN
Definition: ISDOpcodes.h:1371
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
Definition: ISDOpcodes.h:1003
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition: ISDOpcodes.h:766
@ STRICT_LROUND
Definition: ISDOpcodes.h:433
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition: ISDOpcodes.h:938
@ BR_CC
BR_CC - Conditional branch.
Definition: ISDOpcodes.h:1092
@ SSUBO
Same for subtraction.
Definition: ISDOpcodes.h:328
@ ATOMIC_LOAD_MIN
Definition: ISDOpcodes.h:1285
@ PREALLOCATED_ARG
Definition: ISDOpcodes.h:1178
@ BRIND
BRIND - Indirect branch.
Definition: ISDOpcodes.h:1067
@ BR_JT
BR_JT - Jumptable branch.
Definition: ISDOpcodes.h:1071
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition: ISDOpcodes.h:1328
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2) - Returns two vectors with all input and output vectors having the same...
Definition: ISDOpcodes.h:588
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition: ISDOpcodes.h:648
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition: ISDOpcodes.h:502
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition: ISDOpcodes.h:509
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition: ISDOpcodes.h:350
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition: ISDOpcodes.h:735
@ STRICT_FPOWI
Definition: ISDOpcodes.h:414
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition: ISDOpcodes.h:1252
@ UNDEF
UNDEF - An undefined node.
Definition: ISDOpcodes.h:212
@ VECREDUCE_UMAX
Definition: ISDOpcodes.h:1386
@ RegisterMask
Definition: ISDOpcodes.h:75
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition: ISDOpcodes.h:223
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition: ISDOpcodes.h:629
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition: ISDOpcodes.h:68
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
Definition: ISDOpcodes.h:1166
@ ATOMIC_LOAD_FMIN
Definition: ISDOpcodes.h:1292
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition: ISDOpcodes.h:209
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition: ISDOpcodes.h:324
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition: ISDOpcodes.h:164
@ STRICT_FTRUNC
Definition: ISDOpcodes.h:432
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
Definition: ISDOpcodes.h:1379
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition: ISDOpcodes.h:888
@ STRICT_FP_TO_FP16
Definition: ISDOpcodes.h:924
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition: ISDOpcodes.h:653
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:1132
@ GET_FPMODE
Reads the current dynamic floating-point control modes.
Definition: ISDOpcodes.h:1031
@ STRICT_FP16_TO_FP
Definition: ISDOpcodes.h:923
@ GET_FPENV
Gets the current floating-point environment.
Definition: ISDOpcodes.h:1008
@ SHL
Shift and rotation operations.
Definition: ISDOpcodes.h:713
@ ATOMIC_LOAD_CLR
Definition: ISDOpcodes.h:1281
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition: ISDOpcodes.h:602
@ ATOMIC_LOAD_AND
Definition: ISDOpcodes.h:1280
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition: ISDOpcodes.h:575
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
Definition: ISDOpcodes.h:993
@ STRICT_FMAXIMUM
Definition: ISDOpcodes.h:437
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition: ISDOpcodes.h:47
@ STRICT_FMAXNUM
Definition: ISDOpcodes.h:426
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition: ISDOpcodes.h:118
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition: ISDOpcodes.h:537
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition: ISDOpcodes.h:203
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition: ISDOpcodes.h:788
@ TargetConstantFP
Definition: ISDOpcodes.h:159
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition: ISDOpcodes.h:1226
@ FP_TO_UINT_SAT
Definition: ISDOpcodes.h:864
@ STRICT_FMINNUM
Definition: ISDOpcodes.h:427
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition: ISDOpcodes.h:750
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
Definition: ISDOpcodes.h:1344
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
Definition: ISDOpcodes.h:1263
@ ATOMIC_LOAD_UMAX
Definition: ISDOpcodes.h:1288
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition: ISDOpcodes.h:114
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
Definition: ISDOpcodes.h:980
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
Definition: ISDOpcodes.h:1230
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition: ISDOpcodes.h:360
@ SMULO
Same for multiplication.
Definition: ISDOpcodes.h:332
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
Definition: ISDOpcodes.h:1056
@ STRICT_LRINT
Definition: ISDOpcodes.h:435
@ TargetFrameIndex
Definition: ISDOpcodes.h:166
@ ConstantPool
Definition: ISDOpcodes.h:82
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition: ISDOpcodes.h:817
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition: ISDOpcodes.h:806
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition: ISDOpcodes.h:676
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition: ISDOpcodes.h:593
@ LIFETIME_START
This corresponds to the llvm.lifetime.
Definition: ISDOpcodes.h:1319
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:387
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:896
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition: ISDOpcodes.h:87
@ STRICT_FROUND
Definition: ISDOpcodes.h:430
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition: ISDOpcodes.h:744
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:304
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition: ISDOpcodes.h:451
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
Definition: ISDOpcodes.h:1206
@ STRICT_BF16_TO_FP
Definition: ISDOpcodes.h:932
@ VECREDUCE_UMIN
Definition: ISDOpcodes.h:1387
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition: ISDOpcodes.h:1189
@ STRICT_FFLOOR
Definition: ISDOpcodes.h:429
@ STRICT_FROUNDEVEN
Definition: ISDOpcodes.h:431
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
Definition: ISDOpcodes.h:1112
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition: ISDOpcodes.h:129
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
Definition: ISDOpcodes.h:930
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition: ISDOpcodes.h:94
@ ATOMIC_LOAD_UDEC_WRAP
Definition: ISDOpcodes.h:1294
@ ATOMIC_LOAD_ADD
Definition: ISDOpcodes.h:1278
@ STRICT_FP_TO_UINT
Definition: ISDOpcodes.h:445
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition: ISDOpcodes.h:467
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:444
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
Definition: ISDOpcodes.h:999
@ ATOMIC_LOAD_SUB
Definition: ISDOpcodes.h:1279
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:844
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition: ISDOpcodes.h:1197
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition: ISDOpcodes.h:158
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:472
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:688
@ TRAP
TRAP - Trapping instruction.
Definition: ISDOpcodes.h:1223
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition: ISDOpcodes.h:184
@ GET_FPENV_MEM
Gets the current floating-point environment.
Definition: ISDOpcodes.h:1022
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
Definition: ISDOpcodes.h:1339
@ STRICT_FP_TO_BF16
Definition: ISDOpcodes.h:933
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition: ISDOpcodes.h:684
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition: ISDOpcodes.h:261
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition: ISDOpcodes.h:659
@ VECREDUCE_FMUL
Definition: ISDOpcodes.h:1368
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:280
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition: ISDOpcodes.h:401
@ STRICT_FLOG10
Definition: ISDOpcodes.h:422
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition: ISDOpcodes.h:638
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition: ISDOpcodes.h:526
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition: ISDOpcodes.h:52
@ STRICT_LLRINT
Definition: ISDOpcodes.h:436
@ VECTOR_SPLICE
VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as VEC1/VEC2 from CONCAT_VECTOR...
Definition: ISDOpcodes.h:614
@ STRICT_FEXP2
Definition: ISDOpcodes.h:420
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
Definition: ISDOpcodes.h:1277
@ ExternalSymbol
Definition: ISDOpcodes.h:83
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
Definition: ISDOpcodes.h:953
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition: ISDOpcodes.h:877
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition: ISDOpcodes.h:106
@ STRICT_FLDEXP
Definition: ISDOpcodes.h:415
@ STRICT_LLROUND
Definition: ISDOpcodes.h:434
@ CONVERGENCECTRL_LOOP
Definition: ISDOpcodes.h:1407
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition: ISDOpcodes.h:839
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition: ISDOpcodes.h:915
@ EXPERIMENTAL_VECTOR_HISTOGRAM
Definition: ISDOpcodes.h:1416
@ INLINEASM
INLINEASM - Represents an inline asm block.
Definition: ISDOpcodes.h:1109
@ STRICT_FNEARBYINT
Definition: ISDOpcodes.h:425
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition: ISDOpcodes.h:863
@ VECREDUCE_FMINIMUM
Definition: ISDOpcodes.h:1375
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition: ISDOpcodes.h:141
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition: ISDOpcodes.h:794
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition: ISDOpcodes.h:1161
@ BRCOND
BRCOND - Conditional branch.
Definition: ISDOpcodes.h:1085
@ BlockAddress
Definition: ISDOpcodes.h:84
@ VECREDUCE_SEQ_FMUL
Definition: ISDOpcodes.h:1355
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition: ISDOpcodes.h:771
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:1128
@ GC_TRANSITION_END
Definition: ISDOpcodes.h:1329
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition: ISDOpcodes.h:61
@ ATOMIC_LOAD_UINC_WRAP
Definition: ISDOpcodes.h:1293
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition: ISDOpcodes.h:495
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition: ISDOpcodes.h:341
@ AssertZext
Definition: ISDOpcodes.h:62
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
Definition: ISDOpcodes.h:1155
@ STRICT_FRINT
Definition: ISDOpcodes.h:424
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2) - Returns two vectors with all input and output vectors having the sa...
Definition: ISDOpcodes.h:582
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
Definition: ISDOpcodes.h:1335
@ SET_FPENV_MEM
Sets the current floating point environment.
Definition: ISDOpcodes.h:1027
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition: ISDOpcodes.h:1220
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:314
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition: ISDOpcodes.h:192
@ TargetGlobalTLSAddress
Definition: ISDOpcodes.h:165
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition: ISDOpcodes.h:517
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition: ISDOpcodes.h:1497
StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition: Function.cpp:1027
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
#define N
static const fltSemantics & IEEEsingle() LLVM_READNONE
Definition: APFloat.cpp:271
static const fltSemantics & IEEEdouble() LLVM_READNONE
Definition: APFloat.cpp:272
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition: ValueTypes.cpp:161