LLVM 24.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
39#include "llvm/IR/Value.h"
43#include "llvm/Support/Debug.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58static cl::opt<bool>
59 PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden,
60 cl::desc("Print addresses of SDNodes when dumping"));
61
63 switch (Operation) {
64 default:
65 llvm_unreachable("Unknown setcc condition!");
66 case ISD::SETOEQ:
67 return "setoeq";
68 case ISD::SETOGT:
69 return "setogt";
70 case ISD::SETOGE:
71 return "setoge";
72 case ISD::SETOLT:
73 return "setolt";
74 case ISD::SETOLE:
75 return "setole";
76 case ISD::SETONE:
77 return "setone";
78
79 case ISD::SETO:
80 return "seto";
81 case ISD::SETUO:
82 return "setuo";
83 case ISD::SETUEQ:
84 return "setueq";
85 case ISD::SETUGT:
86 return "setugt";
87 case ISD::SETUGE:
88 return "setuge";
89 case ISD::SETULT:
90 return "setult";
91 case ISD::SETULE:
92 return "setule";
93 case ISD::SETUNE:
94 return "setune";
95
96 case ISD::SETEQ:
97 return "seteq";
98 case ISD::SETGT:
99 return "setgt";
100 case ISD::SETGE:
101 return "setge";
102 case ISD::SETLT:
103 return "setlt";
104 case ISD::SETLE:
105 return "setle";
106 case ISD::SETNE:
107 return "setne";
108
109 case ISD::SETTRUE:
110 return "settrue";
111 case ISD::SETTRUE2:
112 return "settrue2";
113 case ISD::SETFALSE:
114 return "setfalse";
115 case ISD::SETFALSE2:
116 return "setfalse2";
117 }
118}
119
120std::string SDNode::getOperationName(const SelectionDAG *G) const {
121 switch (getOpcode()) {
122 default:
124 return "<<Unknown DAG Node>>";
125 if (isMachineOpcode()) {
126 if (G)
127 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
128 if (getMachineOpcode() < TII->getNumOpcodes())
129 return std::string(TII->getName(getMachineOpcode()));
130 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
131 }
132 if (G) {
133 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
134 if (const char *Name = TSI.getTargetNodeName(getOpcode()))
135 return Name;
136 const TargetLowering &TLI = G->getTargetLoweringInfo();
137 const char *Name = TLI.getTargetNodeName(getOpcode());
138 if (Name) return Name;
139 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
140 }
141 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
142
143 // clang-format off
144#ifndef NDEBUG
145 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
146#endif
147 case ISD::PREFETCH: return "Prefetch";
148 case ISD::ARITH_FENCE: return "ArithFence";
149 case ISD::MEMBARRIER: return "MemBarrier";
150 case ISD::ATOMIC_FENCE: return "AtomicFence";
151 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
152 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
153 case ISD::ATOMIC_SWAP: return "AtomicSwap";
154 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
155 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
156 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
157 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
158 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
159 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
160 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
161 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
162 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
163 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
164 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
165 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
166 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
167 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
168 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
169 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
170 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
172 return "AtomicLoadUIncWrap";
174 return "AtomicLoadUDecWrap";
176 return "AtomicLoadUSubCond";
178 return "AtomicLoadUSubSat";
179 case ISD::ATOMIC_LOAD: return "AtomicLoad";
180 case ISD::ATOMIC_STORE: return "AtomicStore";
181 case ISD::PCMARKER: return "PCMarker";
182 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
183 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
184 case ISD::SRCVALUE: return "SrcValue";
185 case ISD::MDNODE_SDNODE: return "MDNode";
186 case ISD::EntryToken: return "EntryToken";
187 case ISD::TokenFactor: return "TokenFactor";
188 case ISD::AssertSext: return "AssertSext";
189 case ISD::AssertZext: return "AssertZext";
190 case ISD::AssertNoFPClass: return "AssertNoFPClass";
191 case ISD::AssertAlign: return "AssertAlign";
192
193 case ISD::BasicBlock: return "BasicBlock";
194 case ISD::VALUETYPE: return "ValueType";
195 case ISD::Register: return "Register";
196 case ISD::RegisterMask: return "RegisterMask";
197 case ISD::Constant:
198 if (cast<ConstantSDNode>(this)->isOpaque())
199 return "OpaqueConstant";
200 return "Constant";
201 case ISD::ConstantFP: return "ConstantFP";
202 case ISD::GlobalAddress: return "GlobalAddress";
203 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
204 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
205 case ISD::FrameIndex: return "FrameIndex";
206 case ISD::JumpTable: return "JumpTable";
208 return "JUMP_TABLE_DEBUG_INFO";
209 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
210 case ISD::RETURNADDR: return "RETURNADDR";
211 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
212 case ISD::FRAMEADDR: return "FRAMEADDR";
213 case ISD::SPONENTRY: return "SPONENTRY";
214 case ISD::STACKADDRESS: return "STACKADDRESS";
215 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
216 case ISD::READ_REGISTER: return "READ_REGISTER";
217 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
218 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
219 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
220 case ISD::EH_RETURN: return "EH_RETURN";
221 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
222 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
223 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
224 case ISD::ConstantPool: return "ConstantPool";
225 case ISD::TargetIndex: return "TargetIndex";
226 case ISD::ExternalSymbol: return "ExternalSymbol";
227 case ISD::BlockAddress: return "BlockAddress";
231 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
232 unsigned IID = getOperand(OpNo)->getAsZExtVal();
233 if (IID < Intrinsic::num_intrinsics)
235 if (!G)
236 return "Unknown intrinsic";
237 llvm_unreachable("Invalid intrinsic ID");
238 }
239
240 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
242 if (cast<ConstantSDNode>(this)->isOpaque())
243 return "OpaqueTargetConstant";
244 return "TargetConstant";
245
246 case ISD::TargetConstantFP: return "TargetConstantFP";
247 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
248 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
249 case ISD::TargetFrameIndex: return "TargetFrameIndex";
250 case ISD::TargetJumpTable: return "TargetJumpTable";
251 case ISD::TargetConstantPool: return "TargetConstantPool";
252 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
253 case ISD::MCSymbol: return "MCSymbol";
254 case ISD::TargetBlockAddress: return "TargetBlockAddress";
255
256 case ISD::CopyToReg: return "CopyToReg";
257 case ISD::CopyFromReg: return "CopyFromReg";
258 case ISD::UNDEF: return "undef";
259 case ISD::POISON: return "poison";
260 case ISD::VSCALE: return "vscale";
261 case ISD::MERGE_VALUES: return "merge_values";
262 case ISD::INLINEASM: return "inlineasm";
263 case ISD::INLINEASM_BR: return "inlineasm_br";
264 case ISD::EH_LABEL: return "eh_label";
265 case ISD::ANNOTATION_LABEL: return "annotation_label";
266 case ISD::HANDLENODE: return "handlenode";
267
268 // Unary operators
269 case ISD::FABS: return "fabs";
270 case ISD::FMINNUM: return "fminnum";
271 case ISD::STRICT_FMINNUM: return "strict_fminnum";
272 case ISD::FMAXNUM: return "fmaxnum";
273 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
274 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
275 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
276 case ISD::FMINIMUM: return "fminimum";
277 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
278 case ISD::FMAXIMUM: return "fmaximum";
279 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
280 case ISD::FMINIMUMNUM: return "fminimumnum";
281 case ISD::FMAXIMUMNUM: return "fmaximumnum";
282 case ISD::PSEUDO_FMIN: return "pseudo_fmin";
283 case ISD::PSEUDO_FMAX: return "pseudo_fmax";
284 case ISD::STRICT_PSEUDO_FMIN: return "strict_pseudo_fmin";
285 case ISD::STRICT_PSEUDO_FMAX: return "strict_pseudo_fmax";
286 case ISD::FNEG: return "fneg";
287 case ISD::FSQRT: return "fsqrt";
288 case ISD::STRICT_FSQRT: return "strict_fsqrt";
289 case ISD::FCBRT: return "fcbrt";
290 case ISD::FSIN: return "fsin";
291 case ISD::STRICT_FSIN: return "strict_fsin";
292 case ISD::FCOS: return "fcos";
293 case ISD::STRICT_FCOS: return "strict_fcos";
294 case ISD::FSINCOS: return "fsincos";
295 case ISD::FSINCOSPI: return "fsincospi";
296 case ISD::FMODF: return "fmodf";
297 case ISD::FTAN: return "ftan";
298 case ISD::STRICT_FTAN: return "strict_ftan";
299 case ISD::FASIN: return "fasin";
300 case ISD::STRICT_FASIN: return "strict_fasin";
301 case ISD::FACOS: return "facos";
302 case ISD::STRICT_FACOS: return "strict_facos";
303 case ISD::FATAN: return "fatan";
304 case ISD::STRICT_FATAN: return "strict_fatan";
305 case ISD::FATAN2: return "fatan2";
306 case ISD::STRICT_FATAN2: return "strict_fatan2";
307 case ISD::FSINH: return "fsinh";
308 case ISD::STRICT_FSINH: return "strict_fsinh";
309 case ISD::FCOSH: return "fcosh";
310 case ISD::STRICT_FCOSH: return "strict_fcosh";
311 case ISD::FTANH: return "ftanh";
312 case ISD::STRICT_FTANH: return "strict_ftanh";
313 case ISD::FTRUNC: return "ftrunc";
314 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
315 case ISD::FFLOOR: return "ffloor";
316 case ISD::STRICT_FFLOOR: return "strict_ffloor";
317 case ISD::FCEIL: return "fceil";
318 case ISD::STRICT_FCEIL: return "strict_fceil";
319 case ISD::FRINT: return "frint";
320 case ISD::STRICT_FRINT: return "strict_frint";
321 case ISD::FNEARBYINT: return "fnearbyint";
322 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
323 case ISD::FROUND: return "fround";
324 case ISD::STRICT_FROUND: return "strict_fround";
325 case ISD::FROUNDEVEN: return "froundeven";
326 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
327 case ISD::FEXP: return "fexp";
328 case ISD::STRICT_FEXP: return "strict_fexp";
329 case ISD::FEXP2: return "fexp2";
330 case ISD::STRICT_FEXP2: return "strict_fexp2";
331 case ISD::FEXP10: return "fexp10";
332 case ISD::FLOG: return "flog";
333 case ISD::STRICT_FLOG: return "strict_flog";
334 case ISD::FLOG2: return "flog2";
335 case ISD::STRICT_FLOG2: return "strict_flog2";
336 case ISD::FLOG10: return "flog10";
337 case ISD::STRICT_FLOG10: return "strict_flog10";
338
339 // Binary operators
340 case ISD::ADD: return "add";
341 case ISD::PTRADD: return "ptradd";
342 case ISD::SUB: return "sub";
343 case ISD::MUL: return "mul";
344 case ISD::MULHU: return "mulhu";
345 case ISD::MULHS: return "mulhs";
346 case ISD::AVGFLOORU: return "avgflooru";
347 case ISD::AVGFLOORS: return "avgfloors";
348 case ISD::AVGCEILU: return "avgceilu";
349 case ISD::AVGCEILS: return "avgceils";
350 case ISD::ABDS: return "abds";
351 case ISD::ABDU: return "abdu";
352 case ISD::SDIV: return "sdiv";
353 case ISD::UDIV: return "udiv";
354 case ISD::SREM: return "srem";
355 case ISD::UREM: return "urem";
356 case ISD::SMUL_LOHI: return "smul_lohi";
357 case ISD::UMUL_LOHI: return "umul_lohi";
358 case ISD::SDIVREM: return "sdivrem";
359 case ISD::UDIVREM: return "udivrem";
360 case ISD::AND: return "and";
361 case ISD::OR: return "or";
362 case ISD::XOR: return "xor";
363 case ISD::SHL: return "shl";
364 case ISD::SRA: return "sra";
365 case ISD::SRL: return "srl";
366 case ISD::ROTL: return "rotl";
367 case ISD::ROTR: return "rotr";
368 case ISD::FSHL: return "fshl";
369 case ISD::FSHR: return "fshr";
370 case ISD::CLMUL: return "clmul";
371 case ISD::CLMULR: return "clmulr";
372 case ISD::CLMULH: return "clmulh";
373 case ISD::PEXT: return "pext";
374 case ISD::PDEP: return "pdep";
375 case ISD::FADD: return "fadd";
376 case ISD::STRICT_FADD: return "strict_fadd";
377 case ISD::FSUB: return "fsub";
378 case ISD::STRICT_FSUB: return "strict_fsub";
379 case ISD::FMUL: return "fmul";
380 case ISD::STRICT_FMUL: return "strict_fmul";
381 case ISD::FDIV: return "fdiv";
382 case ISD::STRICT_FDIV: return "strict_fdiv";
383 case ISD::FMA: return "fma";
384 case ISD::STRICT_FMA: return "strict_fma";
385 case ISD::FMAD: return "fmad";
386 case ISD::FMULADD: return "fmuladd";
387 case ISD::FREM: return "frem";
388 case ISD::STRICT_FREM: return "strict_frem";
389 case ISD::FCOPYSIGN: return "fcopysign";
390 case ISD::FGETSIGN: return "fgetsign";
391 case ISD::FCANONICALIZE: return "fcanonicalize";
392 case ISD::IS_FPCLASS: return "is_fpclass";
393 case ISD::FPOW: return "fpow";
394 case ISD::STRICT_FPOW: return "strict_fpow";
395 case ISD::SMIN: return "smin";
396 case ISD::SMAX: return "smax";
397 case ISD::UMIN: return "umin";
398 case ISD::UMAX: return "umax";
399 case ISD::SCMP: return "scmp";
400 case ISD::UCMP: return "ucmp";
401
402 case ISD::FLDEXP: return "fldexp";
403 case ISD::STRICT_FLDEXP: return "strict_fldexp";
404 case ISD::FFREXP: return "ffrexp";
405 case ISD::FPOWI: return "fpowi";
406 case ISD::STRICT_FPOWI: return "strict_fpowi";
407 case ISD::SETCC: return "setcc";
408 case ISD::SETCCCARRY: return "setcccarry";
409 case ISD::STRICT_FSETCC: return "strict_fsetcc";
410 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
411 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
412 case ISD::SELECT: return "select";
413 case ISD::VSELECT: return "vselect";
414 case ISD::SELECT_CC: return "select_cc";
415 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
416 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
417 case ISD::CONCAT_VECTORS: return "concat_vectors";
418 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
419 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
420 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
421 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
422 case ISD::VECTOR_REPEAT: return "vector_repeat";
423 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
424 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
425 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
426 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
427 case ISD::SPLAT_VECTOR: return "splat_vector";
428 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
429 case ISD::VECTOR_REVERSE: return "vector_reverse";
430 case ISD::STEP_VECTOR: return "step_vector";
431 case ISD::CARRY_FALSE: return "carry_false";
432 case ISD::ADDC: return "addc";
433 case ISD::ADDE: return "adde";
434 case ISD::UADDO_CARRY: return "uaddo_carry";
435 case ISD::SADDO_CARRY: return "saddo_carry";
436 case ISD::SADDO: return "saddo";
437 case ISD::UADDO: return "uaddo";
438 case ISD::SSUBO: return "ssubo";
439 case ISD::USUBO: return "usubo";
440 case ISD::SMULO: return "smulo";
441 case ISD::UMULO: return "umulo";
442 case ISD::SUBC: return "subc";
443 case ISD::SUBE: return "sube";
444 case ISD::USUBO_CARRY: return "usubo_carry";
445 case ISD::SSUBO_CARRY: return "ssubo_carry";
446 case ISD::SHL_PARTS: return "shl_parts";
447 case ISD::SRA_PARTS: return "sra_parts";
448 case ISD::SRL_PARTS: return "srl_parts";
449
450 case ISD::SADDSAT: return "saddsat";
451 case ISD::UADDSAT: return "uaddsat";
452 case ISD::SSUBSAT: return "ssubsat";
453 case ISD::USUBSAT: return "usubsat";
454 case ISD::SSHLSAT: return "sshlsat";
455 case ISD::USHLSAT: return "ushlsat";
456
457 case ISD::SMULFIX: return "smulfix";
458 case ISD::SMULFIXSAT: return "smulfixsat";
459 case ISD::UMULFIX: return "umulfix";
460 case ISD::UMULFIXSAT: return "umulfixsat";
461
462 case ISD::SDIVFIX: return "sdivfix";
463 case ISD::SDIVFIXSAT: return "sdivfixsat";
464 case ISD::UDIVFIX: return "udivfix";
465 case ISD::UDIVFIXSAT: return "udivfixsat";
466
467 // Conversion operators.
468 case ISD::SIGN_EXTEND: return "sign_extend";
469 case ISD::ZERO_EXTEND: return "zero_extend";
470 case ISD::ANY_EXTEND: return "any_extend";
471 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
472 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
473 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
474 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
475 case ISD::TRUNCATE: return "truncate";
476 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
477 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
478 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
479 case ISD::FP_ROUND: return "fp_round";
480 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
481 case ISD::FP_EXTEND: return "fp_extend";
482 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
483
484 case ISD::SINT_TO_FP: return "sint_to_fp";
485 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
486 case ISD::UINT_TO_FP: return "uint_to_fp";
487 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
488 case ISD::FP_TO_SINT: return "fp_to_sint";
489 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
490 case ISD::FP_TO_UINT: return "fp_to_uint";
491 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
492 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
493 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
494 case ISD::BITCAST: return "bitcast";
495 case ISD::ADDRSPACECAST: return "addrspacecast";
496 case ISD::FP16_TO_FP: return "fp16_to_fp";
497 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
498 case ISD::FP_TO_FP16: return "fp_to_fp16";
499 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
500 case ISD::BF16_TO_FP: return "bf16_to_fp";
501 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
502 case ISD::FP_TO_BF16: return "fp_to_bf16";
503 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
504 case ISD::CONVERT_FROM_ARBITRARY_FP: return "convert_from_arbitrary_fp";
505 case ISD::CONVERT_TO_ARBITRARY_FP: return "convert_to_arbitrary_fp";
506 case ISD::LROUND: return "lround";
507 case ISD::STRICT_LROUND: return "strict_lround";
508 case ISD::LLROUND: return "llround";
509 case ISD::STRICT_LLROUND: return "strict_llround";
510 case ISD::LRINT: return "lrint";
511 case ISD::STRICT_LRINT: return "strict_lrint";
512 case ISD::LLRINT: return "llrint";
513 case ISD::STRICT_LLRINT: return "strict_llrint";
514
515 // Control flow instructions
516 case ISD::BR: return "br";
517 case ISD::BRIND: return "brind";
518 case ISD::BR_JT: return "br_jt";
519 case ISD::BRCOND: return "brcond";
520 case ISD::BR_CC: return "br_cc";
521 case ISD::CALLSEQ_START: return "callseq_start";
522 case ISD::CALLSEQ_END: return "callseq_end";
523
524 // EH instructions
525 case ISD::CATCHRET: return "catchret";
526 case ISD::CLEANUPRET: return "cleanupret";
527
528 // Other operators
529 case ISD::LOAD: return "load";
530 case ISD::STORE: return "store";
531 case ISD::MLOAD: return "masked_load";
532 case ISD::MSTORE: return "masked_store";
533 case ISD::MGATHER: return "masked_gather";
534 case ISD::MSCATTER: return "masked_scatter";
535 case ISD::VECTOR_COMPRESS: return "vector_compress";
536 case ISD::VAARG: return "vaarg";
537 case ISD::VACOPY: return "vacopy";
538 case ISD::VAEND: return "vaend";
539 case ISD::VASTART: return "vastart";
540 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
541 case ISD::EXTRACT_ELEMENT: return "extract_element";
542 case ISD::BUILD_PAIR: return "build_pair";
543 case ISD::STACKSAVE: return "stacksave";
544 case ISD::STACKRESTORE: return "stackrestore";
545 case ISD::TRAP: return "trap";
546 case ISD::DEBUGTRAP: return "debugtrap";
547 case ISD::UBSANTRAP: return "ubsantrap";
548 case ISD::LIFETIME_START: return "lifetime.start";
549 case ISD::LIFETIME_END: return "lifetime.end";
550 case ISD::FAKE_USE:
551 return "fake_use";
552 case ISD::RELOC_NONE:
553 return "reloc_none";
554 case ISD::COND_LOOP:
555 return "cond_loop";
557 return "pseudoprobe";
558 case ISD::GC_TRANSITION_START: return "gc_transition.start";
559 case ISD::GC_TRANSITION_END: return "gc_transition.end";
560 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
561 case ISD::FREEZE: return "freeze";
563 return "call_setup";
565 return "call_alloc";
566
567 // Floating point environment manipulation
568 case ISD::GET_ROUNDING: return "get_rounding";
569 case ISD::SET_ROUNDING: return "set_rounding";
570 case ISD::GET_FPENV: return "get_fpenv";
571 case ISD::SET_FPENV: return "set_fpenv";
572 case ISD::RESET_FPENV: return "reset_fpenv";
573 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
574 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
575 case ISD::GET_FPMODE: return "get_fpmode";
576 case ISD::SET_FPMODE: return "set_fpmode";
577 case ISD::RESET_FPMODE: return "reset_fpmode";
578
579 // Convergence control instructions
580 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
581 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
582 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
583 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
584
585 // Bit manipulation
586 case ISD::ABS: return "abs";
587 case ISD::ABS_MIN_POISON: return "abs_min_poison";
588 case ISD::BITREVERSE: return "bitreverse";
589 case ISD::BSWAP: return "bswap";
590 case ISD::CTPOP: return "ctpop";
591 case ISD::CTTZ: return "cttz";
592 case ISD::CTTZ_ZERO_POISON: return "cttz_zero_poison";
593 case ISD::CTLZ: return "ctlz";
594 case ISD::CTLZ_ZERO_POISON: return "ctlz_zero_poison";
595 case ISD::CTLS: return "ctls";
596 case ISD::PARITY: return "parity";
597
598 // Trampolines
599 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
600 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
601
602 // clang-format on
603
604 case ISD::CONDCODE:
606 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
607 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
608 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
609 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
610 case ISD::VECREDUCE_ADD: return "vecreduce_add";
611 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
612 case ISD::VECREDUCE_AND: return "vecreduce_and";
613 case ISD::VECREDUCE_OR: return "vecreduce_or";
614 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
615 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
616 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
617 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
618 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
619 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
620 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
621 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
623 return "vecreduce_fminimumnum";
625 return "vecreduce_fmaximumnum";
626 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
627 case ISD::STACKMAP:
628 return "stackmap";
629 case ISD::PATCHPOINT:
630 return "patchpoint";
631 case ISD::CLEAR_CACHE:
632 return "clear_cache";
633
635 return "histogram";
636
637 case ISD::CTTZ_ELTS:
638 return "cttz_elts";
640 return "cttz_elts_zero_poison";
641
643 return "find_last_active";
644
646 return "get_active_lane_mask";
647
649 return "vector_match";
650
652 return "partial_reduce_umla";
654 return "partial_reduce_smla";
656 return "partial_reduce_sumla";
658 return "partial_reduce_fmla";
660 return "loop_dep_war";
662 return "loop_dep_raw";
663 case ISD::MASKED_UDIV:
664 return "masked_udiv";
665 case ISD::MASKED_SDIV:
666 return "masked_sdiv";
667 case ISD::MASKED_UREM:
668 return "masked_urem";
669 case ISD::MASKED_SREM:
670 return "masked_srem";
671
672 // Vector Predication
673#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
674 case ISD::SDID: \
675 return #NAME;
676#include "llvm/IR/VPIntrinsics.def"
677 }
678}
679
681 switch (AM) {
682 default: return "";
683 case ISD::PRE_INC: return "<pre-inc>";
684 case ISD::PRE_DEC: return "<pre-dec>";
685 case ISD::POST_INC: return "<post-inc>";
686 case ISD::POST_DEC: return "<post-dec>";
687 }
688}
689
691 return Printable([&Node](raw_ostream &OS) {
692#ifndef NDEBUG
693 static const raw_ostream::Colors Color[] = {
697 };
698 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
699 OS << 't' << Node.PersistentId;
700 OS.resetColor();
701#else
702 OS << (const void*)&Node;
703#endif
704 });
705}
706
707// Print the MMO with more information from the SelectionDAG.
709 const MachineFunction *MF, const Module *M,
710 const MachineFrameInfo *MFI,
711 const TargetInstrInfo *TII, LLVMContext &Ctx) {
712 ModuleSlotTracker MST(M);
713 if (MF)
716 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
717}
718
720 const SelectionDAG *G) {
721 if (G) {
722 const MachineFunction *MF = &G->getMachineFunction();
723 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
724 &MF->getFrameInfo(),
725 G->getSubtarget().getInstrInfo(), *G->getContext());
726 }
727
728 LLVMContext Ctx;
729 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
730 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
731}
732
733#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
734LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
735
737 print(dbgs(), G);
738 dbgs() << '\n';
739}
740#endif
741
743 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
744 if (i) OS << ",";
745 if (getValueType(i) == MVT::Other)
746 OS << "ch";
747 else
748 OS << getValueType(i).getEVTString();
749 }
750}
751
754 OS << " nuw";
755
757 OS << " nsw";
758
759 if (getFlags().hasExact())
760 OS << " exact";
761
762 if (getFlags().hasDisjoint())
763 OS << " disjoint";
764
765 if (getFlags().hasSameSign())
766 OS << " samesign";
767
768 if (getFlags().hasInBounds())
769 OS << " inbounds";
770
771 if (getFlags().hasNonNeg())
772 OS << " nneg";
773
774 if (getFlags().hasNonNull())
775 OS << " nonnull";
776
777 if (getFlags().hasNoNaNs())
778 OS << " nnan";
779
780 if (getFlags().hasNoInfs())
781 OS << " ninf";
782
783 if (getFlags().hasNoSignedZeros())
784 OS << " nsz";
785
786 if (getFlags().hasAllowReciprocal())
787 OS << " arcp";
788
789 if (getFlags().hasAllowContract())
790 OS << " contract";
791
792 if (getFlags().hasApproximateFuncs())
793 OS << " afn";
794
795 if (getFlags().hasAllowReassociation())
796 OS << " reassoc";
797
798 if (getFlags().hasNoFPExcept())
799 OS << " nofpexcept";
800
801 if (getFlags().hasNoConvergent())
802 OS << " noconvergent";
803
804 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
805 if (!MN->memoperands_empty()) {
806 OS << "<";
807 OS << "Mem:";
808 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
809 e = MN->memoperands_end(); i != e; ++i) {
810 printMemOperand(OS, **i, G);
811 if (std::next(i) != e)
812 OS << " ";
813 }
814 OS << ">";
815 }
816 } else if (const ShuffleVectorSDNode *SVN =
818 OS << "<";
819 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
820 int Idx = SVN->getMaskElt(i);
821 if (i) OS << ",";
822 if (Idx < 0)
823 OS << "u";
824 else
825 OS << Idx;
826 }
827 OS << ">";
828 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
829 OS << '<' << CSDN->getAPIntValue() << '>';
830 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
831 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
832 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
833 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
834 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
835 else {
836 OS << "<APFloat(";
837 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
838 OS << ")>";
839 }
840 } else if (const GlobalAddressSDNode *GADN =
842 int64_t offset = GADN->getOffset();
843 OS << '<';
844 GADN->getGlobal()->printAsOperand(OS);
845 OS << '>';
846 if (offset > 0)
847 OS << " + " << offset;
848 else
849 OS << " " << offset;
850 if (unsigned int TF = GADN->getTargetFlags())
851 OS << " [TF=" << TF << ']';
852 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
853 OS << "<" << FIDN->getIndex() << ">";
854 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
855 OS << "<" << JTDN->getIndex() << ">";
856 if (unsigned int TF = JTDN->getTargetFlags())
857 OS << " [TF=" << TF << ']';
858 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
859 int offset = CP->getOffset();
860 if (CP->isMachineConstantPoolEntry())
861 OS << "<" << *CP->getMachineCPVal() << ">";
862 else
863 OS << "<" << *CP->getConstVal() << ">";
864 if (offset > 0)
865 OS << " + " << offset;
866 else
867 OS << " " << offset;
868 if (unsigned int TF = CP->getTargetFlags())
869 OS << " [TF=" << TF << ']';
870 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
871 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
872 if (unsigned TF = TI->getTargetFlags())
873 OS << " [TF=" << TF << ']';
874 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
875 OS << "<";
876 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
877 if (LBB)
878 OS << LBB->getName() << " ";
879 OS << (const void*)BBDN->getBasicBlock() << ">";
880 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
881 OS << ' ' << printReg(R->getReg(),
882 G ? G->getSubtarget().getRegisterInfo() : nullptr);
883 } else if (const ExternalSymbolSDNode *ES =
885 OS << "'" << ES->getSymbol() << "'";
886 if (unsigned int TF = ES->getTargetFlags())
887 OS << " [TF=" << TF << ']';
888 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
889 if (M->getValue())
890 OS << "<" << M->getValue() << ">";
891 else
892 OS << "<null>";
893 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
894 if (MD->getMD())
895 OS << "<" << MD->getMD() << ">";
896 else
897 OS << "<null>";
898 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
899 OS << ":" << N->getVT();
900 }
901 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
902 OS << "<";
903
904 printMemOperand(OS, *LD->getMemOperand(), G);
905
906 bool doExt = true;
907 switch (LD->getExtensionType()) {
908 default: doExt = false; break;
909 case ISD::EXTLOAD: OS << ", anyext"; break;
910 case ISD::SEXTLOAD: OS << ", sext"; break;
911 case ISD::ZEXTLOAD: OS << ", zext"; break;
912 }
913 if (doExt)
914 OS << " from " << LD->getMemoryVT();
915
916 const char *AM = getIndexedModeName(LD->getAddressingMode());
917 if (*AM)
918 OS << ", " << AM;
919
920 OS << ">";
921 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
922 OS << "<";
923 printMemOperand(OS, *ST->getMemOperand(), G);
924
925 if (ST->isTruncatingStore())
926 OS << ", trunc to " << ST->getMemoryVT();
927
928 const char *AM = getIndexedModeName(ST->getAddressingMode());
929 if (*AM)
930 OS << ", " << AM;
931
932 OS << ">";
933 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
934 OS << "<";
935
936 printMemOperand(OS, *MLd->getMemOperand(), G);
937
938 bool doExt = true;
939 switch (MLd->getExtensionType()) {
940 default: doExt = false; break;
941 case ISD::EXTLOAD: OS << ", anyext"; break;
942 case ISD::SEXTLOAD: OS << ", sext"; break;
943 case ISD::ZEXTLOAD: OS << ", zext"; break;
944 }
945 if (doExt)
946 OS << " from " << MLd->getMemoryVT();
947
948 const char *AM = getIndexedModeName(MLd->getAddressingMode());
949 if (*AM)
950 OS << ", " << AM;
951
952 if (MLd->isExpandingLoad())
953 OS << ", expanding";
954
955 OS << ">";
956 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
957 OS << "<";
958 printMemOperand(OS, *MSt->getMemOperand(), G);
959
960 if (MSt->isTruncatingStore())
961 OS << ", trunc to " << MSt->getMemoryVT();
962
963 const char *AM = getIndexedModeName(MSt->getAddressingMode());
964 if (*AM)
965 OS << ", " << AM;
966
967 if (MSt->isCompressingStore())
968 OS << ", compressing";
969
970 OS << ">";
971 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
972 OS << "<";
973 printMemOperand(OS, *MGather->getMemOperand(), G);
974
975 bool doExt = true;
976 switch (MGather->getExtensionType()) {
977 default: doExt = false; break;
978 case ISD::EXTLOAD: OS << ", anyext"; break;
979 case ISD::SEXTLOAD: OS << ", sext"; break;
980 case ISD::ZEXTLOAD: OS << ", zext"; break;
981 }
982 if (doExt)
983 OS << " from " << MGather->getMemoryVT();
984
985 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
986 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
987 OS << ", " << Signed << " " << Scaled << " offset";
988
989 OS << ">";
990 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
991 OS << "<";
992 printMemOperand(OS, *MScatter->getMemOperand(), G);
993
994 if (MScatter->isTruncatingStore())
995 OS << ", trunc to " << MScatter->getMemoryVT();
996
997 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
998 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
999 OS << ", " << Signed << " " << Scaled << " offset";
1000
1001 OS << ">";
1002 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
1003 OS << "<";
1004 interleaveComma(M->memoperands(), OS, [&](const MachineMemOperand *MMO) {
1005 printMemOperand(OS, *MMO, G);
1006 });
1007 if (auto *A = dyn_cast<AtomicSDNode>(M))
1008 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
1009 bool doExt = true;
1010 switch (A->getExtensionType()) {
1011 default: doExt = false; break;
1012 case ISD::EXTLOAD: OS << ", anyext"; break;
1013 case ISD::SEXTLOAD: OS << ", sext"; break;
1014 case ISD::ZEXTLOAD: OS << ", zext"; break;
1015 }
1016 if (doExt)
1017 OS << " from " << A->getMemoryVT();
1018 }
1019 OS << ">";
1020 } else if (const BlockAddressSDNode *BA =
1022 int64_t offset = BA->getOffset();
1023 OS << "<";
1024 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
1025 OS << ", ";
1026 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
1027 OS << ">";
1028 if (offset > 0)
1029 OS << " + " << offset;
1030 else
1031 OS << " " << offset;
1032 if (unsigned int TF = BA->getTargetFlags())
1033 OS << " [TF=" << TF << ']';
1034 } else if (const AddrSpaceCastSDNode *ASC =
1036 OS << '['
1037 << ASC->getSrcAddressSpace()
1038 << " -> "
1039 << ASC->getDestAddressSpace()
1040 << ']';
1041 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
1042 OS << '<' << AA->getAlign().value() << '>';
1043 }
1044
1045 if (VerboseDAGDumping) {
1046 if (unsigned Order = getIROrder())
1047 OS << " [ORD=" << Order << ']';
1048
1049 if (getNodeId() != -1)
1050 OS << " [ID=" << getNodeId() << ']';
1051 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
1052 OS << " # D:" << isDivergent();
1053
1054 if (G && !G->GetDbgValues(this).empty()) {
1055 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
1056 for (SDDbgValue *Dbg : G->GetDbgValues(this))
1057 if (!Dbg->isInvalidated())
1058 Dbg->print(OS);
1059 } else if (getHasDebugValue())
1060 OS << " [NoOfDbgValues>0]";
1061
1062 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
1063 OS << " [pcsections ";
1064 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
1065 OS << ']';
1066 }
1067
1068 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
1069 OS << " [mmra ";
1070 MMRA->printAsOperand(OS,
1071 G->getMachineFunction().getFunction().getParent());
1072 OS << ']';
1073 }
1074 }
1075}
1076
1078 OS << " DbgVal(Order=" << getOrder() << ')';
1079 if (isInvalidated())
1080 OS << "(Invalidated)";
1081 if (isEmitted())
1082 OS << "(Emitted)";
1083 OS << "(";
1084 bool Comma = false;
1085 for (const SDDbgOperand &Op : getLocationOps()) {
1086 if (Comma)
1087 OS << ", ";
1088 switch (Op.getKind()) {
1090 if (Op.getSDNode())
1091 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
1092 else
1093 OS << "SDNODE";
1094 break;
1096 OS << "CONST";
1097 break;
1099 OS << "FRAMEIX=" << Op.getFrameIx();
1100 break;
1101 case SDDbgOperand::VREG:
1102 OS << "VREG=" << printReg(Op.getVReg());
1103 break;
1105 OS << "GLOBALADDR=" << Op.getGlobal()->getName();
1106 break;
1107 }
1108 Comma = true;
1109 }
1110 OS << ")";
1111 if (isIndirect()) OS << "(Indirect)";
1112 if (isVariadic())
1113 OS << "(Variadic)";
1114 OS << ":\"" << Var->getName() << '"';
1115#ifndef NDEBUG
1116 if (Expr->getNumElements())
1117 Expr->dump();
1118#endif
1119}
1120
1121#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1123 if (isInvalidated())
1124 return;
1125 print(dbgs());
1126 dbgs() << "\n";
1127}
1128#endif
1129
1130/// Return true if this node is so simple that we should just print it inline
1131/// if it appears as an operand.
1132static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1133 // Avoid lots of cluttering when inline printing nodes with associated
1134 // DbgValues in verbose mode.
1135 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
1136 return false;
1137 if (Node.getOpcode() == ISD::EntryToken)
1138 return false;
1139 return Node.getNumOperands() == 0;
1140}
1141
1142#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1143static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1144 for (const SDValue &Op : N->op_values()) {
1145 if (shouldPrintInline(*Op.getNode(), G))
1146 continue;
1147 if (Op.getNode()->hasOneUse())
1148 DumpNodes(Op.getNode(), indent+2, G);
1149 }
1150
1151 dbgs().indent(indent);
1152 N->dump(G);
1153}
1154
1156
1157LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1158 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1159
1160 auto dumpEachNode = [this](const SDNode &N) {
1161 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1162 (!shouldPrintInline(N, this) || N.use_empty()))
1163 DumpNodes(&N, 2, this);
1164 };
1165
1166 if (Sorted) {
1167 SmallVector<const SDNode *> SortedNodes;
1168 SortedNodes.reserve(AllNodes.size());
1169 getTopologicallyOrderedNodes(SortedNodes);
1170 for (const SDNode *N : SortedNodes)
1171 dumpEachNode(*N);
1172 } else {
1173 for (const SDNode &N : allnodes())
1174 dumpEachNode(N);
1175 }
1176
1177 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1178 dbgs() << "\n";
1179
1180 if (VerboseDAGDumping) {
1181 if (DbgBegin() != DbgEnd())
1182 dbgs() << "SDDbgValues:\n";
1183 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1184 Dbg->dump();
1186 dbgs() << "Byval SDDbgValues:\n";
1187 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1188 Dbg->dump();
1189 }
1190 dbgs() << "\n";
1191}
1192#endif
1193
1194void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1195 OS << PrintNodeId(*this) << ": ";
1196 print_types(OS, G);
1197 OS << " = " << getOperationName(G);
1198 print_details(OS, G);
1199}
1200
1201static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1202 const SDValue Value) {
1203 if (!Value.getNode()) {
1204 OS << "<null>";
1205 return false;
1206 }
1207
1208 if (shouldPrintInline(*Value.getNode(), G)) {
1209 OS << Value->getOperationName(G) << ':';
1210 Value->print_types(OS, G);
1211 Value->print_details(OS, G);
1212 return true;
1213 }
1214
1215 OS << PrintNodeId(*Value.getNode());
1216 if (unsigned RN = Value.getResNo())
1217 OS << ':' << RN;
1218 return false;
1219}
1220
1221#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1223
1224static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1225 const SelectionDAG *G, VisitedSDNodeSet &once) {
1226 if (!once.insert(N).second) // If we've been here before, return now.
1227 return;
1228
1229 // Dump the current SDNode, but don't end the line yet.
1230 OS.indent(indent);
1231 N->printr(OS, G);
1232
1233 // Having printed this SDNode, walk the children:
1234 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1235 if (i) OS << ",";
1236 OS << " ";
1237
1238 const SDValue Op = N->getOperand(i);
1239 bool printedInline = printOperand(OS, G, Op);
1240 if (printedInline)
1241 once.insert(Op.getNode());
1242 }
1243
1244 OS << "\n";
1245
1246 // Dump children that have grandchildren on their own line(s).
1247 for (const SDValue &Op : N->op_values())
1248 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1249}
1250
1252 VisitedSDNodeSet once;
1253 DumpNodesr(dbgs(), this, 0, nullptr, once);
1254}
1255
1257 VisitedSDNodeSet once;
1258 DumpNodesr(dbgs(), this, 0, G, once);
1259}
1260#endif
1261
1263 const SelectionDAG *G, unsigned depth,
1264 unsigned indent) {
1265 if (depth == 0)
1266 return;
1267
1268 OS.indent(indent);
1269
1270 N->print(OS, G);
1271
1272 for (const SDValue &Op : N->op_values()) {
1273 // Don't follow chain operands.
1274 if (Op.getValueType() == MVT::Other)
1275 continue;
1276 // Don't print children that were fully rendered inline.
1277 if (shouldPrintInline(*Op.getNode(), G))
1278 continue;
1279 OS << '\n';
1280 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1281 }
1282}
1283
1285 unsigned depth) const {
1286 printrWithDepthHelper(OS, this, G, depth, 0);
1287}
1288
1290 // Don't print impossibly deep things.
1291 printrWithDepth(OS, G, 10);
1292}
1293
1294#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1296void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1297 printrWithDepth(dbgs(), G, depth);
1298}
1299
1301 // Don't print impossibly deep things.
1302 dumprWithDepth(G, 10);
1303}
1304#endif
1305
1306void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1307 printr(OS, G);
1308 // Under VerboseDAGDumping divergence will be printed always.
1310 OS << " # D:1";
1311 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1312 if (i) OS << ", "; else OS << " ";
1313 printOperand(OS, G, getOperand(i));
1314 }
1315 if (DebugLoc DL = getDebugLoc()) {
1316 OS << ", ";
1317 DL.print(OS);
1318 }
1319 if (PrintSDNodeAddrs)
1320 OS << " ; " << this;
1321}
This file declares a class to represent arbitrary precision floating point values and provide a varie...
This file implements a class to represent arbitrary precision integral constant values and operations...
@ Scaled
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition Compiler.h:683
This file contains the declarations for the subclasses of Constant, which represent the different fla...
const HexagonInstrInfo * TII
static bool hasNoSignedWrap(BinaryOperator &I)
static bool hasNoUnsignedWrap(BinaryOperator &I)
#define G(x, y, z)
Definition MD5.cpp:55
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
static Printable PrintNodeId(const SDNode &Node)
SmallPtrSet< const SDNode *, 32 > VisitedSDNodeSet
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
static cl::opt< bool > PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden, cl::desc("Print addresses of SDNodes when dumping"))
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
This file defines the SmallPtrSet class.
This file contains some functions that are useful when dealing with strings.
This file describes how to lower LLVM code to machine code.
static const fltSemantics & IEEEsingle()
Definition APFloat.h:304
static const fltSemantics & IEEEdouble()
Definition APFloat.h:305
A debug info location.
Definition DebugLoc.h:126
Module * getParent()
Get the module that this global value is contained inside of...
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
This class is used to represent ISD::LOAD nodes.
Metadata node.
Definition Metadata.h:1081
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
A description of a memory reference used in the backend.
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
An SDNode that represents everything that will be needed to construct a MachineInstr.
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
This class is used to represent an MLOAD node.
This class is used to represent an MSTORE node.
This is an abstract virtual class for memory operations.
Manage lifetime of a slot tracker for printing IR.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Definition Module.h:68
Simple wrapper around std::function<void(raw_ostream&)>.
Definition Printable.h:38
Holds the information for a single machine location through SDISel; either an SDNode,...
@ VREG
Value is a virtual register.
@ FRAMEIX
Value is contents of a stack location.
@ SDNODE
Value is the result of an expression.
@ CONST
Value is a constant.
@ GLOBALADDR
Value is the address of a global.
Holds the information from a dbg_value node through SDISel.
bool isEmitted() const
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
unsigned getOrder() const
Returns the SDNodeOrder.
LLVM_DUMP_METHOD void dump() const
bool isInvalidated() const
ArrayRef< SDDbgOperand > getLocationOps() const
bool isIndirect() const
Returns whether this is an indirect value.
bool isVariadic() const
Represents one node in the SelectionDAG.
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
LLVM_ABI void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
int getNodeId() const
Return the unique node id.
LLVM_ABI void dump() const
Dump this node, for debugging.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
bool isDivergent() const
static LLVM_ABI const char * getIndexedModeName(ISD::MemIndexedMode AM)
unsigned getIROrder() const
Return the node ordering.
bool getHasDebugValue() const
LLVM_ABI void dumpr() const
Dump (recursively) this node and its use-def subgraph.
SDNodeFlags getFlags() const
LLVM_ABI std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
LLVM_ABI void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
friend class SelectionDAG
LLVM_ABI void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
unsigned getNumOperands() const
Return the number of values used by this operation.
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
const SDValue & getOperand(unsigned Num) const
LLVM_ABI void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
const DebugLoc & getDebugLoc() const
Return the source location info.
LLVM_ABI void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
LLVM_ABI void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
LLVM_ABI void print_details(raw_ostream &OS, const SelectionDAG *G) const
LLVM_ABI void print_types(raw_ostream &OS, const SelectionDAG *G) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
virtual const char * getTargetNodeName(unsigned Opcode) const
Returns the name of the given target-specific opcode, suitable for debug printing.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
SDDbgInfo::DbgIterator DbgEnd() const
LLVM_ABI void dump() const
Dump the textual format of this DAG.
SDDbgInfo::DbgIterator DbgBegin() const
iterator_range< allnodes_iterator > allnodes()
LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
LLVM_ABI void getTopologicallyOrderedNodes(SmallVectorImpl< const SDNode * > &SortedNodes) const
Get all the nodes in their topological order without modifying any states.
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
void reserve(size_type N)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
An SDNode that holds an arbitrary LLVM IR Value.
This class is used to represent ISD::STORE nodes.
Represent a constant reference to a string, i.e.
Definition StringRef.h:56
std::string str() const
Get the contents as an std::string.
Definition StringRef.h:222
Completely target-dependent object reference.
TargetInstrInfo - Interface to description of machine instruction set.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
This class is used to represent EVT's, which are used to parameterize some operations.
LLVM Value Representation.
Definition Value.h:75
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
Definition Value.cpp:319
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
virtual raw_ostream & changeColor(enum Colors Color, bool Bold=false, bool BG=false)
Changes the foreground color of text that will be output from this point forward.
virtual raw_ostream & resetColor()
Resets the colors to terminal defaults.
static constexpr Colors BLACK
static constexpr Colors GREEN
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
static constexpr Colors BLUE
static constexpr Colors RED
static constexpr Colors MAGENTA
static constexpr Colors YELLOW
static constexpr Colors CYAN
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Abstract Attribute helper functions.
Definition Attributor.h:165
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:837
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:263
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
@ TargetConstantPool
Definition ISDOpcodes.h:191
@ CONVERGENCECTRL_ANCHOR
The llvm.experimental.convergence.* intrinsics.
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:516
@ PTRADD
PTRADD represents pointer arithmetic semantics, for targets that opt in using shouldPreservePtrArith(...
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:47
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:238
@ SET_FPENV
Sets the current floating-point environment.
@ PARTIAL_REDUCE_SMLA
PARTIAL_REDUCE_[U|S]MLA(Accumulator, Input1, Input2) The partial reduction nodes sign or zero extend ...
@ LOOP_DEPENDENCE_RAW_MASK
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
@ COND_LOOP
COND_LOOP is a conditional branch to self, used for implementing efficient conditional traps.
@ MLOAD
Masked load and store - consecutive vector load and store operations with additional mask operand tha...
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:170
@ VECREDUCE_FMINIMUMNUM
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:543
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:277
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:605
@ STACKADDRESS
STACKADDRESS - Represents the llvm.stackaddress intrinsic.
Definition ISDOpcodes.h:129
@ JUMP_TABLE_DEBUG_INFO
JUMP_TABLE_DEBUG_INFO - Jumptable debug info.
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:797
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:397
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
@ TargetBlockAddress
Definition ISDOpcodes.h:193
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, val, ptr) This corresponds to "store atomic" instruction.
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:296
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:147
@ RESET_FPENV
Set floating-point environment to default state.
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:527
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:266
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:403
@ SET_FPMODE
Sets the current dynamic floating-point control modes.
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:871
@ CTTZ_ELTS
Returns the number of number of trailing (least significant) zero elements in a vector.
@ ATOMIC_LOAD_USUB_COND
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:523
@ VECTOR_FIND_LAST_ACTIVE
Finds the index of the last active mask element Operands: Mask.
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ PSEUDO_FMIN
PSEUDO_FMIN is strictly equivalent to op0 olt op1 ?
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:222
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:174
@ GlobalAddress
Definition ISDOpcodes.h:90
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:476
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:898
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:589
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:420
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:757
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
@ RESET_FPMODE
Sets default dynamic floating-point control modes.
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:928
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:282
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
@ FMULADD
FMULADD - Performs a * b + c, with, or without, intermediate rounding.
Definition ISDOpcodes.h:533
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:520
@ FAKE_USE
FAKE_USE represents a use of the operand but does not do anything.
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
@ STRICT_PSEUDO_FMAX
Definition ISDOpcodes.h:465
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:256
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:788
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:410
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:441
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
@ GlobalTLSAddress
Definition ISDOpcodes.h:91
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
@ CONVERT_FROM_ARBITRARY_FP
CONVERT_FROM_ARBITRARY_FP - This operator converts from an arbitrary floating-point represented as an...
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
@ ATOMIC_LOAD_USUB_SAT
@ CTLZ_ZERO_POISON
Definition ISDOpcodes.h:806
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:158
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
@ SET_ROUNDING
Set rounding mode.
Definition ISDOpcodes.h:993
@ CONVERGENCECTRL_GLUE
This does not correspond to any convergence control intrinsic.
@ PARTIAL_REDUCE_UMLA
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:862
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:725
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:490
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:675
@ PREALLOCATED_SETUP
PREALLOCATED_SETUP - This has 2 operands: an input chain and a SRCVALUE with the preallocated call Va...
@ READSTEADYCOUNTER
READSTEADYCOUNTER - This corresponds to the readfixedcounter intrinsic.
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:119
@ TargetExternalSymbol
Definition ISDOpcodes.h:192
@ CONVERGENCECTRL_ENTRY
@ BR
Control flow instructions. These all have token chains.
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
@ TargetJumpTable
Definition ISDOpcodes.h:190
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:200
@ PARTIAL_REDUCE_FMLA
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
@ STRICT_PSEUDO_FMIN
Definition ISDOpcodes.h:464
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:891
@ VECREDUCE_FMAXIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM nodes do not propagate NaNs and order signed zeroes using the llvm....
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:845
@ FNEG
Perform various unary floating-point operations inspired by libm.
@ BR_CC
BR_CC - Conditional branch.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:355
@ PREALLOCATED_ARG
PREALLOCATED_ARG - This has 3 operands: an input chain, a SRCVALUE with the preallocated call Value,...
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:640
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:701
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:546
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:553
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:377
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:814
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:235
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:249
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:682
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:71
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
@ GET_ACTIVE_LANE_MASK
GET_ACTIVE_LANE_MASK - this corrosponds to the llvm.get.active.lane.mask intrinsic.
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:83
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:232
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:351
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:187
@ ARITH_FENCE
ARITH_FENCE - This corresponds to a arithmetic fence intrinsic.
@ CTLS
Count leading redundant sign bits.
Definition ISDOpcodes.h:810
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:988
@ STRICT_FP_TO_FP16
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:714
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
@ ATOMIC_LOAD_FMAXIMUM
@ GET_FPMODE
Reads the current dynamic floating-point control modes.
@ STRICT_FP16_TO_FP
@ GET_FPENV
Gets the current floating-point environment.
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:779
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:80
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:659
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:102
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:619
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:475
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:50
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:141
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:581
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:226
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:868
@ TargetConstantFP
Definition ISDOpcodes.h:182
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:829
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:137
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:389
@ PATCHPOINT
The llvm.experimental.patchpoint.
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:359
@ ATOMIC_LOAD_FMINIMUM
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
@ TargetFrameIndex
Definition ISDOpcodes.h:189
@ VECTOR_SPLICE_LEFT
VECTOR_SPLICE_LEFT(VEC1, VEC2, OFFSET) - Shifts CONCAT_VECTORS(VEC1, VEC2) left by OFFSET elements an...
Definition ISDOpcodes.h:663
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:917
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:906
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:737
@ MASKED_UDIV
Masked vector arithmetic that returns poison on disabled lanes.
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:650
@ LIFETIME_START
This corresponds to the llvm.lifetime.
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:416
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:996
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:105
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:823
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:331
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:489
@ MGATHER
Masked gather and scatter - load and store operations for a vector of random addresses with additiona...
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
@ STRICT_BF16_TO_FP
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:469
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:152
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:112
@ ATOMIC_LOAD_UDEC_WRAP
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:483
@ PEXT
Parallel bit extract (compress) and parallel bit deposit (expand).
Definition ISDOpcodes.h:793
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:505
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:482
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:944
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:181
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:510
@ RELOC_NONE
Issue a no-op relocation against a given symbol at the current location.
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:749
@ TRAP
TRAP - Trapping instruction.
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:207
@ GET_FPENV_MEM
Gets the current floating-point environment.
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
@ STRICT_FP_TO_BF16
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:745
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:287
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:720
@ VECTOR_MATCH
VECTOR_MATCH - this corresponds to the llvm.experimental.vector.match intrinsic.
@ VECTOR_SPLICE_RIGHT
VECTOR_SPLICE_RIGHT(VEC1, VEC2, OFFSET) - Shifts CONCAT_VECTORS(VEC1,VEC2) right by OFFSET elements a...
Definition ISDOpcodes.h:667
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:306
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:430
@ STACKMAP
The llvm.experimental.stackmap intrinsic.
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:691
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:243
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:570
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:55
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
@ CTTZ_ZERO_POISON
Bit counting operators with a poisoned result for zero inputs.
Definition ISDOpcodes.h:805
@ ExternalSymbol
Definition ISDOpcodes.h:95
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:977
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:709
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:124
@ CLEAR_CACHE
llvm.clear_cache intrinsic Operands: Input Chain, Start Addres, End Address Outputs: Output Chain
@ CONVERGENCECTRL_LOOP
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:939
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
@ EXPERIMENTAL_VECTOR_HISTOGRAM
Experimental vector histogram intrinsic Operands: Input Chain, Inc, Mask, Base, Index,...
@ INLINEASM
INLINEASM - Represents an inline asm block.
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:461
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:963
@ VECREDUCE_FMINIMUM
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:164
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:874
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
@ BRCOND
BRCOND - Conditional branch.
@ VECREDUCE_SEQ_FMUL
@ CONVERT_TO_ARBITRARY_FP
CONVERT_TO_ARBITRARY_FP - Converts a native FP value to an arbitrary floating-point format,...
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:851
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
@ GC_TRANSITION_END
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:64
@ ATOMIC_LOAD_UINC_WRAP
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:539
@ PARTIAL_REDUCE_SUMLA
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:368
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
@ VECTOR_REPEAT
VECTOR_REPEAT(FIXED_LENGTH_VECTOR) Repeatedly copies the elements of the source fixed-length vector t...
Definition ISDOpcodes.h:645
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:629
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
@ CTTZ_ELTS_ZERO_POISON
@ SET_FPENV_MEM
Sets the current floating point environment.
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:889
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:732
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:893
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:341
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:215
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:188
@ ABS_MIN_POISON
ABS with a poison result for INT_MIN.
Definition ISDOpcodes.h:761
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:561
@ LOOP_DEPENDENCE_WAR_MASK
The llvm.loop.dependence.
LLVM_ABI StringRef getCondCodeName(CondCode Operation)
Return the name of the given condition code, e.g. "setoeq".
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
LLVM_ABI StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
This is an optimization pass for GlobalISel generic memory operations.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
void interleaveComma(const Container &c, StreamT &os, UnaryFunctor each_fn)
Definition STLExtras.h:2329
std::string utostr(uint64_t X, bool isNeg=false)
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:209
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
DWARFExpression::Operation Op
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
#define N
LLVM_ABI std::string getEVTString() const
This function returns value type as a string, e.g. "i32".