LLVM 19.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
30#include "llvm/Config/llvm-config.h"
31#include "llvm/IR/BasicBlock.h"
32#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugLoc.h"
35#include "llvm/IR/Function.h"
36#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/Value.h"
42#include "llvm/Support/Debug.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58std::string SDNode::getOperationName(const SelectionDAG *G) const {
59 switch (getOpcode()) {
60 default:
62 return "<<Unknown DAG Node>>";
63 if (isMachineOpcode()) {
64 if (G)
65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66 if (getMachineOpcode() < TII->getNumOpcodes())
67 return std::string(TII->getName(getMachineOpcode()));
68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69 }
70 if (G) {
71 const TargetLowering &TLI = G->getTargetLoweringInfo();
72 const char *Name = TLI.getTargetNodeName(getOpcode());
73 if (Name) return Name;
74 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
75 }
76 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
77
78#ifndef NDEBUG
79 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
80#endif
81 case ISD::PREFETCH: return "Prefetch";
82 case ISD::MEMBARRIER: return "MemBarrier";
83 case ISD::ATOMIC_FENCE: return "AtomicFence";
84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
86 case ISD::ATOMIC_SWAP: return "AtomicSwap";
87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
100 return "AtomicLoadUIncWrap";
102 return "AtomicLoadUDecWrap";
103 case ISD::ATOMIC_LOAD: return "AtomicLoad";
104 case ISD::ATOMIC_STORE: return "AtomicStore";
105 case ISD::PCMARKER: return "PCMarker";
106 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
107 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
108 case ISD::SRCVALUE: return "SrcValue";
109 case ISD::MDNODE_SDNODE: return "MDNode";
110 case ISD::EntryToken: return "EntryToken";
111 case ISD::TokenFactor: return "TokenFactor";
112 case ISD::AssertSext: return "AssertSext";
113 case ISD::AssertZext: return "AssertZext";
114 case ISD::AssertAlign: return "AssertAlign";
115
116 case ISD::BasicBlock: return "BasicBlock";
117 case ISD::VALUETYPE: return "ValueType";
118 case ISD::Register: return "Register";
119 case ISD::RegisterMask: return "RegisterMask";
120 case ISD::Constant:
121 if (cast<ConstantSDNode>(this)->isOpaque())
122 return "OpaqueConstant";
123 return "Constant";
124 case ISD::ConstantFP: return "ConstantFP";
125 case ISD::GlobalAddress: return "GlobalAddress";
126 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
127 case ISD::FrameIndex: return "FrameIndex";
128 case ISD::JumpTable: return "JumpTable";
130 return "JUMP_TABLE_DEBUG_INFO";
131 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
132 case ISD::RETURNADDR: return "RETURNADDR";
133 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
134 case ISD::FRAMEADDR: return "FRAMEADDR";
135 case ISD::SPONENTRY: return "SPONENTRY";
136 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
137 case ISD::READ_REGISTER: return "READ_REGISTER";
138 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
139 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
140 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
141 case ISD::EH_RETURN: return "EH_RETURN";
142 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
143 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
144 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
145 case ISD::ConstantPool: return "ConstantPool";
146 case ISD::TargetIndex: return "TargetIndex";
147 case ISD::ExternalSymbol: return "ExternalSymbol";
148 case ISD::BlockAddress: return "BlockAddress";
152 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
153 unsigned IID = getOperand(OpNo)->getAsZExtVal();
154 if (IID < Intrinsic::num_intrinsics)
156 if (!G)
157 return "Unknown intrinsic";
158 if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
159 return TII->getName(IID);
160 llvm_unreachable("Invalid intrinsic ID");
161 }
162
163 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
165 if (cast<ConstantSDNode>(this)->isOpaque())
166 return "OpaqueTargetConstant";
167 return "TargetConstant";
168 case ISD::TargetConstantFP: return "TargetConstantFP";
169 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
170 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
171 case ISD::TargetFrameIndex: return "TargetFrameIndex";
172 case ISD::TargetJumpTable: return "TargetJumpTable";
173 case ISD::TargetConstantPool: return "TargetConstantPool";
174 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
175 case ISD::MCSymbol: return "MCSymbol";
176 case ISD::TargetBlockAddress: return "TargetBlockAddress";
177
178 case ISD::CopyToReg: return "CopyToReg";
179 case ISD::CopyFromReg: return "CopyFromReg";
180 case ISD::UNDEF: return "undef";
181 case ISD::VSCALE: return "vscale";
182 case ISD::MERGE_VALUES: return "merge_values";
183 case ISD::INLINEASM: return "inlineasm";
184 case ISD::INLINEASM_BR: return "inlineasm_br";
185 case ISD::EH_LABEL: return "eh_label";
186 case ISD::ANNOTATION_LABEL: return "annotation_label";
187 case ISD::HANDLENODE: return "handlenode";
188
189 // Unary operators
190 case ISD::FABS: return "fabs";
191 case ISD::FMINNUM: return "fminnum";
192 case ISD::STRICT_FMINNUM: return "strict_fminnum";
193 case ISD::FMAXNUM: return "fmaxnum";
194 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
195 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
196 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
197 case ISD::FMINIMUM: return "fminimum";
198 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
199 case ISD::FMAXIMUM: return "fmaximum";
200 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
201 case ISD::FNEG: return "fneg";
202 case ISD::FSQRT: return "fsqrt";
203 case ISD::STRICT_FSQRT: return "strict_fsqrt";
204 case ISD::FCBRT: return "fcbrt";
205 case ISD::FSIN: return "fsin";
206 case ISD::STRICT_FSIN: return "strict_fsin";
207 case ISD::FCOS: return "fcos";
208 case ISD::STRICT_FCOS: return "strict_fcos";
209 case ISD::FSINCOS: return "fsincos";
210 case ISD::FTRUNC: return "ftrunc";
211 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
212 case ISD::FFLOOR: return "ffloor";
213 case ISD::STRICT_FFLOOR: return "strict_ffloor";
214 case ISD::FCEIL: return "fceil";
215 case ISD::STRICT_FCEIL: return "strict_fceil";
216 case ISD::FRINT: return "frint";
217 case ISD::STRICT_FRINT: return "strict_frint";
218 case ISD::FNEARBYINT: return "fnearbyint";
219 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
220 case ISD::FROUND: return "fround";
221 case ISD::STRICT_FROUND: return "strict_fround";
222 case ISD::FROUNDEVEN: return "froundeven";
223 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
224 case ISD::FEXP: return "fexp";
225 case ISD::STRICT_FEXP: return "strict_fexp";
226 case ISD::FEXP2: return "fexp2";
227 case ISD::STRICT_FEXP2: return "strict_fexp2";
228 case ISD::FEXP10: return "fexp10";
229 case ISD::FLOG: return "flog";
230 case ISD::STRICT_FLOG: return "strict_flog";
231 case ISD::FLOG2: return "flog2";
232 case ISD::STRICT_FLOG2: return "strict_flog2";
233 case ISD::FLOG10: return "flog10";
234 case ISD::STRICT_FLOG10: return "strict_flog10";
235
236 // Binary operators
237 case ISD::ADD: return "add";
238 case ISD::SUB: return "sub";
239 case ISD::MUL: return "mul";
240 case ISD::MULHU: return "mulhu";
241 case ISD::MULHS: return "mulhs";
242 case ISD::AVGFLOORU: return "avgflooru";
243 case ISD::AVGFLOORS: return "avgfloors";
244 case ISD::AVGCEILU: return "avgceilu";
245 case ISD::AVGCEILS: return "avgceils";
246 case ISD::ABDS: return "abds";
247 case ISD::ABDU: return "abdu";
248 case ISD::SDIV: return "sdiv";
249 case ISD::UDIV: return "udiv";
250 case ISD::SREM: return "srem";
251 case ISD::UREM: return "urem";
252 case ISD::SMUL_LOHI: return "smul_lohi";
253 case ISD::UMUL_LOHI: return "umul_lohi";
254 case ISD::SDIVREM: return "sdivrem";
255 case ISD::UDIVREM: return "udivrem";
256 case ISD::AND: return "and";
257 case ISD::OR: return "or";
258 case ISD::XOR: return "xor";
259 case ISD::SHL: return "shl";
260 case ISD::SRA: return "sra";
261 case ISD::SRL: return "srl";
262 case ISD::ROTL: return "rotl";
263 case ISD::ROTR: return "rotr";
264 case ISD::FSHL: return "fshl";
265 case ISD::FSHR: return "fshr";
266 case ISD::FADD: return "fadd";
267 case ISD::STRICT_FADD: return "strict_fadd";
268 case ISD::FSUB: return "fsub";
269 case ISD::STRICT_FSUB: return "strict_fsub";
270 case ISD::FMUL: return "fmul";
271 case ISD::STRICT_FMUL: return "strict_fmul";
272 case ISD::FDIV: return "fdiv";
273 case ISD::STRICT_FDIV: return "strict_fdiv";
274 case ISD::FMA: return "fma";
275 case ISD::STRICT_FMA: return "strict_fma";
276 case ISD::FMAD: return "fmad";
277 case ISD::FREM: return "frem";
278 case ISD::STRICT_FREM: return "strict_frem";
279 case ISD::FCOPYSIGN: return "fcopysign";
280 case ISD::FGETSIGN: return "fgetsign";
281 case ISD::FCANONICALIZE: return "fcanonicalize";
282 case ISD::IS_FPCLASS: return "is_fpclass";
283 case ISD::FPOW: return "fpow";
284 case ISD::STRICT_FPOW: return "strict_fpow";
285 case ISD::SMIN: return "smin";
286 case ISD::SMAX: return "smax";
287 case ISD::UMIN: return "umin";
288 case ISD::UMAX: return "umax";
289
290 case ISD::FLDEXP: return "fldexp";
291 case ISD::STRICT_FLDEXP: return "strict_fldexp";
292 case ISD::FFREXP: return "ffrexp";
293 case ISD::FPOWI: return "fpowi";
294 case ISD::STRICT_FPOWI: return "strict_fpowi";
295 case ISD::SETCC: return "setcc";
296 case ISD::SETCCCARRY: return "setcccarry";
297 case ISD::STRICT_FSETCC: return "strict_fsetcc";
298 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
299 case ISD::SELECT: return "select";
300 case ISD::VSELECT: return "vselect";
301 case ISD::SELECT_CC: return "select_cc";
302 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
303 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
304 case ISD::CONCAT_VECTORS: return "concat_vectors";
305 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
306 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
307 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
308 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
309 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
310 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
311 case ISD::VECTOR_SPLICE: return "vector_splice";
312 case ISD::SPLAT_VECTOR: return "splat_vector";
313 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
314 case ISD::VECTOR_REVERSE: return "vector_reverse";
315 case ISD::STEP_VECTOR: return "step_vector";
316 case ISD::CARRY_FALSE: return "carry_false";
317 case ISD::ADDC: return "addc";
318 case ISD::ADDE: return "adde";
319 case ISD::UADDO_CARRY: return "uaddo_carry";
320 case ISD::SADDO_CARRY: return "saddo_carry";
321 case ISD::SADDO: return "saddo";
322 case ISD::UADDO: return "uaddo";
323 case ISD::SSUBO: return "ssubo";
324 case ISD::USUBO: return "usubo";
325 case ISD::SMULO: return "smulo";
326 case ISD::UMULO: return "umulo";
327 case ISD::SUBC: return "subc";
328 case ISD::SUBE: return "sube";
329 case ISD::USUBO_CARRY: return "usubo_carry";
330 case ISD::SSUBO_CARRY: return "ssubo_carry";
331 case ISD::SHL_PARTS: return "shl_parts";
332 case ISD::SRA_PARTS: return "sra_parts";
333 case ISD::SRL_PARTS: return "srl_parts";
334
335 case ISD::SADDSAT: return "saddsat";
336 case ISD::UADDSAT: return "uaddsat";
337 case ISD::SSUBSAT: return "ssubsat";
338 case ISD::USUBSAT: return "usubsat";
339 case ISD::SSHLSAT: return "sshlsat";
340 case ISD::USHLSAT: return "ushlsat";
341
342 case ISD::SMULFIX: return "smulfix";
343 case ISD::SMULFIXSAT: return "smulfixsat";
344 case ISD::UMULFIX: return "umulfix";
345 case ISD::UMULFIXSAT: return "umulfixsat";
346
347 case ISD::SDIVFIX: return "sdivfix";
348 case ISD::SDIVFIXSAT: return "sdivfixsat";
349 case ISD::UDIVFIX: return "udivfix";
350 case ISD::UDIVFIXSAT: return "udivfixsat";
351
352 // Conversion operators.
353 case ISD::SIGN_EXTEND: return "sign_extend";
354 case ISD::ZERO_EXTEND: return "zero_extend";
355 case ISD::ANY_EXTEND: return "any_extend";
356 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
357 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
358 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
359 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
360 case ISD::TRUNCATE: return "truncate";
361 case ISD::FP_ROUND: return "fp_round";
362 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
363 case ISD::FP_EXTEND: return "fp_extend";
364 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
365
366 case ISD::SINT_TO_FP: return "sint_to_fp";
367 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
368 case ISD::UINT_TO_FP: return "uint_to_fp";
369 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
370 case ISD::FP_TO_SINT: return "fp_to_sint";
371 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
372 case ISD::FP_TO_UINT: return "fp_to_uint";
373 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
374 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
375 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
376 case ISD::BITCAST: return "bitcast";
377 case ISD::ADDRSPACECAST: return "addrspacecast";
378 case ISD::FP16_TO_FP: return "fp16_to_fp";
379 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
380 case ISD::FP_TO_FP16: return "fp_to_fp16";
381 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
382 case ISD::BF16_TO_FP: return "bf16_to_fp";
383 case ISD::FP_TO_BF16: return "fp_to_bf16";
384 case ISD::LROUND: return "lround";
385 case ISD::STRICT_LROUND: return "strict_lround";
386 case ISD::LLROUND: return "llround";
387 case ISD::STRICT_LLROUND: return "strict_llround";
388 case ISD::LRINT: return "lrint";
389 case ISD::STRICT_LRINT: return "strict_lrint";
390 case ISD::LLRINT: return "llrint";
391 case ISD::STRICT_LLRINT: return "strict_llrint";
392
393 // Control flow instructions
394 case ISD::BR: return "br";
395 case ISD::BRIND: return "brind";
396 case ISD::BR_JT: return "br_jt";
397 case ISD::BRCOND: return "brcond";
398 case ISD::BR_CC: return "br_cc";
399 case ISD::CALLSEQ_START: return "callseq_start";
400 case ISD::CALLSEQ_END: return "callseq_end";
401
402 // EH instructions
403 case ISD::CATCHRET: return "catchret";
404 case ISD::CLEANUPRET: return "cleanupret";
405
406 // Other operators
407 case ISD::LOAD: return "load";
408 case ISD::STORE: return "store";
409 case ISD::MLOAD: return "masked_load";
410 case ISD::MSTORE: return "masked_store";
411 case ISD::MGATHER: return "masked_gather";
412 case ISD::MSCATTER: return "masked_scatter";
413 case ISD::VAARG: return "vaarg";
414 case ISD::VACOPY: return "vacopy";
415 case ISD::VAEND: return "vaend";
416 case ISD::VASTART: return "vastart";
417 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
418 case ISD::EXTRACT_ELEMENT: return "extract_element";
419 case ISD::BUILD_PAIR: return "build_pair";
420 case ISD::STACKSAVE: return "stacksave";
421 case ISD::STACKRESTORE: return "stackrestore";
422 case ISD::TRAP: return "trap";
423 case ISD::DEBUGTRAP: return "debugtrap";
424 case ISD::UBSANTRAP: return "ubsantrap";
425 case ISD::LIFETIME_START: return "lifetime.start";
426 case ISD::LIFETIME_END: return "lifetime.end";
428 return "pseudoprobe";
429 case ISD::GC_TRANSITION_START: return "gc_transition.start";
430 case ISD::GC_TRANSITION_END: return "gc_transition.end";
431 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
432 case ISD::FREEZE: return "freeze";
434 return "call_setup";
436 return "call_alloc";
437
438 // Floating point environment manipulation
439 case ISD::GET_ROUNDING: return "get_rounding";
440 case ISD::SET_ROUNDING: return "set_rounding";
441 case ISD::GET_FPENV: return "get_fpenv";
442 case ISD::SET_FPENV: return "set_fpenv";
443 case ISD::RESET_FPENV: return "reset_fpenv";
444 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
445 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
446 case ISD::GET_FPMODE: return "get_fpmode";
447 case ISD::SET_FPMODE: return "set_fpmode";
448 case ISD::RESET_FPMODE: return "reset_fpmode";
449
450 // Bit manipulation
451 case ISD::ABS: return "abs";
452 case ISD::BITREVERSE: return "bitreverse";
453 case ISD::BSWAP: return "bswap";
454 case ISD::CTPOP: return "ctpop";
455 case ISD::CTTZ: return "cttz";
456 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
457 case ISD::CTLZ: return "ctlz";
458 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
459 case ISD::PARITY: return "parity";
460
461 // Trampolines
462 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
463 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
464
465 case ISD::CONDCODE:
466 switch (cast<CondCodeSDNode>(this)->get()) {
467 default: llvm_unreachable("Unknown setcc condition!");
468 case ISD::SETOEQ: return "setoeq";
469 case ISD::SETOGT: return "setogt";
470 case ISD::SETOGE: return "setoge";
471 case ISD::SETOLT: return "setolt";
472 case ISD::SETOLE: return "setole";
473 case ISD::SETONE: return "setone";
474
475 case ISD::SETO: return "seto";
476 case ISD::SETUO: return "setuo";
477 case ISD::SETUEQ: return "setueq";
478 case ISD::SETUGT: return "setugt";
479 case ISD::SETUGE: return "setuge";
480 case ISD::SETULT: return "setult";
481 case ISD::SETULE: return "setule";
482 case ISD::SETUNE: return "setune";
483
484 case ISD::SETEQ: return "seteq";
485 case ISD::SETGT: return "setgt";
486 case ISD::SETGE: return "setge";
487 case ISD::SETLT: return "setlt";
488 case ISD::SETLE: return "setle";
489 case ISD::SETNE: return "setne";
490
491 case ISD::SETTRUE: return "settrue";
492 case ISD::SETTRUE2: return "settrue2";
493 case ISD::SETFALSE: return "setfalse";
494 case ISD::SETFALSE2: return "setfalse2";
495 }
496 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
497 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
498 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
499 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
500 case ISD::VECREDUCE_ADD: return "vecreduce_add";
501 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
502 case ISD::VECREDUCE_AND: return "vecreduce_and";
503 case ISD::VECREDUCE_OR: return "vecreduce_or";
504 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
505 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
506 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
507 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
508 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
509 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
510 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
511 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
512 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
513 case ISD::STACKMAP:
514 return "stackmap";
515 case ISD::PATCHPOINT:
516 return "patchpoint";
517
518 // Vector Predication
519#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
520 case ISD::SDID: \
521 return #NAME;
522#include "llvm/IR/VPIntrinsics.def"
523 }
524}
525
527 switch (AM) {
528 default: return "";
529 case ISD::PRE_INC: return "<pre-inc>";
530 case ISD::PRE_DEC: return "<pre-dec>";
531 case ISD::POST_INC: return "<post-inc>";
532 case ISD::POST_DEC: return "<post-dec>";
533 }
534}
535
537 return Printable([&Node](raw_ostream &OS) {
538#ifndef NDEBUG
539 OS << 't' << Node.PersistentId;
540#else
541 OS << (const void*)&Node;
542#endif
543 });
544}
545
546// Print the MMO with more information from the SelectionDAG.
548 const MachineFunction *MF, const Module *M,
549 const MachineFrameInfo *MFI,
550 const TargetInstrInfo *TII, LLVMContext &Ctx) {
551 ModuleSlotTracker MST(M);
552 if (MF)
555 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
556}
557
559 const SelectionDAG *G) {
560 if (G) {
561 const MachineFunction *MF = &G->getMachineFunction();
562 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
563 &MF->getFrameInfo(),
564 G->getSubtarget().getInstrInfo(), *G->getContext());
565 }
566
567 LLVMContext Ctx;
568 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
569 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
570}
571
572#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
573LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
574
576 print(dbgs(), G);
577 dbgs() << '\n';
578}
579#endif
580
582 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
583 if (i) OS << ",";
584 if (getValueType(i) == MVT::Other)
585 OS << "ch";
586 else
588 }
589}
590
593 OS << " nuw";
594
596 OS << " nsw";
597
598 if (getFlags().hasExact())
599 OS << " exact";
600
601 if (getFlags().hasDisjoint())
602 OS << " disjoint";
603
604 if (getFlags().hasNonNeg())
605 OS << " nneg";
606
607 if (getFlags().hasNoNaNs())
608 OS << " nnan";
609
610 if (getFlags().hasNoInfs())
611 OS << " ninf";
612
613 if (getFlags().hasNoSignedZeros())
614 OS << " nsz";
615
616 if (getFlags().hasAllowReciprocal())
617 OS << " arcp";
618
619 if (getFlags().hasAllowContract())
620 OS << " contract";
621
622 if (getFlags().hasApproximateFuncs())
623 OS << " afn";
624
625 if (getFlags().hasAllowReassociation())
626 OS << " reassoc";
627
628 if (getFlags().hasNoFPExcept())
629 OS << " nofpexcept";
630
631 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
632 if (!MN->memoperands_empty()) {
633 OS << "<";
634 OS << "Mem:";
635 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
636 e = MN->memoperands_end(); i != e; ++i) {
637 printMemOperand(OS, **i, G);
638 if (std::next(i) != e)
639 OS << " ";
640 }
641 OS << ">";
642 }
643 } else if (const ShuffleVectorSDNode *SVN =
644 dyn_cast<ShuffleVectorSDNode>(this)) {
645 OS << "<";
646 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
647 int Idx = SVN->getMaskElt(i);
648 if (i) OS << ",";
649 if (Idx < 0)
650 OS << "u";
651 else
652 OS << Idx;
653 }
654 OS << ">";
655 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
656 OS << '<' << CSDN->getAPIntValue() << '>';
657 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
658 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
659 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
660 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
661 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
662 else {
663 OS << "<APFloat(";
664 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
665 OS << ")>";
666 }
667 } else if (const GlobalAddressSDNode *GADN =
668 dyn_cast<GlobalAddressSDNode>(this)) {
669 int64_t offset = GADN->getOffset();
670 OS << '<';
671 GADN->getGlobal()->printAsOperand(OS);
672 OS << '>';
673 if (offset > 0)
674 OS << " + " << offset;
675 else
676 OS << " " << offset;
677 if (unsigned int TF = GADN->getTargetFlags())
678 OS << " [TF=" << TF << ']';
679 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
680 OS << "<" << FIDN->getIndex() << ">";
681 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
682 OS << "<" << JTDN->getIndex() << ">";
683 if (unsigned int TF = JTDN->getTargetFlags())
684 OS << " [TF=" << TF << ']';
685 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
686 int offset = CP->getOffset();
687 if (CP->isMachineConstantPoolEntry())
688 OS << "<" << *CP->getMachineCPVal() << ">";
689 else
690 OS << "<" << *CP->getConstVal() << ">";
691 if (offset > 0)
692 OS << " + " << offset;
693 else
694 OS << " " << offset;
695 if (unsigned int TF = CP->getTargetFlags())
696 OS << " [TF=" << TF << ']';
697 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
698 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
699 if (unsigned TF = TI->getTargetFlags())
700 OS << " [TF=" << TF << ']';
701 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
702 OS << "<";
703 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
704 if (LBB)
705 OS << LBB->getName() << " ";
706 OS << (const void*)BBDN->getBasicBlock() << ">";
707 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
708 OS << ' ' << printReg(R->getReg(),
709 G ? G->getSubtarget().getRegisterInfo() : nullptr);
710 } else if (const ExternalSymbolSDNode *ES =
711 dyn_cast<ExternalSymbolSDNode>(this)) {
712 OS << "'" << ES->getSymbol() << "'";
713 if (unsigned int TF = ES->getTargetFlags())
714 OS << " [TF=" << TF << ']';
715 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
716 if (M->getValue())
717 OS << "<" << M->getValue() << ">";
718 else
719 OS << "<null>";
720 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
721 if (MD->getMD())
722 OS << "<" << MD->getMD() << ">";
723 else
724 OS << "<null>";
725 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
726 OS << ":" << N->getVT();
727 }
728 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
729 OS << "<";
730
731 printMemOperand(OS, *LD->getMemOperand(), G);
732
733 bool doExt = true;
734 switch (LD->getExtensionType()) {
735 default: doExt = false; break;
736 case ISD::EXTLOAD: OS << ", anyext"; break;
737 case ISD::SEXTLOAD: OS << ", sext"; break;
738 case ISD::ZEXTLOAD: OS << ", zext"; break;
739 }
740 if (doExt)
741 OS << " from " << LD->getMemoryVT();
742
743 const char *AM = getIndexedModeName(LD->getAddressingMode());
744 if (*AM)
745 OS << ", " << AM;
746
747 OS << ">";
748 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
749 OS << "<";
750 printMemOperand(OS, *ST->getMemOperand(), G);
751
752 if (ST->isTruncatingStore())
753 OS << ", trunc to " << ST->getMemoryVT();
754
755 const char *AM = getIndexedModeName(ST->getAddressingMode());
756 if (*AM)
757 OS << ", " << AM;
758
759 OS << ">";
760 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
761 OS << "<";
762
763 printMemOperand(OS, *MLd->getMemOperand(), G);
764
765 bool doExt = true;
766 switch (MLd->getExtensionType()) {
767 default: doExt = false; break;
768 case ISD::EXTLOAD: OS << ", anyext"; break;
769 case ISD::SEXTLOAD: OS << ", sext"; break;
770 case ISD::ZEXTLOAD: OS << ", zext"; break;
771 }
772 if (doExt)
773 OS << " from " << MLd->getMemoryVT();
774
775 const char *AM = getIndexedModeName(MLd->getAddressingMode());
776 if (*AM)
777 OS << ", " << AM;
778
779 if (MLd->isExpandingLoad())
780 OS << ", expanding";
781
782 OS << ">";
783 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
784 OS << "<";
785 printMemOperand(OS, *MSt->getMemOperand(), G);
786
787 if (MSt->isTruncatingStore())
788 OS << ", trunc to " << MSt->getMemoryVT();
789
790 const char *AM = getIndexedModeName(MSt->getAddressingMode());
791 if (*AM)
792 OS << ", " << AM;
793
794 if (MSt->isCompressingStore())
795 OS << ", compressing";
796
797 OS << ">";
798 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
799 OS << "<";
800 printMemOperand(OS, *MGather->getMemOperand(), G);
801
802 bool doExt = true;
803 switch (MGather->getExtensionType()) {
804 default: doExt = false; break;
805 case ISD::EXTLOAD: OS << ", anyext"; break;
806 case ISD::SEXTLOAD: OS << ", sext"; break;
807 case ISD::ZEXTLOAD: OS << ", zext"; break;
808 }
809 if (doExt)
810 OS << " from " << MGather->getMemoryVT();
811
812 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
813 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
814 OS << ", " << Signed << " " << Scaled << " offset";
815
816 OS << ">";
817 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
818 OS << "<";
819 printMemOperand(OS, *MScatter->getMemOperand(), G);
820
821 if (MScatter->isTruncatingStore())
822 OS << ", trunc to " << MScatter->getMemoryVT();
823
824 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
825 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
826 OS << ", " << Signed << " " << Scaled << " offset";
827
828 OS << ">";
829 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
830 OS << "<";
831 printMemOperand(OS, *M->getMemOperand(), G);
832 OS << ">";
833 } else if (const BlockAddressSDNode *BA =
834 dyn_cast<BlockAddressSDNode>(this)) {
835 int64_t offset = BA->getOffset();
836 OS << "<";
837 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
838 OS << ", ";
839 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
840 OS << ">";
841 if (offset > 0)
842 OS << " + " << offset;
843 else
844 OS << " " << offset;
845 if (unsigned int TF = BA->getTargetFlags())
846 OS << " [TF=" << TF << ']';
847 } else if (const AddrSpaceCastSDNode *ASC =
848 dyn_cast<AddrSpaceCastSDNode>(this)) {
849 OS << '['
850 << ASC->getSrcAddressSpace()
851 << " -> "
852 << ASC->getDestAddressSpace()
853 << ']';
854 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
855 if (LN->hasOffset())
856 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
857 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
858 OS << '<' << AA->getAlign().value() << '>';
859 }
860
861 if (VerboseDAGDumping) {
862 if (unsigned Order = getIROrder())
863 OS << " [ORD=" << Order << ']';
864
865 if (getNodeId() != -1)
866 OS << " [ID=" << getNodeId() << ']';
867 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
868 OS << " # D:" << isDivergent();
869
870 if (G && !G->GetDbgValues(this).empty()) {
871 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
872 for (SDDbgValue *Dbg : G->GetDbgValues(this))
873 if (!Dbg->isInvalidated())
874 Dbg->print(OS);
875 } else if (getHasDebugValue())
876 OS << " [NoOfDbgValues>0]";
877
878 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
879 OS << " [pcsections ";
880 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
881 OS << ']';
882 }
883 }
884}
885
887 OS << " DbgVal(Order=" << getOrder() << ')';
888 if (isInvalidated())
889 OS << "(Invalidated)";
890 if (isEmitted())
891 OS << "(Emitted)";
892 OS << "(";
893 bool Comma = false;
894 for (const SDDbgOperand &Op : getLocationOps()) {
895 if (Comma)
896 OS << ", ";
897 switch (Op.getKind()) {
899 if (Op.getSDNode())
900 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
901 else
902 OS << "SDNODE";
903 break;
905 OS << "CONST";
906 break;
908 OS << "FRAMEIX=" << Op.getFrameIx();
909 break;
911 OS << "VREG=" << Op.getVReg();
912 break;
913 }
914 Comma = true;
915 }
916 OS << ")";
917 if (isIndirect()) OS << "(Indirect)";
918 if (isVariadic())
919 OS << "(Variadic)";
920 OS << ":\"" << Var->getName() << '"';
921#ifndef NDEBUG
922 if (Expr->getNumElements())
923 Expr->dump();
924#endif
925}
926
927#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
929 if (isInvalidated())
930 return;
931 print(dbgs());
932 dbgs() << "\n";
933}
934#endif
935
936/// Return true if this node is so simple that we should just print it inline
937/// if it appears as an operand.
938static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
939 // Avoid lots of cluttering when inline printing nodes with associated
940 // DbgValues in verbose mode.
941 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
942 return false;
943 if (Node.getOpcode() == ISD::EntryToken)
944 return false;
945 return Node.getNumOperands() == 0;
946}
947
948#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
949static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
950 for (const SDValue &Op : N->op_values()) {
951 if (shouldPrintInline(*Op.getNode(), G))
952 continue;
953 if (Op.getNode()->hasOneUse())
954 DumpNodes(Op.getNode(), indent+2, G);
955 }
956
957 dbgs().indent(indent);
958 N->dump(G);
959}
960
962 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
963
964 for (const SDNode &N : allnodes()) {
965 if (!N.hasOneUse() && &N != getRoot().getNode() &&
966 (!shouldPrintInline(N, this) || N.use_empty()))
967 DumpNodes(&N, 2, this);
968 }
969
970 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
971 dbgs() << "\n";
972
973 if (VerboseDAGDumping) {
974 if (DbgBegin() != DbgEnd())
975 dbgs() << "SDDbgValues:\n";
976 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
977 Dbg->dump();
979 dbgs() << "Byval SDDbgValues:\n";
980 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
981 Dbg->dump();
982 }
983 dbgs() << "\n";
984}
985#endif
986
988 OS << PrintNodeId(*this) << ": ";
989 print_types(OS, G);
990 OS << " = " << getOperationName(G);
992}
993
995 const SDValue Value) {
996 if (!Value.getNode()) {
997 OS << "<null>";
998 return false;
999 }
1000
1001 if (shouldPrintInline(*Value.getNode(), G)) {
1002 OS << Value->getOperationName(G) << ':';
1003 Value->print_types(OS, G);
1004 Value->print_details(OS, G);
1005 return true;
1006 }
1007
1008 OS << PrintNodeId(*Value.getNode());
1009 if (unsigned RN = Value.getResNo())
1010 OS << ':' << RN;
1011 return false;
1012}
1013
1014#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1016
1017static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1018 const SelectionDAG *G, VisitedSDNodeSet &once) {
1019 if (!once.insert(N).second) // If we've been here before, return now.
1020 return;
1021
1022 // Dump the current SDNode, but don't end the line yet.
1023 OS.indent(indent);
1024 N->printr(OS, G);
1025
1026 // Having printed this SDNode, walk the children:
1027 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1028 if (i) OS << ",";
1029 OS << " ";
1030
1031 const SDValue Op = N->getOperand(i);
1032 bool printedInline = printOperand(OS, G, Op);
1033 if (printedInline)
1034 once.insert(Op.getNode());
1035 }
1036
1037 OS << "\n";
1038
1039 // Dump children that have grandchildren on their own line(s).
1040 for (const SDValue &Op : N->op_values())
1041 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1042}
1043
1045 VisitedSDNodeSet once;
1046 DumpNodesr(dbgs(), this, 0, nullptr, once);
1047}
1048
1050 VisitedSDNodeSet once;
1051 DumpNodesr(dbgs(), this, 0, G, once);
1052}
1053#endif
1054
1056 const SelectionDAG *G, unsigned depth,
1057 unsigned indent) {
1058 if (depth == 0)
1059 return;
1060
1061 OS.indent(indent);
1062
1063 N->print(OS, G);
1064
1065 for (const SDValue &Op : N->op_values()) {
1066 // Don't follow chain operands.
1067 if (Op.getValueType() == MVT::Other)
1068 continue;
1069 OS << '\n';
1070 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1071 }
1072}
1073
1075 unsigned depth) const {
1076 printrWithDepthHelper(OS, this, G, depth, 0);
1077}
1078
1080 // Don't print impossibly deep things.
1081 printrWithDepth(OS, G, 10);
1082}
1083
1084#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1086void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1087 printrWithDepth(dbgs(), G, depth);
1088}
1089
1091 // Don't print impossibly deep things.
1092 dumprWithDepth(G, 10);
1093}
1094#endif
1095
1097 printr(OS, G);
1098 // Under VerboseDAGDumping divergence will be printed always.
1100 OS << " # D:1";
1101 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1102 if (i) OS << ", "; else OS << " ";
1104 }
1105 if (DebugLoc DL = getDebugLoc()) {
1106 OS << ", ";
1107 DL.print(OS);
1108 }
1109}
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file declares a class to represent arbitrary precision floating point values and provide a varie...
This file implements a class to represent arbitrary precision integral constant values and operations...
@ Scaled
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition: Compiler.h:529
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static bool hasNoInfs(const TargetOptions &Options, SDValue N)
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
std::string Name
const HexagonInstrInfo * TII
static bool hasNoSignedWrap(BinaryOperator &I)
static bool hasNoUnsignedWrap(BinaryOperator &I)
#define G(x, y, z)
Definition: MD5.cpp:56
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
raw_pwrite_stream & OS
static Printable PrintNodeId(const SDNode &Node)
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
This file defines the SmallPtrSet class.
This file contains some functions that are useful when dealing with strings.
This file describes how to lower LLVM code to machine code.
unsigned getNumElements() const
StringRef getName() const
This class represents an Operation in the Expression.
A debug info location.
Definition: DebugLoc.h:33
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:655
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
This SDNode is used for LIFETIME_START/LIFETIME_END values, which indicate the offet and size that ar...
This class is used to represent ISD::LOAD nodes.
void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
A description of a memory reference used in the backend.
void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
An SDNode that represents everything that will be needed to construct a MachineInstr.
This class is used to represent an MLOAD node.
This class is used to represent an MSTORE node.
This is an abstract virtual class for memory operations.
void dump() const
User-friendly dump.
Definition: AsmWriter.cpp:5169
Manage lifetime of a slot tracker for printing IR.
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:896
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
Simple wrapper around std::function<void(raw_ostream&)>.
Definition: Printable.h:38
Holds the information for a single machine location through SDISel; either an SDNode,...
@ VREG
Value is a virtual register.
@ FRAMEIX
Value is contents of a stack location.
@ SDNODE
Value is the result of an expression.
@ CONST
Value is a constant.
Holds the information from a dbg_value node through SDISel.
bool isEmitted() const
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
unsigned getOrder() const
Returns the SDNodeOrder.
LLVM_DUMP_METHOD void dump() const
bool isInvalidated() const
ArrayRef< SDDbgOperand > getLocationOps() const
bool isIndirect() const
Returns whether this is an indirect value.
bool isVariadic() const
Represents one node in the SelectionDAG.
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
int getNodeId() const
Return the unique node id.
void dump() const
Dump this node, for debugging.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
bool isDivergent() const
static const char * getIndexedModeName(ISD::MemIndexedMode AM)
unsigned getIROrder() const
Return the node ordering.
bool getHasDebugValue() const
void dumpr() const
Dump (recursively) this node and its use-def subgraph.
SDNodeFlags getFlags() const
std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
unsigned getNumOperands() const
Return the number of values used by this operation.
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
const SDValue & getOperand(unsigned Num) const
void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
const DebugLoc & getDebugLoc() const
Return the source location info.
void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
void print_details(raw_ostream &OS, const SelectionDAG *G) const
void print_types(raw_ostream &OS, const SelectionDAG *G) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:225
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
Definition: SelectionDAG.h:551
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
SDDbgInfo::DbgIterator DbgEnd() const
SDDbgInfo::DbgIterator DbgBegin() const
iterator_range< allnodes_iterator > allnodes()
Definition: SelectionDAG.h:543
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:342
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:427
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
An SDNode that holds an arbitrary LLVM IR Value.
This class is used to represent ISD::STORE nodes.
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:222
Completely target-dependent object reference.
TargetInstrInfo - Interface to description of machine instruction set.
TargetIntrinsicInfo - Interface to description of machine instruction set.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
This class is used to represent EVT's, which are used to parameterize some operations.
LLVM Value Representation.
Definition: Value.h:74
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:309
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition: ISDOpcodes.h:750
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition: ISDOpcodes.h:236
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
Definition: ISDOpcodes.h:1124
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition: ISDOpcodes.h:1120
@ CTLZ_ZERO_UNDEF
Definition: ISDOpcodes.h:723
@ TargetConstantPool
Definition: ISDOpcodes.h:168
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
Definition: ISDOpcodes.h:1169
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition: ISDOpcodes.h:476
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition: ISDOpcodes.h:44
@ SET_FPENV
Sets the current floating-point environment.
Definition: ISDOpcodes.h:996
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
Definition: ISDOpcodes.h:1337
@ VECREDUCE_SMIN
Definition: ISDOpcodes.h:1368
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition: ISDOpcodes.h:147
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition: ISDOpcodes.h:497
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition: ISDOpcodes.h:250
@ ATOMIC_LOAD_NAND
Definition: ISDOpcodes.h:1267
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition: ISDOpcodes.h:559
@ JUMP_TABLE_DEBUG_INFO
JUMP_TABLE_DEBUG_INFO - Jumptable debug info.
Definition: ISDOpcodes.h:1058
@ BSWAP
Byte Swap and Counting operators.
Definition: ISDOpcodes.h:714
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition: ISDOpcodes.h:367
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
Definition: ISDOpcodes.h:1153
@ TargetBlockAddress
Definition: ISDOpcodes.h:170
@ ConstantFP
Definition: ISDOpcodes.h:77
@ ATOMIC_LOAD_MAX
Definition: ISDOpcodes.h:1269
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
Definition: ISDOpcodes.h:1239
@ STRICT_FCEIL
Definition: ISDOpcodes.h:426
@ ATOMIC_LOAD_UMIN
Definition: ISDOpcodes.h:1270
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:269
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition: ISDOpcodes.h:124
@ RESET_FPENV
Set floating-point environment to default state.
Definition: ISDOpcodes.h:1000
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition: ISDOpcodes.h:487
@ FMAXNUM_IEEE
Definition: ISDOpcodes.h:977
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:239
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition: ISDOpcodes.h:1029
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:373
@ SET_FPMODE
Sets the current dynamic floating-point control modes.
Definition: ISDOpcodes.h:1019
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:783
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:483
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition: ISDOpcodes.h:199
@ RETURNADDR
Definition: ISDOpcodes.h:95
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition: ISDOpcodes.h:151
@ GlobalAddress
Definition: ISDOpcodes.h:78
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition: ISDOpcodes.h:1252
@ STRICT_FMINIMUM
Definition: ISDOpcodes.h:436
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition: ISDOpcodes.h:790
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition: ISDOpcodes.h:543
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition: ISDOpcodes.h:1353
@ FADD
Simple binary floating point operators.
Definition: ISDOpcodes.h:390
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
Definition: ISDOpcodes.h:1357
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition: ISDOpcodes.h:688
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
Definition: ISDOpcodes.h:1226
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition: ISDOpcodes.h:1231
@ RESET_FPMODE
Sets default dynamic floating-point control modes.
Definition: ISDOpcodes.h:1023
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition: ISDOpcodes.h:820
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition: ISDOpcodes.h:255
@ VECREDUCE_SMAX
Definition: ISDOpcodes.h:1367
@ STRICT_FSETCCS
Definition: ISDOpcodes.h:477
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition: ISDOpcodes.h:913
@ STRICT_FLOG2
Definition: ISDOpcodes.h:421
@ ATOMIC_LOAD_OR
Definition: ISDOpcodes.h:1265
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition: ISDOpcodes.h:903
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition: ISDOpcodes.h:229
@ ATOMIC_LOAD_XOR
Definition: ISDOpcodes.h:1266
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition: ISDOpcodes.h:1197
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
Definition: ISDOpcodes.h:937
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition: ISDOpcodes.h:380
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition: ISDOpcodes.h:411
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1389
@ ATOMIC_LOAD_FADD
Definition: ISDOpcodes.h:1272
@ GlobalTLSAddress
Definition: ISDOpcodes.h:79
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition: ISDOpcodes.h:1165
@ FrameIndex
Definition: ISDOpcodes.h:80
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition: ISDOpcodes.h:1100
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition: ISDOpcodes.h:135
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
Definition: ISDOpcodes.h:1106
@ SET_ROUNDING
Set rounding mode.
Definition: ISDOpcodes.h:885
@ SIGN_EXTEND
Conversion operators.
Definition: ISDOpcodes.h:774
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition: ISDOpcodes.h:662
@ STRICT_UINT_TO_FP
Definition: ISDOpcodes.h:450
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition: ISDOpcodes.h:620
@ PREALLOCATED_SETUP
Definition: ISDOpcodes.h:1158
@ READSTEADYCOUNTER
READSTEADYCOUNTER - This corresponds to the readfixedcounter intrinsic.
Definition: ISDOpcodes.h:1186
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition: ISDOpcodes.h:101
@ TargetExternalSymbol
Definition: ISDOpcodes.h:169
@ BR
Control flow instructions. These all have token chains.
Definition: ISDOpcodes.h:1045
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
Definition: ISDOpcodes.h:1350
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition: ISDOpcodes.h:722
@ TargetJumpTable
Definition: ISDOpcodes.h:167
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition: ISDOpcodes.h:177
@ WRITE_REGISTER
Definition: ISDOpcodes.h:119
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
Definition: ISDOpcodes.h:1219
@ VECREDUCE_FMIN
Definition: ISDOpcodes.h:1354
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
Definition: ISDOpcodes.h:986
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition: ISDOpcodes.h:758
@ STRICT_LROUND
Definition: ISDOpcodes.h:431
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition: ISDOpcodes.h:928
@ BR_CC
BR_CC - Conditional branch.
Definition: ISDOpcodes.h:1075
@ SSUBO
Same for subtraction.
Definition: ISDOpcodes.h:327
@ ATOMIC_LOAD_MIN
Definition: ISDOpcodes.h:1268
@ PREALLOCATED_ARG
Definition: ISDOpcodes.h:1161
@ BRIND
BRIND - Indirect branch.
Definition: ISDOpcodes.h:1050
@ BR_JT
BR_JT - Jumptable branch.
Definition: ISDOpcodes.h:1054
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition: ISDOpcodes.h:1311
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2) - Returns two vectors with all input and output vectors having the same...
Definition: ISDOpcodes.h:586
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition: ISDOpcodes.h:646
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition: ISDOpcodes.h:500
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition: ISDOpcodes.h:507
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition: ISDOpcodes.h:349
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition: ISDOpcodes.h:727
@ STRICT_FPOWI
Definition: ISDOpcodes.h:413
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition: ISDOpcodes.h:1235
@ UNDEF
UNDEF - An undefined node.
Definition: ISDOpcodes.h:211
@ VECREDUCE_UMAX
Definition: ISDOpcodes.h:1369
@ RegisterMask
Definition: ISDOpcodes.h:75
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition: ISDOpcodes.h:222
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition: ISDOpcodes.h:627
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition: ISDOpcodes.h:68
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
Definition: ISDOpcodes.h:1149
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition: ISDOpcodes.h:208
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition: ISDOpcodes.h:323
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition: ISDOpcodes.h:164
@ STRICT_FTRUNC
Definition: ISDOpcodes.h:430
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
Definition: ISDOpcodes.h:1362
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition: ISDOpcodes.h:880
@ STRICT_FP_TO_FP16
Definition: ISDOpcodes.h:916
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition: ISDOpcodes.h:651
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:1115
@ GET_FPMODE
Reads the current dynamic floating-point control modes.
Definition: ISDOpcodes.h:1014
@ STRICT_FP16_TO_FP
Definition: ISDOpcodes.h:915
@ GET_FPENV
Gets the current floating-point environment.
Definition: ISDOpcodes.h:991
@ SHL
Shift and rotation operations.
Definition: ISDOpcodes.h:705
@ ATOMIC_LOAD_CLR
Definition: ISDOpcodes.h:1264
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition: ISDOpcodes.h:600
@ ATOMIC_LOAD_AND
Definition: ISDOpcodes.h:1263
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition: ISDOpcodes.h:573
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on two values,...
Definition: ISDOpcodes.h:976
@ STRICT_FMAXIMUM
Definition: ISDOpcodes.h:435
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition: ISDOpcodes.h:47
@ STRICT_FMAXNUM
Definition: ISDOpcodes.h:424
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition: ISDOpcodes.h:118
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition: ISDOpcodes.h:535
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition: ISDOpcodes.h:203
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition: ISDOpcodes.h:780
@ TargetConstantFP
Definition: ISDOpcodes.h:159
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition: ISDOpcodes.h:1209
@ FP_TO_UINT_SAT
Definition: ISDOpcodes.h:856
@ STRICT_FMINNUM
Definition: ISDOpcodes.h:425
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition: ISDOpcodes.h:742
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
Definition: ISDOpcodes.h:1327
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
Definition: ISDOpcodes.h:1246
@ ATOMIC_LOAD_UMAX
Definition: ISDOpcodes.h:1271
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition: ISDOpcodes.h:114
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
Definition: ISDOpcodes.h:969
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
Definition: ISDOpcodes.h:1213
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition: ISDOpcodes.h:359
@ SMULO
Same for multiplication.
Definition: ISDOpcodes.h:331
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
Definition: ISDOpcodes.h:1039
@ STRICT_LRINT
Definition: ISDOpcodes.h:433
@ TargetFrameIndex
Definition: ISDOpcodes.h:166
@ ConstantPool
Definition: ISDOpcodes.h:82
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition: ISDOpcodes.h:809
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition: ISDOpcodes.h:798
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition: ISDOpcodes.h:674
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition: ISDOpcodes.h:591
@ LIFETIME_START
This corresponds to the llvm.lifetime.
Definition: ISDOpcodes.h:1302
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:386
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:888
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition: ISDOpcodes.h:87
@ STRICT_FROUND
Definition: ISDOpcodes.h:428
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition: ISDOpcodes.h:736
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:303
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition: ISDOpcodes.h:449
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
Definition: ISDOpcodes.h:1189
@ VECREDUCE_UMIN
Definition: ISDOpcodes.h:1370
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition: ISDOpcodes.h:1172
@ STRICT_FFLOOR
Definition: ISDOpcodes.h:427
@ STRICT_FROUNDEVEN
Definition: ISDOpcodes.h:429
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
Definition: ISDOpcodes.h:1095
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition: ISDOpcodes.h:129
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
Definition: ISDOpcodes.h:922
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition: ISDOpcodes.h:94
@ ATOMIC_LOAD_UDEC_WRAP
Definition: ISDOpcodes.h:1277
@ ATOMIC_LOAD_ADD
Definition: ISDOpcodes.h:1261
@ STRICT_FP_TO_UINT
Definition: ISDOpcodes.h:443
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition: ISDOpcodes.h:465
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:442
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
Definition: ISDOpcodes.h:982
@ ATOMIC_LOAD_SUB
Definition: ISDOpcodes.h:1262
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:836
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition: ISDOpcodes.h:1180
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition: ISDOpcodes.h:158
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:470
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:680
@ TRAP
TRAP - Trapping instruction.
Definition: ISDOpcodes.h:1206
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition: ISDOpcodes.h:184
@ GET_FPENV_MEM
Gets the current floating-point environment.
Definition: ISDOpcodes.h:1005
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
Definition: ISDOpcodes.h:1322
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition: ISDOpcodes.h:260
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition: ISDOpcodes.h:657
@ VECREDUCE_FMUL
Definition: ISDOpcodes.h:1351
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:279
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition: ISDOpcodes.h:400
@ STRICT_FLOG10
Definition: ISDOpcodes.h:420
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition: ISDOpcodes.h:636
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition: ISDOpcodes.h:524
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition: ISDOpcodes.h:52
@ STRICT_LLRINT
Definition: ISDOpcodes.h:434
@ VECTOR_SPLICE
VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as VEC1/VEC2 from CONCAT_VECTOR...
Definition: ISDOpcodes.h:612
@ STRICT_FEXP2
Definition: ISDOpcodes.h:418
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
Definition: ISDOpcodes.h:1260
@ ExternalSymbol
Definition: ISDOpcodes.h:83
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
Definition: ISDOpcodes.h:942
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition: ISDOpcodes.h:869
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition: ISDOpcodes.h:106
@ STRICT_FLDEXP
Definition: ISDOpcodes.h:414
@ STRICT_LLROUND
Definition: ISDOpcodes.h:432
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition: ISDOpcodes.h:831
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition: ISDOpcodes.h:907
@ INLINEASM
INLINEASM - Represents an inline asm block.
Definition: ISDOpcodes.h:1092
@ STRICT_FNEARBYINT
Definition: ISDOpcodes.h:423
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition: ISDOpcodes.h:855
@ VECREDUCE_FMINIMUM
Definition: ISDOpcodes.h:1358
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition: ISDOpcodes.h:141
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition: ISDOpcodes.h:786
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition: ISDOpcodes.h:1144
@ BRCOND
BRCOND - Conditional branch.
Definition: ISDOpcodes.h:1068
@ BlockAddress
Definition: ISDOpcodes.h:84
@ VECREDUCE_SEQ_FMUL
Definition: ISDOpcodes.h:1338
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition: ISDOpcodes.h:763
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:1111
@ GC_TRANSITION_END
Definition: ISDOpcodes.h:1312
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition: ISDOpcodes.h:61
@ ATOMIC_LOAD_UINC_WRAP
Definition: ISDOpcodes.h:1276
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition: ISDOpcodes.h:493
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition: ISDOpcodes.h:340
@ AssertZext
Definition: ISDOpcodes.h:62
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
Definition: ISDOpcodes.h:1138
@ STRICT_FRINT
Definition: ISDOpcodes.h:422
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2) - Returns two vectors with all input and output vectors having the sa...
Definition: ISDOpcodes.h:580
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
Definition: ISDOpcodes.h:1318
@ SET_FPENV_MEM
Sets the current floating point environment.
Definition: ISDOpcodes.h:1010
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition: ISDOpcodes.h:1203
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:313
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition: ISDOpcodes.h:192
@ TargetGlobalTLSAddress
Definition: ISDOpcodes.h:165
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition: ISDOpcodes.h:515
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition: ISDOpcodes.h:1461
StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition: Function.cpp:1006
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
#define N
static const fltSemantics & IEEEsingle() LLVM_READNONE
Definition: APFloat.cpp:249
static const fltSemantics & IEEEdouble() LLVM_READNONE
Definition: APFloat.cpp:250
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition: ValueTypes.cpp:161