LLVM 24.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
39#include "llvm/IR/Value.h"
43#include "llvm/Support/Debug.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58static cl::opt<bool>
59 PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden,
60 cl::desc("Print addresses of SDNodes when dumping"));
61
63 switch (Operation) {
64 default:
65 llvm_unreachable("Unknown setcc condition!");
66 case ISD::SETOEQ:
67 return "setoeq";
68 case ISD::SETOGT:
69 return "setogt";
70 case ISD::SETOGE:
71 return "setoge";
72 case ISD::SETOLT:
73 return "setolt";
74 case ISD::SETOLE:
75 return "setole";
76 case ISD::SETONE:
77 return "setone";
78
79 case ISD::SETO:
80 return "seto";
81 case ISD::SETUO:
82 return "setuo";
83 case ISD::SETUEQ:
84 return "setueq";
85 case ISD::SETUGT:
86 return "setugt";
87 case ISD::SETUGE:
88 return "setuge";
89 case ISD::SETULT:
90 return "setult";
91 case ISD::SETULE:
92 return "setule";
93 case ISD::SETUNE:
94 return "setune";
95
96 case ISD::SETEQ:
97 return "seteq";
98 case ISD::SETGT:
99 return "setgt";
100 case ISD::SETGE:
101 return "setge";
102 case ISD::SETLT:
103 return "setlt";
104 case ISD::SETLE:
105 return "setle";
106 case ISD::SETNE:
107 return "setne";
108
109 case ISD::SETTRUE:
110 return "settrue";
111 case ISD::SETTRUE2:
112 return "settrue2";
113 case ISD::SETFALSE:
114 return "setfalse";
115 case ISD::SETFALSE2:
116 return "setfalse2";
117 }
118}
119
120std::string SDNode::getOperationName(const SelectionDAG *G) const {
121 switch (getOpcode()) {
122 default:
123 // If this assert fails, add/remove the newly added/removed opcode from the
124 // switch and update the expected value.
125 static_assert(ISD::BUILTIN_OP_END == 479, "Unexpected number of opcodes");
127 return "<<Unknown DAG Node>>";
128 if (isMachineOpcode()) {
129 if (G)
130 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
131 if (getMachineOpcode() < TII->getNumOpcodes())
132 return std::string(TII->getName(getMachineOpcode()));
133 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
134 }
135 if (G) {
136 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
137 if (const char *Name = TSI.getTargetNodeName(getOpcode()))
138 return Name;
139 const TargetLowering &TLI = G->getTargetLoweringInfo();
140 const char *Name = TLI.getTargetNodeName(getOpcode());
141 if (Name) return Name;
142 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
143 }
144 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
145
146 // clang-format off
147#ifndef NDEBUG
148 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
149#endif
150 case ISD::PREFETCH: return "Prefetch";
151 case ISD::ARITH_FENCE: return "ArithFence";
152 case ISD::MEMBARRIER: return "MemBarrier";
153 case ISD::ATOMIC_FENCE: return "AtomicFence";
154 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
155 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
156 case ISD::ATOMIC_SWAP: return "AtomicSwap";
157 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
158 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
159 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
160 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
161 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
162 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
163 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
164 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
165 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
166 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
167 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
168 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
169 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
170 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
171 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
172 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
173 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
174 case ISD::ATOMIC_LOAD_FMAXIMUMNUM: return "AtomicLoadFMaximumNum";
175 case ISD::ATOMIC_LOAD_FMINIMUMNUM: return "AtomicLoadFMinimumNum";
177 return "AtomicLoadUIncWrap";
179 return "AtomicLoadUDecWrap";
181 return "AtomicLoadUSubCond";
183 return "AtomicLoadUSubSat";
184 case ISD::ATOMIC_LOAD: return "AtomicLoad";
185 case ISD::ATOMIC_STORE: return "AtomicStore";
186 case ISD::PCMARKER: return "PCMarker";
187 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
188 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
189 case ISD::SRCVALUE: return "SrcValue";
190 case ISD::MDNODE_SDNODE: return "MDNode";
191 case ISD::EntryToken: return "EntryToken";
192 case ISD::TokenFactor: return "TokenFactor";
193 case ISD::AssertSext: return "AssertSext";
194 case ISD::AssertZext: return "AssertZext";
195 case ISD::AssertNoFPClass: return "AssertNoFPClass";
196 case ISD::AssertAlign: return "AssertAlign";
197
198 case ISD::BasicBlock: return "BasicBlock";
199 case ISD::VALUETYPE: return "ValueType";
200 case ISD::Register: return "Register";
201 case ISD::RegisterMask: return "RegisterMask";
202 case ISD::Constant:
203 if (cast<ConstantSDNode>(this)->isOpaque())
204 return "OpaqueConstant";
205 return "Constant";
206 case ISD::ConstantFP: return "ConstantFP";
207 case ISD::GlobalAddress: return "GlobalAddress";
208 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
209 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
210 case ISD::FrameIndex: return "FrameIndex";
211 case ISD::JumpTable: return "JumpTable";
213 return "JUMP_TABLE_DEBUG_INFO";
214 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
215 case ISD::RETURNADDR: return "RETURNADDR";
216 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
217 case ISD::FRAMEADDR: return "FRAMEADDR";
218 case ISD::SPONENTRY: return "SPONENTRY";
219 case ISD::STACKADDRESS: return "STACKADDRESS";
220 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
221 case ISD::READ_REGISTER: return "READ_REGISTER";
222 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
223 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
224 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
225 case ISD::EH_RETURN: return "EH_RETURN";
226 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
227 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
228 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
229 case ISD::ConstantPool: return "ConstantPool";
230 case ISD::TargetIndex: return "TargetIndex";
231 case ISD::ExternalSymbol: return "ExternalSymbol";
232 case ISD::BlockAddress: return "BlockAddress";
236 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
237 unsigned IID = getOperand(OpNo)->getAsZExtVal();
238 if (IID < Intrinsic::num_intrinsics)
240 if (!G)
241 return "Unknown intrinsic";
242 llvm_unreachable("Invalid intrinsic ID");
243 }
244
245 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
247 if (cast<ConstantSDNode>(this)->isOpaque())
248 return "OpaqueTargetConstant";
249 return "TargetConstant";
250
251 case ISD::TargetConstantFP: return "TargetConstantFP";
252 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
253 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
254 case ISD::TargetFrameIndex: return "TargetFrameIndex";
255 case ISD::TargetJumpTable: return "TargetJumpTable";
256 case ISD::TargetConstantPool: return "TargetConstantPool";
257 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
258 case ISD::MCSymbol: return "MCSymbol";
259 case ISD::TargetBlockAddress: return "TargetBlockAddress";
260
261 case ISD::CopyToReg: return "CopyToReg";
262 case ISD::CopyFromReg: return "CopyFromReg";
263 case ISD::UNDEF: return "undef";
264 case ISD::POISON: return "poison";
265 case ISD::VSCALE: return "vscale";
266 case ISD::MERGE_VALUES: return "merge_values";
267 case ISD::INLINEASM: return "inlineasm";
268 case ISD::INLINEASM_BR: return "inlineasm_br";
269 case ISD::EH_LABEL: return "eh_label";
270 case ISD::ANNOTATION_LABEL: return "annotation_label";
271 case ISD::HANDLENODE: return "handlenode";
272
273 // Unary operators
274 case ISD::FABS: return "fabs";
275 case ISD::FMINNUM: return "fminnum";
276 case ISD::STRICT_FMINNUM: return "strict_fminnum";
277 case ISD::FMAXNUM: return "fmaxnum";
278 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
279 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
280 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
281 case ISD::FMINIMUM: return "fminimum";
282 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
283 case ISD::FMAXIMUM: return "fmaximum";
284 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
285 case ISD::FMINIMUMNUM: return "fminimumnum";
286 case ISD::FMAXIMUMNUM: return "fmaximumnum";
287 case ISD::PSEUDO_FMIN: return "pseudo_fmin";
288 case ISD::PSEUDO_FMAX: return "pseudo_fmax";
289 case ISD::STRICT_PSEUDO_FMIN: return "strict_pseudo_fmin";
290 case ISD::STRICT_PSEUDO_FMAX: return "strict_pseudo_fmax";
291 case ISD::FNEG: return "fneg";
292 case ISD::FSQRT: return "fsqrt";
293 case ISD::STRICT_FSQRT: return "strict_fsqrt";
294 case ISD::FCBRT: return "fcbrt";
295 case ISD::FSIN: return "fsin";
296 case ISD::STRICT_FSIN: return "strict_fsin";
297 case ISD::FCOS: return "fcos";
298 case ISD::STRICT_FCOS: return "strict_fcos";
299 case ISD::FSINCOS: return "fsincos";
300 case ISD::FSINCOSPI: return "fsincospi";
301 case ISD::FMODF: return "fmodf";
302 case ISD::FTAN: return "ftan";
303 case ISD::STRICT_FTAN: return "strict_ftan";
304 case ISD::FASIN: return "fasin";
305 case ISD::STRICT_FASIN: return "strict_fasin";
306 case ISD::FACOS: return "facos";
307 case ISD::STRICT_FACOS: return "strict_facos";
308 case ISD::FATAN: return "fatan";
309 case ISD::STRICT_FATAN: return "strict_fatan";
310 case ISD::FATAN2: return "fatan2";
311 case ISD::STRICT_FATAN2: return "strict_fatan2";
312 case ISD::FSINH: return "fsinh";
313 case ISD::STRICT_FSINH: return "strict_fsinh";
314 case ISD::FCOSH: return "fcosh";
315 case ISD::STRICT_FCOSH: return "strict_fcosh";
316 case ISD::FTANH: return "ftanh";
317 case ISD::STRICT_FTANH: return "strict_ftanh";
318 case ISD::FTRUNC: return "ftrunc";
319 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
320 case ISD::FFLOOR: return "ffloor";
321 case ISD::STRICT_FFLOOR: return "strict_ffloor";
322 case ISD::FCEIL: return "fceil";
323 case ISD::STRICT_FCEIL: return "strict_fceil";
324 case ISD::FRINT: return "frint";
325 case ISD::STRICT_FRINT: return "strict_frint";
326 case ISD::FNEARBYINT: return "fnearbyint";
327 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
328 case ISD::FROUND: return "fround";
329 case ISD::STRICT_FROUND: return "strict_fround";
330 case ISD::FROUNDEVEN: return "froundeven";
331 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
332 case ISD::FEXP: return "fexp";
333 case ISD::STRICT_FEXP: return "strict_fexp";
334 case ISD::FEXP2: return "fexp2";
335 case ISD::STRICT_FEXP2: return "strict_fexp2";
336 case ISD::FEXP10: return "fexp10";
337 case ISD::FLOG: return "flog";
338 case ISD::STRICT_FLOG: return "strict_flog";
339 case ISD::FLOG2: return "flog2";
340 case ISD::STRICT_FLOG2: return "strict_flog2";
341 case ISD::FLOG10: return "flog10";
342 case ISD::STRICT_FLOG10: return "strict_flog10";
343
344 // Binary operators
345 case ISD::ADD: return "add";
346 case ISD::PTRADD: return "ptradd";
347 case ISD::SUB: return "sub";
348 case ISD::MUL: return "mul";
349 case ISD::MULHU: return "mulhu";
350 case ISD::MULHS: return "mulhs";
351 case ISD::AVGFLOORU: return "avgflooru";
352 case ISD::AVGFLOORS: return "avgfloors";
353 case ISD::AVGCEILU: return "avgceilu";
354 case ISD::AVGCEILS: return "avgceils";
355 case ISD::AVGSUBFLOORU: return "avgsubflooru";
356 case ISD::AVGSUBFLOORS: return "avgsubfloors";
357 case ISD::ABDS: return "abds";
358 case ISD::ABDU: return "abdu";
359 case ISD::SDIV: return "sdiv";
360 case ISD::UDIV: return "udiv";
361 case ISD::SREM: return "srem";
362 case ISD::UREM: return "urem";
363 case ISD::SMUL_LOHI: return "smul_lohi";
364 case ISD::UMUL_LOHI: return "umul_lohi";
365 case ISD::SDIVREM: return "sdivrem";
366 case ISD::UDIVREM: return "udivrem";
367 case ISD::AND: return "and";
368 case ISD::OR: return "or";
369 case ISD::XOR: return "xor";
370 case ISD::SHL: return "shl";
371 case ISD::SRA: return "sra";
372 case ISD::SRL: return "srl";
373 case ISD::ROTL: return "rotl";
374 case ISD::ROTR: return "rotr";
375 case ISD::FSHL: return "fshl";
376 case ISD::FSHR: return "fshr";
377 case ISD::CLMUL: return "clmul";
378 case ISD::CLMULR: return "clmulr";
379 case ISD::CLMULH: return "clmulh";
380 case ISD::PEXT: return "pext";
381 case ISD::PDEP: return "pdep";
382 case ISD::FADD: return "fadd";
383 case ISD::STRICT_FADD: return "strict_fadd";
384 case ISD::FSUB: return "fsub";
385 case ISD::STRICT_FSUB: return "strict_fsub";
386 case ISD::FMUL: return "fmul";
387 case ISD::STRICT_FMUL: return "strict_fmul";
388 case ISD::FDIV: return "fdiv";
389 case ISD::STRICT_FDIV: return "strict_fdiv";
390 case ISD::FMA: return "fma";
391 case ISD::STRICT_FMA: return "strict_fma";
392 case ISD::FMAD: return "fmad";
393 case ISD::FMULADD: return "fmuladd";
394 case ISD::FREM: return "frem";
395 case ISD::STRICT_FREM: return "strict_frem";
396 case ISD::FCOPYSIGN: return "fcopysign";
397 case ISD::FGETSIGN: return "fgetsign";
398 case ISD::FCANONICALIZE: return "fcanonicalize";
399 case ISD::IS_FPCLASS: return "is_fpclass";
400 case ISD::FPOW: return "fpow";
401 case ISD::STRICT_FPOW: return "strict_fpow";
402 case ISD::SMIN: return "smin";
403 case ISD::SMAX: return "smax";
404 case ISD::UMIN: return "umin";
405 case ISD::UMAX: return "umax";
406 case ISD::SCMP: return "scmp";
407 case ISD::UCMP: return "ucmp";
408
409 case ISD::FLDEXP: return "fldexp";
410 case ISD::STRICT_FLDEXP: return "strict_fldexp";
411 case ISD::FFREXP: return "ffrexp";
412 case ISD::FPOWI: return "fpowi";
413 case ISD::STRICT_FPOWI: return "strict_fpowi";
414 case ISD::SETCC: return "setcc";
415 case ISD::SETCCCARRY: return "setcccarry";
416 case ISD::STRICT_FSETCC: return "strict_fsetcc";
417 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
418 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
419 case ISD::SELECT: return "select";
420 case ISD::VSELECT: return "vselect";
421 case ISD::SELECT_CC: return "select_cc";
422 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
423 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
424 case ISD::CONCAT_VECTORS: return "concat_vectors";
425 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
426 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
427 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
428 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
429 case ISD::VECTOR_REPEAT: return "vector_repeat";
430 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
431 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
432 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
433 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
434 case ISD::SPLAT_VECTOR: return "splat_vector";
435 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
436 case ISD::VECTOR_REVERSE: return "vector_reverse";
437 case ISD::STEP_VECTOR: return "step_vector";
438 case ISD::CARRY_FALSE: return "carry_false";
439 case ISD::ADDC: return "addc";
440 case ISD::ADDE: return "adde";
441 case ISD::UADDO_CARRY: return "uaddo_carry";
442 case ISD::SADDO_CARRY: return "saddo_carry";
443 case ISD::SADDO: return "saddo";
444 case ISD::UADDO: return "uaddo";
445 case ISD::SSUBO: return "ssubo";
446 case ISD::USUBO: return "usubo";
447 case ISD::SMULO: return "smulo";
448 case ISD::UMULO: return "umulo";
449 case ISD::SUBC: return "subc";
450 case ISD::SUBE: return "sube";
451 case ISD::USUBO_CARRY: return "usubo_carry";
452 case ISD::SSUBO_CARRY: return "ssubo_carry";
453 case ISD::SHL_PARTS: return "shl_parts";
454 case ISD::SRA_PARTS: return "sra_parts";
455 case ISD::SRL_PARTS: return "srl_parts";
456
457 case ISD::SADDSAT: return "saddsat";
458 case ISD::UADDSAT: return "uaddsat";
459 case ISD::SSUBSAT: return "ssubsat";
460 case ISD::USUBSAT: return "usubsat";
461 case ISD::SSHLSAT: return "sshlsat";
462 case ISD::USHLSAT: return "ushlsat";
463
464 case ISD::SMULFIX: return "smulfix";
465 case ISD::SMULFIXSAT: return "smulfixsat";
466 case ISD::UMULFIX: return "umulfix";
467 case ISD::UMULFIXSAT: return "umulfixsat";
468
469 case ISD::SDIVFIX: return "sdivfix";
470 case ISD::SDIVFIXSAT: return "sdivfixsat";
471 case ISD::UDIVFIX: return "udivfix";
472 case ISD::UDIVFIXSAT: return "udivfixsat";
473
474 // Conversion operators.
475 case ISD::SIGN_EXTEND: return "sign_extend";
476 case ISD::ZERO_EXTEND: return "zero_extend";
477 case ISD::ANY_EXTEND: return "any_extend";
478 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
479 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
480 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
481 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
482 case ISD::TRUNCATE: return "truncate";
483 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
484 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
485 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
486 case ISD::FP_ROUND: return "fp_round";
487 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
488 case ISD::FP_EXTEND: return "fp_extend";
489 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
490
491 case ISD::SINT_TO_FP: return "sint_to_fp";
492 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
493 case ISD::UINT_TO_FP: return "uint_to_fp";
494 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
495 case ISD::FP_TO_SINT: return "fp_to_sint";
496 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
497 case ISD::FP_TO_UINT: return "fp_to_uint";
498 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
499 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
500 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
501 case ISD::BITCAST: return "bitcast";
502 case ISD::ADDRSPACECAST: return "addrspacecast";
503 case ISD::FP16_TO_FP: return "fp16_to_fp";
504 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
505 case ISD::FP_TO_FP16: return "fp_to_fp16";
506 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
507 case ISD::BF16_TO_FP: return "bf16_to_fp";
508 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
509 case ISD::FP_TO_BF16: return "fp_to_bf16";
510 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
511 case ISD::CONVERT_FROM_ARBITRARY_FP: return "convert_from_arbitrary_fp";
512 case ISD::CONVERT_TO_ARBITRARY_FP: return "convert_to_arbitrary_fp";
513 case ISD::LROUND: return "lround";
514 case ISD::STRICT_LROUND: return "strict_lround";
515 case ISD::LLROUND: return "llround";
516 case ISD::STRICT_LLROUND: return "strict_llround";
517 case ISD::LRINT: return "lrint";
518 case ISD::STRICT_LRINT: return "strict_lrint";
519 case ISD::LLRINT: return "llrint";
520 case ISD::STRICT_LLRINT: return "strict_llrint";
521
522 // Control flow instructions
523 case ISD::BR: return "br";
524 case ISD::BRIND: return "brind";
525 case ISD::BR_JT: return "br_jt";
526 case ISD::BRCOND: return "brcond";
527 case ISD::BR_CC: return "br_cc";
528 case ISD::CALLSEQ_START: return "callseq_start";
529 case ISD::CALLSEQ_END: return "callseq_end";
530
531 // EH instructions
532 case ISD::CATCHRET: return "catchret";
533 case ISD::CLEANUPRET: return "cleanupret";
534
535 // Other operators
536 case ISD::LOAD: return "load";
537 case ISD::STORE: return "store";
538 case ISD::MLOAD: return "masked_load";
539 case ISD::MSTORE: return "masked_store";
540 case ISD::MGATHER: return "masked_gather";
541 case ISD::MSCATTER: return "masked_scatter";
542 case ISD::VECTOR_COMPRESS: return "vector_compress";
543 case ISD::VAARG: return "vaarg";
544 case ISD::VACOPY: return "vacopy";
545 case ISD::VAEND: return "vaend";
546 case ISD::VASTART: return "vastart";
547 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
548 case ISD::EXTRACT_ELEMENT: return "extract_element";
549 case ISD::BUILD_PAIR: return "build_pair";
550 case ISD::STACKSAVE: return "stacksave";
551 case ISD::STACKRESTORE: return "stackrestore";
552 case ISD::TRAP: return "trap";
553 case ISD::DEBUGTRAP: return "debugtrap";
554 case ISD::UBSANTRAP: return "ubsantrap";
555 case ISD::LIFETIME_START: return "lifetime.start";
556 case ISD::LIFETIME_END: return "lifetime.end";
557 case ISD::FAKE_USE:
558 return "fake_use";
559 case ISD::RELOC_NONE:
560 return "reloc_none";
561 case ISD::COND_LOOP:
562 return "cond_loop";
564 return "pseudoprobe";
565 case ISD::GC_TRANSITION_START: return "gc_transition.start";
566 case ISD::GC_TRANSITION_END: return "gc_transition.end";
567 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
568 case ISD::FREEZE: return "freeze";
570 return "call_setup";
572 return "call_alloc";
573
574 // Floating point environment manipulation
575 case ISD::GET_ROUNDING: return "get_rounding";
576 case ISD::SET_ROUNDING: return "set_rounding";
577 case ISD::GET_FPENV: return "get_fpenv";
578 case ISD::SET_FPENV: return "set_fpenv";
579 case ISD::RESET_FPENV: return "reset_fpenv";
580 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
581 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
582 case ISD::GET_FPMODE: return "get_fpmode";
583 case ISD::SET_FPMODE: return "set_fpmode";
584 case ISD::RESET_FPMODE: return "reset_fpmode";
585
586 // Convergence control instructions
587 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
588 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
589 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
590 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
591
592 // Bit manipulation
593 case ISD::ABS: return "abs";
594 case ISD::ABS_MIN_POISON: return "abs_min_poison";
595 case ISD::BITREVERSE: return "bitreverse";
596 case ISD::BSWAP: return "bswap";
597 case ISD::CTPOP: return "ctpop";
598 case ISD::CTTZ: return "cttz";
599 case ISD::CTTZ_ZERO_POISON: return "cttz_zero_poison";
600 case ISD::CTLZ: return "ctlz";
601 case ISD::CTLZ_ZERO_POISON: return "ctlz_zero_poison";
602 case ISD::CTLS: return "ctls";
603 case ISD::PARITY: return "parity";
604
605 // Trampolines
606 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
607 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
608
609 // clang-format on
610
611 case ISD::CONDCODE:
613 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
614 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
615 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
616 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
617 case ISD::VECREDUCE_ADD: return "vecreduce_add";
618 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
619 case ISD::VECREDUCE_AND: return "vecreduce_and";
620 case ISD::VECREDUCE_OR: return "vecreduce_or";
621 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
622 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
623 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
624 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
625 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
626 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
627 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
628 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
630 return "vecreduce_fminimumnum";
632 return "vecreduce_fmaximumnum";
633 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
634 case ISD::STACKMAP:
635 return "stackmap";
636 case ISD::PATCHPOINT:
637 return "patchpoint";
638 case ISD::CLEAR_CACHE:
639 return "clear_cache";
641 return "deactivation_symbol";
642
644 return "histogram";
645
646 case ISD::CTTZ_ELTS:
647 return "cttz_elts";
649 return "cttz_elts_zero_poison";
650
652 return "find_last_active";
653
655 return "get_active_lane_mask";
657 return "mask_beforefirst";
658
660 return "vector_match";
661
663 return "partial_reduce_umla";
665 return "partial_reduce_smla";
667 return "partial_reduce_sumla";
669 return "partial_reduce_fmla";
671 return "loop_dep_war";
673 return "loop_dep_raw";
674 case ISD::MASKED_UDIV:
675 return "masked_udiv";
676 case ISD::MASKED_SDIV:
677 return "masked_sdiv";
678 case ISD::MASKED_UREM:
679 return "masked_urem";
680 case ISD::MASKED_SREM:
681 return "masked_srem";
682
683 // Vector Predication
684#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
685 case ISD::SDID: \
686 return #NAME;
687#include "llvm/IR/VPIntrinsics.def"
688 }
689}
690
692 switch (AM) {
693 default: return "";
694 case ISD::PRE_INC: return "<pre-inc>";
695 case ISD::PRE_DEC: return "<pre-dec>";
696 case ISD::POST_INC: return "<post-inc>";
697 case ISD::POST_DEC: return "<post-dec>";
698 }
699}
700
702 return Printable([&Node](raw_ostream &OS) {
703#ifndef NDEBUG
704 static const raw_ostream::Colors Color[] = {
708 };
709 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
710 OS << 't' << Node.PersistentId;
711 OS.resetColor();
712#else
713 OS << (const void*)&Node;
714#endif
715 });
716}
717
718// Print the MMO with more information from the SelectionDAG.
720 const MachineFunction *MF, const Module *M,
721 const MachineFrameInfo *MFI,
722 const TargetInstrInfo *TII, LLVMContext &Ctx) {
723 ModuleSlotTracker MST(M);
724 if (MF)
727 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
728}
729
731 const SelectionDAG *G) {
732 if (G) {
733 const MachineFunction *MF = &G->getMachineFunction();
734 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
735 &MF->getFrameInfo(),
736 G->getSubtarget().getInstrInfo(), *G->getContext());
737 }
738
739 LLVMContext Ctx;
740 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
741 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
742}
743
744#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
745LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
746
748 print(dbgs(), G);
749 dbgs() << '\n';
750}
751#endif
752
754 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
755 if (i) OS << ",";
756 if (getValueType(i) == MVT::Other)
757 OS << "ch";
758 else
759 OS << getValueType(i).getEVTString();
760 }
761}
762
765 OS << " nuw";
766
768 OS << " nsw";
769
770 if (getFlags().hasExact())
771 OS << " exact";
772
773 if (getFlags().hasDisjoint())
774 OS << " disjoint";
775
776 if (getFlags().hasSameSign())
777 OS << " samesign";
778
779 if (getFlags().hasInBounds())
780 OS << " inbounds";
781
782 if (getFlags().hasNonNeg())
783 OS << " nneg";
784
785 if (getFlags().hasNonNull())
786 OS << " nonnull";
787
788 if (getFlags().hasNoNaNs())
789 OS << " nnan";
790
791 if (getFlags().hasNoInfs())
792 OS << " ninf";
793
794 if (getFlags().hasNoSignedZeros())
795 OS << " nsz";
796
797 if (getFlags().hasAllowReciprocal())
798 OS << " arcp";
799
800 if (getFlags().hasAllowContract())
801 OS << " contract";
802
803 if (getFlags().hasApproximateFuncs())
804 OS << " afn";
805
806 if (getFlags().hasAllowReassociation())
807 OS << " reassoc";
808
809 if (getFlags().hasNoFPExcept())
810 OS << " nofpexcept";
811
812 if (getFlags().hasNoConvergent())
813 OS << " noconvergent";
814
815 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
816 if (!MN->memoperands_empty()) {
817 OS << "<";
818 OS << "Mem:";
819 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
820 e = MN->memoperands_end(); i != e; ++i) {
821 printMemOperand(OS, **i, G);
822 if (std::next(i) != e)
823 OS << " ";
824 }
825 OS << ">";
826 }
827 } else if (const ShuffleVectorSDNode *SVN =
829 OS << "<";
830 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
831 int Idx = SVN->getMaskElt(i);
832 if (i) OS << ",";
833 if (Idx < 0)
834 OS << "u";
835 else
836 OS << Idx;
837 }
838 OS << ">";
839 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
840 OS << '<' << CSDN->getAPIntValue() << '>';
841 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
842 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
843 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
844 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
845 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
846 else {
847 OS << "<APFloat(";
848 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
849 OS << ")>";
850 }
851 } else if (const GlobalAddressSDNode *GADN =
853 int64_t offset = GADN->getOffset();
854 OS << '<';
855 GADN->getGlobal()->printAsOperand(OS);
856 OS << '>';
857 if (offset > 0)
858 OS << " + " << offset;
859 else
860 OS << " " << offset;
861 if (unsigned int TF = GADN->getTargetFlags())
862 OS << " [TF=" << TF << ']';
863 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
864 OS << "<" << FIDN->getIndex() << ">";
865 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
866 OS << "<" << JTDN->getIndex() << ">";
867 if (unsigned int TF = JTDN->getTargetFlags())
868 OS << " [TF=" << TF << ']';
869 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
870 int offset = CP->getOffset();
871 if (CP->isMachineConstantPoolEntry())
872 OS << "<" << *CP->getMachineCPVal() << ">";
873 else
874 OS << "<" << *CP->getConstVal() << ">";
875 if (offset > 0)
876 OS << " + " << offset;
877 else
878 OS << " " << offset;
879 if (unsigned int TF = CP->getTargetFlags())
880 OS << " [TF=" << TF << ']';
881 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
882 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
883 if (unsigned TF = TI->getTargetFlags())
884 OS << " [TF=" << TF << ']';
885 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
886 OS << "<";
887 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
888 if (LBB)
889 OS << LBB->getName() << " ";
890 OS << (const void*)BBDN->getBasicBlock() << ">";
891 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
892 OS << ' ' << printReg(R->getReg(),
893 G ? G->getSubtarget().getRegisterInfo() : nullptr);
894 } else if (const ExternalSymbolSDNode *ES =
896 OS << "'" << ES->getSymbol() << "'";
897 if (unsigned int TF = ES->getTargetFlags())
898 OS << " [TF=" << TF << ']';
899 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
900 if (M->getValue())
901 OS << "<" << M->getValue() << ">";
902 else
903 OS << "<null>";
904 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
905 if (MD->getMD())
906 OS << "<" << MD->getMD() << ">";
907 else
908 OS << "<null>";
909 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
910 OS << ":" << N->getVT();
911 }
912 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
913 OS << "<";
914
915 printMemOperand(OS, *LD->getMemOperand(), G);
916
917 bool doExt = true;
918 switch (LD->getExtensionType()) {
919 default: doExt = false; break;
920 case ISD::EXTLOAD: OS << ", anyext"; break;
921 case ISD::SEXTLOAD: OS << ", sext"; break;
922 case ISD::ZEXTLOAD: OS << ", zext"; break;
923 }
924 if (doExt)
925 OS << " from " << LD->getMemoryVT();
926
927 const char *AM = getIndexedModeName(LD->getAddressingMode());
928 if (*AM)
929 OS << ", " << AM;
930
931 OS << ">";
932 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
933 OS << "<";
934 printMemOperand(OS, *ST->getMemOperand(), G);
935
936 if (ST->isTruncatingStore())
937 OS << ", trunc to " << ST->getMemoryVT();
938
939 const char *AM = getIndexedModeName(ST->getAddressingMode());
940 if (*AM)
941 OS << ", " << AM;
942
943 OS << ">";
944 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
945 OS << "<";
946
947 printMemOperand(OS, *MLd->getMemOperand(), G);
948
949 bool doExt = true;
950 switch (MLd->getExtensionType()) {
951 default: doExt = false; break;
952 case ISD::EXTLOAD: OS << ", anyext"; break;
953 case ISD::SEXTLOAD: OS << ", sext"; break;
954 case ISD::ZEXTLOAD: OS << ", zext"; break;
955 }
956 if (doExt)
957 OS << " from " << MLd->getMemoryVT();
958
959 const char *AM = getIndexedModeName(MLd->getAddressingMode());
960 if (*AM)
961 OS << ", " << AM;
962
963 if (MLd->isExpandingLoad())
964 OS << ", expanding";
965
966 OS << ">";
967 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
968 OS << "<";
969 printMemOperand(OS, *MSt->getMemOperand(), G);
970
971 if (MSt->isTruncatingStore())
972 OS << ", trunc to " << MSt->getMemoryVT();
973
974 const char *AM = getIndexedModeName(MSt->getAddressingMode());
975 if (*AM)
976 OS << ", " << AM;
977
978 if (MSt->isCompressingStore())
979 OS << ", compressing";
980
981 OS << ">";
982 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
983 OS << "<";
984 printMemOperand(OS, *MGather->getMemOperand(), G);
985
986 bool doExt = true;
987 switch (MGather->getExtensionType()) {
988 default: doExt = false; break;
989 case ISD::EXTLOAD: OS << ", anyext"; break;
990 case ISD::SEXTLOAD: OS << ", sext"; break;
991 case ISD::ZEXTLOAD: OS << ", zext"; break;
992 }
993 if (doExt)
994 OS << " from " << MGather->getMemoryVT();
995
996 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
997 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
998 OS << ", " << Signed << " " << Scaled << " offset";
999
1000 OS << ">";
1001 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
1002 OS << "<";
1003 printMemOperand(OS, *MScatter->getMemOperand(), G);
1004
1005 if (MScatter->isTruncatingStore())
1006 OS << ", trunc to " << MScatter->getMemoryVT();
1007
1008 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
1009 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
1010 OS << ", " << Signed << " " << Scaled << " offset";
1011
1012 OS << ">";
1013 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
1014 OS << "<";
1015 interleaveComma(M->memoperands(), OS, [&](const MachineMemOperand *MMO) {
1016 printMemOperand(OS, *MMO, G);
1017 });
1018 if (auto *A = dyn_cast<AtomicSDNode>(M))
1019 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
1020 bool doExt = true;
1021 switch (A->getExtensionType()) {
1022 default: doExt = false; break;
1023 case ISD::EXTLOAD: OS << ", anyext"; break;
1024 case ISD::SEXTLOAD: OS << ", sext"; break;
1025 case ISD::ZEXTLOAD: OS << ", zext"; break;
1026 }
1027 if (doExt)
1028 OS << " from " << A->getMemoryVT();
1029 }
1030 OS << ">";
1031 } else if (const BlockAddressSDNode *BA =
1033 int64_t offset = BA->getOffset();
1034 OS << "<";
1035 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
1036 OS << ", ";
1037 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
1038 OS << ">";
1039 if (offset > 0)
1040 OS << " + " << offset;
1041 else
1042 OS << " " << offset;
1043 if (unsigned int TF = BA->getTargetFlags())
1044 OS << " [TF=" << TF << ']';
1045 } else if (const AddrSpaceCastSDNode *ASC =
1047 OS << '['
1048 << ASC->getSrcAddressSpace()
1049 << " -> "
1050 << ASC->getDestAddressSpace()
1051 << ']';
1052 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
1053 OS << '<' << AA->getAlign().value() << '>';
1054 }
1055
1056 if (VerboseDAGDumping) {
1057 if (unsigned Order = getIROrder())
1058 OS << " [ORD=" << Order << ']';
1059
1060 if (getNodeId() != -1)
1061 OS << " [ID=" << getNodeId() << ']';
1062 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
1063 OS << " # D:" << isDivergent();
1064
1065 if (G && !G->GetDbgValues(this).empty()) {
1066 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
1067 for (SDDbgValue *Dbg : G->GetDbgValues(this))
1068 if (!Dbg->isInvalidated())
1069 Dbg->print(OS);
1070 } else if (getHasDebugValue())
1071 OS << " [NoOfDbgValues>0]";
1072
1073 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
1074 OS << " [pcsections ";
1075 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
1076 OS << ']';
1077 }
1078
1079 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
1080 OS << " [mmra ";
1081 MMRA->printAsOperand(OS,
1082 G->getMachineFunction().getFunction().getParent());
1083 OS << ']';
1084 }
1085 }
1086}
1087
1089 OS << " DbgVal(Order=" << getOrder() << ')';
1090 if (isInvalidated())
1091 OS << "(Invalidated)";
1092 if (isEmitted())
1093 OS << "(Emitted)";
1094 OS << "(";
1095 bool Comma = false;
1096 for (const SDDbgOperand &Op : getLocationOps()) {
1097 if (Comma)
1098 OS << ", ";
1099 switch (Op.getKind()) {
1101 if (Op.getSDNode())
1102 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
1103 else
1104 OS << "SDNODE";
1105 break;
1107 OS << "CONST";
1108 break;
1110 OS << "FRAMEIX=" << Op.getFrameIx();
1111 break;
1112 case SDDbgOperand::VREG:
1113 OS << "VREG=" << printReg(Op.getVReg());
1114 break;
1116 OS << "GLOBALADDR=" << Op.getGlobal()->getName();
1117 break;
1118 }
1119 Comma = true;
1120 }
1121 OS << ")";
1122 if (isIndirect()) OS << "(Indirect)";
1123 if (isVariadic())
1124 OS << "(Variadic)";
1125 OS << ":\"" << Var->getName() << '"';
1126#ifndef NDEBUG
1127 if (Expr->getNumElements())
1128 Expr->dump();
1129#endif
1130}
1131
1132#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1134 if (isInvalidated())
1135 return;
1136 print(dbgs());
1137 dbgs() << "\n";
1138}
1139#endif
1140
1141/// Return true if this node is so simple that we should just print it inline
1142/// if it appears as an operand.
1143static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1144 // Avoid lots of cluttering when inline printing nodes with associated
1145 // DbgValues in verbose mode.
1146 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
1147 return false;
1148 if (Node.getOpcode() == ISD::EntryToken)
1149 return false;
1150 return Node.getNumOperands() == 0;
1151}
1152
1153#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1154static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1155 for (const SDValue &Op : N->op_values()) {
1156 if (shouldPrintInline(*Op.getNode(), G))
1157 continue;
1158 if (Op.getNode()->hasOneUse())
1159 DumpNodes(Op.getNode(), indent+2, G);
1160 }
1161
1162 dbgs().indent(indent);
1163 N->dump(G);
1164}
1165
1167
1168LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1169 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1170
1171 auto dumpEachNode = [this](const SDNode &N) {
1172 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1173 (!shouldPrintInline(N, this) || N.use_empty()))
1174 DumpNodes(&N, 2, this);
1175 };
1176
1177 if (Sorted) {
1178 SmallVector<const SDNode *> SortedNodes;
1179 SortedNodes.reserve(AllNodes.size());
1180 getTopologicallyOrderedNodes(SortedNodes);
1181 for (const SDNode *N : SortedNodes)
1182 dumpEachNode(*N);
1183 } else {
1184 for (const SDNode &N : allnodes())
1185 dumpEachNode(N);
1186 }
1187
1188 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1189 dbgs() << "\n";
1190
1191 if (VerboseDAGDumping) {
1192 if (DbgBegin() != DbgEnd())
1193 dbgs() << "SDDbgValues:\n";
1194 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1195 Dbg->dump();
1197 dbgs() << "Byval SDDbgValues:\n";
1198 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1199 Dbg->dump();
1200 }
1201 dbgs() << "\n";
1202}
1203#endif
1204
1205void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1206 OS << PrintNodeId(*this) << ": ";
1207 print_types(OS, G);
1208 OS << " = " << getOperationName(G);
1209 print_details(OS, G);
1210}
1211
1212static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1213 const SDValue Value) {
1214 if (!Value.getNode()) {
1215 OS << "<null>";
1216 return false;
1217 }
1218
1219 if (shouldPrintInline(*Value.getNode(), G)) {
1220 OS << Value->getOperationName(G) << ':';
1221 Value->print_types(OS, G);
1222 Value->print_details(OS, G);
1223 return true;
1224 }
1225
1226 OS << PrintNodeId(*Value.getNode());
1227 if (unsigned RN = Value.getResNo())
1228 OS << ':' << RN;
1229 return false;
1230}
1231
1232#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1234
1235static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1236 const SelectionDAG *G, VisitedSDNodeSet &once) {
1237 if (!once.insert(N).second) // If we've been here before, return now.
1238 return;
1239
1240 // Dump the current SDNode, but don't end the line yet.
1241 OS.indent(indent);
1242 N->printr(OS, G);
1243
1244 // Having printed this SDNode, walk the children:
1245 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1246 if (i) OS << ",";
1247 OS << " ";
1248
1249 const SDValue Op = N->getOperand(i);
1250 bool printedInline = printOperand(OS, G, Op);
1251 if (printedInline)
1252 once.insert(Op.getNode());
1253 }
1254
1255 OS << "\n";
1256
1257 // Dump children that have grandchildren on their own line(s).
1258 for (const SDValue &Op : N->op_values())
1259 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1260}
1261
1263 VisitedSDNodeSet once;
1264 DumpNodesr(dbgs(), this, 0, nullptr, once);
1265}
1266
1268 VisitedSDNodeSet once;
1269 DumpNodesr(dbgs(), this, 0, G, once);
1270}
1271#endif
1272
1274 const SelectionDAG *G, unsigned depth,
1275 unsigned indent) {
1276 if (depth == 0)
1277 return;
1278
1279 OS.indent(indent);
1280
1281 N->print(OS, G);
1282
1283 for (const SDValue &Op : N->op_values()) {
1284 // Don't follow chain operands.
1285 if (Op.getValueType() == MVT::Other)
1286 continue;
1287 // Don't print children that were fully rendered inline.
1288 if (shouldPrintInline(*Op.getNode(), G))
1289 continue;
1290 OS << '\n';
1291 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1292 }
1293}
1294
1296 unsigned depth) const {
1297 printrWithDepthHelper(OS, this, G, depth, 0);
1298}
1299
1301 // Don't print impossibly deep things.
1302 printrWithDepth(OS, G, 10);
1303}
1304
1305#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1307void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1308 printrWithDepth(dbgs(), G, depth);
1309}
1310
1312 // Don't print impossibly deep things.
1313 dumprWithDepth(G, 10);
1314}
1315#endif
1316
1317void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1318 printr(OS, G);
1319 // Under VerboseDAGDumping divergence will be printed always.
1321 OS << " # D:1";
1322 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1323 if (i) OS << ", "; else OS << " ";
1324 printOperand(OS, G, getOperand(i));
1325 }
1326 if (DebugLoc DL = getDebugLoc()) {
1327 OS << ", ";
1328 DL.print(OS);
1329 }
1330 if (PrintSDNodeAddrs)
1331 OS << " ; " << this;
1332}
This file declares a class to represent arbitrary precision floating point values and provide a varie...
This file implements a class to represent arbitrary precision integral constant values and operations...
@ Scaled
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition Compiler.h:682
This file contains the declarations for the subclasses of Constant, which represent the different fla...
const HexagonInstrInfo * TII
static bool hasNoSignedWrap(BinaryOperator &I)
static bool hasNoUnsignedWrap(BinaryOperator &I)
#define G(x, y, z)
Definition MD5.cpp:55
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
static Printable PrintNodeId(const SDNode &Node)
SmallPtrSet< const SDNode *, 32 > VisitedSDNodeSet
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
static cl::opt< bool > PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden, cl::desc("Print addresses of SDNodes when dumping"))
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
This file defines the SmallPtrSet class.
This file contains some functions that are useful when dealing with strings.
This file describes how to lower LLVM code to machine code.
static const fltSemantics & IEEEsingle()
Definition APFloat.h:304
static const fltSemantics & IEEEdouble()
Definition APFloat.h:305
A debug info location.
Definition DebugLoc.h:126
Module * getParent()
Get the module that this global value is contained inside of...
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:76
This class is used to represent ISD::LOAD nodes.
Metadata node.
Definition Metadata.h:1081
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
A description of a memory reference used in the backend.
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
An SDNode that represents everything that will be needed to construct a MachineInstr.
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
This class is used to represent an MLOAD node.
This class is used to represent an MSTORE node.
This is an abstract virtual class for memory operations.
Manage lifetime of a slot tracker for printing IR.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Definition Module.h:68
Simple wrapper around std::function<void(raw_ostream&)>.
Definition Printable.h:38
Holds the information for a single machine location through SDISel; either an SDNode,...
@ VREG
Value is a virtual register.
@ FRAMEIX
Value is contents of a stack location.
@ SDNODE
Value is the result of an expression.
@ CONST
Value is a constant.
@ GLOBALADDR
Value is the address of a global.
Holds the information from a dbg_value node through SDISel.
bool isEmitted() const
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
unsigned getOrder() const
Returns the SDNodeOrder.
LLVM_DUMP_METHOD void dump() const
bool isInvalidated() const
ArrayRef< SDDbgOperand > getLocationOps() const
bool isIndirect() const
Returns whether this is an indirect value.
bool isVariadic() const
Represents one node in the SelectionDAG.
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
LLVM_ABI void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
int getNodeId() const
Return the unique node id.
LLVM_ABI void dump() const
Dump this node, for debugging.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
bool isDivergent() const
static LLVM_ABI const char * getIndexedModeName(ISD::MemIndexedMode AM)
unsigned getIROrder() const
Return the node ordering.
bool getHasDebugValue() const
LLVM_ABI void dumpr() const
Dump (recursively) this node and its use-def subgraph.
SDNodeFlags getFlags() const
LLVM_ABI std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
LLVM_ABI void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
friend class SelectionDAG
LLVM_ABI void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
unsigned getNumOperands() const
Return the number of values used by this operation.
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
const SDValue & getOperand(unsigned Num) const
LLVM_ABI void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
const DebugLoc & getDebugLoc() const
Return the source location info.
LLVM_ABI void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
LLVM_ABI void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
LLVM_ABI void print_details(raw_ostream &OS, const SelectionDAG *G) const
LLVM_ABI void print_types(raw_ostream &OS, const SelectionDAG *G) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
virtual const char * getTargetNodeName(unsigned Opcode) const
Returns the name of the given target-specific opcode, suitable for debug printing.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
SDDbgInfo::DbgIterator DbgEnd() const
LLVM_ABI void dump() const
Dump the textual format of this DAG.
SDDbgInfo::DbgIterator DbgBegin() const
iterator_range< allnodes_iterator > allnodes()
LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
LLVM_ABI void getTopologicallyOrderedNodes(SmallVectorImpl< const SDNode * > &SortedNodes) const
Get all the nodes in their topological order without modifying any states.
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
void reserve(size_type N)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
An SDNode that holds an arbitrary LLVM IR Value.
This class is used to represent ISD::STORE nodes.
Represent a constant reference to a string, i.e.
Definition StringRef.h:56
std::string str() const
Get the contents as an std::string.
Definition StringRef.h:222
Completely target-dependent object reference.
TargetInstrInfo - Interface to description of machine instruction set.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
This class is used to represent EVT's, which are used to parameterize some operations.
LLVM Value Representation.
Definition Value.h:75
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
Definition Value.cpp:315
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
virtual raw_ostream & changeColor(enum Colors Color, bool Bold=false, bool BG=false)
Changes the foreground color of text that will be output from this point forward.
virtual raw_ostream & resetColor()
Resets the colors to terminal defaults.
static constexpr Colors BLACK
static constexpr Colors GREEN
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
static constexpr Colors BLUE
static constexpr Colors RED
static constexpr Colors MAGENTA
static constexpr Colors YELLOW
static constexpr Colors CYAN
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Abstract Attribute helper functions.
Definition Attributor.h:165
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:845
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:263
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
@ TargetConstantPool
Definition ISDOpcodes.h:191
@ CONVERGENCECTRL_ANCHOR
The llvm.experimental.convergence.* intrinsics.
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:516
@ PTRADD
PTRADD represents pointer arithmetic semantics, for targets that opt in using shouldPreservePtrArith(...
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:47
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:238
@ SET_FPENV
Sets the current floating-point environment.
@ PARTIAL_REDUCE_SMLA
PARTIAL_REDUCE_[U|S]MLA(Accumulator, Input1, Input2) The partial reduction nodes sign or zero extend ...
@ ATOMIC_LOAD_FMINIMUMNUM
@ LOOP_DEPENDENCE_RAW_MASK
@ MASK_BEFOREFIRST
Has one mask vector operand.
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
@ COND_LOOP
COND_LOOP is a conditional branch to self, used for implementing efficient conditional traps.
@ MLOAD
Masked load and store - consecutive vector load and store operations with additional mask operand tha...
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:170
@ VECREDUCE_FMINIMUMNUM
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:543
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:277
@ AVGSUBFLOORS
AVGSUBFLOORS/AVGSUBFLOORU - Averaging subtract - Subtract two integers using an integer of type i[N+1...
Definition ISDOpcodes.h:733
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:605
@ STACKADDRESS
STACKADDRESS - Represents the llvm.stackaddress intrinsic.
Definition ISDOpcodes.h:129
@ JUMP_TABLE_DEBUG_INFO
JUMP_TABLE_DEBUG_INFO - Jumptable debug info.
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:805
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:397
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
@ TargetBlockAddress
Definition ISDOpcodes.h:193
@ DEACTIVATION_SYMBOL
Untyped node storing deactivation symbol reference (DeactivationSymbolSDNode).
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, val, ptr) This corresponds to "store atomic" instruction.
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:296
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:147
@ RESET_FPENV
Set floating-point environment to default state.
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:527
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:266
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:403
@ SET_FPMODE
Sets the current dynamic floating-point control modes.
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:879
@ CTTZ_ELTS
Returns the number of number of trailing (least significant) zero elements in a vector.
@ ATOMIC_LOAD_USUB_COND
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:523
@ VECTOR_FIND_LAST_ACTIVE
Finds the index of the last active mask element Operands: Mask.
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ PSEUDO_FMIN
PSEUDO_FMIN is strictly equivalent to op0 olt op1 ?
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:222
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:174
@ GlobalAddress
Definition ISDOpcodes.h:90
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:476
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:906
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:589
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:420
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:765
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
@ RESET_FPMODE
Sets default dynamic floating-point control modes.
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:936
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:282
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
@ FMULADD
FMULADD - Performs a * b + c, with, or without, intermediate rounding.
Definition ISDOpcodes.h:533
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:520
@ FAKE_USE
FAKE_USE represents a use of the operand but does not do anything.
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
@ STRICT_PSEUDO_FMAX
Definition ISDOpcodes.h:465
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:256
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:796
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:410
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:441
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
@ GlobalTLSAddress
Definition ISDOpcodes.h:91
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
@ CONVERT_FROM_ARBITRARY_FP
CONVERT_FROM_ARBITRARY_FP - This operator converts from an arbitrary floating-point represented as an...
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
@ ATOMIC_LOAD_USUB_SAT
@ CTLZ_ZERO_POISON
Definition ISDOpcodes.h:814
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:158
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
@ SET_ROUNDING
Set rounding mode.
@ CONVERGENCECTRL_GLUE
This does not correspond to any convergence control intrinsic.
@ PARTIAL_REDUCE_UMLA
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:870
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:725
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:490
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:675
@ PREALLOCATED_SETUP
PREALLOCATED_SETUP - This has 2 operands: an input chain and a SRCVALUE with the preallocated call Va...
@ READSTEADYCOUNTER
READSTEADYCOUNTER - This corresponds to the readfixedcounter intrinsic.
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:119
@ TargetExternalSymbol
Definition ISDOpcodes.h:192
@ CONVERGENCECTRL_ENTRY
@ BR
Control flow instructions. These all have token chains.
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
@ TargetJumpTable
Definition ISDOpcodes.h:190
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:200
@ PARTIAL_REDUCE_FMLA
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
@ STRICT_PSEUDO_FMIN
Definition ISDOpcodes.h:464
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:899
@ VECREDUCE_FMAXIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM nodes do not propagate NaNs and order signed zeroes using the llvm....
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:853
@ FNEG
Perform various unary floating-point operations inspired by libm.
@ BR_CC
BR_CC - Conditional branch.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:355
@ PREALLOCATED_ARG
PREALLOCATED_ARG - This has 3 operands: an input chain, a SRCVALUE with the preallocated call Value,...
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:640
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:701
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:546
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:553
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:377
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:822
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:235
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:249
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:682
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:71
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
@ GET_ACTIVE_LANE_MASK
GET_ACTIVE_LANE_MASK - this corrosponds to the llvm.get.active.lane.mask intrinsic.
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:83
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:232
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:351
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:187
@ ARITH_FENCE
ARITH_FENCE - This corresponds to a arithmetic fence intrinsic.
@ CTLS
Count leading redundant sign bits.
Definition ISDOpcodes.h:818
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:996
@ STRICT_FP_TO_FP16
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:714
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
@ ATOMIC_LOAD_FMAXIMUM
@ GET_FPMODE
Reads the current dynamic floating-point control modes.
@ STRICT_FP16_TO_FP
@ GET_FPENV
Gets the current floating-point environment.
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:787
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:80
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:659
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:102
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:619
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Same as FMINNUM/FMAXNUM, except that a signaling NaN operand deterministi...
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:475
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:50
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:141
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:581
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:226
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:876
@ TargetConstantFP
Definition ISDOpcodes.h:182
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:837
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:137
@ FMINNUM
FMINNUM/FMAXNUM - Same semantics as the llvm.minnum/maxnum intrinsics.
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:389
@ PATCHPOINT
The llvm.experimental.patchpoint.
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:359
@ ATOMIC_LOAD_FMINIMUM
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
@ TargetFrameIndex
Definition ISDOpcodes.h:189
@ VECTOR_SPLICE_LEFT
VECTOR_SPLICE_LEFT(VEC1, VEC2, OFFSET) - Shifts CONCAT_VECTORS(VEC1, VEC2) left by OFFSET elements an...
Definition ISDOpcodes.h:663
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:925
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:914
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:745
@ MASKED_UDIV
Masked vector arithmetic that returns poison on disabled lanes.
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:650
@ LIFETIME_START
This corresponds to the llvm.lifetime.
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:416
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:105
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:831
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:331
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:489
@ MGATHER
Masked gather and scatter - load and store operations for a vector of random addresses with additiona...
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
@ STRICT_BF16_TO_FP
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:469
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
@ ATOMIC_LOAD_FMAXIMUMNUM
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:152
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:112
@ ATOMIC_LOAD_UDEC_WRAP
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:483
@ PEXT
Parallel bit extract (compress) and parallel bit deposit (expand).
Definition ISDOpcodes.h:801
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:505
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:482
@ FMINIMUM
FMINIMUM/FMAXIMUM - Same semantics as the llvm.minimum/maximum intrinsics.
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:952
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:181
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:510
@ RELOC_NONE
Issue a no-op relocation against a given symbol at the current location.
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:757
@ TRAP
TRAP - Trapping instruction.
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:207
@ GET_FPENV_MEM
Gets the current floating-point environment.
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
@ STRICT_FP_TO_BF16
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:753
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:287
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:720
@ VECTOR_MATCH
VECTOR_MATCH - this corresponds to the llvm.experimental.vector.match intrinsic.
@ VECTOR_SPLICE_RIGHT
VECTOR_SPLICE_RIGHT(VEC1, VEC2, OFFSET) - Shifts CONCAT_VECTORS(VEC1,VEC2) right by OFFSET elements a...
Definition ISDOpcodes.h:667
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:306
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:430
@ STACKMAP
The llvm.experimental.stackmap intrinsic.
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:691
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:243
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:570
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:55
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
@ CTTZ_ZERO_POISON
Bit counting operators with a poisoned result for zero inputs.
Definition ISDOpcodes.h:813
@ ExternalSymbol
Definition ISDOpcodes.h:95
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:985
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:709
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:124
@ CLEAR_CACHE
llvm.clear_cache intrinsic Operands: Input Chain, Start Addres, End Address Outputs: Output Chain
@ CONVERGENCECTRL_LOOP
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:947
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
@ EXPERIMENTAL_VECTOR_HISTOGRAM
Experimental vector histogram intrinsic Operands: Input Chain, Inc, Mask, Base, Index,...
@ INLINEASM
INLINEASM - Represents an inline asm block.
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:461
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:971
@ VECREDUCE_FMINIMUM
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:164
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:882
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
@ BRCOND
BRCOND - Conditional branch.
@ VECREDUCE_SEQ_FMUL
@ CONVERT_TO_ARBITRARY_FP
CONVERT_TO_ARBITRARY_FP - Converts a native FP value to an arbitrary floating-point format,...
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:859
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
@ GC_TRANSITION_END
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:64
@ ATOMIC_LOAD_UINC_WRAP
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:539
@ PARTIAL_REDUCE_SUMLA
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:368
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
@ VECTOR_REPEAT
VECTOR_REPEAT(FIXED_LENGTH_VECTOR) Repeatedly copies the elements of the source fixed-length vector t...
Definition ISDOpcodes.h:645
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:629
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
@ CTTZ_ELTS_ZERO_POISON
@ SET_FPENV_MEM
Sets the current floating point environment.
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - Same semantics as the llvm.minimumnum/maximumnum intrinsics.
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:897
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:740
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:901
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:341
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:215
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:188
@ ABS_MIN_POISON
ABS with a poison result for INT_MIN.
Definition ISDOpcodes.h:769
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:561
@ LOOP_DEPENDENCE_WAR_MASK
The llvm.loop.dependence.
LLVM_ABI StringRef getCondCodeName(CondCode Operation)
Return the name of the given condition code, e.g. "setoeq".
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
LLVM_ABI StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
This is an optimization pass for GlobalISel generic memory operations.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
void interleaveComma(const Container &c, StreamT &os, UnaryFunctor each_fn)
Definition STLExtras.h:2329
std::string utostr(uint64_t X, bool isNeg=false)
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:209
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
DWARFExpression::Operation Op
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
#define N
LLVM_ABI std::string getEVTString() const
This function returns value type as a string, e.g. "i32".