LLVM 22.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallPtrSet.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/CodeGen/ISDOpcodes.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/MachineConstantPool.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/SelectionDAG.h"
23#include "llvm/CodeGen/SelectionDAGNodes.h"
24#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25#include "llvm/CodeGen/TargetInstrInfo.h"
26#include "llvm/CodeGen/TargetLowering.h"
27#include "llvm/CodeGen/TargetRegisterInfo.h"
28#include "llvm/CodeGen/TargetSubtargetInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/CodeGenTypes/MachineValueType.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/ModuleSlotTracker.h"
39#include "llvm/IR/Value.h"
40#include "llvm/Support/Casting.h"
41#include "llvm/Support/CommandLine.h"
42#include "llvm/Support/Compiler.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/Printable.h"
46#include "llvm/Support/raw_ostream.h"
47#include "llvm/Target/TargetMachine.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58std::string SDNode::getOperationName(const SelectionDAG *G) const {
59 switch (getOpcode()) {
60 default:
61 if (getOpcode() < ISD::BUILTIN_OP_END)
62 return "<<Unknown DAG Node>>";
63 if (isMachineOpcode()) {
64 if (G)
65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66 if (getMachineOpcode() < TII->getNumOpcodes())
67 return std::string(TII->getName(getMachineOpcode()));
68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69 }
70 if (G) {
71 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
72 if (const char *Name = TSI.getTargetNodeName(getOpcode()))
73 return Name;
74 const TargetLowering &TLI = G->getTargetLoweringInfo();
75 const char *Name = TLI.getTargetNodeName(getOpcode());
76 if (Name) return Name;
77 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
78 }
79 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
80
81 // clang-format off
82#ifndef NDEBUG
83 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
84#endif
85 case ISD::PREFETCH: return "Prefetch";
86 case ISD::MEMBARRIER: return "MemBarrier";
87 case ISD::ATOMIC_FENCE: return "AtomicFence";
88 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
89 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
90 case ISD::ATOMIC_SWAP: return "AtomicSwap";
91 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
92 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
93 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
94 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
95 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
96 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
97 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
98 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
99 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
100 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
101 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
102 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
103 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
104 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
105 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
106 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
107 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
108 case ISD::ATOMIC_LOAD_UINC_WRAP:
109 return "AtomicLoadUIncWrap";
110 case ISD::ATOMIC_LOAD_UDEC_WRAP:
111 return "AtomicLoadUDecWrap";
112 case ISD::ATOMIC_LOAD_USUB_COND:
113 return "AtomicLoadUSubCond";
114 case ISD::ATOMIC_LOAD_USUB_SAT:
115 return "AtomicLoadUSubSat";
116 case ISD::ATOMIC_LOAD: return "AtomicLoad";
117 case ISD::ATOMIC_STORE: return "AtomicStore";
118 case ISD::PCMARKER: return "PCMarker";
119 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
120 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
121 case ISD::SRCVALUE: return "SrcValue";
122 case ISD::MDNODE_SDNODE: return "MDNode";
123 case ISD::EntryToken: return "EntryToken";
124 case ISD::TokenFactor: return "TokenFactor";
125 case ISD::AssertSext: return "AssertSext";
126 case ISD::AssertZext: return "AssertZext";
127 case ISD::AssertNoFPClass: return "AssertNoFPClass";
128 case ISD::AssertAlign: return "AssertAlign";
129
130 case ISD::BasicBlock: return "BasicBlock";
131 case ISD::VALUETYPE: return "ValueType";
132 case ISD::Register: return "Register";
133 case ISD::RegisterMask: return "RegisterMask";
134 case ISD::Constant:
135 if (cast<ConstantSDNode>(this)->isOpaque())
136 return "OpaqueConstant";
137 return "Constant";
138 case ISD::ConstantFP: return "ConstantFP";
139 case ISD::GlobalAddress: return "GlobalAddress";
140 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
141 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
142 case ISD::FrameIndex: return "FrameIndex";
143 case ISD::JumpTable: return "JumpTable";
144 case ISD::JUMP_TABLE_DEBUG_INFO:
145 return "JUMP_TABLE_DEBUG_INFO";
146 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
147 case ISD::RETURNADDR: return "RETURNADDR";
148 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
149 case ISD::FRAMEADDR: return "FRAMEADDR";
150 case ISD::SPONENTRY: return "SPONENTRY";
151 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
152 case ISD::READ_REGISTER: return "READ_REGISTER";
153 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
154 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
155 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
156 case ISD::EH_RETURN: return "EH_RETURN";
157 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
158 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
159 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
160 case ISD::ConstantPool: return "ConstantPool";
161 case ISD::TargetIndex: return "TargetIndex";
162 case ISD::ExternalSymbol: return "ExternalSymbol";
163 case ISD::BlockAddress: return "BlockAddress";
164 case ISD::INTRINSIC_WO_CHAIN:
165 case ISD::INTRINSIC_VOID:
166 case ISD::INTRINSIC_W_CHAIN: {
167 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
168 unsigned IID = getOperand(OpNo)->getAsZExtVal();
169 if (IID < Intrinsic::num_intrinsics)
170 return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
171 if (!G)
172 return "Unknown intrinsic";
173 llvm_unreachable("Invalid intrinsic ID");
174 }
175
176 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
177 case ISD::TargetConstant:
178 if (cast<ConstantSDNode>(this)->isOpaque())
179 return "OpaqueTargetConstant";
180 return "TargetConstant";
181
182 case ISD::TargetConstantFP: return "TargetConstantFP";
183 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
184 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
185 case ISD::TargetFrameIndex: return "TargetFrameIndex";
186 case ISD::TargetJumpTable: return "TargetJumpTable";
187 case ISD::TargetConstantPool: return "TargetConstantPool";
188 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
189 case ISD::MCSymbol: return "MCSymbol";
190 case ISD::TargetBlockAddress: return "TargetBlockAddress";
191
192 case ISD::CopyToReg: return "CopyToReg";
193 case ISD::CopyFromReg: return "CopyFromReg";
194 case ISD::UNDEF: return "undef";
195 case ISD::POISON: return "poison";
196 case ISD::VSCALE: return "vscale";
197 case ISD::MERGE_VALUES: return "merge_values";
198 case ISD::INLINEASM: return "inlineasm";
199 case ISD::INLINEASM_BR: return "inlineasm_br";
200 case ISD::EH_LABEL: return "eh_label";
201 case ISD::ANNOTATION_LABEL: return "annotation_label";
202 case ISD::HANDLENODE: return "handlenode";
203
204 // Unary operators
205 case ISD::FABS: return "fabs";
206 case ISD::FMINNUM: return "fminnum";
207 case ISD::STRICT_FMINNUM: return "strict_fminnum";
208 case ISD::FMAXNUM: return "fmaxnum";
209 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
210 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
211 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
212 case ISD::FMINIMUM: return "fminimum";
213 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
214 case ISD::FMAXIMUM: return "fmaximum";
215 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
216 case ISD::FMINIMUMNUM: return "fminimumnum";
217 case ISD::FMAXIMUMNUM: return "fmaximumnum";
218 case ISD::FNEG: return "fneg";
219 case ISD::FSQRT: return "fsqrt";
220 case ISD::STRICT_FSQRT: return "strict_fsqrt";
221 case ISD::FCBRT: return "fcbrt";
222 case ISD::FSIN: return "fsin";
223 case ISD::STRICT_FSIN: return "strict_fsin";
224 case ISD::FCOS: return "fcos";
225 case ISD::STRICT_FCOS: return "strict_fcos";
226 case ISD::FSINCOS: return "fsincos";
227 case ISD::FSINCOSPI: return "fsincospi";
228 case ISD::FMODF: return "fmodf";
229 case ISD::FTAN: return "ftan";
230 case ISD::STRICT_FTAN: return "strict_ftan";
231 case ISD::FASIN: return "fasin";
232 case ISD::STRICT_FASIN: return "strict_fasin";
233 case ISD::FACOS: return "facos";
234 case ISD::STRICT_FACOS: return "strict_facos";
235 case ISD::FATAN: return "fatan";
236 case ISD::STRICT_FATAN: return "strict_fatan";
237 case ISD::FATAN2: return "fatan2";
238 case ISD::STRICT_FATAN2: return "strict_fatan2";
239 case ISD::FSINH: return "fsinh";
240 case ISD::STRICT_FSINH: return "strict_fsinh";
241 case ISD::FCOSH: return "fcosh";
242 case ISD::STRICT_FCOSH: return "strict_fcosh";
243 case ISD::FTANH: return "ftanh";
244 case ISD::STRICT_FTANH: return "strict_ftanh";
245 case ISD::FTRUNC: return "ftrunc";
246 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
247 case ISD::FFLOOR: return "ffloor";
248 case ISD::STRICT_FFLOOR: return "strict_ffloor";
249 case ISD::FCEIL: return "fceil";
250 case ISD::STRICT_FCEIL: return "strict_fceil";
251 case ISD::FRINT: return "frint";
252 case ISD::STRICT_FRINT: return "strict_frint";
253 case ISD::FNEARBYINT: return "fnearbyint";
254 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
255 case ISD::FROUND: return "fround";
256 case ISD::STRICT_FROUND: return "strict_fround";
257 case ISD::FROUNDEVEN: return "froundeven";
258 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
259 case ISD::FEXP: return "fexp";
260 case ISD::STRICT_FEXP: return "strict_fexp";
261 case ISD::FEXP2: return "fexp2";
262 case ISD::STRICT_FEXP2: return "strict_fexp2";
263 case ISD::FEXP10: return "fexp10";
264 case ISD::FLOG: return "flog";
265 case ISD::STRICT_FLOG: return "strict_flog";
266 case ISD::FLOG2: return "flog2";
267 case ISD::STRICT_FLOG2: return "strict_flog2";
268 case ISD::FLOG10: return "flog10";
269 case ISD::STRICT_FLOG10: return "strict_flog10";
270
271 // Binary operators
272 case ISD::ADD: return "add";
273 case ISD::PTRADD: return "ptradd";
274 case ISD::SUB: return "sub";
275 case ISD::MUL: return "mul";
276 case ISD::MULHU: return "mulhu";
277 case ISD::MULHS: return "mulhs";
278 case ISD::AVGFLOORU: return "avgflooru";
279 case ISD::AVGFLOORS: return "avgfloors";
280 case ISD::AVGCEILU: return "avgceilu";
281 case ISD::AVGCEILS: return "avgceils";
282 case ISD::ABDS: return "abds";
283 case ISD::ABDU: return "abdu";
284 case ISD::SDIV: return "sdiv";
285 case ISD::UDIV: return "udiv";
286 case ISD::SREM: return "srem";
287 case ISD::UREM: return "urem";
288 case ISD::SMUL_LOHI: return "smul_lohi";
289 case ISD::UMUL_LOHI: return "umul_lohi";
290 case ISD::SDIVREM: return "sdivrem";
291 case ISD::UDIVREM: return "udivrem";
292 case ISD::AND: return "and";
293 case ISD::OR: return "or";
294 case ISD::XOR: return "xor";
295 case ISD::SHL: return "shl";
296 case ISD::SRA: return "sra";
297 case ISD::SRL: return "srl";
298 case ISD::ROTL: return "rotl";
299 case ISD::ROTR: return "rotr";
300 case ISD::FSHL: return "fshl";
301 case ISD::FSHR: return "fshr";
302 case ISD::CLMUL: return "clmul";
303 case ISD::CLMULR: return "clmulr";
304 case ISD::CLMULH: return "clmulh";
305 case ISD::FADD: return "fadd";
306 case ISD::STRICT_FADD: return "strict_fadd";
307 case ISD::FSUB: return "fsub";
308 case ISD::STRICT_FSUB: return "strict_fsub";
309 case ISD::FMUL: return "fmul";
310 case ISD::STRICT_FMUL: return "strict_fmul";
311 case ISD::FDIV: return "fdiv";
312 case ISD::STRICT_FDIV: return "strict_fdiv";
313 case ISD::FMA: return "fma";
314 case ISD::STRICT_FMA: return "strict_fma";
315 case ISD::FMAD: return "fmad";
316 case ISD::FMULADD: return "fmuladd";
317 case ISD::FREM: return "frem";
318 case ISD::STRICT_FREM: return "strict_frem";
319 case ISD::FCOPYSIGN: return "fcopysign";
320 case ISD::FGETSIGN: return "fgetsign";
321 case ISD::FCANONICALIZE: return "fcanonicalize";
322 case ISD::IS_FPCLASS: return "is_fpclass";
323 case ISD::FPOW: return "fpow";
324 case ISD::STRICT_FPOW: return "strict_fpow";
325 case ISD::SMIN: return "smin";
326 case ISD::SMAX: return "smax";
327 case ISD::UMIN: return "umin";
328 case ISD::UMAX: return "umax";
329 case ISD::SCMP: return "scmp";
330 case ISD::UCMP: return "ucmp";
331
332 case ISD::FLDEXP: return "fldexp";
333 case ISD::STRICT_FLDEXP: return "strict_fldexp";
334 case ISD::FFREXP: return "ffrexp";
335 case ISD::FPOWI: return "fpowi";
336 case ISD::STRICT_FPOWI: return "strict_fpowi";
337 case ISD::SETCC: return "setcc";
338 case ISD::SETCCCARRY: return "setcccarry";
339 case ISD::STRICT_FSETCC: return "strict_fsetcc";
340 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
341 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
342 case ISD::SELECT: return "select";
343 case ISD::VSELECT: return "vselect";
344 case ISD::SELECT_CC: return "select_cc";
345 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
346 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
347 case ISD::CONCAT_VECTORS: return "concat_vectors";
348 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
349 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
350 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
351 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
352 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
353 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
354 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
355 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
356 case ISD::SPLAT_VECTOR: return "splat_vector";
357 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
358 case ISD::VECTOR_REVERSE: return "vector_reverse";
359 case ISD::STEP_VECTOR: return "step_vector";
360 case ISD::CARRY_FALSE: return "carry_false";
361 case ISD::ADDC: return "addc";
362 case ISD::ADDE: return "adde";
363 case ISD::UADDO_CARRY: return "uaddo_carry";
364 case ISD::SADDO_CARRY: return "saddo_carry";
365 case ISD::SADDO: return "saddo";
366 case ISD::UADDO: return "uaddo";
367 case ISD::SSUBO: return "ssubo";
368 case ISD::USUBO: return "usubo";
369 case ISD::SMULO: return "smulo";
370 case ISD::UMULO: return "umulo";
371 case ISD::SUBC: return "subc";
372 case ISD::SUBE: return "sube";
373 case ISD::USUBO_CARRY: return "usubo_carry";
374 case ISD::SSUBO_CARRY: return "ssubo_carry";
375 case ISD::SHL_PARTS: return "shl_parts";
376 case ISD::SRA_PARTS: return "sra_parts";
377 case ISD::SRL_PARTS: return "srl_parts";
378
379 case ISD::SADDSAT: return "saddsat";
380 case ISD::UADDSAT: return "uaddsat";
381 case ISD::SSUBSAT: return "ssubsat";
382 case ISD::USUBSAT: return "usubsat";
383 case ISD::SSHLSAT: return "sshlsat";
384 case ISD::USHLSAT: return "ushlsat";
385
386 case ISD::SMULFIX: return "smulfix";
387 case ISD::SMULFIXSAT: return "smulfixsat";
388 case ISD::UMULFIX: return "umulfix";
389 case ISD::UMULFIXSAT: return "umulfixsat";
390
391 case ISD::SDIVFIX: return "sdivfix";
392 case ISD::SDIVFIXSAT: return "sdivfixsat";
393 case ISD::UDIVFIX: return "udivfix";
394 case ISD::UDIVFIXSAT: return "udivfixsat";
395
396 // Conversion operators.
397 case ISD::SIGN_EXTEND: return "sign_extend";
398 case ISD::ZERO_EXTEND: return "zero_extend";
399 case ISD::ANY_EXTEND: return "any_extend";
400 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
401 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
402 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
403 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
404 case ISD::TRUNCATE: return "truncate";
405 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
406 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
407 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
408 case ISD::FP_ROUND: return "fp_round";
409 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
410 case ISD::FP_EXTEND: return "fp_extend";
411 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
412
413 case ISD::SINT_TO_FP: return "sint_to_fp";
414 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
415 case ISD::UINT_TO_FP: return "uint_to_fp";
416 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
417 case ISD::FP_TO_SINT: return "fp_to_sint";
418 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
419 case ISD::FP_TO_UINT: return "fp_to_uint";
420 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
421 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
422 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
423 case ISD::BITCAST: return "bitcast";
424 case ISD::ADDRSPACECAST: return "addrspacecast";
425 case ISD::FP16_TO_FP: return "fp16_to_fp";
426 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
427 case ISD::FP_TO_FP16: return "fp_to_fp16";
428 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
429 case ISD::BF16_TO_FP: return "bf16_to_fp";
430 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
431 case ISD::FP_TO_BF16: return "fp_to_bf16";
432 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
433 case ISD::LROUND: return "lround";
434 case ISD::STRICT_LROUND: return "strict_lround";
435 case ISD::LLROUND: return "llround";
436 case ISD::STRICT_LLROUND: return "strict_llround";
437 case ISD::LRINT: return "lrint";
438 case ISD::STRICT_LRINT: return "strict_lrint";
439 case ISD::LLRINT: return "llrint";
440 case ISD::STRICT_LLRINT: return "strict_llrint";
441
442 // Control flow instructions
443 case ISD::BR: return "br";
444 case ISD::BRIND: return "brind";
445 case ISD::BR_JT: return "br_jt";
446 case ISD::BRCOND: return "brcond";
447 case ISD::BR_CC: return "br_cc";
448 case ISD::CALLSEQ_START: return "callseq_start";
449 case ISD::CALLSEQ_END: return "callseq_end";
450
451 // EH instructions
452 case ISD::CATCHRET: return "catchret";
453 case ISD::CLEANUPRET: return "cleanupret";
454
455 // Other operators
456 case ISD::LOAD: return "load";
457 case ISD::STORE: return "store";
458 case ISD::MLOAD: return "masked_load";
459 case ISD::MSTORE: return "masked_store";
460 case ISD::MGATHER: return "masked_gather";
461 case ISD::MSCATTER: return "masked_scatter";
462 case ISD::VECTOR_COMPRESS: return "vector_compress";
463 case ISD::VAARG: return "vaarg";
464 case ISD::VACOPY: return "vacopy";
465 case ISD::VAEND: return "vaend";
466 case ISD::VASTART: return "vastart";
467 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
468 case ISD::EXTRACT_ELEMENT: return "extract_element";
469 case ISD::BUILD_PAIR: return "build_pair";
470 case ISD::STACKSAVE: return "stacksave";
471 case ISD::STACKRESTORE: return "stackrestore";
472 case ISD::TRAP: return "trap";
473 case ISD::DEBUGTRAP: return "debugtrap";
474 case ISD::UBSANTRAP: return "ubsantrap";
475 case ISD::LIFETIME_START: return "lifetime.start";
476 case ISD::LIFETIME_END: return "lifetime.end";
477 case ISD::FAKE_USE:
478 return "fake_use";
479 case ISD::RELOC_NONE:
480 return "reloc_none";
481 case ISD::PSEUDO_PROBE:
482 return "pseudoprobe";
483 case ISD::GC_TRANSITION_START: return "gc_transition.start";
484 case ISD::GC_TRANSITION_END: return "gc_transition.end";
485 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
486 case ISD::FREEZE: return "freeze";
487 case ISD::PREALLOCATED_SETUP:
488 return "call_setup";
489 case ISD::PREALLOCATED_ARG:
490 return "call_alloc";
491
492 // Floating point environment manipulation
493 case ISD::GET_ROUNDING: return "get_rounding";
494 case ISD::SET_ROUNDING: return "set_rounding";
495 case ISD::GET_FPENV: return "get_fpenv";
496 case ISD::SET_FPENV: return "set_fpenv";
497 case ISD::RESET_FPENV: return "reset_fpenv";
498 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
499 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
500 case ISD::GET_FPMODE: return "get_fpmode";
501 case ISD::SET_FPMODE: return "set_fpmode";
502 case ISD::RESET_FPMODE: return "reset_fpmode";
503
504 // Convergence control instructions
505 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
506 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
507 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
508 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
509
510 // Bit manipulation
511 case ISD::ABS: return "abs";
512 case ISD::BITREVERSE: return "bitreverse";
513 case ISD::BSWAP: return "bswap";
514 case ISD::CTPOP: return "ctpop";
515 case ISD::CTTZ: return "cttz";
516 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
517 case ISD::CTLZ: return "ctlz";
518 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
519 case ISD::CTLS: return "ctls";
520 case ISD::PARITY: return "parity";
521
522 // Trampolines
523 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
524 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
525
526 // clang-format on
527
528 case ISD::CONDCODE:
529 switch (cast<CondCodeSDNode>(this)->get()) {
530 default: llvm_unreachable("Unknown setcc condition!");
531 case ISD::SETOEQ: return "setoeq";
532 case ISD::SETOGT: return "setogt";
533 case ISD::SETOGE: return "setoge";
534 case ISD::SETOLT: return "setolt";
535 case ISD::SETOLE: return "setole";
536 case ISD::SETONE: return "setone";
537
538 case ISD::SETO: return "seto";
539 case ISD::SETUO: return "setuo";
540 case ISD::SETUEQ: return "setueq";
541 case ISD::SETUGT: return "setugt";
542 case ISD::SETUGE: return "setuge";
543 case ISD::SETULT: return "setult";
544 case ISD::SETULE: return "setule";
545 case ISD::SETUNE: return "setune";
546
547 case ISD::SETEQ: return "seteq";
548 case ISD::SETGT: return "setgt";
549 case ISD::SETGE: return "setge";
550 case ISD::SETLT: return "setlt";
551 case ISD::SETLE: return "setle";
552 case ISD::SETNE: return "setne";
553
554 case ISD::SETTRUE: return "settrue";
555 case ISD::SETTRUE2: return "settrue2";
556 case ISD::SETFALSE: return "setfalse";
557 case ISD::SETFALSE2: return "setfalse2";
558 }
559 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
560 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
561 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
562 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
563 case ISD::VECREDUCE_ADD: return "vecreduce_add";
564 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
565 case ISD::VECREDUCE_AND: return "vecreduce_and";
566 case ISD::VECREDUCE_OR: return "vecreduce_or";
567 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
568 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
569 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
570 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
571 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
572 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
573 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
574 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
575 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
576 case ISD::STACKMAP:
577 return "stackmap";
578 case ISD::PATCHPOINT:
579 return "patchpoint";
580 case ISD::CLEAR_CACHE:
581 return "clear_cache";
582
583 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
584 return "histogram";
585
586 case ISD::VECTOR_FIND_LAST_ACTIVE:
587 return "find_last_active";
588
589 case ISD::GET_ACTIVE_LANE_MASK:
590 return "get_active_lane_mask";
591
592 case ISD::PARTIAL_REDUCE_UMLA:
593 return "partial_reduce_umla";
594 case ISD::PARTIAL_REDUCE_SMLA:
595 return "partial_reduce_smla";
596 case ISD::PARTIAL_REDUCE_SUMLA:
597 return "partial_reduce_sumla";
598 case ISD::PARTIAL_REDUCE_FMLA:
599 return "partial_reduce_fmla";
600 case ISD::LOOP_DEPENDENCE_WAR_MASK:
601 return "loop_dep_war";
602 case ISD::LOOP_DEPENDENCE_RAW_MASK:
603 return "loop_dep_raw";
604
605 // Vector Predication
606#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
607 case ISD::SDID: \
608 return #NAME;
609#include "llvm/IR/VPIntrinsics.def"
610 }
611}
612
613const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
614 switch (AM) {
615 default: return "";
616 case ISD::PRE_INC: return "<pre-inc>";
617 case ISD::PRE_DEC: return "<pre-dec>";
618 case ISD::POST_INC: return "<post-inc>";
619 case ISD::POST_DEC: return "<post-dec>";
620 }
621}
622
623static Printable PrintNodeId(const SDNode &Node) {
624 return Printable([&Node](raw_ostream &OS) {
625#ifndef NDEBUG
626 static const raw_ostream::Colors Color[] = {
627 raw_ostream::BLACK, raw_ostream::RED, raw_ostream::GREEN,
628 raw_ostream::YELLOW, raw_ostream::BLUE, raw_ostream::MAGENTA,
629 raw_ostream::CYAN,
630 };
631 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
632 OS << 't' << Node.PersistentId;
633 OS.resetColor();
634#else
635 OS << (const void*)&Node;
636#endif
637 });
638}
639
640// Print the MMO with more information from the SelectionDAG.
641static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
642 const MachineFunction *MF, const Module *M,
643 const MachineFrameInfo *MFI,
644 const TargetInstrInfo *TII, LLVMContext &Ctx) {
645 ModuleSlotTracker MST(M);
646 if (MF)
647 MST.incorporateFunction(MF->getFunction());
648 SmallVector<StringRef, 0> SSNs;
649 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
650}
651
652static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
653 const SelectionDAG *G) {
654 if (G) {
655 const MachineFunction *MF = &G->getMachineFunction();
656 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
657 &MF->getFrameInfo(),
658 G->getSubtarget().getInstrInfo(), *G->getContext());
659 }
660
661 LLVMContext Ctx;
662 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
663 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
664}
665
666#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
667LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
668
669LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
670 print(dbgs(), G);
671 dbgs() << '\n';
672}
673#endif
674
675void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
676 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
677 if (i) OS << ",";
678 if (getValueType(i) == MVT::Other)
679 OS << "ch";
680 else
681 OS << getValueType(i).getEVTString();
682 }
683}
684
685void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
686 if (getFlags().hasNoUnsignedWrap())
687 OS << " nuw";
688
689 if (getFlags().hasNoSignedWrap())
690 OS << " nsw";
691
692 if (getFlags().hasExact())
693 OS << " exact";
694
695 if (getFlags().hasDisjoint())
696 OS << " disjoint";
697
698 if (getFlags().hasSameSign())
699 OS << " samesign";
700
701 if (getFlags().hasInBounds())
702 OS << " inbounds";
703
704 if (getFlags().hasNonNeg())
705 OS << " nneg";
706
707 if (getFlags().hasNoNaNs())
708 OS << " nnan";
709
710 if (getFlags().hasNoInfs())
711 OS << " ninf";
712
713 if (getFlags().hasNoSignedZeros())
714 OS << " nsz";
715
716 if (getFlags().hasAllowReciprocal())
717 OS << " arcp";
718
719 if (getFlags().hasAllowContract())
720 OS << " contract";
721
722 if (getFlags().hasApproximateFuncs())
723 OS << " afn";
724
725 if (getFlags().hasAllowReassociation())
726 OS << " reassoc";
727
728 if (getFlags().hasNoFPExcept())
729 OS << " nofpexcept";
730
731 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
732 if (!MN->memoperands_empty()) {
733 OS << "<";
734 OS << "Mem:";
735 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
736 e = MN->memoperands_end(); i != e; ++i) {
737 printMemOperand(OS, **i, G);
738 if (std::next(i) != e)
739 OS << " ";
740 }
741 OS << ">";
742 }
743 } else if (const ShuffleVectorSDNode *SVN =
744 dyn_cast<ShuffleVectorSDNode>(this)) {
745 OS << "<";
746 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
747 int Idx = SVN->getMaskElt(i);
748 if (i) OS << ",";
749 if (Idx < 0)
750 OS << "u";
751 else
752 OS << Idx;
753 }
754 OS << ">";
755 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
756 OS << '<' << CSDN->getAPIntValue() << '>';
757 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
758 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
759 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
760 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
761 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
762 else {
763 OS << "<APFloat(";
764 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
765 OS << ")>";
766 }
767 } else if (const GlobalAddressSDNode *GADN =
768 dyn_cast<GlobalAddressSDNode>(this)) {
769 int64_t offset = GADN->getOffset();
770 OS << '<';
771 GADN->getGlobal()->printAsOperand(OS);
772 OS << '>';
773 if (offset > 0)
774 OS << " + " << offset;
775 else
776 OS << " " << offset;
777 if (unsigned int TF = GADN->getTargetFlags())
778 OS << " [TF=" << TF << ']';
779 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
780 OS << "<" << FIDN->getIndex() << ">";
781 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
782 OS << "<" << JTDN->getIndex() << ">";
783 if (unsigned int TF = JTDN->getTargetFlags())
784 OS << " [TF=" << TF << ']';
785 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
786 int offset = CP->getOffset();
787 if (CP->isMachineConstantPoolEntry())
788 OS << "<" << *CP->getMachineCPVal() << ">";
789 else
790 OS << "<" << *CP->getConstVal() << ">";
791 if (offset > 0)
792 OS << " + " << offset;
793 else
794 OS << " " << offset;
795 if (unsigned int TF = CP->getTargetFlags())
796 OS << " [TF=" << TF << ']';
797 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
798 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
799 if (unsigned TF = TI->getTargetFlags())
800 OS << " [TF=" << TF << ']';
801 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
802 OS << "<";
803 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
804 if (LBB)
805 OS << LBB->getName() << " ";
806 OS << (const void*)BBDN->getBasicBlock() << ">";
807 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
808 OS << ' ' << printReg(R->getReg(),
809 G ? G->getSubtarget().getRegisterInfo() : nullptr);
810 } else if (const ExternalSymbolSDNode *ES =
811 dyn_cast<ExternalSymbolSDNode>(this)) {
812 OS << "'" << ES->getSymbol() << "'";
813 if (unsigned int TF = ES->getTargetFlags())
814 OS << " [TF=" << TF << ']';
815 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
816 if (M->getValue())
817 OS << "<" << M->getValue() << ">";
818 else
819 OS << "<null>";
820 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
821 if (MD->getMD())
822 OS << "<" << MD->getMD() << ">";
823 else
824 OS << "<null>";
825 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
826 OS << ":" << N->getVT();
827 }
828 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
829 OS << "<";
830
831 printMemOperand(OS, *LD->getMemOperand(), G);
832
833 bool doExt = true;
834 switch (LD->getExtensionType()) {
835 default: doExt = false; break;
836 case ISD::EXTLOAD: OS << ", anyext"; break;
837 case ISD::SEXTLOAD: OS << ", sext"; break;
838 case ISD::ZEXTLOAD: OS << ", zext"; break;
839 }
840 if (doExt)
841 OS << " from " << LD->getMemoryVT();
842
843 const char *AM = getIndexedModeName(LD->getAddressingMode());
844 if (*AM)
845 OS << ", " << AM;
846
847 OS << ">";
848 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
849 OS << "<";
850 printMemOperand(OS, *ST->getMemOperand(), G);
851
852 if (ST->isTruncatingStore())
853 OS << ", trunc to " << ST->getMemoryVT();
854
855 const char *AM = getIndexedModeName(ST->getAddressingMode());
856 if (*AM)
857 OS << ", " << AM;
858
859 OS << ">";
860 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
861 OS << "<";
862
863 printMemOperand(OS, *MLd->getMemOperand(), G);
864
865 bool doExt = true;
866 switch (MLd->getExtensionType()) {
867 default: doExt = false; break;
868 case ISD::EXTLOAD: OS << ", anyext"; break;
869 case ISD::SEXTLOAD: OS << ", sext"; break;
870 case ISD::ZEXTLOAD: OS << ", zext"; break;
871 }
872 if (doExt)
873 OS << " from " << MLd->getMemoryVT();
874
875 const char *AM = getIndexedModeName(MLd->getAddressingMode());
876 if (*AM)
877 OS << ", " << AM;
878
879 if (MLd->isExpandingLoad())
880 OS << ", expanding";
881
882 OS << ">";
883 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
884 OS << "<";
885 printMemOperand(OS, *MSt->getMemOperand(), G);
886
887 if (MSt->isTruncatingStore())
888 OS << ", trunc to " << MSt->getMemoryVT();
889
890 const char *AM = getIndexedModeName(MSt->getAddressingMode());
891 if (*AM)
892 OS << ", " << AM;
893
894 if (MSt->isCompressingStore())
895 OS << ", compressing";
896
897 OS << ">";
898 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
899 OS << "<";
900 printMemOperand(OS, *MGather->getMemOperand(), G);
901
902 bool doExt = true;
903 switch (MGather->getExtensionType()) {
904 default: doExt = false; break;
905 case ISD::EXTLOAD: OS << ", anyext"; break;
906 case ISD::SEXTLOAD: OS << ", sext"; break;
907 case ISD::ZEXTLOAD: OS << ", zext"; break;
908 }
909 if (doExt)
910 OS << " from " << MGather->getMemoryVT();
911
912 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
913 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
914 OS << ", " << Signed << " " << Scaled << " offset";
915
916 OS << ">";
917 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
918 OS << "<";
919 printMemOperand(OS, *MScatter->getMemOperand(), G);
920
921 if (MScatter->isTruncatingStore())
922 OS << ", trunc to " << MScatter->getMemoryVT();
923
924 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
925 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
926 OS << ", " << Signed << " " << Scaled << " offset";
927
928 OS << ">";
929 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
930 OS << "<";
931 printMemOperand(OS, *M->getMemOperand(), G);
932 if (auto *A = dyn_cast<AtomicSDNode>(M))
933 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
934 bool doExt = true;
935 switch (A->getExtensionType()) {
936 default: doExt = false; break;
937 case ISD::EXTLOAD: OS << ", anyext"; break;
938 case ISD::SEXTLOAD: OS << ", sext"; break;
939 case ISD::ZEXTLOAD: OS << ", zext"; break;
940 }
941 if (doExt)
942 OS << " from " << A->getMemoryVT();
943 }
944 OS << ">";
945 } else if (const BlockAddressSDNode *BA =
946 dyn_cast<BlockAddressSDNode>(this)) {
947 int64_t offset = BA->getOffset();
948 OS << "<";
949 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
950 OS << ", ";
951 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
952 OS << ">";
953 if (offset > 0)
954 OS << " + " << offset;
955 else
956 OS << " " << offset;
957 if (unsigned int TF = BA->getTargetFlags())
958 OS << " [TF=" << TF << ']';
959 } else if (const AddrSpaceCastSDNode *ASC =
960 dyn_cast<AddrSpaceCastSDNode>(this)) {
961 OS << '['
962 << ASC->getSrcAddressSpace()
963 << " -> "
964 << ASC->getDestAddressSpace()
965 << ']';
966 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
967 OS << '<' << AA->getAlign().value() << '>';
968 }
969
970 if (VerboseDAGDumping) {
971 if (unsigned Order = getIROrder())
972 OS << " [ORD=" << Order << ']';
973
974 if (getNodeId() != -1)
975 OS << " [ID=" << getNodeId() << ']';
976 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
977 OS << " # D:" << isDivergent();
978
979 if (G && !G->GetDbgValues(this).empty()) {
980 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
981 for (SDDbgValue *Dbg : G->GetDbgValues(this))
982 if (!Dbg->isInvalidated())
983 Dbg->print(OS);
984 } else if (getHasDebugValue())
985 OS << " [NoOfDbgValues>0]";
986
987 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
988 OS << " [pcsections ";
989 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
990 OS << ']';
991 }
992
993 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
994 OS << " [mmra ";
995 MMRA->printAsOperand(OS,
996 G->getMachineFunction().getFunction().getParent());
997 OS << ']';
998 }
999 }
1000}
1001
1002LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
1003 OS << " DbgVal(Order=" << getOrder() << ')';
1004 if (isInvalidated())
1005 OS << "(Invalidated)";
1006 if (isEmitted())
1007 OS << "(Emitted)";
1008 OS << "(";
1009 bool Comma = false;
1010 for (const SDDbgOperand &Op : getLocationOps()) {
1011 if (Comma)
1012 OS << ", ";
1013 switch (Op.getKind()) {
1014 case SDDbgOperand::SDNODE:
1015 if (Op.getSDNode())
1016 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
1017 else
1018 OS << "SDNODE";
1019 break;
1020 case SDDbgOperand::CONST:
1021 OS << "CONST";
1022 break;
1023 case SDDbgOperand::FRAMEIX:
1024 OS << "FRAMEIX=" << Op.getFrameIx();
1025 break;
1026 case SDDbgOperand::VREG:
1027 OS << "VREG=" << printReg(Op.getVReg());
1028 break;
1029 }
1030 Comma = true;
1031 }
1032 OS << ")";
1033 if (isIndirect()) OS << "(Indirect)";
1034 if (isVariadic())
1035 OS << "(Variadic)";
1036 OS << ":\"" << Var->getName() << '"';
1037#ifndef NDEBUG
1038 if (Expr->getNumElements())
1039 Expr->dump();
1040#endif
1041}
1042
1043#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1044LLVM_DUMP_METHOD void SDDbgValue::dump() const {
1045 if (isInvalidated())
1046 return;
1047 print(dbgs());
1048 dbgs() << "\n";
1049}
1050#endif
1051
1052/// Return true if this node is so simple that we should just print it inline
1053/// if it appears as an operand.
1054static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1055 // Avoid lots of cluttering when inline printing nodes with associated
1056 // DbgValues in verbose mode.
1057 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
1058 return false;
1059 if (Node.getOpcode() == ISD::EntryToken)
1060 return false;
1061 return Node.getNumOperands() == 0;
1062}
1063
1064#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1065static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1066 for (const SDValue &Op : N->op_values()) {
1067 if (shouldPrintInline(*Op.getNode(), G))
1068 continue;
1069 if (Op.getNode()->hasOneUse())
1070 DumpNodes(Op.getNode(), indent+2, G);
1071 }
1072
1073 dbgs().indent(indent);
1074 N->dump(G);
1075}
1076
1077LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1078 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1079
1080 auto dumpEachNode = [this](const SDNode &N) {
1081 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1082 (!shouldPrintInline(N, this) || N.use_empty()))
1083 DumpNodes(&N, 2, this);
1084 };
1085
1086 if (Sorted) {
1087 SmallVector<const SDNode *> SortedNodes;
1088 SortedNodes.reserve(AllNodes.size());
1089 getTopologicallyOrderedNodes(SortedNodes);
1090 for (const SDNode *N : SortedNodes)
1091 dumpEachNode(*N);
1092 } else {
1093 for (const SDNode &N : allnodes())
1094 dumpEachNode(N);
1095 }
1096
1097 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1098 dbgs() << "\n";
1099
1100 if (VerboseDAGDumping) {
1101 if (DbgBegin() != DbgEnd())
1102 dbgs() << "SDDbgValues:\n";
1103 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1104 Dbg->dump();
1105 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
1106 dbgs() << "Byval SDDbgValues:\n";
1107 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1108 Dbg->dump();
1109 }
1110 dbgs() << "\n";
1111}
1112#endif
1113
1114void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1115 OS << PrintNodeId(*this) << ": ";
1116 print_types(OS, G);
1117 OS << " = " << getOperationName(G);
1118 print_details(OS, G);
1119}
1120
1121static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1122 const SDValue Value) {
1123 if (!Value.getNode()) {
1124 OS << "<null>";
1125 return false;
1126 }
1127
1128 if (shouldPrintInline(*Value.getNode(), G)) {
1129 OS << Value->getOperationName(G) << ':';
1130 Value->print_types(OS, G);
1131 Value->print_details(OS, G);
1132 return true;
1133 }
1134
1135 OS << PrintNodeId(*Value.getNode());
1136 if (unsigned RN = Value.getResNo())
1137 OS << ':' << RN;
1138 return false;
1139}
1140
1141#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1142using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
1143
1144static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1145 const SelectionDAG *G, VisitedSDNodeSet &once) {
1146 if (!once.insert(N).second) // If we've been here before, return now.
1147 return;
1148
1149 // Dump the current SDNode, but don't end the line yet.
1150 OS.indent(indent);
1151 N->printr(OS, G);
1152
1153 // Having printed this SDNode, walk the children:
1154 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1155 if (i) OS << ",";
1156 OS << " ";
1157
1158 const SDValue Op = N->getOperand(i);
1159 bool printedInline = printOperand(OS, G, Op);
1160 if (printedInline)
1161 once.insert(Op.getNode());
1162 }
1163
1164 OS << "\n";
1165
1166 // Dump children that have grandchildren on their own line(s).
1167 for (const SDValue &Op : N->op_values())
1168 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1169}
1170
1171LLVM_DUMP_METHOD void SDNode::dumpr() const {
1172 VisitedSDNodeSet once;
1173 DumpNodesr(dbgs(), this, 0, nullptr, once);
1174}
1175
1176LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1177 VisitedSDNodeSet once;
1178 DumpNodesr(dbgs(), this, 0, G, once);
1179}
1180#endif
1181
1182static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1183 const SelectionDAG *G, unsigned depth,
1184 unsigned indent) {
1185 if (depth == 0)
1186 return;
1187
1188 OS.indent(indent);
1189
1190 N->print(OS, G);
1191
1192 for (const SDValue &Op : N->op_values()) {
1193 // Don't follow chain operands.
1194 if (Op.getValueType() == MVT::Other)
1195 continue;
1196 // Don't print children that were fully rendered inline.
1197 if (shouldPrintInline(*Op.getNode(), G))
1198 continue;
1199 OS << '\n';
1200 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1201 }
1202}
1203
1204void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1205 unsigned depth) const {
1206 printrWithDepthHelper(OS, this, G, depth, 0);
1207}
1208
1209void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1210 // Don't print impossibly deep things.
1211 printrWithDepth(OS, G, 10);
1212}
1213
1214#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1215LLVM_DUMP_METHOD
1216void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1217 printrWithDepth(dbgs(), G, depth);
1218}
1219
1220LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1221 // Don't print impossibly deep things.
1222 dumprWithDepth(G, 10);
1223}
1224#endif
1225
1226void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1227 printr(OS, G);
1228 // Under VerboseDAGDumping divergence will be printed always.
1229 if (isDivergent() && !VerboseDAGDumping)
1230 OS << " # D:1";
1231 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1232 if (i) OS << ", "; else OS << " ";
1233 printOperand(OS, G, getOperand(i));
1234 }
1235 if (DebugLoc DL = getDebugLoc()) {
1236 OS << ", ";
1237 DL.print(OS);
1238 }
1239}
APFloat.h
This file declares a class to represent arbitrary precision floating point values and provide a varie...
APInt.h
This file implements a class to represent arbitrary precision integral constant values and operations...
Scaled
@ Scaled
Definition ARCInstrInfo.cpp:35
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition ARMSLSHardening.cpp:73
A
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition Compiler.h:638
Constants.h
This file contains the declarations for the subclasses of Constant, which represent the different fla...
TII
const HexagonInstrInfo * TII
Definition HexagonCopyToCombine.cpp:118
hasNoSignedWrap
static bool hasNoSignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:390
hasNoUnsignedWrap
static bool hasNoUnsignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:385
G
#define G(x, y, z)
Definition MD5.cpp:55
MachineConstantPool.h
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
PrintNodeId
static Printable PrintNodeId(const SDNode &Node)
Definition SelectionDAGDumper.cpp:623
VisitedSDNodeSet
SmallPtrSet< const SDNode *, 32 > VisitedSDNodeSet
Definition SelectionDAGDumper.cpp:1142
VerboseDAGDumping
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
printOperand
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Definition SelectionDAGDumper.cpp:1121
shouldPrintInline
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
Definition SelectionDAGDumper.cpp:1054
DumpNodesr
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
Definition SelectionDAGDumper.cpp:1144
printMemOperand
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
Definition SelectionDAGDumper.cpp:641
DumpNodes
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
Definition SelectionDAGDumper.cpp:1065
printrWithDepthHelper
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
Definition SelectionDAGDumper.cpp:1182
SmallPtrSet.h
This file defines the SmallPtrSet class.
StringExtras.h
This file contains some functions that are useful when dealing with strings.
TargetLowering.h
This file describes how to lower LLVM code to machine code.
llvm::APFloatBase::IEEEsingle
static const fltSemantics & IEEEsingle()
Definition APFloat.h:296
llvm::APFloatBase::IEEEdouble
static const fltSemantics & IEEEdouble()
Definition APFloat.h:297
llvm::DebugLoc
A debug info location.
Definition DebugLoc.h:123
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition GlobalValue.h:663
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
llvm::LoadSDNode
This class is used to represent ISD::LOAD nodes.
Definition SelectionDAGNodes.h:2574
llvm::MDNode
Metadata node.
Definition Metadata.h:1078
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition MachineFrameInfo.h:111
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition MachineFunction.h:778
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition MachineFunction.h:733
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition MachineMemOperand.h:130
llvm::MachineMemOperand::print
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
Definition MachineOperand.cpp:1170
llvm::MachineSDNode
An SDNode that represents everything that will be needed to construct a MachineInstr.
Definition SelectionDAGNodes.h:3184
llvm::MachineSDNode::mmo_iterator
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
Definition SelectionDAGNodes.h:3214
llvm::MaskedLoadSDNode
This class is used to represent an MLOAD node.
Definition SelectionDAGNodes.h:2881
llvm::MaskedStoreSDNode
This class is used to represent an MSTORE node.
Definition SelectionDAGNodes.h:2910
llvm::MemSDNode
This is an abstract virtual class for memory operations.
Definition SelectionDAGNodes.h:1408
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition ModuleSlotTracker.h:45
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition AsmWriter.cpp:991
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition Module.h:67
llvm::Printable
Simple wrapper around std::function<void(raw_ostream&)>.
Definition Printable.h:38
llvm::SDDbgOperand
Holds the information for a single machine location through SDISel; either an SDNode,...
Definition SDNodeDbgValue.h:32
llvm::SDDbgOperand::VREG
@ VREG
Value is a virtual register.
Definition SDNodeDbgValue.h:38
llvm::SDDbgOperand::FRAMEIX
@ FRAMEIX
Value is contents of a stack location.
Definition SDNodeDbgValue.h:37
llvm::SDDbgOperand::SDNODE
@ SDNODE
Value is the result of an expression.
Definition SDNodeDbgValue.h:35
llvm::SDDbgOperand::CONST
@ CONST
Value is a constant.
Definition SDNodeDbgValue.h:36
llvm::SDDbgValue
Holds the information from a dbg_value node through SDISel.
Definition SDNodeDbgValue.h:134
llvm::SDDbgValue::isEmitted
bool isEmitted() const
Definition SDNodeDbgValue.h:230
llvm::SDDbgValue::print
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
Definition SelectionDAGDumper.cpp:1002
llvm::SDDbgValue::getOrder
unsigned getOrder() const
Returns the SDNodeOrder.
Definition SDNodeDbgValue.h:219
llvm::SDDbgValue::dump
LLVM_DUMP_METHOD void dump() const
Definition SelectionDAGDumper.cpp:1044
llvm::SDDbgValue::isInvalidated
bool isInvalidated() const
Definition SDNodeDbgValue.h:225
llvm::SDDbgValue::getLocationOps
ArrayRef< SDDbgOperand > getLocationOps() const
Definition SDNodeDbgValue.h:186
llvm::SDDbgValue::isIndirect
bool isIndirect() const
Returns whether this is an indirect value.
Definition SDNodeDbgValue.h:210
llvm::SDDbgValue::isVariadic
bool isVariadic() const
Definition SDNodeDbgValue.h:212
llvm::SDNode
Represents one node in the SelectionDAG.
Definition SelectionDAGNodes.h:512
llvm::SDNode::isMachineOpcode
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
Definition SelectionDAGNodes.h:756
llvm::SDNode::dumprFull
LLVM_ABI void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
Definition SelectionDAGDumper.cpp:1220
llvm::SDNode::getNodeId
int getNodeId() const
Return the unique node id.
Definition SelectionDAGNodes.h:782
llvm::SDNode::dump
LLVM_ABI void dump() const
Dump this node, for debugging.
Definition SelectionDAGDumper.cpp:667
llvm::SDNode::getOpcode
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
Definition SelectionDAGNodes.h:703
llvm::SDNode::isDivergent
bool isDivergent() const
Definition SelectionDAGNodes.h:769
llvm::SDNode::getIndexedModeName
static LLVM_ABI const char * getIndexedModeName(ISD::MemIndexedMode AM)
Definition SelectionDAGDumper.cpp:613
llvm::SDNode::getIROrder
unsigned getIROrder() const
Return the node ordering.
Definition SelectionDAGNodes.h:794
llvm::SDNode::getHasDebugValue
bool getHasDebugValue() const
Definition SelectionDAGNodes.h:766
llvm::SDNode::dumpr
LLVM_ABI void dumpr() const
Dump (recursively) this node and its use-def subgraph.
Definition SelectionDAGDumper.cpp:1171
llvm::SDNode::getFlags
SDNodeFlags getFlags() const
Definition SelectionDAGNodes.h:1096
llvm::SDNode::getOperationName
LLVM_ABI std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
Definition SelectionDAGDumper.cpp:58
llvm::SDNode::printrFull
LLVM_ABI void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
Definition SelectionDAGDumper.cpp:1209
llvm::SDNode::SelectionDAG
friend class SelectionDAG
Definition SelectionDAGNodes.h:653
llvm::SDNode::printr
LLVM_ABI void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1114
llvm::SDNode::getAsZExtVal
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
Definition SelectionDAGNodes.h:1794
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition SelectionDAGNodes.h:1112
llvm::SDNode::getNumOperands
unsigned getNumOperands() const
Return the number of values used by this operation.
Definition SelectionDAGNodes.h:1024
llvm::SDNode::getMachineOpcode
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
Definition SelectionDAGNodes.h:761
llvm::SDNode::getOperand
const SDValue & getOperand(unsigned Num) const
Definition SelectionDAGNodes.h:1045
llvm::SDNode::print
LLVM_ABI void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1226
llvm::SDNode::getDebugLoc
const DebugLoc & getDebugLoc() const
Return the source location info.
Definition SelectionDAGNodes.h:800
llvm::SDNode::printrWithDepth
LLVM_ABI void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
Definition SelectionDAGDumper.cpp:1204
llvm::SDNode::dumprWithDepth
LLVM_ABI void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
Definition SelectionDAGDumper.cpp:1216
llvm::SDNode::getValueType
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Definition SelectionDAGNodes.h:1115
llvm::SDNode::print_details
LLVM_ABI void print_details(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:685
llvm::SDNode::print_types
LLVM_ABI void print_types(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:675
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition SelectionDAGNodes.h:147
llvm::SelectionDAGTargetInfo
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
Definition SelectionDAGTargetInfo.h:33
llvm::SelectionDAGTargetInfo::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
Returns the name of the given target-specific opcode, suitable for debug printing.
Definition SelectionDAGTargetInfo.h:42
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition SelectionDAG.h:229
llvm::SelectionDAG::getRoot
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
Definition SelectionDAG.h:578
llvm::SelectionDAG::ByvalParmDbgEnd
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
Definition SelectionDAG.h:2014
llvm::SelectionDAG::ByvalParmDbgBegin
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
Definition SelectionDAG.h:2011
llvm::SelectionDAG::dump
LLVM_ABI void dump(bool Sorted=false) const
Dump the textual format of this DAG.
Definition SelectionDAGDumper.cpp:1077
llvm::SelectionDAG::DbgEnd
SDDbgInfo::DbgIterator DbgEnd() const
Definition SelectionDAG.h:2009
llvm::SelectionDAG::DbgBegin
SDDbgInfo::DbgIterator DbgBegin() const
Definition SelectionDAG.h:2008
llvm::SelectionDAG::allnodes
iterator_range< allnodes_iterator > allnodes()
Definition SelectionDAG.h:570
llvm::SelectionDAG::getNode
LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition SelectionDAG.cpp:10918
llvm::SelectionDAG::getTopologicallyOrderedNodes
LLVM_ABI void getTopologicallyOrderedNodes(SmallVectorImpl< const SDNode * > &SortedNodes) const
Get all the nodes in their topological order without modifying any states.
Definition SelectionDAG.cpp:12731
llvm::ShuffleVectorSDNode
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
Definition SelectionDAGNodes.h:1691
llvm::SmallPtrSetImpl::insert
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition SmallPtrSet.h:389
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition SmallPtrSet.h:527
llvm::SmallVectorImpl::reserve
void reserve(size_type N)
Definition SmallVector.h:664
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition SmallVector.h:1203
llvm::SrcValueSDNode
An SDNode that holds an arbitrary LLVM IR Value.
Definition SelectionDAGNodes.h:2355
llvm::StoreSDNode
This class is used to represent ISD::STORE nodes.
Definition SelectionDAGNodes.h:2602
llvm::StringRef::str
std::string str() const
str - Get the contents as an std::string.
Definition StringRef.h:225
llvm::TargetIndexSDNode
Completely target-dependent object reference.
Definition SelectionDAGNodes.h:2173
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition TargetInstrInfo.h:114
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition TargetLowering.h:3983
llvm::TargetLowering::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
Definition TargetLowering.cpp:51
llvm::VTSDNode
This class is used to represent EVT's, which are used to parameterize some operations.
Definition SelectionDAGNodes.h:2523
llvm::Value
LLVM Value Representation.
Definition Value.h:75
llvm::Value::getName
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
Definition Value.cpp:322
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
llvm::raw_ostream::Colors
Colors
Definition raw_ostream.h:94
llvm::raw_ostream::changeColor
virtual raw_ostream & changeColor(enum Colors Color, bool Bold=false, bool BG=false)
Changes the foreground color of text that will be output from this point forward.
Definition raw_ostream.cpp:510
llvm::raw_ostream::resetColor
virtual raw_ostream & resetColor()
Resets the colors to terminal defaults.
Definition raw_ostream.cpp:523
llvm::raw_ostream::BLACK
static constexpr Colors BLACK
Definition raw_ostream.h:115
llvm::raw_ostream::GREEN
static constexpr Colors GREEN
Definition raw_ostream.h:117
llvm::raw_ostream::indent
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
Definition raw_ostream.cpp:485
llvm::raw_ostream::BLUE
static constexpr Colors BLUE
Definition raw_ostream.h:119
llvm::raw_ostream::RED
static constexpr Colors RED
Definition raw_ostream.h:116
llvm::raw_ostream::MAGENTA
static constexpr Colors MAGENTA
Definition raw_ostream.h:120
llvm::raw_ostream::YELLOW
static constexpr Colors YELLOW
Definition raw_ostream.h:118
llvm::raw_ostream::CYAN
static constexpr Colors CYAN
Definition raw_ostream.h:121
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition ErrorHandling.h:164
llvm::AA
Abstract Attribute helper functions.
Definition Attributor.h:165
llvm::ISD::SETCC
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:813
llvm::ISD::MERGE_VALUES
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:256
llvm::ISD::STACKRESTORE
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
Definition ISDOpcodes.h:1248
llvm::ISD::STACKSAVE
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition ISDOpcodes.h:1244
llvm::ISD::CTLZ_ZERO_UNDEF
@ CTLZ_ZERO_UNDEF
Definition ISDOpcodes.h:782
llvm::ISD::TargetConstantPool
@ TargetConstantPool
Definition ISDOpcodes.h:184
llvm::ISD::CONVERGENCECTRL_ANCHOR
@ CONVERGENCECTRL_ANCHOR
The llvm.experimental.convergence.* intrinsics.
Definition ISDOpcodes.h:1551
llvm::ISD::MDNODE_SDNODE
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
Definition ISDOpcodes.h:1293
llvm::ISD::STRICT_FSETCC
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:506
llvm::ISD::PTRADD
@ PTRADD
PTRADD represents pointer arithmetic semantics, for targets that opt in using shouldPreservePtrArith(...
Definition ISDOpcodes.h:1541
llvm::ISD::DELETED_NODE
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:45
llvm::ISD::POISON
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:231
llvm::ISD::SET_FPENV
@ SET_FPENV
Sets the current floating-point environment.
Definition ISDOpcodes.h:1120
llvm::ISD::PARTIAL_REDUCE_SMLA
@ PARTIAL_REDUCE_SMLA
PARTIAL_REDUCE_[U|S]MLA(Accumulator, Input1, Input2) The partial reduction nodes sign or zero extend ...
Definition ISDOpcodes.h:1522
llvm::ISD::LOOP_DEPENDENCE_RAW_MASK
@ LOOP_DEPENDENCE_RAW_MASK
Definition ISDOpcodes.h:1594
llvm::ISD::VECREDUCE_SEQ_FADD
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
Definition ISDOpcodes.h:1470
llvm::ISD::MLOAD
@ MLOAD
Masked load and store - consecutive vector load and store operations with additional mask operand tha...
Definition ISDOpcodes.h:1413
llvm::ISD::EH_SJLJ_LONGJMP
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:163
llvm::ISD::FGETSIGN
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:533
llvm::ISD::SMUL_LOHI
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:270
llvm::ISD::INSERT_SUBVECTOR
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:595
llvm::ISD::JUMP_TABLE_DEBUG_INFO
@ JUMP_TABLE_DEBUG_INFO
JUMP_TABLE_DEBUG_INFO - Jumptable debug info.
Definition ISDOpcodes.h:1182
llvm::ISD::BSWAP
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:773
llvm::ISD::SMULFIX
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:389
llvm::ISD::VAEND
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
Definition ISDOpcodes.h:1277
llvm::ISD::TargetBlockAddress
@ TargetBlockAddress
Definition ISDOpcodes.h:186
llvm::ISD::ATOMIC_STORE
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, val, ptr) This corresponds to "store atomic" instruction.
Definition ISDOpcodes.h:1363
llvm::ISD::ADDC
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:289
llvm::ISD::FRAME_TO_ARGS_OFFSET
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:140
llvm::ISD::RESET_FPENV
@ RESET_FPENV
Set floating-point environment to default state.
Definition ISDOpcodes.h:1124
llvm::ISD::FMAD
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:517
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:259
llvm::ISD::LOAD
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition ISDOpcodes.h:1153
llvm::ISD::SMULFIXSAT
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:395
llvm::ISD::SET_FPMODE
@ SET_FPMODE
Sets the current dynamic floating-point control modes.
Definition ISDOpcodes.h:1143
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:847
llvm::ISD::ATOMIC_LOAD_USUB_COND
@ ATOMIC_LOAD_USUB_COND
Definition ISDOpcodes.h:1404
llvm::ISD::FMA
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:513
llvm::ISD::VECTOR_FIND_LAST_ACTIVE
@ VECTOR_FIND_LAST_ACTIVE
Finds the index of the last active mask element Operands: Mask.
Definition ISDOpcodes.h:1566
llvm::ISD::FMODF
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
Definition ISDOpcodes.h:1110
llvm::ISD::FATAN2
@ FATAN2
FATAN2 - atan2, inspired by libm.
Definition ISDOpcodes.h:1032
llvm::ISD::FSINCOSPI
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
Definition ISDOpcodes.h:1106
llvm::ISD::INTRINSIC_VOID
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:215
llvm::ISD::EH_SJLJ_SETUP_DISPATCH
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:167
llvm::ISD::GlobalAddress
@ GlobalAddress
Definition ISDOpcodes.h:88
llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition ISDOpcodes.h:1376
llvm::ISD::STRICT_FMINIMUM
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:466
llvm::ISD::SINT_TO_FP
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:874
llvm::ISD::CONCAT_VECTORS
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:579
llvm::ISD::VECREDUCE_FMAX
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition ISDOpcodes.h:1488
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:412
llvm::ISD::VECREDUCE_FMAXIMUM
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
Definition ISDOpcodes.h:1492
llvm::ISD::ABS
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:741
llvm::ISD::MEMBARRIER
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
Definition ISDOpcodes.h:1350
llvm::ISD::ATOMIC_FENCE
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition ISDOpcodes.h:1355
llvm::ISD::RESET_FPMODE
@ RESET_FPMODE
Sets default dynamic floating-point control modes.
Definition ISDOpcodes.h:1147
llvm::ISD::SIGN_EXTEND_VECTOR_INREG
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:904
llvm::ISD::SDIVREM
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:275
llvm::ISD::FP16_TO_FP
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition ISDOpcodes.h:997
llvm::ISD::FMULADD
@ FMULADD
FMULADD - Performs a * b + c, with, or without, intermediate rounding.
Definition ISDOpcodes.h:523
llvm::ISD::FPTRUNC_ROUND
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:510
llvm::ISD::FAKE_USE
@ FAKE_USE
FAKE_USE represents a use of the operand but does not do anything.
Definition ISDOpcodes.h:1436
llvm::ISD::BITCAST
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition ISDOpcodes.h:987
llvm::ISD::BUILD_PAIR
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:249
llvm::ISD::CLMUL
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:768
llvm::ISD::INIT_TRAMPOLINE
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition ISDOpcodes.h:1321
llvm::ISD::FLDEXP
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
Definition ISDOpcodes.h:1030
llvm::ISD::SDIVFIX
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:402
llvm::ISD::STRICT_FSQRT
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:433
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition ISDOpcodes.h:1607
llvm::ISD::GlobalTLSAddress
@ GlobalTLSAddress
Definition ISDOpcodes.h:89
llvm::ISD::SRCVALUE
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition ISDOpcodes.h:1289
llvm::ISD::EH_LABEL
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition ISDOpcodes.h:1224
llvm::ISD::ATOMIC_LOAD_USUB_SAT
@ ATOMIC_LOAD_USUB_SAT
Definition ISDOpcodes.h:1405
llvm::ISD::EH_RETURN
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:151
llvm::ISD::ANNOTATION_LABEL
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
Definition ISDOpcodes.h:1230
llvm::ISD::SET_ROUNDING
@ SET_ROUNDING
Set rounding mode.
Definition ISDOpcodes.h:969
llvm::ISD::CONVERGENCECTRL_GLUE
@ CONVERGENCECTRL_GLUE
This does not correspond to any convergence control intrinsic.
Definition ISDOpcodes.h:1557
llvm::ISD::PARTIAL_REDUCE_UMLA
@ PARTIAL_REDUCE_UMLA
Definition ISDOpcodes.h:1523
llvm::ISD::SIGN_EXTEND
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:838
llvm::ISD::AVGCEILS
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:709
llvm::ISD::STRICT_UINT_TO_FP
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:480
llvm::ISD::SCALAR_TO_VECTOR
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:659
llvm::ISD::PREALLOCATED_SETUP
@ PREALLOCATED_SETUP
PREALLOCATED_SETUP - This has 2 operands: an input chain and a SRCVALUE with the preallocated call Va...
Definition ISDOpcodes.h:1282
llvm::ISD::READSTEADYCOUNTER
@ READSTEADYCOUNTER
READSTEADYCOUNTER - This corresponds to the readfixedcounter intrinsic.
Definition ISDOpcodes.h:1310
llvm::ISD::ADDROFRETURNADDR
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:117
llvm::ISD::TargetExternalSymbol
@ TargetExternalSymbol
Definition ISDOpcodes.h:185
llvm::ISD::CONVERGENCECTRL_ENTRY
@ CONVERGENCECTRL_ENTRY
Definition ISDOpcodes.h:1552
llvm::ISD::BR
@ BR
Control flow instructions. These all have token chains.
Definition ISDOpcodes.h:1169
llvm::ISD::VECREDUCE_FADD
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
Definition ISDOpcodes.h:1485
llvm::ISD::CTTZ_ZERO_UNDEF
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition ISDOpcodes.h:781
llvm::ISD::TargetJumpTable
@ TargetJumpTable
Definition ISDOpcodes.h:183
llvm::ISD::TargetIndex
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:193
llvm::ISD::PARTIAL_REDUCE_FMLA
@ PARTIAL_REDUCE_FMLA
Definition ISDOpcodes.h:1525
llvm::ISD::PREFETCH
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
Definition ISDOpcodes.h:1343
llvm::ISD::TRUNCATE_SSAT_U
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:867
llvm::ISD::FSINCOS
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
Definition ISDOpcodes.h:1102
llvm::ISD::SETCCCARRY
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:821
llvm::ISD::FNEG
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition ISDOpcodes.h:1014
llvm::ISD::BR_CC
@ BR_CC
BR_CC - Conditional branch.
Definition ISDOpcodes.h:1199
llvm::ISD::SSUBO
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:347
llvm::ISD::PREALLOCATED_ARG
@ PREALLOCATED_ARG
PREALLOCATED_ARG - This has 3 operands: an input chain, a SRCVALUE with the preallocated call Value,...
Definition ISDOpcodes.h:1285
llvm::ISD::BRIND
@ BRIND
BRIND - Indirect branch.
Definition ISDOpcodes.h:1174
llvm::ISD::BR_JT
@ BR_JT
BR_JT - Jumptable branch.
Definition ISDOpcodes.h:1178
llvm::ISD::GC_TRANSITION_START
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition ISDOpcodes.h:1444
llvm::ISD::VECTOR_INTERLEAVE
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:630
llvm::ISD::STEP_VECTOR
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:685
llvm::ISD::FCANONICALIZE
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:536
llvm::ISD::IS_FPCLASS
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:543
llvm::ISD::SSUBSAT
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:369
llvm::ISD::SELECT
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:790
llvm::ISD::ATOMIC_LOAD
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition ISDOpcodes.h:1359
llvm::ISD::UNDEF
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:228
llvm::ISD::EXTRACT_ELEMENT
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:242
llvm::ISD::SPLAT_VECTOR
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:666
llvm::ISD::AssertAlign
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:69
llvm::ISD::VACOPY
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
Definition ISDOpcodes.h:1273
llvm::ISD::GET_ACTIVE_LANE_MASK
@ GET_ACTIVE_LANE_MASK
GET_ACTIVE_LANE_MASK - this corrosponds to the llvm.get.active.lane.mask intrinsic.
Definition ISDOpcodes.h:1575
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:81
llvm::ISD::CopyFromReg
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:225
llvm::ISD::SADDO
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:343
llvm::ISD::TargetGlobalAddress
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:180
llvm::ISD::CTLS
@ CTLS
Count leading redundant sign bits.
Definition ISDOpcodes.h:786
llvm::ISD::VECREDUCE_ADD
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
Definition ISDOpcodes.h:1497
llvm::ISD::GET_ROUNDING
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:964
llvm::ISD::STRICT_FP_TO_FP16
@ STRICT_FP_TO_FP16
Definition ISDOpcodes.h:1000
llvm::ISD::MULHU
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:698
llvm::ISD::CLEANUPRET
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition ISDOpcodes.h:1239
llvm::ISD::ATOMIC_LOAD_FMAXIMUM
@ ATOMIC_LOAD_FMAXIMUM
Definition ISDOpcodes.h:1400
llvm::ISD::GET_FPMODE
@ GET_FPMODE
Reads the current dynamic floating-point control modes.
Definition ISDOpcodes.h:1138
llvm::ISD::STRICT_FP16_TO_FP
@ STRICT_FP16_TO_FP
Definition ISDOpcodes.h:999
llvm::ISD::GET_FPENV
@ GET_FPENV
Gets the current floating-point environment.
Definition ISDOpcodes.h:1115
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:759
llvm::ISD::AssertNoFPClass
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:78
llvm::ISD::VECTOR_SHUFFLE
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:644
llvm::ISD::PtrAuthGlobalAddress
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:100
llvm::ISD::EXTRACT_SUBVECTOR
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:609
llvm::ISD::FMINNUM_IEEE
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
Definition ISDOpcodes.h:1087
llvm::ISD::STRICT_FMAXIMUM
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:465
llvm::ISD::EntryToken
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:48
llvm::ISD::READ_REGISTER
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:134
llvm::ISD::EXTRACT_VECTOR_ELT
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:571
llvm::ISD::CopyToReg
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:219
llvm::ISD::ZERO_EXTEND
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:844
llvm::ISD::TargetConstantFP
@ TargetConstantFP
Definition ISDOpcodes.h:175
llvm::ISD::DEBUGTRAP
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition ISDOpcodes.h:1333
llvm::ISD::SELECT_CC
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:805
llvm::ISD::VSCALE
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
Definition ISDOpcodes.h:1460
llvm::ISD::ATOMIC_CMP_SWAP
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
Definition ISDOpcodes.h:1370
llvm::ISD::LOCAL_RECOVER
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:130
llvm::ISD::FMINNUM
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
Definition ISDOpcodes.h:1071
llvm::ISD::UBSANTRAP
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
Definition ISDOpcodes.h:1337
llvm::ISD::SSHLSAT
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:381
llvm::ISD::PATCHPOINT
@ PATCHPOINT
The llvm.experimental.patchpoint.
Definition ISDOpcodes.h:1536
llvm::ISD::SMULO
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:351
llvm::ISD::ATOMIC_LOAD_FMINIMUM
@ ATOMIC_LOAD_FMINIMUM
Definition ISDOpcodes.h:1401
llvm::ISD::DYNAMIC_STACKALLOC
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
Definition ISDOpcodes.h:1163
llvm::ISD::TargetFrameIndex
@ TargetFrameIndex
Definition ISDOpcodes.h:182
llvm::ISD::VECTOR_SPLICE_LEFT
@ VECTOR_SPLICE_LEFT
VECTOR_SPLICE_LEFT(VEC1, VEC2, IMM) - Shifts CONCAT_VECTORS(VEC1, VEC2) left by IMM elements and retu...
Definition ISDOpcodes.h:648
llvm::ISD::ANY_EXTEND_VECTOR_INREG
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:893
llvm::ISD::SIGN_EXTEND_INREG
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:882
llvm::ISD::SMIN
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:721
llvm::ISD::VECTOR_REVERSE
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:635
llvm::ISD::LIFETIME_START
@ LIFETIME_START
This corresponds to the llvm.lifetime.
Definition ISDOpcodes.h:1430
llvm::ISD::SDIVFIXSAT
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:408
llvm::ISD::FP_EXTEND
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:972
llvm::ISD::GLOBAL_OFFSET_TABLE
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:103
llvm::ISD::VSELECT
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:799
llvm::ISD::UADDO_CARRY
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:323
llvm::ISD::STRICT_SINT_TO_FP
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:479
llvm::ISD::MGATHER
@ MGATHER
Masked gather and scatter - load and store operations for a vector of random addresses with additiona...
Definition ISDOpcodes.h:1425
llvm::ISD::HANDLENODE
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
Definition ISDOpcodes.h:1313
llvm::ISD::STRICT_BF16_TO_FP
@ STRICT_BF16_TO_FP
Definition ISDOpcodes.h:1008
llvm::ISD::PCMARKER
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition ISDOpcodes.h:1296
llvm::ISD::STRICT_FROUNDEVEN
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:459
llvm::ISD::INLINEASM_BR
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
Definition ISDOpcodes.h:1219
llvm::ISD::EH_DWARF_CFA
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:145
llvm::ISD::BF16_TO_FP
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
Definition ISDOpcodes.h:1006
llvm::ISD::FRAMEADDR
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:110
llvm::ISD::ATOMIC_LOAD_UDEC_WRAP
@ ATOMIC_LOAD_UDEC_WRAP
Definition ISDOpcodes.h:1403
llvm::ISD::STRICT_FP_TO_UINT
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:473
llvm::ISD::STRICT_FP_ROUND
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:495
llvm::ISD::STRICT_FP_TO_SINT
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:472
llvm::ISD::FMINIMUM
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
Definition ISDOpcodes.h:1093
llvm::ISD::FP_TO_SINT
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:920
llvm::ISD::READCYCLECOUNTER
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition ISDOpcodes.h:1304
llvm::ISD::TargetConstant
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:174
llvm::ISD::STRICT_FP_EXTEND
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:500
llvm::ISD::RELOC_NONE
@ RELOC_NONE
Issue a no-op relocation against a given symbol at the current location.
Definition ISDOpcodes.h:1548
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:733
llvm::ISD::TRAP
@ TRAP
TRAP - Trapping instruction.
Definition ISDOpcodes.h:1330
llvm::ISD::INTRINSIC_WO_CHAIN
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:200
llvm::ISD::GET_FPENV_MEM
@ GET_FPENV_MEM
Gets the current floating-point environment.
Definition ISDOpcodes.h:1129
llvm::ISD::PSEUDO_PROBE
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
Definition ISDOpcodes.h:1455
llvm::ISD::STRICT_FP_TO_BF16
@ STRICT_FP_TO_BF16
Definition ISDOpcodes.h:1009
llvm::ISD::SCMP
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:729
llvm::ISD::CARRY_FALSE
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:280
llvm::ISD::AVGFLOORS
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:704
llvm::ISD::VECTOR_SPLICE_RIGHT
@ VECTOR_SPLICE_RIGHT
VECTOR_SPLICE_RIGHT(VEC1, VEC2, IMM) - Shifts CONCAT_VECTORS(VEC1, VEC2) right by IMM elements and re...
Definition ISDOpcodes.h:651
llvm::ISD::ADDE
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:299
llvm::ISD::STRICT_FADD
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:422
llvm::ISD::STACKMAP
@ STACKMAP
The llvm.experimental.stackmap intrinsic.
Definition ISDOpcodes.h:1530
llvm::ISD::SPLAT_VECTOR_PARTS
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:675
llvm::ISD::FREEZE
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:236
llvm::ISD::INSERT_VECTOR_ELT
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:560
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:53
llvm::ISD::ATOMIC_SWAP
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
Definition ISDOpcodes.h:1384
llvm::ISD::ExternalSymbol
@ ExternalSymbol
Definition ISDOpcodes.h:93
llvm::ISD::FFREXP
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
Definition ISDOpcodes.h:1037
llvm::ISD::FP_ROUND
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:953
llvm::ISD::VECTOR_COMPRESS
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:693
llvm::ISD::SPONENTRY
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:122
llvm::ISD::CLEAR_CACHE
@ CLEAR_CACHE
llvm.clear_cache intrinsic Operands: Input Chain, Start Addres, End Address Outputs: Output Chain
Definition ISDOpcodes.h:1599
llvm::ISD::CONVERGENCECTRL_LOOP
@ CONVERGENCECTRL_LOOP
Definition ISDOpcodes.h:1553
llvm::ISD::ZERO_EXTEND_VECTOR_INREG
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:915
llvm::ISD::ADDRSPACECAST
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition ISDOpcodes.h:991
llvm::ISD::EXPERIMENTAL_VECTOR_HISTOGRAM
@ EXPERIMENTAL_VECTOR_HISTOGRAM
Experimental vector histogram intrinsic Operands: Input Chain, Inc, Mask, Base, Index,...
Definition ISDOpcodes.h:1562
llvm::ISD::INLINEASM
@ INLINEASM
INLINEASM - Represents an inline asm block.
Definition ISDOpcodes.h:1216
llvm::ISD::STRICT_FNEARBYINT
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:453
llvm::ISD::FP_TO_SINT_SAT
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:939
llvm::ISD::VECREDUCE_FMINIMUM
@ VECREDUCE_FMINIMUM
Definition ISDOpcodes.h:1493
llvm::ISD::EH_SJLJ_SETJMP
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:157
llvm::ISD::TRUNCATE
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:850
llvm::ISD::VAARG
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition ISDOpcodes.h:1268
llvm::ISD::BRCOND
@ BRCOND
BRCOND - Conditional branch.
Definition ISDOpcodes.h:1192
llvm::ISD::VECREDUCE_SEQ_FMUL
@ VECREDUCE_SEQ_FMUL
Definition ISDOpcodes.h:1471
llvm::ISD::SHL_PARTS
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:827
llvm::ISD::CATCHRET
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
Definition ISDOpcodes.h:1235
llvm::ISD::GC_TRANSITION_END
@ GC_TRANSITION_END
Definition ISDOpcodes.h:1445
llvm::ISD::AssertSext
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:62
llvm::ISD::ATOMIC_LOAD_UINC_WRAP
@ ATOMIC_LOAD_UINC_WRAP
Definition ISDOpcodes.h:1402
llvm::ISD::FCOPYSIGN
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:529
llvm::ISD::PARTIAL_REDUCE_SUMLA
@ PARTIAL_REDUCE_SUMLA
Definition ISDOpcodes.h:1524
llvm::ISD::SADDSAT
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:360
llvm::ISD::CALLSEQ_START
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
Definition ISDOpcodes.h:1262
llvm::ISD::VECTOR_DEINTERLEAVE
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:619
llvm::ISD::GET_DYNAMIC_AREA_OFFSET
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
Definition ISDOpcodes.h:1451
llvm::ISD::SET_FPENV_MEM
@ SET_FPENV_MEM
Sets the current floating point environment.
Definition ISDOpcodes.h:1134
llvm::ISD::FMINIMUMNUM
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
Definition ISDOpcodes.h:1098
llvm::ISD::TRUNCATE_SSAT_S
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:865
llvm::ISD::ABDS
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:716
llvm::ISD::ADJUST_TRAMPOLINE
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition ISDOpcodes.h:1327
llvm::ISD::TRUNCATE_USAT_U
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:869
llvm::ISD::SADDO_CARRY
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:333
llvm::ISD::INTRINSIC_W_CHAIN
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:208
llvm::ISD::TargetGlobalTLSAddress
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:181
llvm::ISD::BUILD_VECTOR
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:551
llvm::ISD::LOOP_DEPENDENCE_WAR_MASK
@ LOOP_DEPENDENCE_WAR_MASK
The llvm.loop.dependence.
Definition ISDOpcodes.h:1593
llvm::ISD::MemIndexedMode
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition ISDOpcodes.h:1673
llvm::Intrinsic::getBaseName
LLVM_ABI StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition Intrinsics.cpp:45
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
llvm::dyn_cast
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
llvm::make_range
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition iterator_range.h:70
llvm::utostr
std::string utostr(uint64_t X, bool isNeg=false)
Definition StringExtras.h:322
llvm::get
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
Definition PointerIntPair.h:268
llvm::dbgs
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207
llvm::isa
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
llvm::Op
DWARFExpression::Operation Op
Definition DWARFExpressionPrinter.cpp:22
llvm::cast
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
llvm::printReg
LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition TargetRegisterInfo.cpp:105
raw_ostream.h
N
#define N
llvm::EVT::getEVTString
LLVM_ABI std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition ValueTypes.cpp:162
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