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20 #include "llvm/IR/IntrinsicsAMDGPU.h"
25 #define DEBUG_TYPE "AMDGPUtti"
29 struct AMDGPUImageDMaskIntrinsic {
33 #define GET_AMDGPUImageDMaskIntrinsicTable_IMPL
34 #include "InstCombineTables.inc"
70 if (
ConstantFP *ConstFloat = dyn_cast<ConstantFP>(&V)) {
73 APFloat FloatValue(ConstFloat->getValueAPF());
74 bool LosesInfo =
true;
80 if (
ConstantInt *ConstInt = dyn_cast<ConstantInt>(&V)) {
83 APInt IntValue(ConstInt->getValue());
103 if (isa<FPExtInst>(&V) || isa<SExtInst>(&V) || isa<ZExtInst>(&V))
104 return cast<Instruction>(&V)->getOperand(0);
135 if (isa<FPMathOperator>(NewCall))
142 bool RemoveOldIntr = &OldIntr != &InstToReplace;
153 const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr,
156 if (
const auto *LZMappingInfo =
158 if (
auto *ConstantLod =
159 dyn_cast<ConstantFP>(II.
getOperand(ImageDimIntr->LodIndex))) {
160 if (ConstantLod->isZero() || ConstantLod->isNegative()) {
161 const AMDGPU::ImageDimIntrinsicInfo *NewImageDimIntr =
165 II, II, NewImageDimIntr->Intr, IC, [&](
auto &
Args,
auto &ArgTys) {
166 Args.erase(Args.begin() + ImageDimIntr->LodIndex);
173 if (
const auto *MIPMappingInfo =
175 if (
auto *ConstantMip =
176 dyn_cast<ConstantInt>(II.
getOperand(ImageDimIntr->MipIndex))) {
177 if (ConstantMip->isZero()) {
178 const AMDGPU::ImageDimIntrinsicInfo *NewImageDimIntr =
182 II, II, NewImageDimIntr->Intr, IC, [&](
auto &
Args,
auto &ArgTys) {
183 Args.erase(Args.begin() + ImageDimIntr->MipIndex);
190 if (
const auto *BiasMappingInfo =
192 if (
auto *ConstantBias =
193 dyn_cast<ConstantFP>(II.
getOperand(ImageDimIntr->BiasIndex))) {
194 if (ConstantBias->isZero()) {
195 const AMDGPU::ImageDimIntrinsicInfo *NewImageDimIntr =
199 II, II, NewImageDimIntr->Intr, IC, [&](
auto &
Args,
auto &ArgTys) {
200 Args.erase(Args.begin() + ImageDimIntr->BiasIndex);
201 ArgTys.erase(ArgTys.begin() + ImageDimIntr->BiasTyArg);
208 if (
const auto *OffsetMappingInfo =
210 if (
auto *ConstantOffset =
211 dyn_cast<ConstantInt>(II.
getOperand(ImageDimIntr->OffsetIndex))) {
212 if (ConstantOffset->isZero()) {
213 const AMDGPU::ImageDimIntrinsicInfo *NewImageDimIntr =
215 OffsetMappingInfo->NoOffset, ImageDimIntr->Dim);
217 II, II, NewImageDimIntr->Intr, IC, [&](
auto &
Args,
auto &ArgTys) {
218 Args.erase(Args.begin() + ImageDimIntr->OffsetIndex);
225 if (
ST->hasD16Images()) {
227 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode =
230 if (BaseOpcode->HasD16) {
238 if (
User->getOpcode() == Instruction::FPTrunc &&
242 [&](
auto &
Args,
auto &ArgTys) {
245 ArgTys[0] = User->getType();
253 if (!
ST->hasA16() && !
ST->hasG16())
260 bool FloatCoord =
false;
262 bool OnlyDerivatives =
false;
264 for (
unsigned OperandIndex = ImageDimIntr->GradientStart;
265 OperandIndex < ImageDimIntr->VAddrEnd; OperandIndex++) {
269 if (OperandIndex < ImageDimIntr->CoordStart ||
270 ImageDimIntr->GradientStart == ImageDimIntr->CoordStart) {
274 OnlyDerivatives =
true;
278 assert(OperandIndex == ImageDimIntr->GradientStart ||
283 if (!OnlyDerivatives && !
ST->hasA16())
284 OnlyDerivatives =
true;
287 if (!OnlyDerivatives && ImageDimIntr->NumBiasArgs != 0) {
290 "Only image instructions with a sampler can have a bias");
292 OnlyDerivatives =
true;
295 if (OnlyDerivatives && (!
ST->hasG16() || ImageDimIntr->GradientStart ==
296 ImageDimIntr->CoordStart))
304 ArgTys[ImageDimIntr->GradientTyArg] = CoordType;
305 if (!OnlyDerivatives) {
306 ArgTys[ImageDimIntr->CoordTyArg] = CoordType;
309 if (ImageDimIntr->NumBiasArgs != 0)
310 ArgTys[ImageDimIntr->BiasTyArg] = Type::getHalfTy(II.getContext());
314 OnlyDerivatives ? ImageDimIntr->CoordStart : ImageDimIntr->VAddrEnd;
315 for (
unsigned OperandIndex = ImageDimIntr->GradientStart;
316 OperandIndex < EndIndex; OperandIndex++) {
318 convertTo16Bit(*II.getOperand(OperandIndex), IC.Builder);
322 if (!OnlyDerivatives && ImageDimIntr->NumBiasArgs != 0) {
323 Value *Bias = II.getOperand(ImageDimIntr->BiasIndex);
324 Args[ImageDimIntr->BiasIndex] = convertTo16Bit(*Bias, IC.Builder);
329 bool GCNTTIImpl::canSimplifyLegacyMulToMul(
const Value *Op0,
const Value *Op1,
354 case Intrinsic::amdgcn_rcp: {
358 if (isa<UndefValue>(Src)) {
367 if (
const ConstantFP *
C = dyn_cast<ConstantFP>(Src)) {
368 const APFloat &ArgVal =
C->getValueAPF();
381 case Intrinsic::amdgcn_rsq: {
385 if (isa<UndefValue>(Src)) {
393 case Intrinsic::amdgcn_frexp_mant:
394 case Intrinsic::amdgcn_frexp_exp: {
396 if (
const ConstantFP *
C = dyn_cast<ConstantFP>(Src)) {
401 if (IID == Intrinsic::amdgcn_frexp_mant) {
413 if (isa<UndefValue>(Src)) {
419 case Intrinsic::amdgcn_class: {
439 const ConstantInt *CMask = dyn_cast<ConstantInt>(Src1);
441 if (isa<UndefValue>(Src0)) {
445 if (isa<UndefValue>(Src1)) {
455 if ((
Mask & FullMask) == FullMask) {
459 if ((
Mask & FullMask) == 0) {
486 const ConstantFP *CVal = dyn_cast<ConstantFP>(Src0);
488 if (isa<UndefValue>(Src0)) {
496 {Src0, ConstantInt::get(Src1->getType(), Mask & FullMask)});
521 case Intrinsic::amdgcn_cvt_pkrtz: {
524 if (
const ConstantFP *C0 = dyn_cast<ConstantFP>(Src0)) {
525 if (
const ConstantFP *
C1 = dyn_cast<ConstantFP>(Src1)) {
529 APFloat Val0 = C0->getValueAPF();
541 if (isa<UndefValue>(Src0) && isa<UndefValue>(Src1)) {
547 case Intrinsic::amdgcn_cvt_pknorm_i16:
548 case Intrinsic::amdgcn_cvt_pknorm_u16:
549 case Intrinsic::amdgcn_cvt_pk_i16:
550 case Intrinsic::amdgcn_cvt_pk_u16: {
554 if (isa<UndefValue>(Src0) && isa<UndefValue>(Src1)) {
560 case Intrinsic::amdgcn_ubfe:
561 case Intrinsic::amdgcn_sbfe: {
564 if (isa<UndefValue>(Src)) {
575 if ((
Width & (IntSize - 1)) == 0) {
580 if (
Width >= IntSize) {
590 if (Offset >= IntSize) {
597 bool Signed = IID == Intrinsic::amdgcn_sbfe;
599 if (!CWidth || !COffset)
609 if (Offset +
Width < IntSize) {
613 RightShift->takeName(&II);
620 RightShift->takeName(&II);
623 case Intrinsic::amdgcn_exp:
624 case Intrinsic::amdgcn_exp_compr: {
630 bool IsCompr = IID == Intrinsic::amdgcn_exp_compr;
631 bool Changed =
false;
632 for (
int I = 0;
I < (IsCompr ? 2 : 4); ++
I) {
633 if ((!IsCompr && (EnBits & (1 <<
I)) == 0) ||
634 (IsCompr && ((EnBits & (0x3 << (2 *
I))) == 0))) {
636 if (!isa<UndefValue>(Src)) {
649 case Intrinsic::amdgcn_fmed3: {
679 if (isa<Constant>(Src0) && !isa<Constant>(Src1)) {
684 if (isa<Constant>(Src1) && !isa<Constant>(Src2)) {
689 if (isa<Constant>(Src0) && !isa<Constant>(Src1)) {
701 if (
const ConstantFP *C0 = dyn_cast<ConstantFP>(Src0)) {
702 if (
const ConstantFP *
C1 = dyn_cast<ConstantFP>(Src1)) {
703 if (
const ConstantFP *C2 = dyn_cast<ConstantFP>(Src2)) {
714 case Intrinsic::amdgcn_icmp:
715 case Intrinsic::amdgcn_fcmp: {
719 bool IsInteger = IID == Intrinsic::amdgcn_icmp;
729 if (
auto *CSrc0 = dyn_cast<Constant>(Src0)) {
730 if (
auto *CSrc1 = dyn_cast<Constant>(Src1)) {
806 ? Intrinsic::amdgcn_fcmp
807 : Intrinsic::amdgcn_icmp;
810 if (
auto *CmpType = dyn_cast<IntegerType>(Ty)) {
812 unsigned Width = CmpType->getBitWidth();
813 unsigned NewWidth =
Width;
821 else if (
Width <= 32)
823 else if (
Width <= 64)
828 if (
Width != NewWidth) {
842 II.
getModule(), NewIID, {II.getType(), SrcLHS->getType()});
852 case Intrinsic::amdgcn_ballot: {
853 if (
auto *Src = dyn_cast<ConstantInt>(II.
getArgOperand(0))) {
880 case Intrinsic::amdgcn_wqm_vote: {
887 case Intrinsic::amdgcn_kill: {
889 if (!
C || !
C->getZExtValue())
895 case Intrinsic::amdgcn_update_dpp: {
901 if (BC->isZeroValue() ||
RM->getZExtValue() != 0xF ||
902 BM->getZExtValue() != 0xF || isa<UndefValue>(Old))
908 case Intrinsic::amdgcn_permlane16:
909 case Intrinsic::amdgcn_permlanex16: {
912 if (isa<UndefValue>(VDstIn))
922 case Intrinsic::amdgcn_readfirstlane:
923 case Intrinsic::amdgcn_readlane: {
939 PatternMatch::m_Intrinsic<Intrinsic::amdgcn_readfirstlane>())) {
943 if (IID == Intrinsic::amdgcn_readfirstlane) {
945 if (
match(Src, PatternMatch::m_Intrinsic<Intrinsic::amdgcn_readlane>())) {
950 if (
match(Src, PatternMatch::m_Intrinsic<Intrinsic::amdgcn_readlane>(
959 case Intrinsic::amdgcn_ldexp: {
967 if (isa<UndefValue>(Op0)) {
983 if (
C && (
C->isZero() ||
C->isInfinity())) {
992 if (
C &&
C->isNaN()) {
1008 case Intrinsic::amdgcn_fmul_legacy: {
1023 FMul->takeName(&II);
1028 case Intrinsic::amdgcn_fma_legacy: {
1042 FAdd->takeName(&II);
1055 case Intrinsic::amdgcn_is_shared:
1056 case Intrinsic::amdgcn_is_private: {
1081 int DMaskIdx = -1) {
1083 auto *IIVTy = cast<FixedVectorType>(II.
getType());
1084 unsigned VWidth = IIVTy->getNumElements();
1103 DemandedElts = (1 << ActiveBits) - 1;
1105 if (UnusedComponentsAtFront > 0) {
1106 static const unsigned InvalidOffsetIdx = 0xf;
1110 case Intrinsic::amdgcn_raw_buffer_load:
1113 case Intrinsic::amdgcn_s_buffer_load:
1117 if (ActiveBits == 4 && UnusedComponentsAtFront == 1)
1118 OffsetIdx = InvalidOffsetIdx;
1122 case Intrinsic::amdgcn_struct_buffer_load:
1127 OffsetIdx = InvalidOffsetIdx;
1131 if (OffsetIdx != InvalidOffsetIdx) {
1133 DemandedElts &= ~((1 << UnusedComponentsAtFront) - 1);
1135 unsigned SingleComponentSizeInBits =
1137 unsigned OffsetAdd =
1138 UnusedComponentsAtFront * SingleComponentSizeInBits / 8;
1152 unsigned NewDMaskVal = 0;
1153 unsigned OrigLoadIdx = 0;
1154 for (
unsigned SrcIdx = 0; SrcIdx < 4; ++SrcIdx) {
1155 const unsigned Bit = 1 << SrcIdx;
1156 if (!!(DMaskVal &
Bit)) {
1157 if (!!DemandedElts[OrigLoadIdx])
1163 if (DMaskVal != NewDMaskVal)
1171 if (NewNumElts >= VWidth && DemandedElts.
isMask()) {
1184 Type *EltTy = IIVTy->getElementType();
1188 OverloadTys[0] = NewTy;
1196 if (NewNumElts == 1) {
1203 unsigned NewLoadIdx = 0;
1204 for (
unsigned OrigLoadIdx = 0; OrigLoadIdx < VWidth; ++OrigLoadIdx) {
1205 if (!!DemandedElts[OrigLoadIdx])
1206 EltMask.push_back(NewLoadIdx++);
1208 EltMask.push_back(NewNumElts);
1220 SimplifyAndSetOp)
const {
1222 case Intrinsic::amdgcn_buffer_load:
1223 case Intrinsic::amdgcn_buffer_load_format:
1224 case Intrinsic::amdgcn_raw_buffer_load:
1225 case Intrinsic::amdgcn_raw_buffer_load_format:
1226 case Intrinsic::amdgcn_raw_tbuffer_load:
1227 case Intrinsic::amdgcn_s_buffer_load:
1228 case Intrinsic::amdgcn_struct_buffer_load:
1229 case Intrinsic::amdgcn_struct_buffer_load_format:
1230 case Intrinsic::amdgcn_struct_tbuffer_load:
1231 case Intrinsic::amdgcn_tbuffer_load:
TargetLibraryInfo & getTargetLibraryInfo() const
Predicate getSwappedPredicate() const
For example, EQ->EQ, SLE->SGE, ULT->UGT, OEQ->OEQ, ULE->UGE, OLT->OGT, etc.
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block.
This is an optimization pass for GlobalISel generic memory operations.
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
const Module * getModule() const
Return the module owning the function this instruction belongs to or nullptr it the function does not...
bool hasOneUse() const
Return true if there is exactly one use of this value.
Function * getDeclaration(Module *M, ID id, ArrayRef< Type * > Tys=None)
Create or insert an LLVM Function declaration for an intrinsic, and return it.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
IntegerType * getType() const
getType - Specialize the getType() method to always return an IntegerType, which reduces the amount o...
const Function * getParent() const
Return the enclosing method, or null if none.
bool isMask(unsigned numBits) const
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
Value * CreateFCmpOEQ(Value *LHS, Value *RHS, const Twine &Name="", MDNode *FPMathTag=nullptr)
cstfp_pred_ty< is_nan > m_NaN()
Match an arbitrary NaN constant.
TypeSize getTypeSizeInBits(Type *Ty) const
Size examples:
instcombine should handle this C2 when C1
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
static Constant * getSExt(Constant *C, Type *Ty, bool OnlyIfReduced=false)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
const fltSemantics & getFltSemantics() const
Predicate getInversePredicate() const
For example, EQ -> NE, UGT -> ULE, SLT -> SGE, OEQ -> UNE, UGT -> OLE, OLT -> UGE,...
apfloat_match m_APFloat(const APFloat *&Res)
Match a ConstantFP or splatted ConstantVector, binding the specified pointer to the contained APFloat...
opStatus divide(const APFloat &RHS, roundingMode RM)
bool isStrictFP() const
Determine if the call requires strict floating point semantics.
CallInst * CreateMaxNum(Value *LHS, Value *RHS, const Twine &Name="")
Create call to the maxnum intrinsic.
The instances of the Type class are immutable: once they are created, they are never changed.
Value * CreateShuffleVector(Value *V1, Value *V2, Value *Mask, const Twine &Name="")
const APFloat & getValueAPF() const
Value * CreateInsertElement(Type *VecTy, Value *NewElt, Value *Idx, const Twine &Name="")
void copyMetadata(const Instruction &SrcInst, ArrayRef< unsigned > WL=ArrayRef< unsigned >())
Copy metadata from SrcInst to this instruction.
bool isFloatingPointTy() const
Return true if this is one of the six floating-point types.
Value * CreateAShr(Value *LHS, Value *RHS, const Twine &Name="", bool isExact=false)
const fltSemantics & getSemantics() const
bool getIntrinsicSignature(Function *F, SmallVectorImpl< Type * > &ArgTys)
Gets the type arguments of an intrinsic call by matching type contraints specified by the ....
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
unsigned countPopulation() const
Count the number of bits set.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
static Optional< Instruction * > modifyIntrinsicCall(IntrinsicInst &OldIntr, Instruction &InstToReplace, unsigned NewIntr, InstCombiner &IC, std::function< void(SmallVectorImpl< Value * > &, SmallVectorImpl< Type * > &)> Func)
Applies Func(OldIntr.Args, OldIntr.ArgTys), creates intrinsic call with modified arguments (based on ...
This is the shared class of boolean and integer constants.
Instruction * replaceOperand(Instruction &I, unsigned OpNum, Value *V)
Replace operand of instruction and add old operand to the worklist.
Optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
static APFloat fmed3AMDGCN(const APFloat &Src0, const APFloat &Src1, const APFloat &Src2)
Value * CreateFMulFMF(Value *L, Value *R, Instruction *FMFSource, const Twine &Name="")
Copy fast-math-flags from an instruction rather than using the builder's default FMF.
bool isFPPredicate() const
match_combine_or< CastClass_match< OpTy, Instruction::ZExt >, CastClass_match< OpTy, Instruction::SExt > > m_ZExtOrSExt(const OpTy &Op)
bool match(Val *V, const Pattern &P)
bool isNullValue() const
Return true if this is the value that would be returned by getNullValue.
static const fltSemantics & IEEEhalf() LLVM_READNONE
(vector float) vec_cmpeq(*A, *B) C
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
const LLVM_READONLY MIMGOffsetMappingInfo * getMIMGOffsetMappingInfo(unsigned Offset)
IntegerType * getIntNTy(unsigned N)
Fetch the type representing an N-bit integer.
CastClass_match< OpTy, Instruction::ZExt > m_ZExt(const OpTy &Op)
Matches ZExt.
Class to represent integer types.
void addFnAttr(Attribute::AttrKind Kind)
Adds the attribute to the function.
virtual Instruction * eraseInstFromFunction(Instruction &I)=0
Combiner aware instruction erasure.
LLVMContext & getContext() const
ConstantFP - Floating Point Values [float, double].
static UndefValue * get(Type *T)
Static factory methods - Return an 'undef' object of the specified type.
static Constant * get(Type *Ty, uint64_t V, bool IsSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
const LLVM_READONLY MIMGLZMappingInfo * getMIMGLZMappingInfo(unsigned L)
unsigned countTrailingZeros() const
Count the number of trailing zero bits.
static FixedVectorType * get(Type *ElementType, unsigned NumElts)
unsigned getIntegerBitWidth() const
cst_pred_ty< is_one > m_One()
Match an integer 1 or a vector with all elements equal to 1.
static Value * simplifyAMDGCNMemoryIntrinsicDemanded(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, int DMaskIdx=-1)
Implement SimplifyDemandedVectorElts for amdgcn buffer and image intrinsics.
LLVM_READONLY APFloat maxnum(const APFloat &A, const APFloat &B)
Implements IEEE maxNum semantics.
Value * CreateZExt(Value *V, Type *DestTy, const Twine &Name="")
bool isIntegerTy() const
True if this is an instance of IntegerType.
static APFloat getQNaN(const fltSemantics &Sem, bool Negative=false, const APInt *payload=nullptr)
Factory for QNaN values.
static Constant * getCompare(unsigned short pred, Constant *C1, Constant *C2, bool OnlyIfReduced=false)
Return an ICmp or FCmp comparison operator constant expression.
is_zero m_Zero()
Match any null constant or a vector with all elements equal to 0.
This is an important base class in LLVM.
unsigned countPopulation(T Value)
Count the number of set bits in a value.
Value * CreateFAddFMF(Value *L, Value *R, Instruction *FMFSource, const Twine &Name="")
Copy fast-math-flags from an instruction rather than using the builder's default FMF.
const DataLayout & getDataLayout() const
cmpResult
IEEE-754R 5.11: Floating Point Comparison Relations.
Module * getParent()
Get the module that this global value is contained inside of...
Instruction * user_back()
Specialize the methods defined in Value, as we know that an instruction can only be used by other ins...
cst_pred_ty< is_all_ones > m_AllOnes()
Match an integer or vector with all bits set.
static Value * convertTo16Bit(Value &V, InstCombiner::BuilderTy &Builder)
const ImageDimIntrinsicInfo * getImageDimIntrinsicByBaseOpcode(unsigned BaseOpcode, unsigned Dim)
Value * CreateAdd(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
bool isHalfTy() const
Return true if this is 'half', a 16-bit IEEE fp type.
static MDString * get(LLVMContext &Context, StringRef Str)
static Optional< Instruction * > simplifyAMDGCNImageIntrinsic(const GCNSubtarget *ST, const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr, IntrinsicInst &II, InstCombiner &IC)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
print Print MemDeps of function
bool isVoidTy() const
Return true if this is 'void'.
A Module instance is used to store all the information related to an LLVM module.
class_match< Value > m_Value()
Match an arbitrary value and ignore it.
Class for arbitrary precision integers.
const LLVM_READONLY MIMGBaseOpcodeInfo * getMIMGBaseOpcodeInfo(unsigned BaseOpcode)
const LLVM_READONLY MIMGMIPMappingInfo * getMIMGMIPMappingInfo(unsigned MIP)
CastClass_match< OpTy, Instruction::SExt > m_SExt(const OpTy &Op)
Matches SExt.
APFloat scalbn(APFloat X, int Exp, APFloat::roundingMode RM)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Type * getType() const
All values are typed, get the type of this value.
if(llvm_vc STREQUAL "") set(fake_version_inc "$
cstfp_pred_ty< is_finitenonzero > m_FiniteNonZero()
Match a finite non-zero FP constant.
const LLVM_READONLY MIMGBiasMappingInfo * getMIMGBiasMappingInfo(unsigned Bias)
LLVMContext & getContext() const
All values hold a context through their type.
void copyFastMathFlags(FastMathFlags FMF)
Convenience function for transferring all fast-math flag values to this instruction,...
static Constant * get(ArrayRef< Constant * > V)
bool isKnownNeverInfinity(const Value *V, const TargetLibraryInfo *TLI, unsigned Depth=0)
Return true if the floating-point scalar value is not an infinity or if the floating-point vector val...
this could be done in SelectionDAGISel along with other special for
bool isKnownNeverNaN(const Value *V, const TargetLibraryInfo *TLI, unsigned Depth=0)
Return true if the floating-point scalar value is not a NaN or if the floating-point vector value has...
void setArgOperand(unsigned i, Value *v)
static ConstantInt * getFalse(LLVMContext &Context)
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Instruction * replaceInstUsesWith(Instruction &I, Value *V)
A combiner-aware RAUW-like routine.
CastClass_match< OpTy, Instruction::FPExt > m_FPExt(const OpTy &Op)
static constexpr roundingMode rmTowardZero
static Constant * getNullValue(Type *Ty)
Constructor to create a '0' constant of arbitrary type.
bool isFloatTy() const
Return true if this is 'float', a 32-bit IEEE fp type.
static bool canSafelyConvertTo16Bit(Value &V, bool IsFloat)
static Type * getHalfTy(LLVMContext &C)
static Constant * get(Type *Ty, double V)
This returns a ConstantFP, or a vector containing a splat of a ConstantFP, for the specified value in...
const ImageDimIntrinsicInfo * getImageDimIntrinsicInfo(unsigned Intr)
bool isDoubleTy() const
Return true if this is 'double', a 64-bit IEEE fp type.
cst_pred_ty< is_zero_int > m_ZeroInt()
Match an integer 0 or a vector with all elements equal to 0.
APFloat frexp(const APFloat &X, int &Exp, APFloat::roundingMode RM)
Equivalent of C standard library function.
The core instruction combiner logic.
A wrapper class for inspecting calls to intrinsic functions.
void setCalledOperand(Value *V)
cstfp_pred_ty< is_any_zero_fp > m_AnyZeroFP()
Match a floating-point negative zero or positive zero.
CallInst * CreateMinNum(Value *LHS, Value *RHS, const Twine &Name="")
Create call to the minnum intrinsic.
Value * CreateSExt(Value *V, Type *DestTy, const Twine &Name="")
static constexpr roundingMode rmNearestTiesToEven
opStatus convert(const fltSemantics &ToSemantics, roundingMode RM, bool *losesInfo)
specificval_ty m_Specific(const Value *V)
Match if we have a specific specified value.
Value * CreateLShr(Value *LHS, Value *RHS, const Twine &Name="", bool isExact=false)
Value * getArgOperand(unsigned i) const
Value * CreateFCmpUNO(Value *LHS, Value *RHS, const Twine &Name="", MDNode *FPMathTag=nullptr)
Value * CreateShl(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
const BasicBlock * getParent() const
unsigned getActiveBits() const
Compute the number of active bits in the value.
static IntegerType * getInt16Ty(LLVMContext &C)
This class represents a function call, abstracting a target machine's calling convention.
cmpResult compare(const APFloat &RHS) const
void takeName(Value *V)
Transfer the name from V to this value.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Value * getOperand(unsigned i) const
bool canSimplifyLegacyMulToMul(const Value *Op0, const Value *Op1, InstCombiner &IC) const
Optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
class_match< CmpInst > m_Cmp()
Matches any compare instruction and ignore it.
LLVM Value Representation.
CallInst * CreateCall(FunctionType *FTy, Value *Callee, ArrayRef< Value * > Args=None, const Twine &Name="", MDNode *FPMathTag=nullptr)
iterator_range< User::op_iterator > args()
Iteration adapter for range-for loops.