LLVM 22.0.0git
Public Member Functions | Friends | List of all members
llvm::HexagonDAGToDAGISel Class Reference

#include "Target/Hexagon/HexagonISelDAGToDAG.h"

Inheritance diagram for llvm::HexagonDAGToDAGISel:
[legend]

Public Member Functions

 HexagonDAGToDAGISel ()=delete
 HexagonDAGToDAGISel (HexagonTargetMachine &tm, CodeGenOptLevel OptLevel)
bool runOnMachineFunction (MachineFunction &MF) override
bool ComplexPatternFuncMutatesDAG () const override
 Return true if complex patterns for this target can mutate the DAG.
void PreprocessISelDAG () override
 PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.
void emitFunctionEntryCode () override
void Select (SDNode *N) override
 Main hook for targets to transform nodes into machine nodes.
bool SelectAddrGA (SDValue &N, SDValue &R)
bool SelectAddrGP (SDValue &N, SDValue &R)
bool SelectAnyImm (SDValue &N, SDValue &R)
bool SelectAnyInt (SDValue &N, SDValue &R)
bool SelectAnyImmediate (SDValue &N, SDValue &R, Align Alignment)
bool SelectGlobalAddress (SDValue &N, SDValue &R, bool UseGP, Align Alignment)
bool SelectAddrFI (SDValue &N, SDValue &R)
bool DetectUseSxtw (SDValue &N, SDValue &R)
bool SelectAnyImm0 (SDValue &N, SDValue &R)
bool SelectAnyImm1 (SDValue &N, SDValue &R)
bool SelectAnyImm2 (SDValue &N, SDValue &R)
bool SelectAnyImm3 (SDValue &N, SDValue &R)
MachineSDNode * LoadInstrForLoadIntrinsic (SDNode *IntN)
SDNode * StoreInstrForLoadIntrinsic (MachineSDNode *LoadN, SDNode *IntN)
void SelectFrameIndex (SDNode *N)
bool SelectInlineAsmMemoryOperand (const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps) override
 SelectInlineAsmMemoryOperand - Implement addressing mode selection for inline asm expressions.
bool tryLoadOfLoadIntrinsic (LoadSDNode *N)
bool SelectBrevLdIntrinsic (SDNode *IntN)
bool SelectNewCircIntrinsic (SDNode *IntN)
 Generate a machine instruction node for the new circular buffer intrinsics.
void SelectLoad (SDNode *N)
void SelectIndexedLoad (LoadSDNode *LD, const SDLoc &dl)
void SelectIndexedStore (StoreSDNode *ST, const SDLoc &dl)
void SelectStore (SDNode *N)
void SelectSHL (SDNode *N)
void SelectIntrinsicWChain (SDNode *N)
void SelectIntrinsicWOChain (SDNode *N)
void SelectExtractSubvector (SDNode *N)
void SelectConstant (SDNode *N)
void SelectConstantFP (SDNode *N)
void SelectV65Gather (SDNode *N)
void SelectV65GatherPred (SDNode *N)
void SelectHVXDualOutput (SDNode *N)
void SelectAddSubCarry (SDNode *N)
void SelectVAlign (SDNode *N)
void SelectVAlignAddr (SDNode *N)
void SelectTypecast (SDNode *N)
void SelectP2D (SDNode *N)
void SelectD2P (SDNode *N)
void SelectQ2V (SDNode *N)
void SelectV2Q (SDNode *N)
void SelectFDiv (SDNode *N)
void FDiv (SDNode *N)
void FastFDiv (SDNode *N)
Public Member Functions inherited from llvm::SelectionDAGISel
 SelectionDAGISel (TargetMachine &tm, CodeGenOptLevel OL=CodeGenOptLevel::Default)
virtual ~SelectionDAGISel ()
BatchAAResults * getBatchAA () const
 Returns a (possibly null) pointer to the current BatchAAResults.
const TargetLowering * getTargetLowering () const
void initializeAnalysisResults (MachineFunctionAnalysisManager &MFAM)
void initializeAnalysisResults (MachineFunctionPass &MFP)
virtual void PostprocessISelDAG ()
 PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.
virtual bool IsProfitableToFold (SDValue N, SDNode *U, SDNode *Root) const
 IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root.
bool CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckAndMask - The isel is trying to match something like (and X, 255).
bool CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckOrMask - The isel is trying to match something like (or X, 255).
virtual bool CheckPatternPredicate (unsigned PredNo) const
 CheckPatternPredicate - This function is generated by tblgen in the target.
virtual bool CheckNodePredicate (SDValue Op, unsigned PredNo) const
 CheckNodePredicate - This function is generated by tblgen in the target.
virtual bool CheckNodePredicateWithOperands (SDValue Op, unsigned PredNo, ArrayRef< SDValue > Operands) const
 CheckNodePredicateWithOperands - This function is generated by tblgen in the target.
virtual bool CheckComplexPattern (SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result)
virtual SDValue RunSDNodeXForm (SDValue V, unsigned XFormNo)
void SelectCodeCommon (SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize)
bool mayRaiseFPException (SDNode *Node) const
 Return whether the node may raise an FP exception.
bool isOrEquivalentToAdd (const SDNode *N) const

Friends

struct HvxSelector

Additional Inherited Members

Public Types inherited from llvm::SelectionDAGISel
enum  BuiltinOpcodes {
  OPC_Scope , OPC_RecordNode , OPC_RecordChild0 , OPC_RecordChild1 ,
  OPC_RecordChild2 , OPC_RecordChild3 , OPC_RecordChild4 , OPC_RecordChild5 ,
  OPC_RecordChild6 , OPC_RecordChild7 , OPC_RecordMemRef , OPC_CaptureGlueInput ,
  OPC_MoveChild , OPC_MoveChild0 , OPC_MoveChild1 , OPC_MoveChild2 ,
  OPC_MoveChild3 , OPC_MoveChild4 , OPC_MoveChild5 , OPC_MoveChild6 ,
  OPC_MoveChild7 , OPC_MoveSibling , OPC_MoveSibling0 , OPC_MoveSibling1 ,
  OPC_MoveSibling2 , OPC_MoveSibling3 , OPC_MoveSibling4 , OPC_MoveSibling5 ,
  OPC_MoveSibling6 , OPC_MoveSibling7 , OPC_MoveParent , OPC_CheckSame ,
  OPC_CheckChild0Same , OPC_CheckChild1Same , OPC_CheckChild2Same , OPC_CheckChild3Same ,
  OPC_CheckPatternPredicate , OPC_CheckPatternPredicate0 , OPC_CheckPatternPredicate1 , OPC_CheckPatternPredicate2 ,
  OPC_CheckPatternPredicate3 , OPC_CheckPatternPredicate4 , OPC_CheckPatternPredicate5 , OPC_CheckPatternPredicate6 ,
  OPC_CheckPatternPredicate7 , OPC_CheckPatternPredicateTwoByte , OPC_CheckPredicate , OPC_CheckPredicate0 ,
  OPC_CheckPredicate1 , OPC_CheckPredicate2 , OPC_CheckPredicate3 , OPC_CheckPredicate4 ,
  OPC_CheckPredicate5 , OPC_CheckPredicate6 , OPC_CheckPredicate7 , OPC_CheckPredicateWithOperands ,
  OPC_CheckOpcode , OPC_SwitchOpcode , OPC_CheckType , OPC_CheckTypeI32 ,
  OPC_CheckTypeI64 , OPC_CheckTypeRes , OPC_SwitchType , OPC_CheckChild0Type ,
  OPC_CheckChild1Type , OPC_CheckChild2Type , OPC_CheckChild3Type , OPC_CheckChild4Type ,
  OPC_CheckChild5Type , OPC_CheckChild6Type , OPC_CheckChild7Type , OPC_CheckChild0TypeI32 ,
  OPC_CheckChild1TypeI32 , OPC_CheckChild2TypeI32 , OPC_CheckChild3TypeI32 , OPC_CheckChild4TypeI32 ,
  OPC_CheckChild5TypeI32 , OPC_CheckChild6TypeI32 , OPC_CheckChild7TypeI32 , OPC_CheckChild0TypeI64 ,
  OPC_CheckChild1TypeI64 , OPC_CheckChild2TypeI64 , OPC_CheckChild3TypeI64 , OPC_CheckChild4TypeI64 ,
  OPC_CheckChild5TypeI64 , OPC_CheckChild6TypeI64 , OPC_CheckChild7TypeI64 , OPC_CheckInteger ,
  OPC_CheckChild0Integer , OPC_CheckChild1Integer , OPC_CheckChild2Integer , OPC_CheckChild3Integer ,
  OPC_CheckChild4Integer , OPC_CheckCondCode , OPC_CheckChild2CondCode , OPC_CheckValueType ,
  OPC_CheckComplexPat , OPC_CheckComplexPat0 , OPC_CheckComplexPat1 , OPC_CheckComplexPat2 ,
  OPC_CheckComplexPat3 , OPC_CheckComplexPat4 , OPC_CheckComplexPat5 , OPC_CheckComplexPat6 ,
  OPC_CheckComplexPat7 , OPC_CheckAndImm , OPC_CheckOrImm , OPC_CheckImmAllOnesV ,
  OPC_CheckImmAllZerosV , OPC_CheckFoldableChainNode , OPC_EmitInteger , OPC_EmitInteger8 ,
  OPC_EmitInteger16 , OPC_EmitInteger32 , OPC_EmitInteger64 , OPC_EmitStringInteger ,
  OPC_EmitStringInteger32 , OPC_EmitRegister , OPC_EmitRegisterI32 , OPC_EmitRegisterI64 ,
  OPC_EmitRegister2 , OPC_EmitConvertToTarget , OPC_EmitConvertToTarget0 , OPC_EmitConvertToTarget1 ,
  OPC_EmitConvertToTarget2 , OPC_EmitConvertToTarget3 , OPC_EmitConvertToTarget4 , OPC_EmitConvertToTarget5 ,
  OPC_EmitConvertToTarget6 , OPC_EmitConvertToTarget7 , OPC_EmitMergeInputChains , OPC_EmitMergeInputChains1_0 ,
  OPC_EmitMergeInputChains1_1 , OPC_EmitMergeInputChains1_2 , OPC_EmitCopyToReg , OPC_EmitCopyToReg0 ,
  OPC_EmitCopyToReg1 , OPC_EmitCopyToReg2 , OPC_EmitCopyToReg3 , OPC_EmitCopyToReg4 ,
  OPC_EmitCopyToReg5 , OPC_EmitCopyToReg6 , OPC_EmitCopyToReg7 , OPC_EmitCopyToRegTwoByte ,
  OPC_EmitNodeXForm , OPC_EmitNode , OPC_EmitNode0 , OPC_EmitNode1 ,
  OPC_EmitNode2 , OPC_EmitNode0None , OPC_EmitNode1None , OPC_EmitNode2None ,
  OPC_EmitNode0Chain , OPC_EmitNode1Chain , OPC_EmitNode2Chain , OPC_MorphNodeTo ,
  OPC_MorphNodeTo0 , OPC_MorphNodeTo1 , OPC_MorphNodeTo2 , OPC_MorphNodeTo0None ,
  OPC_MorphNodeTo1None , OPC_MorphNodeTo2None , OPC_MorphNodeTo0Chain , OPC_MorphNodeTo1Chain ,
  OPC_MorphNodeTo2Chain , OPC_MorphNodeTo0GlueInput , OPC_MorphNodeTo1GlueInput , OPC_MorphNodeTo2GlueInput ,
  OPC_MorphNodeTo0GlueOutput , OPC_MorphNodeTo1GlueOutput , OPC_MorphNodeTo2GlueOutput , OPC_CompleteMatch ,
  OPC_Coverage
}
enum  {
  OPFL_None = 0 , OPFL_Chain = 1 , OPFL_GlueInput = 2 , OPFL_GlueOutput = 4 ,
  OPFL_MemRefs = 8 , OPFL_Variadic0 = 1 << 4 , OPFL_Variadic1 = 2 << 4 , OPFL_Variadic2 = 3 << 4 ,
  OPFL_Variadic3 = 4 << 4 , OPFL_Variadic4 = 5 << 4 , OPFL_Variadic5 = 6 << 4 , OPFL_Variadic6 = 7 << 4 ,
  OPFL_Variadic7 = 8 << 4 , OPFL_VariadicInfo = 15 << 4
}
Static Public Member Functions inherited from llvm::SelectionDAGISel
static bool IsLegalToFold (SDValue N, SDNode *U, SDNode *Root, CodeGenOptLevel OptLevel, bool IgnoreChains=false)
 IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root.
static void InvalidateNodeId (SDNode *N)
static int getUninvalidatedNodeId (SDNode *N)
static void EnforceNodeIdInvariant (SDNode *N)
static int getNumFixedFromVariadicInfo (unsigned Flags)
 getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root.
Public Attributes inherited from llvm::SelectionDAGISel
TargetMachine & TM
const TargetLibraryInfo * LibInfo
std::unique_ptr< FunctionLoweringInfo > FuncInfo
std::unique_ptr< SwiftErrorValueTracking > SwiftError
MachineFunction * MF
MachineModuleInfo * MMI
MachineRegisterInfo * RegInfo
SelectionDAG * CurDAG
std::unique_ptr< SelectionDAGBuilder > SDB
std::optional< BatchAAResults > BatchAA
AssumptionCache * AC = nullptr
GCFunctionInfo * GFI = nullptr
SSPLayoutInfo * SP = nullptr
CodeGenOptLevel OptLevel
const TargetInstrInfo * TII
const TargetLowering * TLI
bool FastISelFailed
SmallPtrSet< const Instruction *, 4 > ElidedArgCopyInstrs
std::unique_ptr< OptimizationRemarkEmitter > ORE
 Current optimization remark emitter.
bool MatchFilterFuncName = false
 True if the function currently processing is in the function printing list (i.e.
StringRef FuncName
Protected Member Functions inherited from llvm::SelectionDAGISel
void ReplaceUses (SDValue F, SDValue T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T.
void ReplaceUses (const SDValue *F, const SDValue *T, unsigned Num)
 ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.
void ReplaceUses (SDNode *F, SDNode *T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T.
void ReplaceNode (SDNode *F, SDNode *T)
 Replace all uses of F with T, then remove F from the DAG.
void SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops, const SDLoc &DL)
 SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen.
virtual StringRef getPatternForIndex (unsigned index)
 getPatternForIndex - Patterns selected by tablegen during ISEL
virtual StringRef getIncludePathForIndex (unsigned index)
 getIncludePathForIndex - get the td source location of pattern instantiation
bool shouldOptForSize (const MachineFunction *MF) const
Protected Attributes inherited from llvm::SelectionDAGISel
unsigned DAGSize = 0
 DAGSize - Size of DAG being instruction selected.

Detailed Description

Definition at line 28 of file HexagonISelDAGToDAG.h.

Constructor & Destructor Documentation

◆ HexagonDAGToDAGISel() [1/2]

llvm::HexagonDAGToDAGISel::HexagonDAGToDAGISel ( )
delete

Referenced by SelectIndexedLoad().

◆ HexagonDAGToDAGISel() [2/2]

llvm::HexagonDAGToDAGISel::HexagonDAGToDAGISel ( HexagonTargetMachine & tm,
CodeGenOptLevel OptLevel )
inlineexplicit

Definition at line 36 of file HexagonISelDAGToDAG.h.

References llvm::SelectionDAGISel::OptLevel, and llvm::SelectionDAGISel::SelectionDAGISel().

Member Function Documentation

◆ ComplexPatternFuncMutatesDAG()

bool llvm::HexagonDAGToDAGISel::ComplexPatternFuncMutatesDAG ( ) const
inlineoverridevirtual

Return true if complex patterns for this target can mutate the DAG.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 51 of file HexagonISelDAGToDAG.h.

◆ DetectUseSxtw()

bool HexagonDAGToDAGISel::DetectUseSxtw ( SDValue & N,
SDValue & R )

Definition at line 1587 of file HexagonISelDAGToDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, assert(), llvm::ISD::AssertSext, llvm::cast(), llvm::SelectionDAGISel::CurDAG, llvm::dyn_cast(), N, Opc, SDValue(), llvm::ISD::SEXTLOAD, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SRA, and T.

◆ emitFunctionEntryCode()

void HexagonDAGToDAGISel::emitFunctionEntryCode ( )
overridevirtual

Reimplemented from llvm::SelectionDAGISel.

Definition at line 1417 of file HexagonISelDAGToDAG.cpp.

References llvm::MachineInstrBuilder::addImm(), assert(), llvm::BuildMI(), llvm::dwarf_linker::DebugLoc, llvm::HexagonSubtarget::getFrameLowering(), llvm::MachineFrameInfo::getMaxAlign(), llvm::Register::isValid(), llvm::SelectionDAGISel::MF, llvm::Reserved, and llvm::Align::value().

◆ FastFDiv()

void HexagonDAGToDAGISel::FastFDiv ( SDNode * N)

Definition at line 965 of file HexagonISelDAGToDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, D(), N, llvm::SelectionDAGISel::ReplaceNode(), and SDValue().

Referenced by SelectFDiv().

◆ FDiv()

void HexagonDAGToDAGISel::FDiv ( SDNode * N)

Definition at line 914 of file HexagonISelDAGToDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, D(), N, llvm::SelectionDAGISel::ReplaceNode(), and SDValue().

Referenced by SelectFDiv().

◆ LoadInstrForLoadIntrinsic()

MachineSDNode * HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic ( SDNode * IntN)

Definition at line 195 of file HexagonISelDAGToDAG.cpp.

References llvm::cast(), llvm::SelectionDAGISel::CurDAG, llvm::SDNode::getConstantOperandVal(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), I, and llvm::ISD::INTRINSIC_W_CHAIN.

Referenced by SelectIntrinsicWChain(), and tryLoadOfLoadIntrinsic().

◆ PreprocessISelDAG()

void HexagonDAGToDAGISel::PreprocessISelDAG ( )
overridevirtual

PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 1357 of file HexagonISelDAGToDAG.cpp.

References llvm::SelectionDAGISel::CurDAG, llvm::dbgs(), DEBUG_WITH_TYPE, EnableAddressRebalancing, N, and T.

◆ runOnMachineFunction()

bool llvm::HexagonDAGToDAGISel::runOnMachineFunction ( MachineFunction & MF)
inlineoverridevirtual

Reimplemented from llvm::SelectionDAGISel.

Definition at line 41 of file HexagonISelDAGToDAG.h.

References llvm::HexagonSubtarget::getInstrInfo(), llvm::SelectionDAGISel::MF, and llvm::SelectionDAGISel::runOnMachineFunction().

◆ Select()

void HexagonDAGToDAGISel::Select ( SDNode * N)
overridevirtual

Main hook for targets to transform nodes into machine nodes.

Implements llvm::SelectionDAGISel.

Definition at line 1005 of file HexagonISelDAGToDAG.cpp.

References llvm::HexagonISD::ADDC, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::HexagonISD::D2P, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::FDIV, llvm::ISD::FrameIndex, I, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, N, llvm::HexagonISD::P2D, llvm::HexagonISD::Q2V, SelectAddSubCarry(), SelectConstant(), SelectConstantFP(), SelectD2P(), SelectExtractSubvector(), SelectFDiv(), SelectFrameIndex(), SelectIntrinsicWChain(), SelectIntrinsicWOChain(), SelectLoad(), SelectP2D(), SelectQ2V(), SelectSHL(), SelectStore(), SelectTypecast(), SelectV2Q(), SelectVAlign(), SelectVAlignAddr(), llvm::ISD::SHL, llvm::HexagonISD::SUBC, llvm::HexagonISD::TYPECAST, llvm::HexagonISD::V2Q, llvm::HexagonISD::VALIGN, llvm::HexagonISD::VALIGNADDR, llvm::ISD::VECTOR_SHUFFLE, and llvm::HexagonISD::VROR.

◆ SelectAddrFI()

bool HexagonDAGToDAGISel::SelectAddrFI ( SDValue & N,
SDValue & R )

Definition at line 1455 of file HexagonISelDAGToDAG.cpp.

References llvm::cast(), llvm::SelectionDAGISel::CurDAG, llvm::ISD::FrameIndex, llvm::MachineFrameInfo::isFixedObjectIndex(), llvm::SelectionDAGISel::MF, and N.

Referenced by SelectInlineAsmMemoryOperand().

◆ SelectAddrGA()

bool HexagonDAGToDAGISel::SelectAddrGA ( SDValue & N,
SDValue & R )
inline

Definition at line 1467 of file HexagonISelDAGToDAG.cpp.

References N, and SelectGlobalAddress().

◆ SelectAddrGP()

bool HexagonDAGToDAGISel::SelectAddrGP ( SDValue & N,
SDValue & R )
inline

Definition at line 1471 of file HexagonISelDAGToDAG.cpp.

References N, and SelectGlobalAddress().

◆ SelectAddSubCarry()

void HexagonDAGToDAGISel::SelectAddSubCarry ( SDNode * N)

Definition at line 792 of file HexagonISelDAGToDAG.cpp.

References llvm::HexagonISD::ADDC, llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, N, and llvm::SelectionDAGISel::ReplaceNode().

Referenced by Select().

◆ SelectAnyImm()

bool HexagonDAGToDAGISel::SelectAnyImm ( SDValue & N,
SDValue & R )
inline

Definition at line 1475 of file HexagonISelDAGToDAG.cpp.

References N, and SelectAnyImmediate().

◆ SelectAnyImm0()

bool HexagonDAGToDAGISel::SelectAnyImm0 ( SDValue & N,
SDValue & R )
inline

Definition at line 1479 of file HexagonISelDAGToDAG.cpp.

References N, and SelectAnyImmediate().

◆ SelectAnyImm1()

bool HexagonDAGToDAGISel::SelectAnyImm1 ( SDValue & N,
SDValue & R )
inline

Definition at line 1482 of file HexagonISelDAGToDAG.cpp.

References N, and SelectAnyImmediate().

◆ SelectAnyImm2()

bool HexagonDAGToDAGISel::SelectAnyImm2 ( SDValue & N,
SDValue & R )
inline

Definition at line 1485 of file HexagonISelDAGToDAG.cpp.

References N, and SelectAnyImmediate().

◆ SelectAnyImm3()

bool HexagonDAGToDAGISel::SelectAnyImm3 ( SDValue & N,
SDValue & R )
inline

Definition at line 1488 of file HexagonISelDAGToDAG.cpp.

References N, and SelectAnyImmediate().

◆ SelectAnyImmediate()

bool HexagonDAGToDAGISel::SelectAnyImmediate ( SDValue & N,
SDValue & R,
Align Alignment )

Definition at line 1501 of file HexagonISelDAGToDAG.cpp.

References llvm::ISD::BlockAddress, llvm::cast(), llvm::ISD::Constant, llvm::HexagonISD::CP, llvm::SelectionDAGISel::CurDAG, llvm::ISD::ExternalSymbol, llvm::getOffset(), llvm::isAligned(), llvm::HexagonISD::JT, N, and SelectGlobalAddress().

Referenced by SelectAnyImm(), SelectAnyImm0(), SelectAnyImm1(), SelectAnyImm2(), and SelectAnyImm3().

◆ SelectAnyInt()

bool HexagonDAGToDAGISel::SelectAnyInt ( SDValue & N,
SDValue & R )
inline

Definition at line 1492 of file HexagonISelDAGToDAG.cpp.

References llvm::cast(), llvm::SelectionDAGISel::CurDAG, llvm::isa(), N, and T.

◆ SelectBrevLdIntrinsic()

bool HexagonDAGToDAGISel::SelectBrevLdIntrinsic ( SDNode * IntN)

Definition at line 329 of file HexagonISelDAGToDAG.cpp.

References llvm::cast(), llvm::SelectionDAGISel::CurDAG, llvm::SDNode::getConstantOperandVal(), llvm::SDNode::getOpcode(), llvm::ISD::INTRINSIC_W_CHAIN, llvm::SelectionDAGISel::ReplaceUses(), and SDValue().

Referenced by SelectIntrinsicWChain().

◆ SelectConstant()

void HexagonDAGToDAGISel::SelectConstant ( SDNode * N)

Definition at line 750 of file HexagonISelDAGToDAG.cpp.

References assert(), llvm::cast(), llvm::SelectionDAGISel::CurDAG, N, Opc, and llvm::SelectionDAGISel::ReplaceNode().

Referenced by Select().

◆ SelectConstantFP()

void HexagonDAGToDAGISel::SelectConstantFP ( SDNode * N)

Definition at line 729 of file HexagonISelDAGToDAG.cpp.

References A(), llvm::cast(), llvm::SelectionDAGISel::CurDAG, N, and llvm::SelectionDAGISel::ReplaceNode().

Referenced by Select().

◆ SelectD2P()

void HexagonDAGToDAGISel::SelectD2P ( SDNode * N)

Definition at line 878 of file HexagonISelDAGToDAG.cpp.

References llvm::SelectionDAGISel::CurDAG, N, llvm::SelectionDAGISel::ReplaceNode(), and T.

Referenced by Select().

◆ SelectExtractSubvector()

void HexagonDAGToDAGISel::SelectExtractSubvector ( SDNode * N)

Definition at line 708 of file HexagonISelDAGToDAG.cpp.

References assert(), llvm::SelectionDAGISel::CurDAG, llvm::EVT::getSimpleVT(), llvm::MVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::MVT::getVectorElementType(), llvm::MVT::getVectorNumElements(), N, llvm::SelectionDAGISel::ReplaceNode(), and SubReg.

Referenced by Select().

◆ SelectFDiv()

void HexagonDAGToDAGISel::SelectFDiv ( SDNode * N)

Definition at line 998 of file HexagonISelDAGToDAG.cpp.

References FastFDiv(), FDiv(), and N.

Referenced by Select().

◆ SelectFrameIndex()

void HexagonDAGToDAGISel::SelectFrameIndex ( SDNode * N)

Definition at line 763 of file HexagonISelDAGToDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::cast(), CH, llvm::SelectionDAGISel::CurDAG, DL, llvm::MachineFrameInfo::getMaxAlign(), llvm::TargetFrameLowering::getStackAlign(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::SelectionDAGISel::MF, N, and llvm::SelectionDAGISel::ReplaceNode().

Referenced by Select().

◆ SelectGlobalAddress()

bool HexagonDAGToDAGISel::SelectGlobalAddress ( SDValue & N,
SDValue & R,
bool UseGP,
Align Alignment )

Definition at line 1542 of file HexagonISelDAGToDAG.cpp.

References llvm::ISD::ADD, llvm::HexagonISD::CONST32, llvm::HexagonISD::CONST32_GP, llvm::HexagonISD::CP, llvm::SelectionDAGISel::CurDAG, llvm::dyn_cast(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::isAligned(), llvm::HexagonISD::JT, N, and llvm::ISD::TargetGlobalAddress.

Referenced by SelectAddrGA(), SelectAddrGP(), and SelectAnyImmediate().

◆ SelectHVXDualOutput()

void HexagonDAGToDAGISel::SelectHVXDualOutput ( SDNode * N)

Definition at line 2968 of file HexagonISelDAGToDAGHVX.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::SelectionDAGISel::CurDAG, llvm_unreachable, N, llvm::SelectionDAGISel::ReplaceUses(), and SDValue().

Referenced by SelectIntrinsicWOChain().

◆ SelectIndexedLoad()

void HexagonDAGToDAGISel::SelectIndexedLoad ( LoadSDNode * LD,
const SDLoc & dl )

Definition at line 76 of file HexagonISelDAGToDAG.cpp.

References A(), assert(), llvm::sampleprof::Base, llvm::cast(), const, llvm::SelectionDAGISel::CurDAG, llvm::ISD::EXTLOAD, llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), HexagonDAGToDAGISel(), llvm::EVT::isSimple(), llvm_unreachable, N, llvm::ISD::NON_EXTLOAD, llvm::Offset, llvm::SelectionDAGISel::ReplaceUses(), SDValue(), SelectIndexedLoad(), llvm::ISD::SEXTLOAD, llvm::MVT::SimpleTy, and llvm::ISD::ZEXTLOAD.

Referenced by SelectIndexedLoad(), and SelectLoad().

◆ SelectIndexedStore()

void HexagonDAGToDAGISel::SelectIndexedStore ( StoreSDNode * ST,
const SDLoc & dl )

Definition at line 474 of file HexagonISelDAGToDAG.cpp.

References A(), AbstractManglingParser< Derived, Alloc >::Ops, assert(), llvm::sampleprof::Base, llvm::cast(), llvm::SelectionDAGISel::CurDAG, llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), llvm::EVT::isSimple(), llvm_unreachable, llvm::Offset, llvm::SelectionDAGISel::ReplaceUses(), SDValue(), and llvm::MVT::SimpleTy.

Referenced by SelectStore().

◆ SelectInlineAsmMemoryOperand()

bool HexagonDAGToDAGISel::SelectInlineAsmMemoryOperand ( const SDValue & Op,
InlineAsm::ConstraintCode ConstraintID,
std::vector< SDValue > & OutOps )
overridevirtual

SelectInlineAsmMemoryOperand - Implement addressing mode selection for inline asm expressions.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 1057 of file HexagonISelDAGToDAG.cpp.

References llvm::SelectionDAGISel::CurDAG, llvm::InlineAsm::m, llvm::InlineAsm::o, SelectAddrFI(), and llvm::InlineAsm::v.

◆ SelectIntrinsicWChain()

void HexagonDAGToDAGISel::SelectIntrinsicWChain ( SDNode * N)

Definition at line 637 of file HexagonISelDAGToDAG.cpp.

References llvm::SelectionDAGISel::CurDAG, LoadInstrForLoadIntrinsic(), N, SelectBrevLdIntrinsic(), SelectNewCircIntrinsic(), SelectV65Gather(), SelectV65GatherPred(), and StoreInstrForLoadIntrinsic().

Referenced by Select().

◆ SelectIntrinsicWOChain()

void HexagonDAGToDAGISel::SelectIntrinsicWOChain ( SDNode * N)

Definition at line 674 of file HexagonISelDAGToDAG.cpp.

References llvm::SelectionDAGISel::CurDAG, N, llvm::SelectionDAGISel::ReplaceNode(), and SelectHVXDualOutput().

Referenced by Select().

◆ SelectLoad()

void HexagonDAGToDAGISel::SelectLoad ( SDNode * N)

Definition at line 456 of file HexagonISelDAGToDAG.cpp.

References llvm::cast(), N, SelectIndexedLoad(), tryLoadOfLoadIntrinsic(), and llvm::ISD::UNINDEXED.

Referenced by Select().

◆ SelectNewCircIntrinsic()

bool HexagonDAGToDAGISel::SelectNewCircIntrinsic ( SDNode * IntN)

Generate a machine instruction node for the new circular buffer intrinsics.

The new versions use a CSx register instead of the K field.

Definition at line 370 of file HexagonISelDAGToDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::cast(), llvm::SelectionDAGISel::CurDAG, DL, llvm::SDNode::getConstantOperandVal(), llvm::SDNode::getNumOperands(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), I, llvm::ISD::INTRINSIC_W_CHAIN, llvm::SelectionDAGISel::ReplaceUses(), and SDValue().

Referenced by SelectIntrinsicWChain().

◆ SelectP2D()

void HexagonDAGToDAGISel::SelectP2D ( SDNode * N)

Definition at line 871 of file HexagonISelDAGToDAG.cpp.

References llvm::SelectionDAGISel::CurDAG, N, llvm::SelectionDAGISel::ReplaceNode(), and T.

Referenced by Select().

◆ SelectQ2V()

void HexagonDAGToDAGISel::SelectQ2V ( SDNode * N)

Definition at line 901 of file HexagonISelDAGToDAG.cpp.

References assert(), llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, llvm::MVT::getSizeInBits(), N, llvm::SelectionDAGISel::ReplaceNode(), and T.

Referenced by Select().

◆ SelectSHL()

void HexagonDAGToDAGISel::SelectSHL ( SDNode * N)

Definition at line 579 of file HexagonISelDAGToDAG.cpp.

References llvm::CallingConv::C, llvm::cast(), llvm::ISD::Constant, llvm::SelectionDAGISel::CurDAG, llvm::Default, llvm::dyn_cast(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::isInt(), llvm::ISD::MUL, N, llvm::SelectionDAGISel::ReplaceNode(), llvm::ISD::SHL, and llvm::ISD::SUB.

Referenced by Select().

◆ SelectStore()

void HexagonDAGToDAGISel::SelectStore ( SDNode * N)

Definition at line 565 of file HexagonISelDAGToDAG.cpp.

References llvm::cast(), N, SelectIndexedStore(), and llvm::ISD::UNINDEXED.

Referenced by Select(), and StoreInstrForLoadIntrinsic().

◆ SelectTypecast()

void HexagonDAGToDAGISel::SelectTypecast ( SDNode * N)

Definition at line 863 of file HexagonISelDAGToDAG.cpp.

References llvm::SelectionDAGISel::CurDAG, N, llvm::SelectionDAGISel::ReplaceNode(), and T.

Referenced by Select().

◆ SelectV2Q()

void HexagonDAGToDAGISel::SelectV2Q ( SDNode * N)

Definition at line 887 of file HexagonISelDAGToDAG.cpp.

References assert(), llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, llvm::MVT::getSizeInBits(), N, llvm::SelectionDAGISel::ReplaceNode(), and T.

Referenced by Select().

◆ SelectV65Gather()

void HexagonDAGToDAGISel::SelectV65Gather ( SDNode * N)

Definition at line 2930 of file HexagonISelDAGToDAGHVX.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::Address, llvm::sampleprof::Base, llvm::cast(), llvm::SelectionDAGISel::CurDAG, llvm_unreachable, N, llvm::Offset, and llvm::SelectionDAGISel::ReplaceNode().

Referenced by SelectIntrinsicWChain().

◆ SelectV65GatherPred()

void HexagonDAGToDAGISel::SelectV65GatherPred ( SDNode * N)

Definition at line 2890 of file HexagonISelDAGToDAGHVX.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::Address, llvm::sampleprof::Base, llvm::cast(), llvm::SelectionDAGISel::CurDAG, llvm_unreachable, N, llvm::Offset, and llvm::SelectionDAGISel::ReplaceNode().

Referenced by SelectIntrinsicWChain().

◆ SelectVAlign()

void HexagonDAGToDAGISel::SelectVAlign ( SDNode * N)

Definition at line 801 of file HexagonISelDAGToDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, assert(), llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, llvm::MVT::getSizeInBits(), llvm::M0(), llvm::M1(), N, llvm::SelectionDAGISel::ReplaceNode(), SDValue(), and T.

Referenced by Select().

◆ SelectVAlignAddr()

void HexagonDAGToDAGISel::SelectVAlignAddr ( SDNode * N)

Definition at line 848 of file HexagonISelDAGToDAG.cpp.

References A(), assert(), llvm::cast(), llvm::SelectionDAGISel::CurDAG, llvm::isPowerOf2_32(), N, and llvm::SelectionDAGISel::ReplaceNode().

Referenced by Select().

◆ StoreInstrForLoadIntrinsic()

SDNode * HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic ( MachineSDNode * LoadN,
SDNode * IntN )

Definition at line 227 of file HexagonISelDAGToDAG.cpp.

References llvm::SelectionDAGISel::CurDAG, F, llvm::MVT::getIntegerVT(), llvm::SDNode::getMachineOpcode(), llvm::SDValue::getNode(), llvm::SDNode::getOperand(), llvm::HandleSDNode::getValue(), llvm::HexagonII::MemAccesSizeMask, llvm::HexagonII::MemAccessSizePos, llvm::SelectionDAGISel::ReplaceUses(), SDValue(), SelectStore(), and Size.

Referenced by SelectIntrinsicWChain(), and tryLoadOfLoadIntrinsic().

◆ tryLoadOfLoadIntrinsic()

bool HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic ( LoadSDNode * N)

Definition at line 262 of file HexagonISelDAGToDAG.cpp.

References llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, F, llvm::SDValue::getNode(), llvm::ISD::INTRINSIC_W_CHAIN, LoadInstrForLoadIntrinsic(), N, llvm::ISD::NON_EXTLOAD, llvm::SelectionDAGISel::ReplaceUses(), SDValue(), llvm::ISD::SEXTLOAD, StoreInstrForLoadIntrinsic(), T, and llvm::ISD::ZEXTLOAD.

Referenced by SelectLoad().

◆ HvxSelector

friend struct HvxSelector
friend

Definition at line 124 of file HexagonISelDAGToDAG.h.

References llvm::SelectionDAGISel::CurDAG, and HvxSelector.

Referenced by HvxSelector.

The documentation for this class was generated from the following files:
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