27#define DEBUG_TYPE "legalize-types"
39 VT == MVT::f32 ? Call_F32 :
40 VT == MVT::f64 ? Call_F64 :
41 VT == MVT::f80 ? Call_F80 :
42 VT == MVT::f128 ? Call_F128 :
43 VT == MVT::ppcf128 ? Call_PPCF128 :
44 RTLIB::UNKNOWN_LIBCALL;
51void DAGTypeLegalizer::SoftenFloatResult(
SDNode *
N,
unsigned ResNo) {
52 LLVM_DEBUG(
dbgs() <<
"Soften float result " << ResNo <<
": ";
N->dump(&DAG));
55 switch (
N->getOpcode()) {
58 dbgs() <<
"SoftenFloatResult #" << ResNo <<
": ";
59 N->dump(&DAG);
dbgs() <<
"\n";
70 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(
N, ResNo);
break;
100 case ISD::FMA:
R = SoftenFloatRes_FMA(
N);
break;
119 R = SoftenFloatRes_FFREXP(
N);
154 R = SoftenFloatRes_VECREDUCE(
N);
158 R = SoftenFloatRes_VECREDUCE_SEQ(
N);
165 SetSoftenedFloat(
SDValue(
N, ResNo), R);
170 bool IsStrict =
N->isStrictFPOpcode();
172 unsigned Offset = IsStrict ? 1 : 0;
174 "Unexpected number of operands!");
178 EVT OpVT =
N->getOperand(0 +
Offset).getValueType();
180 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
184 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
189 bool IsStrict =
N->isStrictFPOpcode();
191 unsigned Offset = IsStrict ? 1 : 0;
193 "Unexpected number of operands!");
195 GetSoftenedFloat(
N->getOperand(1 +
Offset)) };
198 EVT OpsVT[2] = {
N->getOperand(0 +
Offset).getValueType(),
199 N->getOperand(1 +
Offset).getValueType() };
201 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT, Ops,
205 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
210 return BitConvertToInteger(
N->getOperand(0));
216 GetSoftenedFloat(
N->getOperand(0)));
222 GetSoftenedFloat(
N->getOperand(0)));
228 SDValue Op = DisintegrateMERGE_VALUES(
N, ResNo);
229 return BitConvertToInteger(
Op);
237 BitConvertToInteger(
N->getOperand(0)),
238 BitConvertToInteger(
N->getOperand(1)));
254 APInt Val(128, words);
265SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(
SDNode *
N,
unsigned ResNo) {
266 SDValue NewOp = BitConvertVectorToIntegerVector(
N->getOperand(0));
269 NewOp,
N->getOperand(1));
280 SDValue Op = GetSoftenedFloat(
N->getOperand(0));
286 return SoftenFloatRes_SELECT_CC(SelCC.getNode());
292 RTLIB::FMIN_PPCF128));
297 return SoftenFloatRes_SELECT_CC(SelCC.getNode());
303 RTLIB::FMAX_PPCF128));
312 RTLIB::ADD_PPCF128));
321 RTLIB::CBRT_PPCF128));
330 RTLIB::CEIL_PPCF128));
335 SDValue RHS = BitConvertToInteger(
N->getOperand(1));
338 EVT LVT =
LHS.getValueType();
339 EVT RVT =
RHS.getValueType();
360 }
else if (SizeDiff < 0) {
387 RTLIB::COS_PPCF128));
396 RTLIB::DIV_PPCF128));
405 RTLIB::EXP_PPCF128));
414 RTLIB::EXP2_PPCF128));
418 return SoftenFloatRes_Unary(
420 GetFPLibCall(
N->getValueType(0), RTLIB::EXP10_F32, RTLIB::EXP10_F64,
421 RTLIB::EXP10_F80, RTLIB::EXP10_F128, RTLIB::EXP10_PPCF128));
430 RTLIB::FLOOR_PPCF128));
439 RTLIB::LOG_PPCF128));
448 RTLIB::LOG2_PPCF128));
457 RTLIB::LOG10_PPCF128));
461 bool IsStrict =
N->isStrictFPOpcode();
463 unsigned Offset = IsStrict ? 1 : 0;
465 GetSoftenedFloat(
N->getOperand(1 +
Offset)),
466 GetSoftenedFloat(
N->getOperand(2 +
Offset)) };
469 EVT OpsVT[3] = {
N->getOperand(0 +
Offset).getValueType(),
470 N->getOperand(1 +
Offset).getValueType(),
471 N->getOperand(2 +
Offset).getValueType() };
473 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG,
480 NVT, Ops, CallOptions,
SDLoc(
N), Chain);
482 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
492 RTLIB::MUL_PPCF128));
497 RTLIB::NEARBYINT_F32,
498 RTLIB::NEARBYINT_F64,
499 RTLIB::NEARBYINT_F80,
500 RTLIB::NEARBYINT_F128,
501 RTLIB::NEARBYINT_PPCF128));
515 bool IsStrict =
N->isStrictFPOpcode();
522 Op = GetPromotedFloat(
Op);
525 if (
Op.getValueType() ==
N->getValueType(0)) {
527 ReplaceValueWith(
SDValue(
N, 1), Chain);
528 return BitConvertToInteger(
Op);
536 if ((
Op.getValueType() == MVT::f16 ||
Op.getValueType() == MVT::bf16) &&
537 N->getValueType(0) != MVT::f32) {
540 { MVT::f32, MVT::Other }, { Chain,
Op });
541 Chain =
Op.getValue(1);
547 if (
Op.getValueType() == MVT::bf16) {
549 return SoftenFloatRes_BF16_TO_FP(
N);
553 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported FP_EXTEND!");
555 EVT OpVT =
N->getOperand(IsStrict ? 1 : 0).getValueType();
557 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
561 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
571 EVT OpsVT[1] = {
N->getOperand(0).getValueType() };
574 CallOptions,
SDLoc(
N)).first;
575 if (
N->getValueType(0) == MVT::f32)
580 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported FP_EXTEND!");
587 assert(
N->getValueType(0) == MVT::f32 &&
588 "Can only soften BF16_TO_FP with f32 result");
600 bool IsStrict =
N->isStrictFPOpcode();
605 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported FP_ROUND!");
607 EVT OpVT =
N->getOperand(IsStrict ? 1 : 0).getValueType();
609 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
613 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
623 RTLIB::POW_PPCF128));
627 bool IsStrict =
N->isStrictFPOpcode();
628 unsigned Offset = IsStrict ? 1 : 0;
629 assert((
N->getOperand(1 +
Offset).getValueType() == MVT::i16 ||
630 N->getOperand(1 +
Offset).getValueType() == MVT::i32) &&
631 "Unsupported power type!");
637 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unexpected fpowi.");
646 N->getOperand(1 +
Offset).getValueType().getSizeInBits()) {
658 EVT OpsVT[2] = {
N->getOperand(0 +
Offset).getValueType(),
659 N->getOperand(1 +
Offset).getValueType() };
661 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT, Ops,
665 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
670 assert(!
N->isStrictFPOpcode() &&
"strictfp not implemented for frexp");
671 EVT VT0 =
N->getValueType(0);
672 EVT VT1 =
N->getValueType(1);
689 SDValue Ops[2] = {GetSoftenedFloat(
N->getOperand(0)), StackSlot};
696 auto [ReturnVal, Chain] = TLI.
makeLibCall(DAG, LC, NVT0, Ops, CallOptions,
DL,
698 int FrameIdx = cast<FrameIndexSDNode>(StackSlot)->getIndex();
704 ReplaceValueWith(
SDValue(
N, 1), LoadExp);
714 RTLIB::REM_PPCF128));
723 RTLIB::RINT_PPCF128));
732 RTLIB::ROUND_PPCF128));
737 RTLIB::ROUNDEVEN_F32,
738 RTLIB::ROUNDEVEN_F64,
739 RTLIB::ROUNDEVEN_F80,
740 RTLIB::ROUNDEVEN_F128,
741 RTLIB::ROUNDEVEN_PPCF128));
750 RTLIB::SIN_PPCF128));
759 RTLIB::SQRT_PPCF128));
768 RTLIB::SUB_PPCF128));
777 RTLIB::TRUNC_PPCF128));
782 EVT VT =
N->getValueType(0);
787 L->getMemOperand()->getFlags() &
791 NewL = DAG.
getLoad(
L->getAddressingMode(),
L->getExtensionType(), NVT, dl,
792 L->getChain(),
L->getBasePtr(),
L->getOffset(),
793 L->getPointerInfo(), NVT,
L->getOriginalAlign(),
794 MMOFlags,
L->getAAInfo());
803 dl,
L->getChain(),
L->getBasePtr(),
L->getOffset(),
804 L->getPointerInfo(),
L->getMemoryVT(),
805 L->getOriginalAlign(), MMOFlags,
L->getAAInfo());
810 return BitConvertToInteger(ExtendNode);
817 LHS.getValueType(),
N->getOperand(0), LHS, RHS);
824 LHS.getValueType(),
N->getOperand(0),
825 N->getOperand(1), LHS, RHS,
N->getOperand(4));
830 N->getValueType(0)));
836 EVT VT =
N->getValueType(0);
841 NewVAARG = DAG.
getVAArg(NVT, dl, Chain,
Ptr,
N->getOperand(2),
842 N->getConstantOperandVal(3));
852 bool IsStrict =
N->isStrictFPOpcode();
855 EVT SVT =
N->getOperand(IsStrict ? 1 : 0).getValueType();
856 EVT RVT =
N->getValueType(0);
864 for (
unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
865 t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; ++t) {
871 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported XINT_TO_FP!");
876 NVT,
N->getOperand(IsStrict ? 1 : 0));
880 std::pair<SDValue, SDValue> Tmp =
882 Op, CallOptions, dl, Chain);
885 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
895SDValue DAGTypeLegalizer::SoftenFloatRes_VECREDUCE_SEQ(
SDNode *
N) {
904bool DAGTypeLegalizer::SoftenFloatOperand(
SDNode *
N,
unsigned OpNo) {
905 LLVM_DEBUG(
dbgs() <<
"Soften float operand " << OpNo <<
": ";
N->dump(&DAG));
908 switch (
N->getOpcode()) {
911 dbgs() <<
"SoftenFloatOperand Op #" << OpNo <<
": ";
912 N->dump(&DAG);
dbgs() <<
"\n";
917 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(
N);
break;
930 Res = SoftenFloatOp_FP_TO_XINT_SAT(
N);
break;
936 case ISD::LRINT: Res = SoftenFloatOp_LRINT(
N);
break;
942 case ISD::SETCC: Res = SoftenFloatOp_SETCC(
N);
break;
943 case ISD::STORE: Res = SoftenFloatOp_STORE(
N, OpNo);
break;
948 if (!Res.
getNode())
return false;
956 "Invalid operand softening");
958 ReplaceValueWith(
SDValue(
N, 0), Res);
963 SDValue Op0 = GetSoftenedFloat(
N->getOperand(0));
977 bool IsStrict =
N->isStrictFPOpcode();
979 EVT SVT =
Op.getValueType();
980 EVT RVT =
N->getValueType(0);
987 FloatRVT = MVT::bf16;
990 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported FP_ROUND libcall");
993 Op = GetSoftenedFloat(
Op);
996 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, RVT,
Op,
1000 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1001 ReplaceValueWith(
SDValue(
N, 0), Tmp.first);
1008 SDValue NewLHS =
N->getOperand(2), NewRHS =
N->getOperand(3);
1009 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(1))->get();
1012 NewLHS = GetSoftenedFloat(NewLHS);
1013 NewRHS = GetSoftenedFloat(NewRHS);
1015 N->getOperand(2),
N->getOperand(3));
1019 if (!NewRHS.getNode()) {
1037 for (
unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
1038 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
1042 if (Promoted.
bitsGE(RetVT))
1050 bool IsStrict =
N->isStrictFPOpcode();
1054 SDValue Op =
N->getOperand(IsStrict ? 1 : 0);
1055 EVT SVT =
Op.getValueType();
1056 EVT RVT =
N->getValueType(0);
1066 "Unsupported FP_TO_XINT!");
1068 Op = GetSoftenedFloat(
Op);
1072 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
1073 CallOptions, dl, Chain);
1081 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1082 ReplaceValueWith(
SDValue(
N, 0), Res);
1086SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT_SAT(
SDNode *
N) {
1092 SDValue NewLHS =
N->getOperand(0), NewRHS =
N->getOperand(1);
1093 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(4))->get();
1096 NewLHS = GetSoftenedFloat(NewLHS);
1097 NewRHS = GetSoftenedFloat(NewRHS);
1099 N->getOperand(0),
N->getOperand(1));
1103 if (!NewRHS.getNode()) {
1110 N->getOperand(2),
N->getOperand(3),
1116 bool IsStrict =
N->isStrictFPOpcode();
1117 SDValue Op0 =
N->getOperand(IsStrict ? 1 : 0);
1118 SDValue Op1 =
N->getOperand(IsStrict ? 2 : 1);
1121 cast<CondCodeSDNode>(
N->getOperand(IsStrict ? 3 : 2))->get();
1124 SDValue NewLHS = GetSoftenedFloat(Op0);
1125 SDValue NewRHS = GetSoftenedFloat(Op1);
1141 "Unexpected setcc expansion!");
1144 ReplaceValueWith(
SDValue(
N, 0), NewLHS);
1145 ReplaceValueWith(
SDValue(
N, 1), Chain);
1151SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(
SDNode *
N,
unsigned OpNo) {
1153 assert(OpNo == 1 &&
"Can only soften the stored value!");
1158 if (
ST->isTruncatingStore())
1160 Val = BitConvertToInteger(
1164 Val = GetSoftenedFloat(Val);
1166 return DAG.
getStore(
ST->getChain(), dl, Val,
ST->getBasePtr(),
1167 ST->getMemOperand());
1172 SDValue RHS = BitConvertToInteger(
N->getOperand(1));
1175 EVT LVT =
LHS.getValueType();
1177 EVT RVT =
RHS.getValueType();
1183 int SizeDiff = RSize - LSize;
1191 }
else if (SizeDiff < 0) {
1206 bool IsStrict =
N->isStrictFPOpcode();
1207 unsigned Offset = IsStrict ? 1 : 0;
1211 EVT OpVT =
N->getOperand(0 +
Offset).getValueType();
1213 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
1217 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1218 ReplaceValueWith(
SDValue(
N, 0), Tmp.first);
1226 EVT OpVT =
N->getOperand(
N->isStrictFPOpcode() ? 1 : 0).getValueType();
1232 RTLIB::LROUND_PPCF128));
1236 EVT OpVT =
N->getOperand(
N->isStrictFPOpcode() ? 1 : 0).getValueType();
1241 RTLIB::LLROUND_F128,
1242 RTLIB::LLROUND_PPCF128));
1246 EVT OpVT =
N->getOperand(
N->isStrictFPOpcode() ? 1 : 0).getValueType();
1252 RTLIB::LRINT_PPCF128));
1256 EVT OpVT =
N->getOperand(
N->isStrictFPOpcode() ? 1 : 0).getValueType();
1262 RTLIB::LLRINT_PPCF128));
1273void DAGTypeLegalizer::ExpandFloatResult(
SDNode *
N,
unsigned ResNo) {
1279 if (CustomLowerNode(
N,
N->getValueType(ResNo),
true))
1282 switch (
N->getOpcode()) {
1285 dbgs() <<
"ExpandFloatResult #" << ResNo <<
": ";
1286 N->dump(&DAG);
dbgs() <<
"\n";
1379 "Do not know how to expand this float constant!");
1380 APInt C = cast<ConstantFPSDNode>(
N)->getValueAPF().bitcastToAPInt();
1383 APInt(64,
C.getRawData()[1])),
1386 APInt(64,
C.getRawData()[0])),
1392 bool IsStrict =
N->isStrictFPOpcode();
1393 unsigned Offset = IsStrict ? 1 : 0;
1397 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC,
N->getValueType(0),
1401 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1402 GetPairElements(Tmp.first,
Lo,
Hi);
1407 bool IsStrict =
N->isStrictFPOpcode();
1408 unsigned Offset = IsStrict ? 1 : 0;
1412 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC,
N->getValueType(0),
1413 Ops, CallOptions,
SDLoc(
N),
1416 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1417 GetPairElements(Tmp.first,
Lo,
Hi);
1422 assert(
N->getValueType(0) == MVT::ppcf128 &&
1423 "Logic only correct for ppcf128!");
1426 GetExpandedFloat(
N->getOperand(0),
Lo, Tmp);
1437 RTLIB::FMIN_F32, RTLIB::FMIN_F64,
1438 RTLIB::FMIN_F80, RTLIB::FMIN_F128,
1439 RTLIB::FMIN_PPCF128),
Lo,
Hi);
1445 RTLIB::FMAX_F32, RTLIB::FMAX_F64,
1446 RTLIB::FMAX_F80, RTLIB::FMAX_F128,
1447 RTLIB::FMAX_PPCF128),
Lo,
Hi);
1453 RTLIB::ADD_F32, RTLIB::ADD_F64,
1454 RTLIB::ADD_F80, RTLIB::ADD_F128,
1455 RTLIB::ADD_PPCF128),
Lo,
Hi);
1460 ExpandFloatRes_Unary(
N,
GetFPLibCall(
N->getValueType(0), RTLIB::CBRT_F32,
1461 RTLIB::CBRT_F64, RTLIB::CBRT_F80,
1463 RTLIB::CBRT_PPCF128),
Lo,
Hi);
1466void DAGTypeLegalizer::ExpandFloatRes_FCEIL(
SDNode *
N,
1469 RTLIB::CEIL_F32, RTLIB::CEIL_F64,
1470 RTLIB::CEIL_F80, RTLIB::CEIL_F128,
1471 RTLIB::CEIL_PPCF128),
Lo,
Hi);
1474void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(
SDNode *
N,
1477 RTLIB::COPYSIGN_F32,
1478 RTLIB::COPYSIGN_F64,
1479 RTLIB::COPYSIGN_F80,
1480 RTLIB::COPYSIGN_F128,
1481 RTLIB::COPYSIGN_PPCF128),
Lo,
Hi);
1484void DAGTypeLegalizer::ExpandFloatRes_FCOS(
SDNode *
N,
1487 RTLIB::COS_F32, RTLIB::COS_F64,
1488 RTLIB::COS_F80, RTLIB::COS_F128,
1489 RTLIB::COS_PPCF128),
Lo,
Hi);
1499 RTLIB::DIV_PPCF128),
Lo,
Hi);
1502void DAGTypeLegalizer::ExpandFloatRes_FEXP(
SDNode *
N,
1505 RTLIB::EXP_F32, RTLIB::EXP_F64,
1506 RTLIB::EXP_F80, RTLIB::EXP_F128,
1507 RTLIB::EXP_PPCF128),
Lo,
Hi);
1510void DAGTypeLegalizer::ExpandFloatRes_FEXP2(
SDNode *
N,
1513 RTLIB::EXP2_F32, RTLIB::EXP2_F64,
1514 RTLIB::EXP2_F80, RTLIB::EXP2_F128,
1515 RTLIB::EXP2_PPCF128),
Lo,
Hi);
1520 ExpandFloatRes_Unary(
N,
1522 RTLIB::EXP10_F64, RTLIB::EXP10_F80,
1523 RTLIB::EXP10_F128, RTLIB::EXP10_PPCF128),
1527void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(
SDNode *
N,
1530 RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
1531 RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
1532 RTLIB::FLOOR_PPCF128),
Lo,
Hi);
1535void DAGTypeLegalizer::ExpandFloatRes_FLOG(
SDNode *
N,
1538 RTLIB::LOG_F32, RTLIB::LOG_F64,
1539 RTLIB::LOG_F80, RTLIB::LOG_F128,
1540 RTLIB::LOG_PPCF128),
Lo,
Hi);
1543void DAGTypeLegalizer::ExpandFloatRes_FLOG2(
SDNode *
N,
1546 RTLIB::LOG2_F32, RTLIB::LOG2_F64,
1547 RTLIB::LOG2_F80, RTLIB::LOG2_F128,
1548 RTLIB::LOG2_PPCF128),
Lo,
Hi);
1551void DAGTypeLegalizer::ExpandFloatRes_FLOG10(
SDNode *
N,
1554 RTLIB::LOG10_F32, RTLIB::LOG10_F64,
1555 RTLIB::LOG10_F80, RTLIB::LOG10_F128,
1556 RTLIB::LOG10_PPCF128),
Lo,
Hi);
1561 bool IsStrict =
N->isStrictFPOpcode();
1562 unsigned Offset = IsStrict ? 1 : 0;
1572 RTLIB::FMA_PPCF128),
1573 N->getValueType(0), Ops, CallOptions,
1576 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1577 GetPairElements(Tmp.first,
Lo,
Hi);
1587 RTLIB::MUL_PPCF128),
Lo,
Hi);
1590void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(
SDNode *
N,
1593 RTLIB::NEARBYINT_F32,
1594 RTLIB::NEARBYINT_F64,
1595 RTLIB::NEARBYINT_F80,
1596 RTLIB::NEARBYINT_F128,
1597 RTLIB::NEARBYINT_PPCF128),
Lo,
Hi);
1603 GetExpandedFloat(
N->getOperand(0),
Lo,
Hi);
1612 bool IsStrict =
N->isStrictFPOpcode();
1617 if (NVT ==
N->getOperand(1).getValueType()) {
1618 Hi =
N->getOperand(1);
1619 Chain =
N->getOperand(0);
1623 {
N->getOperand(0),
N->getOperand(1) });
1624 Chain =
Hi.getValue(1);
1634 ReplaceValueWith(
SDValue(
N, 1), Chain);
1637void DAGTypeLegalizer::ExpandFloatRes_FPOW(
SDNode *
N,
1640 RTLIB::POW_F32, RTLIB::POW_F64,
1641 RTLIB::POW_F80, RTLIB::POW_F128,
1642 RTLIB::POW_PPCF128),
Lo,
Hi);
1645void DAGTypeLegalizer::ExpandFloatRes_FPOWI(
SDNode *
N,
1655void DAGTypeLegalizer::ExpandFloatRes_FREEZE(
SDNode *
N,
1657 assert(
N->getValueType(0) == MVT::ppcf128 &&
1658 "Logic only correct for ppcf128!");
1661 GetExpandedFloat(
N->getOperand(0),
Lo,
Hi);
1666void DAGTypeLegalizer::ExpandFloatRes_FREM(
SDNode *
N,
1669 RTLIB::REM_F32, RTLIB::REM_F64,
1670 RTLIB::REM_F80, RTLIB::REM_F128,
1671 RTLIB::REM_PPCF128),
Lo,
Hi);
1674void DAGTypeLegalizer::ExpandFloatRes_FRINT(
SDNode *
N,
1677 RTLIB::RINT_F32, RTLIB::RINT_F64,
1678 RTLIB::RINT_F80, RTLIB::RINT_F128,
1679 RTLIB::RINT_PPCF128),
Lo,
Hi);
1682void DAGTypeLegalizer::ExpandFloatRes_FROUND(
SDNode *
N,
1689 RTLIB::ROUND_PPCF128),
Lo,
Hi);
1692void DAGTypeLegalizer::ExpandFloatRes_FROUNDEVEN(
SDNode *
N,
1695 RTLIB::ROUNDEVEN_F32,
1696 RTLIB::ROUNDEVEN_F64,
1697 RTLIB::ROUNDEVEN_F80,
1698 RTLIB::ROUNDEVEN_F128,
1699 RTLIB::ROUNDEVEN_PPCF128),
Lo,
Hi);
1702void DAGTypeLegalizer::ExpandFloatRes_FSIN(
SDNode *
N,
1705 RTLIB::SIN_F32, RTLIB::SIN_F64,
1706 RTLIB::SIN_F80, RTLIB::SIN_F128,
1707 RTLIB::SIN_PPCF128),
Lo,
Hi);
1710void DAGTypeLegalizer::ExpandFloatRes_FSQRT(
SDNode *
N,
1713 RTLIB::SQRT_F32, RTLIB::SQRT_F64,
1714 RTLIB::SQRT_F80, RTLIB::SQRT_F128,
1715 RTLIB::SQRT_PPCF128),
Lo,
Hi);
1725 RTLIB::SUB_PPCF128),
Lo,
Hi);
1728void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(
SDNode *
N,
1731 RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
1732 RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
1733 RTLIB::TRUNC_PPCF128),
Lo,
Hi);
1739 ExpandRes_NormalLoad(
N,
Lo,
Hi);
1751 assert(
LD->getMemoryVT().bitsLE(NVT) &&
"Float type not round?");
1754 LD->getMemoryVT(),
LD->getMemOperand());
1757 Chain =
Hi.getValue(1);
1765 ReplaceValueWith(
SDValue(LD, 1), Chain);
1770 assert(
N->getValueType(0) == MVT::ppcf128 &&
"Unsupported XINT_TO_FP!");
1771 EVT VT =
N->getValueType(0);
1773 bool Strict =
N->isStrictFPOpcode();
1774 SDValue Src =
N->getOperand(Strict ? 1 : 0);
1775 EVT SrcVT = Src.getValueType();
1783 Flags.setNoFPExcept(
N->getFlags().hasNoFPExcept());
1788 if (SrcVT.
bitsLE(MVT::i32)) {
1794 {Chain, Src}, Flags);
1795 Chain =
Hi.getValue(1);
1797 Hi = DAG.
getNode(
N->getOpcode(), dl, NVT, Src);
1800 if (SrcVT.
bitsLE(MVT::i64)) {
1803 LC = RTLIB::SINTTOFP_I64_PPCF128;
1804 }
else if (SrcVT.
bitsLE(MVT::i128)) {
1806 LC = RTLIB::SINTTOFP_I128_PPCF128;
1808 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported XINT_TO_FP!");
1812 std::pair<SDValue, SDValue> Tmp =
1813 TLI.
makeLibCall(DAG, LC, VT, Src, CallOptions, dl, Chain);
1816 GetPairElements(Tmp.first,
Lo,
Hi);
1822 ReplaceValueWith(
SDValue(
N, 1), Chain);
1832 SrcVT = Src.getValueType();
1835 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
1836 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
1837 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
1859 {Chain, Hi, NewLo}, Flags);
1860 Chain =
Lo.getValue(1);
1861 ReplaceValueWith(
SDValue(
N, 1), Chain);
1866 GetPairElements(
Lo,
Lo,
Hi);
1878bool DAGTypeLegalizer::ExpandFloatOperand(
SDNode *
N,
unsigned OpNo) {
1883 if (CustomLowerNode(
N,
N->getOperand(OpNo).getValueType(),
false))
1886 switch (
N->getOpcode()) {
1889 dbgs() <<
"ExpandFloatOperand Op #" << OpNo <<
": ";
1890 N->dump(&DAG);
dbgs() <<
"\n";
1898 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(
N);
break;
1906 case ISD::LROUND: Res = ExpandFloatOp_LROUND(
N);
break;
1908 case ISD::LRINT: Res = ExpandFloatOp_LRINT(
N);
break;
1909 case ISD::LLRINT: Res = ExpandFloatOp_LLRINT(
N);
break;
1913 case ISD::SETCC: Res = ExpandFloatOp_SETCC(
N);
break;
1914 case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(
N),
1919 if (!Res.
getNode())
return false;
1927 "Invalid operand expansion");
1929 ReplaceValueWith(
SDValue(
N, 0), Res);
1935void DAGTypeLegalizer::FloatExpandSetCCOperands(
SDValue &NewLHS,
1940 SDValue LHSLo, LHSHi, RHSLo, RHSHi;
1941 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1942 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1951 SDValue Tmp1, Tmp2, Tmp3, OutputChain;
1956 RHSLo, CCCode, OutputChain, IsSignaling);
1964 RHSHi, CCCode, OutputChain, IsSignaling);
1969 Chain = OutputChain;
1973 SDValue NewLHS =
N->getOperand(2), NewRHS =
N->getOperand(3);
1974 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(1))->get();
1976 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode,
SDLoc(
N), Chain);
1988 N->getOperand(4)), 0);
1992 assert(
N->getOperand(1).getValueType() == MVT::ppcf128 &&
1993 "Logic only correct for ppcf128!");
1995 GetExpandedFloat(
N->getOperand(1),
Lo,
Hi);
1999 N->getValueType(0),
N->getOperand(0),
Hi);
2003 bool IsStrict =
N->isStrictFPOpcode();
2004 assert(
N->getOperand(IsStrict ? 1 : 0).getValueType() == MVT::ppcf128 &&
2005 "Logic only correct for ppcf128!");
2007 GetExpandedFloat(
N->getOperand(IsStrict ? 1 : 0),
Lo,
Hi);
2012 N->getValueType(0),
Hi,
N->getOperand(1));
2016 if (
Hi.getValueType() ==
N->getValueType(0)) {
2018 ReplaceValueWith(
SDValue(
N, 1),
N->getOperand(0));
2024 {
N->getValueType(0), MVT::Other},
2025 {
N->getOperand(0),
Hi,
N->getOperand(2)});
2032 EVT RVT =
N->getValueType(0);
2035 bool IsStrict =
N->isStrictFPOpcode();
2038 SDValue Op =
N->getOperand(IsStrict ? 1 : 0);
2044 "Unsupported FP_TO_XINT!");
2046 std::pair<SDValue, SDValue> Tmp =
2051 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
2052 ReplaceValueWith(
SDValue(
N, 0), Tmp.first);
2057 SDValue NewLHS =
N->getOperand(0), NewRHS =
N->getOperand(1);
2058 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(4))->get();
2060 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode,
SDLoc(
N), Chain);
2071 N->getOperand(2),
N->getOperand(3),
2076 bool IsStrict =
N->isStrictFPOpcode();
2077 SDValue NewLHS =
N->getOperand(IsStrict ? 1 : 0);
2078 SDValue NewRHS =
N->getOperand(IsStrict ? 2 : 1);
2081 cast<CondCodeSDNode>(
N->getOperand(IsStrict ? 3 : 2))->get();
2082 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode,
SDLoc(
N), Chain,
2088 "Unexpected setcc expansion!");
2090 ReplaceValueWith(
SDValue(
N, 0), NewLHS);
2091 ReplaceValueWith(
SDValue(
N, 1), Chain);
2097SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(
SDNode *
N,
unsigned OpNo) {
2099 return ExpandOp_NormalStore(
N, OpNo);
2102 assert(OpNo == 1 &&
"Can only expand the stored value so far");
2109 ST->getValue().getValueType());
2111 assert(
ST->getMemoryVT().bitsLE(NVT) &&
"Float type not round?");
2115 GetExpandedOp(
ST->getValue(),
Lo,
Hi);
2118 ST->getMemoryVT(),
ST->getMemOperand());
2122 EVT RVT =
N->getValueType(0);
2123 EVT RetVT =
N->getOperand(0).getValueType();
2130 RTLIB::LROUND_PPCF128),
2131 RVT,
N->getOperand(0), CallOptions,
SDLoc(
N)).first;
2135 EVT RVT =
N->getValueType(0);
2136 EVT RetVT =
N->getOperand(0).getValueType();
2142 RTLIB::LLROUND_F128,
2143 RTLIB::LLROUND_PPCF128),
2144 RVT,
N->getOperand(0), CallOptions,
SDLoc(
N)).first;
2148 EVT RVT =
N->getValueType(0);
2149 EVT RetVT =
N->getOperand(0).getValueType();
2156 RTLIB::LRINT_PPCF128),
2157 RVT,
N->getOperand(0), CallOptions,
SDLoc(
N)).first;
2161 EVT RVT =
N->getValueType(0);
2162 EVT RetVT =
N->getOperand(0).getValueType();
2169 RTLIB::LLRINT_PPCF128),
2170 RVT,
N->getOperand(0), CallOptions,
SDLoc(
N)).first;
2179 if (OpVT == MVT::f16) {
2181 }
else if (RetVT == MVT::f16) {
2183 }
else if (OpVT == MVT::bf16) {
2185 }
else if (RetVT == MVT::bf16) {
2193 if (OpVT == MVT::f16)
2196 if (RetVT == MVT::f16)
2199 if (OpVT == MVT::bf16)
2202 if (RetVT == MVT::bf16)
2208bool DAGTypeLegalizer::PromoteFloatOperand(
SDNode *
N,
unsigned OpNo) {
2209 LLVM_DEBUG(
dbgs() <<
"Promote float operand " << OpNo <<
": ";
N->dump(&DAG));
2212 if (CustomLowerNode(
N,
N->getOperand(OpNo).getValueType(),
false)) {
2223 switch (
N->getOpcode()) {
2226 dbgs() <<
"PromoteFloatOperand Op #" << OpNo <<
": ";
2227 N->dump(&DAG);
dbgs() <<
"\n";
2236 case ISD::LLRINT:
R = PromoteFloatOp_UnaryOp(
N, OpNo);
break;
2239 R = PromoteFloatOp_FP_TO_XINT_SAT(
N, OpNo);
break;
2242 R = PromoteFloatOp_STRICT_FP_EXTEND(
N, OpNo);
2245 case ISD::SETCC:
R = PromoteFloatOp_SETCC(
N, OpNo);
break;
2246 case ISD::STORE:
R = PromoteFloatOp_STORE(
N, OpNo);
break;
2251 ReplaceValueWith(
SDValue(
N, 0), R);
2255SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(
SDNode *
N,
unsigned OpNo) {
2257 EVT OpVT =
Op->getValueType(0);
2259 SDValue Promoted = GetPromotedFloat(
N->getOperand(0));
2268 return DAG.
getBitcast(
N->getValueType(0), Convert);
2273SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(
SDNode *
N,
unsigned OpNo) {
2274 assert (OpNo == 1 &&
"Only Operand 1 must need promotion here");
2275 SDValue Op1 = GetPromotedFloat(
N->getOperand(1));
2278 N->getOperand(0), Op1);
2282SDValue DAGTypeLegalizer::PromoteFloatOp_UnaryOp(
SDNode *
N,
unsigned OpNo) {
2283 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2287SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT_SAT(
SDNode *
N,
2289 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2294SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(
SDNode *
N,
unsigned OpNo) {
2295 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2296 EVT VT =
N->getValueType(0);
2299 if (VT ==
Op->getValueType(0))
2306SDValue DAGTypeLegalizer::PromoteFloatOp_STRICT_FP_EXTEND(
SDNode *
N,
2308 assert(OpNo == 1 &&
"Promoting unpromotable operand");
2310 SDValue Op = GetPromotedFloat(
N->getOperand(1));
2311 EVT VT =
N->getValueType(0);
2314 if (VT ==
Op->getValueType(0)) {
2315 ReplaceValueWith(
SDValue(
N, 1),
N->getOperand(0));
2321 N->getOperand(0),
Op);
2329SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(
SDNode *
N,
unsigned OpNo) {
2334 LHS, RHS,
N->getOperand(2),
N->getOperand(3),
2340SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(
SDNode *
N,
unsigned OpNo) {
2341 EVT VT =
N->getValueType(0);
2342 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2343 SDValue Op1 = GetPromotedFloat(
N->getOperand(1));
2344 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(2))->get();
2352SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(
SDNode *
N,
unsigned OpNo) {
2357 SDValue Promoted = GetPromotedFloat(Val);
2358 EVT VT =
ST->getOperand(1).getValueType();
2365 return DAG.
getStore(
ST->getChain(),
DL, NewVal,
ST->getBasePtr(),
2366 ST->getMemOperand());
2373void DAGTypeLegalizer::PromoteFloatResult(
SDNode *
N,
unsigned ResNo) {
2374 LLVM_DEBUG(
dbgs() <<
"Promote float result " << ResNo <<
": ";
N->dump(&DAG));
2378 if (CustomLowerNode(
N,
N->getValueType(ResNo),
true)) {
2383 switch (
N->getOpcode()) {
2390 dbgs() <<
"PromoteFloatResult #" << ResNo <<
": ";
2391 N->dump(&DAG);
dbgs() <<
"\n";
2398 R = PromoteFloatRes_EXTRACT_VECTOR_ELT(
N);
break;
2433 case ISD::FSUB:
R = PromoteFloatRes_BinOp(
N);
break;
2436 case ISD::FMAD:
R = PromoteFloatRes_FMAD(
N);
break;
2444 R = PromoteFloatRes_STRICT_FP_ROUND(
N);
2446 case ISD::LOAD:
R = PromoteFloatRes_LOAD(
N);
break;
2460 R = PromoteFloatRes_VECREDUCE(
N);
2464 R = PromoteFloatRes_VECREDUCE_SEQ(
N);
2469 SetPromotedFloat(
SDValue(
N, ResNo), R);
2478 EVT VT =
N->getValueType(0);
2483 N->getOperand(0).getValueType().getSizeInBits());
2490 EVT VT =
N->getValueType(0);
2509SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(
SDNode *
N) {
2514 if (isa<ConstantSDNode>(
N->getOperand(1))) {
2522 switch (getTypeAction(VecVT)) {
2525 SDValue Res = GetScalarizedVector(
N->getOperand(0));
2526 ReplaceValueWith(
SDValue(
N, 0), Res);
2530 Vec = GetWidenedVector(Vec);
2532 ReplaceValueWith(
SDValue(
N, 0), Res);
2537 GetSplitVector(Vec,
Lo,
Hi);
2539 uint64_t LoElts =
Lo.getValueType().getVectorNumElements();
2541 if (IdxVal < LoElts)
2546 Idx.getValueType()));
2547 ReplaceValueWith(
SDValue(
N, 0), Res);
2555 SDValue NewOp = BitConvertVectorToIntegerVector(
N->getOperand(0));
2560 NewOp,
N->getOperand(1));
2563 EVT VT =
N->getValueType(0);
2572 EVT VT =
N->getValueType(0);
2574 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2585 EVT VT =
N->getValueType(0);
2587 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2596 EVT VT =
N->getValueType(0);
2598 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2599 SDValue Op1 = GetPromotedFloat(
N->getOperand(1));
2600 return DAG.
getNode(
N->getOpcode(),
SDLoc(
N), NVT, Op0, Op1,
N->getFlags());
2604 EVT VT =
N->getValueType(0);
2606 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2607 SDValue Op1 = GetPromotedFloat(
N->getOperand(1));
2608 SDValue Op2 = GetPromotedFloat(
N->getOperand(2));
2610 return DAG.
getNode(
N->getOpcode(),
SDLoc(
N), NVT, Op0, Op1, Op2);
2615 EVT VT =
N->getValueType(0);
2617 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2624 EVT VT =
N->getValueType(0);
2626 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2640 EVT VT =
N->getValueType(0);
2641 EVT OpVT =
Op->getValueType(0);
2653SDValue DAGTypeLegalizer::PromoteFloatRes_STRICT_FP_ROUND(
SDNode *
N) {
2658 EVT VT =
N->getValueType(0);
2659 EVT OpVT =
Op->getValueType(0);
2676 EVT VT =
N->getValueType(0);
2681 L->getAddressingMode(),
L->getExtensionType(), IVT,
SDLoc(
N),
2682 L->getChain(),
L->getBasePtr(),
L->getOffset(),
L->getPointerInfo(), IVT,
2683 L->getOriginalAlign(),
L->getMemOperand()->getFlags(),
L->getAAInfo());
2699 N->getOperand(0), TrueVal, FalseVal);
2709 TrueVal.getNode()->getValueType(0),
N->getOperand(0),
2710 N->getOperand(1), TrueVal, FalseVal,
N->getOperand(4));
2717 EVT VT =
N->getValueType(0);
2729 N->getValueType(0)));
2741SDValue DAGTypeLegalizer::PromoteFloatRes_VECREDUCE_SEQ(
SDNode *
N) {
2747 EVT VT =
N->getValueType(0);
2758 { AM->getChain(), AM->getBasePtr(), CastVal },
2781void DAGTypeLegalizer::SoftPromoteHalfResult(
SDNode *
N,
unsigned ResNo) {
2782 LLVM_DEBUG(
dbgs() <<
"Soft promote half result " << ResNo <<
": ";
2787 if (CustomLowerNode(
N,
N->getValueType(ResNo),
true)) {
2792 switch (
N->getOpcode()) {
2795 dbgs() <<
"SoftPromoteHalfResult #" << ResNo <<
": ";
2796 N->dump(&DAG);
dbgs() <<
"\n";
2804 R = SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(
N);
break;
2842 case ISD::FSUB:
R = SoftPromoteHalfRes_BinOp(
N);
break;
2845 case ISD::FMAD:
R = SoftPromoteHalfRes_FMAD(
N);
break;
2852 case ISD::LOAD:
R = SoftPromoteHalfRes_LOAD(
N);
break;
2857 case ISD::UNDEF:
R = SoftPromoteHalfRes_UNDEF(
N);
break;
2865 R = SoftPromoteHalfRes_VECREDUCE(
N);
2869 R = SoftPromoteHalfRes_VECREDUCE_SEQ(
N);
2874 SetSoftPromotedHalf(
SDValue(
N, ResNo), R);
2878 return BitConvertToInteger(
N->getOperand(0));
2881SDValue DAGTypeLegalizer::SoftPromoteHalfRes_ConstantFP(
SDNode *
N) {
2889SDValue DAGTypeLegalizer::SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(
SDNode *
N) {
2890 SDValue NewOp = BitConvertVectorToIntegerVector(
N->getOperand(0));
2896SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FCOPYSIGN(
SDNode *
N) {
2897 SDValue LHS = GetSoftPromotedHalf(
N->getOperand(0));
2898 SDValue RHS = BitConvertToInteger(
N->getOperand(1));
2901 EVT LVT =
LHS.getValueType();
2902 EVT RVT =
RHS.getValueType();
2923 }
else if (SizeDiff < 0) {
2945 EVT OVT =
N->getValueType(0);
2947 SDValue Op0 = GetSoftPromotedHalf(
N->getOperand(0));
2948 SDValue Op1 = GetSoftPromotedHalf(
N->getOperand(1));
2949 SDValue Op2 = GetSoftPromotedHalf(
N->getOperand(2));
2954 Op0 = DAG.
getNode(PromotionOpcode, dl, NVT, Op0);
2955 Op1 = DAG.
getNode(PromotionOpcode, dl, NVT, Op1);
2956 Op2 = DAG.
getNode(PromotionOpcode, dl, NVT, Op2);
2965 EVT OVT =
N->getValueType(0);
2967 SDValue Op0 = GetSoftPromotedHalf(
N->getOperand(0));
2981 EVT OVT =
N->getValueType(0);
2983 SDValue Op = GetSoftPromotedHalf(
N->getOperand(0));
2998SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FP_ROUND(
SDNode *
N) {
2999 EVT RVT =
N->getValueType(0);
3000 EVT SVT =
N->getOperand(0).getValueType();
3002 if (
N->isStrictFPOpcode()) {
3005 if (RVT == MVT::f16)
3007 else if (RVT == MVT::bf16)
3012 {
N->getOperand(0),
N->getOperand(1)});
3027 DAG.
getLoad(
L->getAddressingMode(),
L->getExtensionType(), MVT::i16,
3028 SDLoc(
N),
L->getChain(),
L->getBasePtr(),
L->getOffset(),
3029 L->getPointerInfo(), MVT::i16,
L->getOriginalAlign(),
3030 L->getMemOperand()->getFlags(),
L->getAAInfo());
3038 SDValue Op1 = GetSoftPromotedHalf(
N->getOperand(1));
3039 SDValue Op2 = GetSoftPromotedHalf(
N->getOperand(2));
3044SDValue DAGTypeLegalizer::SoftPromoteHalfRes_SELECT_CC(
SDNode *
N) {
3045 SDValue Op2 = GetSoftPromotedHalf(
N->getOperand(2));
3046 SDValue Op3 = GetSoftPromotedHalf(
N->getOperand(3));
3048 N->getOperand(0),
N->getOperand(1), Op2, Op3,
3052SDValue DAGTypeLegalizer::SoftPromoteHalfRes_XINT_TO_FP(
SDNode *
N) {
3053 EVT OVT =
N->getValueType(0);
3068 EVT OVT =
N->getValueType(0);
3070 SDValue Op = GetSoftPromotedHalf(
N->getOperand(0));
3083 EVT OVT =
N->getValueType(0);
3085 SDValue Op0 = GetSoftPromotedHalf(
N->getOperand(0));
3086 SDValue Op1 = GetSoftPromotedHalf(
N->getOperand(1));
3091 Op0 = DAG.
getNode(PromotionOpcode, dl, NVT, Op0);
3092 Op1 = DAG.
getNode(PromotionOpcode, dl, NVT, Op1);
3100SDValue DAGTypeLegalizer::SoftPromoteHalfRes_VECREDUCE(
SDNode *
N) {
3106SDValue DAGTypeLegalizer::SoftPromoteHalfRes_VECREDUCE_SEQ(
SDNode *
N) {
3116bool DAGTypeLegalizer::SoftPromoteHalfOperand(
SDNode *
N,
unsigned OpNo) {
3117 LLVM_DEBUG(
dbgs() <<
"Soft promote half operand " << OpNo <<
": ";
3121 if (CustomLowerNode(
N,
N->getOperand(OpNo).getValueType(),
false)) {
3131 switch (
N->getOpcode()) {
3134 dbgs() <<
"SoftPromoteHalfOperand Op #" << OpNo <<
": ";
3135 N->dump(&DAG);
dbgs() <<
"\n";
3140 case ISD::BITCAST: Res = SoftPromoteHalfOp_BITCAST(
N);
break;
3141 case ISD::FCOPYSIGN: Res = SoftPromoteHalfOp_FCOPYSIGN(
N, OpNo);
break;
3146 Res = SoftPromoteHalfOp_FP_TO_XINT_SAT(
N);
break;
3149 case ISD::SELECT_CC: Res = SoftPromoteHalfOp_SELECT_CC(
N, OpNo);
break;
3150 case ISD::SETCC: Res = SoftPromoteHalfOp_SETCC(
N);
break;
3151 case ISD::STORE: Res = SoftPromoteHalfOp_STORE(
N, OpNo);
break;
3153 Res = SoftPromoteHalfOp_STACKMAP(
N, OpNo);
3156 Res = SoftPromoteHalfOp_PATCHPOINT(
N, OpNo);
3166 "Invalid operand expansion");
3168 ReplaceValueWith(
SDValue(
N, 0), Res);
3173 SDValue Op0 = GetSoftPromotedHalf(
N->getOperand(0));
3180 assert(OpNo == 1 &&
"Only Operand 1 must need promotion here");
3187 Op1 = GetSoftPromotedHalf(Op1);
3190 return DAG.
getNode(
N->getOpcode(), dl,
N->getValueType(0),
N->getOperand(0),
3194SDValue DAGTypeLegalizer::SoftPromoteHalfOp_FP_EXTEND(
SDNode *
N) {
3195 EVT RVT =
N->getValueType(0);
3196 bool IsStrict =
N->isStrictFPOpcode();
3197 SDValue Op =
N->getOperand(IsStrict ? 1 : 0);
3198 EVT SVT =
Op.getValueType();
3199 Op = GetSoftPromotedHalf(
N->getOperand(IsStrict ? 1 : 0));
3203 if (SVT == MVT::f16)
3205 else if (SVT == MVT::bf16)
3211 {
N->getOperand(0),
Op});
3213 ReplaceValueWith(
SDValue(
N, 0), Res);
3220SDValue DAGTypeLegalizer::SoftPromoteHalfOp_FP_TO_XINT(
SDNode *
N) {
3221 EVT RVT =
N->getValueType(0);
3223 EVT SVT =
Op.getValueType();
3228 Op = GetSoftPromotedHalf(
Op);
3232 return DAG.
getNode(
N->getOpcode(), dl,
N->getValueType(0), Res);
3235SDValue DAGTypeLegalizer::SoftPromoteHalfOp_FP_TO_XINT_SAT(
SDNode *
N) {
3236 EVT RVT =
N->getValueType(0);
3238 EVT SVT =
Op.getValueType();
3243 Op = GetSoftPromotedHalf(
Op);
3247 return DAG.
getNode(
N->getOpcode(), dl,
N->getValueType(0), Res,
3253 assert(OpNo == 0 &&
"Can only soften the comparison values");
3261 Op0 = GetSoftPromotedHalf(Op0);
3262 Op1 = GetSoftPromotedHalf(Op1);
3266 Op0 = DAG.
getNode(PromotionOpcode, dl, NVT, Op0);
3267 Op1 = DAG.
getNode(PromotionOpcode, dl, NVT, Op1);
3270 N->getOperand(2),
N->getOperand(3),
N->getOperand(4));
3276 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(2))->get();
3282 Op0 = GetSoftPromotedHalf(Op0);
3283 Op1 = GetSoftPromotedHalf(Op1);
3287 Op0 = DAG.
getNode(PromotionOpcode, dl, NVT, Op0);
3288 Op1 = DAG.
getNode(PromotionOpcode, dl, NVT, Op1);
3293SDValue DAGTypeLegalizer::SoftPromoteHalfOp_STORE(
SDNode *
N,
unsigned OpNo) {
3294 assert(OpNo == 1 &&
"Can only soften the stored value!");
3299 assert(!
ST->isTruncatingStore() &&
"Unexpected truncating store.");
3300 SDValue Promoted = GetSoftPromotedHalf(Val);
3301 return DAG.
getStore(
ST->getChain(), dl, Promoted,
ST->getBasePtr(),
3302 ST->getMemOperand());
3305SDValue DAGTypeLegalizer::SoftPromoteHalfOp_STACKMAP(
SDNode *
N,
unsigned OpNo) {
3309 NewOps[OpNo] = GetSoftPromotedHalf(
Op);
3313 for (
unsigned ResNum = 0; ResNum <
N->getNumValues(); ResNum++)
3324 NewOps[OpNo] = GetSoftPromotedHalf(
Op);
3328 for (
unsigned ResNum = 0; ResNum <
N->getNumValues(); ResNum++)
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static bool isSigned(unsigned int Opcode)
static RTLIB::Libcall findFPToIntLibcall(EVT SrcVT, EVT RetVT, EVT &Promoted, bool Signed)
static RTLIB::Libcall GetFPLibCall(EVT VT, RTLIB::Libcall Call_F32, RTLIB::Libcall Call_F64, RTLIB::Libcall Call_F80, RTLIB::Libcall Call_F128, RTLIB::Libcall Call_PPCF128)
GetFPLibCall - Return the right libcall for the given floating point type.
static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT)
static ISD::NodeType GetPromotionOpcodeStrict(EVT OpVT, EVT RetVT)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
APInt bitcastToAPInt() const
Class for arbitrary precision integers.
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
void clearBit(unsigned BitPosition)
Set a given bit to 0.
static APInt getSignMask(unsigned BitWidth)
Get the SignMask for a specific bit width.
const uint64_t * getRawData() const
This function returns a pointer to the internal storage of the APInt.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
This is an SDNode representing atomic operations.
const SDValue & getVal() const
const APFloat & getValueAPF() const
@ NewNode
This is a new node, not before seen, that was created in the process of legalizing some other node.
This class represents an Operation in the Expression.
void emitError(uint64_t LocCookie, const Twine &ErrorStr)
emitError - Emit an error message to the currently installed error handler with optional location inf...
This class is used to represent ISD::LOAD nodes.
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
@ MOInvariant
The memory access always returns the same value (or traps).
MachineMemOperand * getMemOperand() const
Return a MachineMemOperand object describing the memory reference performed by operation.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
SDNode * getNode() const
get the SDNode which holds the desired result
SDValue getValue(unsigned R) const
EVT getValueType() const
Return the ValueType of the referenced return value.
SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS, SDValue RHS)
Helper function to make it easier to build Select's if you just have operands and don't want to check...
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
SDValue getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond, SDValue Chain=SDValue(), bool IsSignaling=false)
Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SD...
SDValue getConstantFP(double Val, const SDLoc &DL, EVT VT, bool isTarget=false)
Create a ConstantFPSDNode wrapping a constant value.
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands,...
SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, MachineMemOperand *MMO)
Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands.
SDValue getUNDEF(EVT VT)
Return an UNDEF node. UNDEF does not have a useful SDLoc.
SDValue getBitcast(EVT VT, SDValue V)
Return a bitcast using the SDLoc of the value operand, and casting to the provided type.
const DataLayout & getDataLayout() const
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
SDValue getVAArg(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align)
VAArg produces a result and token chain, and takes a pointer and a source value as input.
SDValue getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, EVT SVT, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
static const fltSemantics & EVTToAPFloatSemantics(EVT VT)
Returns an APFloat semantics tag appropriate for the given type.
SDValue getSelectCC(const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue True, SDValue False, ISD::CondCode Cond)
Helper function to make it easier to build SelectCC's if you just have an ISD::CondCode instead of an...
SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL, bool isTarget=false)
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
const TargetLibraryInfo & getLibInfo() const
MachineFunction & getMachineFunction() const
SDValue getCondCode(ISD::CondCode Cond)
LLVMContext * getContext() const
SDValue getShiftAmountConstant(uint64_t Val, EVT VT, const SDLoc &DL, bool LegalTypes=true)
SDValue CreateStackTemporary(TypeSize Bytes, Align Alignment)
Create a stack temporary based on the size in bytes and the alignment.
SDNode * UpdateNodeOperands(SDNode *N, SDValue Op)
Mutate the specified node in-place to have the specified operands.
SDValue getEntryNode() const
Return the token chain corresponding to the entry of the function.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
This class is used to represent ISD::STORE nodes.
unsigned getIntSize() const
Get size of a C-level int or unsigned int, in bits.
EVT getShiftAmountTy(EVT LHSTy, const DataLayout &DL, bool LegalTypes=true) const
Returns the type for the shift amount of a shift opcode.
virtual EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
const char * getLibcallName(RTLIB::Libcall Call) const
Get the libcall routine name for the specified libcall.
void softenSetCCOperands(SelectionDAG &DAG, EVT VT, SDValue &NewLHS, SDValue &NewRHS, ISD::CondCode &CCCode, const SDLoc &DL, const SDValue OldLHS, const SDValue OldRHS) const
Soften the operands of a comparison.
std::pair< SDValue, SDValue > makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT, ArrayRef< SDValue > Ops, MakeLibCallOptions CallOptions, const SDLoc &dl, SDValue Chain=SDValue()) const
Returns a pair of (return value, chain).
SDValue expandVecReduceSeq(SDNode *Node, SelectionDAG &DAG) const
Expand a VECREDUCE_SEQ_* into an explicit ordered calculation.
SDValue expandFP_TO_INT_SAT(SDNode *N, SelectionDAG &DAG) const
Expand FP_TO_[US]INT_SAT into FP_TO_[US]INT and selects or min/max.
SDValue expandVecReduce(SDNode *Node, SelectionDAG &DAG) const
Expand a VECREDUCE_* into an explicit calculation.
SDValue createSelectForFMINNUM_FMAXNUM(SDNode *Node, SelectionDAG &DAG) const
Try to convert the fminnum/fmaxnum to a compare/select sequence.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
@ C
The default llvm calling convention, compatible with C.
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
@ FADD
Simple binary floating point operators.
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
@ SIGN_EXTEND
Conversion operators.
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
@ FNEG
Perform various unary floating-point operations inspired by libm.
@ BR_CC
BR_CC - Conditional branch.
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
@ UNDEF
UNDEF - An undefined node.
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
@ ARITH_FENCE
ARITH_FENCE - This corresponds to a arithmetic fence intrinsic.
@ SHL
Shift and rotation operations.
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
@ AND
Bitwise operators - logical and, logical or, logical xor.
@ STRICT_FADD
Constrained versions of the binary floating point operators.
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
bool isNormalStore(const SDNode *N)
Returns true if the specified node is a non-truncating and unindexed store.
bool isUNINDEXEDLoad(const SDNode *N)
Returns true if the specified node is an unindexed load.
bool isUNINDEXEDStore(const SDNode *N)
Returns true if the specified node is an unindexed store.
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
bool isNormalLoad(const SDNode *N)
Returns true if the specified node is a non-extending and unindexed load.
Libcall getPOWI(EVT RetVT)
getPOWI - Return the POWI_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getSINTTOFP(EVT OpVT, EVT RetVT)
getSINTTOFP - Return the SINTTOFP_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getLDEXP(EVT RetVT)
getLDEXP - Return the LDEXP_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getUINTTOFP(EVT OpVT, EVT RetVT)
getUINTTOFP - Return the UINTTOFP_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getFREXP(EVT RetVT)
getFREXP - Return the FREXP_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall
RTLIB::Libcall enum - This enum defines all of the runtime library calls the backend can emit.
Libcall getFPTOUINT(EVT OpVT, EVT RetVT)
getFPTOUINT - Return the FPTOUINT_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getFPTOSINT(EVT OpVT, EVT RetVT)
getFPTOSINT - Return the FPTOSINT_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getFPEXT(EVT OpVT, EVT RetVT)
getFPEXT - Return the FPEXT_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getFPROUND(EVT OpVT, EVT RetVT)
getFPROUND - Return the FPROUND_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
DiagnosticInfoOptimizationBase::Argument NV
This is an optimization pass for GlobalISel generic memory operations.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
DWARFExpression::Operation Op
static const fltSemantics & PPCDoubleDouble() LLVM_READNONE
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
TypeSize getSizeInBits() const
Return the size of the specified value type in bits.
bool isByteSized() const
Return true if the bit size is a multiple of 8.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
bool bitsGE(EVT VT) const
Return true if this has no less bits than VT.
EVT getVectorElementType() const
Given a vector type, return the type of each element.
bool bitsLE(EVT VT) const
Return true if this has no more bits than VT.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
These are IR-level optimization flags that may be propagated to SDNodes.
This structure is used to pass arguments to makeLibCall function.
MakeLibCallOptions & setSExt(bool Value=true)
MakeLibCallOptions & setTypeListBeforeSoften(ArrayRef< EVT > OpsVT, EVT RetVT, bool Value=true)