27#define DEBUG_TYPE "systemztti"
36 bool UsedAsMemCpySource =
false;
37 for (
const User *U : V->users())
39 if (isa<BitCastInst>(
User) || isa<GetElementPtrInst>(
User)) {
44 if (Memcpy->getOperand(1) == V && !Memcpy->isVolatile()) {
45 UsedAsMemCpySource =
true;
51 return UsedAsMemCpySource;
60 for (
Argument &Arg : Callee->args()) {
61 bool OtherUse =
false;
67 dbgs() <<
"++ SZTTI Adding inlining bonus: " <<
Bonus <<
"\n";);
81 if ((!ST->hasVector() && BitSize > 64) || BitSize > 128)
87 if (Imm.getBitWidth() <= 64) {
89 if (isInt<32>(Imm.getSExtValue()))
92 if (isUInt<32>(Imm.getZExtValue()))
95 if ((Imm.getZExtValue() & 0xffffffff) == 0)
123 case Instruction::GetElementPtr:
130 case Instruction::Store:
131 if (
Idx == 0 && Imm.getBitWidth() <= 64) {
136 if (isInt<16>(Imm.getSExtValue()))
140 case Instruction::ICmp:
141 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
143 if (isInt<32>(Imm.getSExtValue()))
146 if (isUInt<32>(Imm.getZExtValue()))
150 case Instruction::Add:
151 case Instruction::Sub:
152 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
154 if (isUInt<32>(Imm.getZExtValue()))
157 if (isUInt<32>(-Imm.getSExtValue()))
161 case Instruction::Mul:
162 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
164 if (isInt<32>(Imm.getSExtValue()))
168 case Instruction::Or:
169 case Instruction::Xor:
170 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
172 if (isUInt<32>(Imm.getZExtValue()))
175 if ((Imm.getZExtValue() & 0xffffffff) == 0)
179 case Instruction::And:
180 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
185 if (isUInt<32>(~Imm.getZExtValue()))
188 if ((Imm.getZExtValue() & 0xffffffff) == 0xffffffff)
193 if (
TII->isRxSBGMask(Imm.getZExtValue(), BitSize, Start,
End))
197 case Instruction::Shl:
198 case Instruction::LShr:
199 case Instruction::AShr:
204 case Instruction::UDiv:
205 case Instruction::SDiv:
206 case Instruction::URem:
207 case Instruction::SRem:
208 case Instruction::Trunc:
209 case Instruction::ZExt:
210 case Instruction::SExt:
211 case Instruction::IntToPtr:
212 case Instruction::PtrToInt:
213 case Instruction::BitCast:
214 case Instruction::PHI:
215 case Instruction::Call:
216 case Instruction::Select:
217 case Instruction::Ret:
218 case Instruction::Load:
243 case Intrinsic::sadd_with_overflow:
244 case Intrinsic::uadd_with_overflow:
245 case Intrinsic::ssub_with_overflow:
246 case Intrinsic::usub_with_overflow:
248 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
249 if (isUInt<32>(Imm.getZExtValue()))
251 if (isUInt<32>(-Imm.getSExtValue()))
255 case Intrinsic::smul_with_overflow:
256 case Intrinsic::umul_with_overflow:
258 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
259 if (isInt<32>(Imm.getSExtValue()))
263 case Intrinsic::experimental_stackmap:
264 if ((
Idx < 2) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
267 case Intrinsic::experimental_patchpoint_void:
268 case Intrinsic::experimental_patchpoint:
269 if ((
Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
279 if (ST->hasPopulationCount() && TyWidth <= 64)
289 bool HasCall =
false;
291 for (
auto &BB : L->blocks())
292 for (
auto &
I : *BB) {
293 if (isa<CallInst>(&
I) || isa<InvokeInst>(&
I)) {
297 if (
F->getIntrinsicID() == Intrinsic::memcpy ||
298 F->getIntrinsicID() == Intrinsic::memset)
304 if (isa<StoreInst>(&
I)) {
305 Type *MemAccessTy =
I.getOperand(0)->getType();
314 unsigned const NumStoresVal = *NumStores.
getValue();
315 unsigned const Max = (NumStoresVal ? (12 / NumStoresVal) : UINT_MAX);
358 bool Vector = (ClassID == 1);
383 unsigned NumStridedMemAccesses,
384 unsigned NumPrefetches,
385 bool HasCall)
const {
387 if (NumPrefetches > 16)
392 if (NumStridedMemAccesses > 32 && !HasCall &&
393 (NumMemAccesses - NumStridedMemAccesses) * 32 <= NumStridedMemAccesses)
396 return ST->hasMiscellaneousExtensions3() ? 8192 : 2048;
409 assert(
Size > 0 &&
"Element must have non-zero size.");
417 auto *VTy = cast<FixedVectorType>(Ty);
419 assert(WideBits > 0 &&
"Could not compute size of vector");
420 return ((WideBits % 128U) ? ((WideBits / 128U) + 1) : (WideBits / 128U));
432 Op2Info, Args, CxtI);
446 const unsigned DivInstrCost = 20;
447 const unsigned DivMulSeqCost = 10;
448 const unsigned SDivPow2Cost = 4;
451 Opcode == Instruction::SDiv || Opcode == Instruction::SRem;
452 bool UnsignedDivRem =
453 Opcode == Instruction::UDiv || Opcode == Instruction::URem;
456 bool DivRemConst =
false;
457 bool DivRemConstPow2 =
false;
458 if ((SignedDivRem || UnsignedDivRem) && Args.size() == 2) {
459 if (
const Constant *
C = dyn_cast<Constant>(Args[1])) {
461 (
C->getType()->isVectorTy()
462 ? dyn_cast_or_null<const ConstantInt>(
C->getSplatValue())
463 : dyn_cast<const ConstantInt>(
C));
466 DivRemConstPow2 =
true;
476 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub ||
477 Opcode == Instruction::FMul || Opcode == Instruction::FDiv)
481 if (Opcode == Instruction::FRem)
485 if (Args.size() == 2) {
486 if (Opcode == Instruction::Xor) {
487 for (
const Value *
A : Args) {
489 if (
I->hasOneUse() &&
490 (
I->getOpcode() == Instruction::Or ||
491 I->getOpcode() == Instruction::And ||
492 I->getOpcode() == Instruction::Xor))
493 if ((ScalarBits <= 64 && ST->hasMiscellaneousExtensions3()) ||
495 (
I->getOpcode() == Instruction::Or || ST->hasVectorEnhancements1())))
499 else if (Opcode == Instruction::And || Opcode == Instruction::Or) {
500 for (
const Value *
A : Args) {
502 if ((
I->hasOneUse() &&
I->getOpcode() == Instruction::Xor) &&
503 ((ScalarBits <= 64 && ST->hasMiscellaneousExtensions3()) ||
505 (Opcode == Instruction::And || ST->hasVectorEnhancements1()))))
512 if (Opcode == Instruction::Or)
515 if (Opcode == Instruction::Xor && ScalarBits == 1) {
516 if (ST->hasLoadStoreOnCond2())
522 return (SignedDivRem ? SDivPow2Cost : 1);
524 return DivMulSeqCost;
525 if (SignedDivRem || UnsignedDivRem)
528 else if (ST->hasVector()) {
529 auto *VTy = cast<FixedVectorType>(Ty);
530 unsigned VF = VTy->getNumElements();
535 if (Opcode == Instruction::Shl || Opcode == Instruction::LShr ||
536 Opcode == Instruction::AShr) {
541 return (NumVectors * (SignedDivRem ? SDivPow2Cost : 1));
544 return VF * DivMulSeqCost +
547 if ((SignedDivRem || UnsignedDivRem) && VF > 4)
558 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub ||
559 Opcode == Instruction::FMul || Opcode == Instruction::FDiv) {
560 switch (ScalarBits) {
563 if (ST->hasVectorEnhancements1())
588 if (Opcode == Instruction::FRem) {
593 if (VF == 2 && ScalarBits == 32)
611 if (ST->hasVector()) {
627 return (
Index == 0 ? 0 : NumVectors);
634 return NumVectors - 1;
663 "Packing must reduce size of vector type.");
664 assert(cast<FixedVectorType>(SrcTy)->getNumElements() ==
665 cast<FixedVectorType>(DstTy)->getNumElements() &&
666 "Packing should not change number of elements.");
681 unsigned VF = cast<FixedVectorType>(SrcTy)->getNumElements();
682 for (
unsigned P = 0;
P < Log2Diff; ++
P) {
703 "Should only be called with vector types.");
705 unsigned PackCost = 0;
709 if (SrcScalarBits > DstScalarBits)
712 else if (SrcScalarBits < DstScalarBits) {
715 PackCost = Log2Diff * DstNumParts;
717 PackCost += DstNumParts - 1;
726 Type *OpTy =
nullptr;
727 if (
CmpInst *CI = dyn_cast<CmpInst>(
I->getOperand(0)))
728 OpTy = CI->getOperand(0)->getType();
729 else if (
Instruction *LogicI = dyn_cast<Instruction>(
I->getOperand(0)))
730 if (LogicI->getNumOperands() == 2)
731 if (
CmpInst *CI0 = dyn_cast<CmpInst>(LogicI->getOperand(0)))
732 if (isa<CmpInst>(LogicI->getOperand(1)))
733 OpTy = CI0->getOperand(0)->getType();
735 if (OpTy !=
nullptr) {
754 auto *DstVTy = cast<FixedVectorType>(Dst);
755 unsigned VF = DstVTy->getNumElements();
760 if (CmpOpTy !=
nullptr)
762 if (Opcode == Instruction::ZExt || Opcode == Instruction::UIToFP)
776 return BaseCost == 0 ? BaseCost : 1;
779 unsigned DstScalarBits = Dst->getScalarSizeInBits();
780 unsigned SrcScalarBits = Src->getScalarSizeInBits();
782 if (!Src->isVectorTy()) {
783 assert (!Dst->isVectorTy());
785 if (Opcode == Instruction::SIToFP || Opcode == Instruction::UIToFP) {
786 if (Src->isIntegerTy(128))
788 if (SrcScalarBits >= 32 ||
789 (
I !=
nullptr && isa<LoadInst>(
I->getOperand(0))))
791 return SrcScalarBits > 1 ? 2 : 5 ;
794 if ((Opcode == Instruction::FPToSI || Opcode == Instruction::FPToUI) &&
795 Dst->isIntegerTy(128))
798 if ((Opcode == Instruction::ZExt || Opcode == Instruction::SExt)) {
799 if (Src->isIntegerTy(1)) {
800 if (DstScalarBits == 128)
803 if (ST->hasLoadStoreOnCond2())
809 if (Opcode == Instruction::SExt)
810 Cost = (DstScalarBits < 64 ? 3 : 4);
811 if (Opcode == Instruction::ZExt)
819 else if (isInt128InVR(Dst)) {
822 if (Opcode == Instruction::ZExt &&
I !=
nullptr)
823 if (
LoadInst *Ld = dyn_cast<LoadInst>(
I->getOperand(0)))
830 if (Opcode == Instruction::Trunc && isInt128InVR(Src) &&
I !=
nullptr) {
831 if (
LoadInst *Ld = dyn_cast<LoadInst>(
I->getOperand(0)))
834 bool OnlyTruncatingStores =
true;
835 for (
const User *U :
I->users())
836 if (!isa<StoreInst>(U)) {
837 OnlyTruncatingStores =
false;
840 if (OnlyTruncatingStores)
845 else if (ST->hasVector()) {
847 auto *SrcVecTy = cast<FixedVectorType>(Src);
848 auto *DstVecTy = dyn_cast<FixedVectorType>(Dst);
853 unsigned VF = SrcVecTy->getNumElements();
857 if (Opcode == Instruction::Trunc) {
858 if (Src->getScalarSizeInBits() == Dst->getScalarSizeInBits())
863 if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt) {
864 if (SrcScalarBits >= 8) {
866 if (Opcode == Instruction::ZExt)
867 return NumDstVectors;
874 unsigned NumSrcVectorOps =
875 (NumUnpacks > 1 ? (NumDstVectors - NumSrcVectors)
876 : (NumDstVectors / 2));
878 return (NumUnpacks * NumDstVectors) + NumSrcVectorOps;
880 else if (SrcScalarBits == 1)
884 if (Opcode == Instruction::SIToFP || Opcode == Instruction::UIToFP ||
885 Opcode == Instruction::FPToSI || Opcode == Instruction::FPToUI) {
890 if (DstScalarBits == 64 || ST->hasVectorEnhancements2()) {
891 if (SrcScalarBits == DstScalarBits)
892 return NumDstVectors;
894 if (SrcScalarBits == 1)
902 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH,
CostKind);
904 bool NeedsInserts =
true, NeedsExtracts =
true;
906 if (DstScalarBits == 128 &&
907 (Opcode == Instruction::SIToFP || Opcode == Instruction::UIToFP))
908 NeedsInserts =
false;
909 if (SrcScalarBits == 128 &&
910 (Opcode == Instruction::FPToSI || Opcode == Instruction::FPToUI))
911 NeedsExtracts =
false;
919 if (VF == 2 && SrcScalarBits == 32 && DstScalarBits == 32)
925 if (Opcode == Instruction::FPTrunc) {
926 if (SrcScalarBits == 128)
931 return VF / 2 + std::max(1U, VF / 4 );
934 if (Opcode == Instruction::FPExt) {
935 if (SrcScalarBits == 32 && DstScalarBits == 64) {
953 unsigned ExtCost = 0;
956 if (!isa<LoadInst>(
Op) && !isa<ConstantInt>(
Op))
972 case Instruction::ICmp: {
976 if (
I !=
nullptr && (ScalarBits == 32 || ScalarBits == 64))
977 if (
LoadInst *Ld = dyn_cast<LoadInst>(
I->getOperand(0)))
978 if (
const ConstantInt *
C = dyn_cast<ConstantInt>(
I->getOperand(1)))
979 if (!Ld->hasOneUse() && Ld->getParent() ==
I->getParent() &&
988 case Instruction::Select:
994 else if (ST->hasVector()) {
995 unsigned VF = cast<FixedVectorType>(ValTy)->getNumElements();
998 if (Opcode == Instruction::ICmp || Opcode == Instruction::FCmp) {
999 unsigned PredicateExtraCost = 0;
1002 switch (cast<CmpInst>(
I)->getPredicate()) {
1008 PredicateExtraCost = 1;
1014 PredicateExtraCost = 2;
1026 unsigned Cost = (NumVecs_cmp * (CmpCostPerVector + PredicateExtraCost));
1030 assert (Opcode == Instruction::Select);
1034 unsigned PackCost = 0;
1036 if (CmpOpTy !=
nullptr)
1054 return ((
Index % 2 == 0) ? 1 : 0);
1056 if (Opcode == Instruction::ExtractElement) {
1077 unsigned TruncBits = 0;
1078 unsigned SExtBits = 0;
1079 unsigned ZExtBits = 0;
1082 if (isa<TruncInst>(UserI))
1083 TruncBits = UserBits;
1084 else if (isa<SExtInst>(UserI))
1085 SExtBits = UserBits;
1086 else if (isa<ZExtInst>(UserI))
1087 ZExtBits = UserBits;
1089 if (TruncBits || SExtBits || ZExtBits) {
1090 FoldedValue = UserI;
1091 UserI = cast<Instruction>(*UserI->
user_begin());
1094 if ((UserI->
getOpcode() == Instruction::Sub ||
1095 UserI->
getOpcode() == Instruction::SDiv ||
1096 UserI->
getOpcode() == Instruction::UDiv) &&
1101 unsigned LoadOrTruncBits =
1102 ((SExtBits || ZExtBits) ? 0 : (TruncBits ? TruncBits : LoadedBits));
1104 case Instruction::Add:
1105 case Instruction::Sub:
1106 case Instruction::ICmp:
1107 if (LoadedBits == 32 && ZExtBits == 64)
1110 case Instruction::Mul:
1111 if (UserI->
getOpcode() != Instruction::ICmp) {
1112 if (LoadedBits == 16 &&
1114 (SExtBits == 64 && ST->hasMiscellaneousExtensions2())))
1116 if (LoadOrTruncBits == 16)
1120 case Instruction::SDiv:
1121 if (LoadedBits == 32 && SExtBits == 64)
1124 case Instruction::UDiv:
1125 case Instruction::And:
1126 case Instruction::Or:
1127 case Instruction::Xor:
1139 if (UserI->
getOpcode() == Instruction::ICmp)
1141 if (CI->getValue().isIntN(16))
1143 return (LoadOrTruncBits == 32 || LoadOrTruncBits == 64);
1151 if (
auto *CI = dyn_cast<CallInst>(
I))
1152 if (
auto *
F = CI->getCalledFunction())
1153 if (
F->getIntrinsicID() == Intrinsic::bswap)
1164 assert(!Src->isVoidTy() &&
"Invalid type");
1170 if (!Src->isVectorTy() && Opcode == Instruction::Load &&
I !=
nullptr) {
1179 for (
unsigned i = 0; i < 2; ++i) {
1184 LoadInst *OtherLoad = dyn_cast<LoadInst>(OtherOp);
1186 (isa<TruncInst>(OtherOp) || isa<SExtInst>(OtherOp) ||
1187 isa<ZExtInst>(OtherOp)))
1188 OtherLoad = dyn_cast<LoadInst>(OtherOp->getOperand(0));
1204 if (Src->isFP128Ty() && !ST->hasVectorEnhancements1())
1211 if (((!Src->isVectorTy() && NumOps == 1) || ST->hasVectorEnhancements2()) &&
1213 if (Opcode == Instruction::Load &&
I->hasOneUse()) {
1214 const Instruction *LdUser = cast<Instruction>(*
I->user_begin());
1220 else if (
const StoreInst *SI = dyn_cast<StoreInst>(
I)) {
1221 const Value *StoredVal = SI->getValueOperand();
1238 bool UseMaskForCond,
bool UseMaskForGaps) {
1239 if (UseMaskForCond || UseMaskForGaps)
1242 UseMaskForCond, UseMaskForGaps);
1243 assert(isa<VectorType>(VecTy) &&
1244 "Expect a vector type for interleaved memory op");
1246 unsigned NumElts = cast<FixedVectorType>(VecTy)->getNumElements();
1247 assert(Factor > 1 && NumElts % Factor == 0 &&
"Invalid interleave factor");
1248 unsigned VF = NumElts / Factor;
1251 unsigned NumPermutes = 0;
1253 if (Opcode == Instruction::Load) {
1257 BitVector UsedInsts(NumVectorMemOps,
false);
1258 std::vector<BitVector> ValueVecs(Factor,
BitVector(NumVectorMemOps,
false));
1259 for (
unsigned Index : Indices)
1260 for (
unsigned Elt = 0; Elt < VF; ++Elt) {
1261 unsigned Vec = (
Index + Elt * Factor) / NumEltsPerVecReg;
1265 NumVectorMemOps = UsedInsts.
count();
1267 for (
unsigned Index : Indices) {
1271 unsigned NumSrcVecs = ValueVecs[
Index].count();
1273 assert (NumSrcVecs >= NumDstVecs &&
"Expected at least as many sources");
1274 NumPermutes += std::max(1U, NumSrcVecs - NumDstVecs);
1280 unsigned NumSrcVecs = std::min(NumEltsPerVecReg, Factor);
1281 unsigned NumDstVecs = NumVectorMemOps;
1282 NumPermutes += (NumDstVecs * NumSrcVecs) - NumDstVecs;
1286 return NumVectorMemOps + NumPermutes;
1292 if (
RetTy->isVectorTy() &&
ID == Intrinsic::bswap)
1295 if (
ID == Intrinsic::vector_reduce_add) {
1297 auto *VTy = cast<FixedVectorType>(ParamTys.
front());
1298 unsigned NumElements = VTy->getNumElements();
1299 unsigned ScalarSize = VTy->getScalarSizeInBits();
1308 unsigned LastVectorHandling =
1309 2 *
Log2_32_Ceil(std::min(NumElements, MaxElemsPerVector));
1314 int Cost = VectorRegsNeeded + LastVectorHandling - 1;
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
Cost tables and simple lookup functions.
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
const HexagonInstrInfo * TII
static const Function * getCalledFunction(const Value *V, bool &IsNoBuiltin)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file describes how to lower LLVM code to machine code.
Class for arbitrary precision integers.
bool isNegatedPowerOf2() const
Check if this APInt's negated value is a power of two greater than zero.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
This class represents an incoming formal argument to a Function.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
Get intrinsic cost based on arguments.
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false)
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getNumberOfParts(Type *Tp)
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Op0, Value *Op1)
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *Ty, int &Index, VectorType *&SubTy) const
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr)
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args=std::nullopt)
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind)
Estimate the overhead of scalarizing an instruction.
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
size_type count() const
count - Returns the number of bits which are set.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
This class is the base class for the comparison instructions.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
@ ICMP_SLE
signed less or equal
@ ICMP_UGE
unsigned greater or equal
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
@ ICMP_SGE
signed greater or equal
@ ICMP_ULE
unsigned less or equal
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
This is the shared class of boolean and integer constants.
const APInt & getValue() const
Return the constant as an APInt value reference.
This is an important base class in LLVM.
This class represents an Operation in the Expression.
static FixedVectorType * get(Type *ElementType, unsigned NumElts)
std::optional< CostType > getValue() const
This function is intended to be used as sparingly as possible, since the class provides the full rang...
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
const SmallVectorImpl< Type * > & getArgTypes() const
Type * getReturnType() const
Intrinsic::ID getID() const
An instruction for reading from memory.
Represents a single loop in the control flow graph.
This class wraps the llvm.memcpy intrinsic.
The main scalar evolution driver.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
An instruction for storing to memory.
const SystemZInstrInfo * getInstrInfo() const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false)
unsigned getNumberOfRegisters(unsigned ClassID) const
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
unsigned getBoolVecToIntConversionCost(unsigned Opcode, Type *Dst, const Instruction *I)
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
unsigned adjustInliningThreshold(const CallBase *CB) const
unsigned getVectorTruncCost(Type *SrcTy, Type *DstTy)
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Op0, Value *Op1)
bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue)
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args=std::nullopt)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr)
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE)
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2)
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getVectorBitmaskConversionCost(Type *SrcTy, Type *DstTy)
InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr)
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const
InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
bool hasDivRemOp(Type *DataType, bool IsSigned)
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
static constexpr TypeSize getFixed(ScalarTy ExactSize)
static constexpr TypeSize getScalable(ScalarTy MinimumSize)
The instances of the Type class are immutable: once they are created, they are never changed.
bool isVectorTy() const
True if this is an instance of VectorType.
bool isIntOrIntVectorTy() const
Return true if this is an integer type or a vector of integer types.
bool isFloatTy() const
Return true if this is 'float', a 32-bit IEEE fp type.
bool isFP128Ty() const
Return true if this is 'fp128'.
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
bool isFloatingPointTy() const
Return true if this is one of the floating-point types.
bool isPtrOrPtrVectorTy() const
Return true if this is a pointer type or a vector of pointer types.
bool isIntegerTy() const
True if this is an instance of IntegerType.
TypeSize getPrimitiveSizeInBits() const LLVM_READONLY
Return the basic size of this type if it is a primitive type.
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Value * getOperand(unsigned i) const
unsigned getNumOperands() const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
user_iterator user_begin()
bool hasOneUse() const
Return true if there is exactly one use of this value.
Base class of all SIMD vector types.
constexpr ScalarTy getFixedValue() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
const unsigned VectorBits
This is an optimization pass for GlobalISel generic memory operations.
unsigned Log2_32_Ceil(uint32_t Value)
Return the ceil log base 2 of the specified value, 32 if the value is zero.
uint64_t divideCeil(uint64_t Numerator, uint64_t Denominator)
Returns the integer ceil(Numerator / Denominator).
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
This struct is a compact representation of a valid (non-zero power of two) alignment.
bool isScalarInteger() const
Return true if this is an integer, but not a vector.
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.