34#define AARCH64_LOWER_HOMOGENEOUS_PROLOG_EPILOG_NAME \
35 "AArch64 homogeneous prolog/epilog lowering pass"
39 cl::desc(
"The minimum number of instructions that are outlined in a frame "
40 "helper (default = 2)"));
44class AArch64LowerHomogeneousPE {
74class AArch64LowerHomogeneousPrologEpilog :
public ModulePass {
97char AArch64LowerHomogeneousPrologEpilog::ID = 0;
100 "aarch64-lower-homogeneous-prolog-epilog",
103bool AArch64LowerHomogeneousPrologEpilog::runOnModule(
Module &M) {
108 &getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
109 return AArch64LowerHomogeneousPE(&M, MMI).run();
112bool AArch64LowerHomogeneousPE::run() {
113 bool Changed =
false;
121 Changed |= runOnMachineFunction(*MF);
133 std::ostringstream RegStream;
136 RegStream <<
"OUTLINED_FUNCTION_PROLOG_";
139 RegStream <<
"OUTLINED_FUNCTION_PROLOG_FRAME" << FpOffset <<
"_";
142 RegStream <<
"OUTLINED_FUNCTION_EPILOG_";
145 RegStream <<
"OUTLINED_FUNCTION_EPILOG_TAIL_";
149 for (
auto Reg : Regs) {
150 if (Reg == AArch64::NoRegister)
155 return RegStream.str();
165 assert(
F ==
nullptr &&
"Function has been created before");
167 Function::ExternalLinkage,
Name, M);
168 assert(
F &&
"Function was null!");
172 F->setUnnamedAddr(GlobalValue::UnnamedAddr::Global);
176 F->addFnAttr(Attribute::OptimizeNone);
177 F->addFnAttr(Attribute::NoInline);
178 F->addFnAttr(Attribute::MinSize);
179 F->addFnAttr(Attribute::Naked);
205 int Offset,
bool IsPreDec) {
206 assert(Reg1 != AArch64::NoRegister);
207 const bool IsPaired = Reg2 != AArch64::NoRegister;
208 bool IsFloat = AArch64::FPR64RegClass.contains(Reg1);
213 Opc = IsPaired ? AArch64::STPDpre : AArch64::STRDpre;
215 Opc = IsPaired ? AArch64::STPXpre : AArch64::STRXpre;
218 Opc = IsPaired ? AArch64::STPDi : AArch64::STRDui;
220 Opc = IsPaired ? AArch64::STPXi : AArch64::STRXui;
223 TypeSize Scale(0U,
false), Width(0U,
false);
224 int64_t MinOffset, MaxOffset;
225 [[maybe_unused]]
bool Success =
228 Offset *= (8 / (int)Scale);
246 int Offset,
bool IsPostDec) {
247 assert(Reg1 != AArch64::NoRegister);
248 const bool IsPaired = Reg2 != AArch64::NoRegister;
249 bool IsFloat = AArch64::FPR64RegClass.contains(Reg1);
254 Opc = IsPaired ? AArch64::LDPDpost : AArch64::LDRDpost;
256 Opc = IsPaired ? AArch64::LDPXpost : AArch64::LDRXpost;
259 Opc = IsPaired ? AArch64::LDPDi : AArch64::LDRDui;
261 Opc = IsPaired ? AArch64::LDPXi : AArch64::LDRXui;
264 TypeSize Scale(0U,
false), Width(0U,
false);
265 int64_t MinOffset, MaxOffset;
266 [[maybe_unused]]
bool Success =
269 Offset *= (8 / (int)Scale);
315 unsigned FpOffset = 0) {
318 auto *
F = M->getFunction(
Name);
332 auto LRIdx = std::distance(Regs.
begin(),
llvm::find(Regs, AArch64::LR));
336 if (LRIdx !=
Size - 2) {
339 LRIdx -
Size + 2,
true);
343 for (
int I =
Size - 3;
I >= 0;
I -= 2) {
345 if (Regs[
I - 1] == AArch64::LR)
372 for (
int I = 0;
I <
Size - 2;
I += 2)
384 return M->getFunction(
Name);
399 auto RegCount = Regs.
size();
400 assert(RegCount > 0 && (RegCount % 2 == 0));
402 int InstCount = RegCount / 2;
420 for (
auto NextMI = NextMBBI; NextMI !=
MBB.
end(); NextMI++) {
421 if (NextMI->readsRegister(AArch64::W16,
TRI))
426 if (SuccMBB->isLiveIn(AArch64::W16) || SuccMBB->isLiveIn(AArch64::X16))
433 if (NextMBBI ==
MBB.
end())
435 if (NextMBBI->getOpcode() != AArch64::RET_ReallyLR)
467bool AArch64LowerHomogeneousPE::lowerEpilog(
475 bool HasUnpairedReg =
false;
476 for (
auto &MO :
MI.operands())
478 if (!MO.getReg().isValid()) {
482 HasUnpairedReg =
true;
486 (void)HasUnpairedReg;
492 assert(
MI.getOpcode() == AArch64::HOM_Epilog);
497 auto *EpilogTailHelper =
505 NextMBBI = std::next(Return);
506 Return->removeFromParent();
518 for (
int I = 0;
I <
Size - 2;
I += 2)
550bool AArch64LowerHomogeneousPE::lowerProlog(
558 bool HasUnpairedReg =
false;
560 std::optional<int> FpOffset;
561 for (
auto &MO :
MI.operands()) {
563 if (MO.getReg().isValid()) {
564 if (MO.getReg() == AArch64::LR)
570 HasUnpairedReg =
true;
573 }
else if (MO.isImm()) {
574 FpOffset = MO.getImm();
577 (void)HasUnpairedReg;
583 assert(
MI.getOpcode() == AArch64::HOM_Prolog);
610 for (
int I =
Size - 3;
I >= 0;
I -= 2)
635 unsigned Opcode =
MI.getOpcode();
639 case AArch64::HOM_Prolog:
640 return lowerProlog(
MBB,
MBBI, NextMBBI);
641 case AArch64::HOM_Epilog:
642 return lowerEpilog(
MBB,
MBBI, NextMBBI);
660bool AArch64LowerHomogeneousPE::runOnMachineFunction(
MachineFunction &MF) {
670 return new AArch64LowerHomogeneousPrologEpilog();
static Function * getOrCreateFrameHelper(Module *M, MachineModuleInfo *MMI, SmallVectorImpl< unsigned > &Regs, FrameHelperType Type, unsigned FpOffset=0)
Return a unique function if a helper can be formed with the given Regs and frame type.
static bool shouldUseFrameHelper(MachineBasicBlock &MBB, MachineBasicBlock::iterator &NextMBBI, SmallVectorImpl< unsigned > &Regs, FrameHelperType Type)
This function checks if a frame helper should be used for HOM_Prolog/HOM_Epilog pseudo instruction ex...
static void emitLoad(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator Pos, const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, int Offset, bool IsPostDec)
Emit a load-pair instruction for frame-destroy.
#define AARCH64_LOWER_HOMOGENEOUS_PROLOG_EPILOG_NAME
cl::opt< int > FrameHelperSizeThreshold("frame-helper-size-threshold", cl::init(2), cl::Hidden, cl::desc("The minimum number of instructions that are outlined in a frame " "helper (default = 2)"))
static std::string getFrameHelperName(SmallVectorImpl< unsigned > &Regs, FrameHelperType Type, unsigned FpOffset)
Return a frame helper name with the given CSRs and the helper type.
static void emitStore(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator Pos, const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, int Offset, bool IsPreDec)
Emit a store-pair instruction for frame-setup.
static MachineFunction & createFrameHelperMachineFunction(Module *M, MachineModuleInfo *MMI, StringRef Name)
Create a Function for the unique frame helper with the given name.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
const HexagonInstrInfo * TII
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
static const char * getRegisterName(MCRegister Reg, unsigned AltIdx=AArch64::NoRegAltName)
static bool getMemOpInfo(unsigned Opcode, TypeSize &Scale, TypeSize &Width, int64_t &MinOffset, int64_t &MaxOffset)
Returns true if opcode Opc is a memory operation.
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
void setPreservesAll()
Set by analyses that do not transform their input at all.
LLVM Basic Block Representation.
static BasicBlock * Create(LLVMContext &Context, const Twine &Name="", Function *Parent=nullptr, BasicBlock *InsertBefore=nullptr)
Creates a new BasicBlock.
static Function * Create(FunctionType *Ty, LinkageTypes Linkage, unsigned AddrSpace, const Twine &N="", Module *M=nullptr)
@ LinkOnceODRLinkage
Same, but only replaced by something equivalent.
ReturnInst * CreateRetVoid()
Create a 'ret void' instruction.
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
This is an important class for using LLVM in a threaded context.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
iterator_range< succ_iterator > successors()
MachineBasicBlock * removeFromParent()
This method unlinks 'this' from the containing function, and returns it, but does not delete it.
MachineFunctionProperties & set(Property P)
MachineFunctionProperties & reset(Property P)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const MachineFunctionProperties & getProperties() const
Get the function properties.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void insert(iterator MBBI, MachineBasicBlock *MBB)
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned TargetFlags=0) const
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
const MachineInstrBuilder & copyImplicitOps(const MachineInstr &OtherMI) const
Copy all the implicit operands from OtherMI onto this one.
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
Representation of each machine instruction.
This class contains meta information specific to a module.
MachineFunction & getOrCreateMachineFunction(Function &F)
Returns the MachineFunction constructed for the IR function F.
void freezeReservedRegs()
freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before ...
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
virtual bool runOnModule(Module &M)=0
runOnModule - Virtual method overriden by subclasses to process the module being operated on.
A Module instance is used to store all the information related to an LLVM module.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual void getAnalysisUsage(AnalysisUsage &) const
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
TargetInstrInfo - Interface to description of machine instruction set.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
The instances of the Type class are immutable: once they are created, they are never changed.
static Type * getVoidTy(LLVMContext &C)
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ C
The default llvm calling convention, compatible with C.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Define
Register definition.
initializer< Ty > init(const Ty &Val)
PointerTypeMap run(const Module &M)
Compute the PointerTypeMap for the module M.
This is an optimization pass for GlobalISel generic memory operations.
auto find(R &&Range, const T &Val)
Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void initializeAArch64LowerHomogeneousPrologEpilogPass(PassRegistry &)
unsigned getDefRegState(bool B)
ModulePass * createAArch64LowerHomogeneousPrologEpilogPass()
bool is_contained(R &&Range, const E &Element)
Returns true if Element is found in Range.