22#define DEBUG_TYPE "localizer"
28 "Move/duplicate certain instructions close to their use",
43 TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(MF.
getFunction());
58 return InsertMBB == Def.getParent();
67 for (
unsigned Idx = 1;
Idx <
MI->getNumOperands();
Idx += 2) {
68 auto &MO =
MI->getOperand(
Idx);
69 if (&MO != &
Op && MO.isReg() && MO.getReg() == SrcReg)
76 LocalizedSetVecT &LocalizedInstrs) {
87 if (!TL.shouldLocalize(
MI,
TTI))
90 assert(
MI.getDesc().getNumDefs() == 1 &&
91 "More than one definition not supported yet");
101 dbgs() <<
"Checking use: " << MIUse
103 if (isLocalUse(MOUse,
MI, InsertMBB)) {
107 LocalizedInstrs.insert(&
MI);
115 if (isNonUniquePhiValue(MOUse))
120 auto MBBAndReg = std::make_pair(InsertMBB, Reg);
121 auto NewVRegIt = MBBWithLocalDef.
find(MBBAndReg);
122 if (NewVRegIt == MBBWithLocalDef.
end()) {
125 LocalizedInstrs.insert(LocalizedMI);
137 MBBWithLocalDef.
insert(std::make_pair(MBBAndReg, NewReg)).first;
143 MOUse.
setReg(NewVRegIt->second);
149bool Localizer::localizeIntraBlock(LocalizedSetVecT &LocalizedInstrs) {
150 bool Changed =
false;
177 assert(II !=
MBB.
end() &&
"Didn't find the user in the MBB");
181 MI->removeFromParent();
187 if (
Users.size() == 1) {
188 const auto &DefDL =
MI->getDebugLoc();
191 if ((!DefDL || DefDL.getLine() == 0) && UserDL && UserDL.getLine() != 0) {
192 MI->setDebugLoc(UserDL);
206 if (DoNotRunPass(MF))
217 bool Changed = localizeInterBlock(MF, LocalizedInstrs);
218 Changed |= localizeIntraBlock(LocalizedInstrs);
MachineInstrBuilder & UseMI
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
Performs the initial survey of the specified function
This file defines the DenseMap class.
iv Induction Variable Users
Select target instructions out of generic instructions
Move duplicate certain instructions close to their use
static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)
Return the first found DebugLoc that has a DILocation, given a range of instructions.
#define INITIALIZE_PASS_DEPENDENCY(depName)
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file describes how to lower LLVM code to machine code.
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
This class represents an Operation in the Expression.
iterator find(const_arg_type_t< KeyT > Val)
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
This pass implements the localization mechanism described at the top of this file.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
bool hasProperty(Property P) const
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
const MachineFunctionProperties & getProperties() const
Get the function properties.
MachineInstr * CloneMachineInstr(const MachineInstr *Orig)
Create a new MachineInstr which is a copy of Orig, identical in all ways except the instruction has n...
const MachineBasicBlock & front() const
Representation of each machine instruction.
const MachineBasicBlock * getParent() const
const MachineOperand & getOperand(unsigned i) const
MachineOperand class - Representation of each machine instruction operand.
unsigned getOperandNo() const
Returns the index of this operand in the instruction that it belongs to.
MachineBasicBlock * getMBB() const
void setReg(Register Reg)
Change the register this operand corresponds to.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
bool hasOneUse(Register RegNo) const
hasOneUse - Return true if there is exactly one instruction using the specified register.
iterator_range< use_instr_nodbg_iterator > use_nodbg_instructions(Register Reg) const
Register cloneVirtualRegister(Register VReg, StringRef Name="")
Create and return a new virtual register in the function with the same attributes as the given regist...
iterator_range< use_iterator > use_operands(Register Reg) const
Wrapper class representing virtual and physical registers.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
A SetVector that performs no allocations if smaller than a certain size.
virtual const TargetLowering * getTargetLowering() const
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
auto reverse(ContainerTy &&C)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void getSelectionDAGFallbackAnalysisUsage(AnalysisUsage &AU)
Modify analysis usage so it preserves passes required for the SelectionDAG fallback.
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Implement std::hash so that hash_code can be used in STL containers.