#include "RISCVISelDAGToDAG.h"
#include "MCTargetDesc/RISCVBaseInfo.h"
#include "MCTargetDesc/RISCVMCTargetDesc.h"
#include "MCTargetDesc/RISCVMatInt.h"
#include "RISCVISelLowering.h"
#include "RISCVMachineFunctionInfo.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/IR/IntrinsicsRISCV.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <optional>
#include "RISCVGenSearchableTables.inc"

Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.

namespace	llvm::RISCV

Macros
#define	DEBUG_TYPE "riscv-isel"

#define	PASS_NAME "RISC-V DAG->DAG Pattern Instruction Selection"

#define	GET_RISCVVSSEGTable_IMPL

#define	GET_RISCVVLSEGTable_IMPL

#define	GET_RISCVVLXSEGTable_IMPL

#define	GET_RISCVVSXSEGTable_IMPL

#define	GET_RISCVVLETable_IMPL

#define	GET_RISCVVSETable_IMPL

#define	GET_RISCVVLXTable_IMPL

#define	GET_RISCVVSXTable_IMPL

#define	GET_RISCVMaskedPseudosTable_IMPL

#define	CASE_VMSLT_VMNAND_VMSET_OPCODES(lmulenum, suffix, suffix_b)

#define	CASE_VMSLT_OPCODES(lmulenum, suffix, suffix_b)

#define	CASE_VMXOR_VMANDN_VMOR_OPCODES(lmulenum, suffix)

#define	CASE_VMERGE_TO_VMV(lmul)

Functions
static SDValue	selectImmSeq (SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT, RISCVMatInt::InstSeq &Seq)

static SDValue	selectImm (SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT, int64_t Imm, const RISCVSubtarget &Subtarget)

static SDValue	createTuple (SelectionDAG &CurDAG, ArrayRef< SDValue > Regs, unsigned NF, RISCVII::VLMUL LMUL)

static bool	selectConstantAddr (SelectionDAG CurDAG, const SDLoc &DL, const MVT VT, const RISCVSubtarget Subtarget, SDValue Addr, SDValue &Base, SDValue &Offset)

static bool	isWorthFoldingAdd (SDValue Add)

static SDValue	findVSplat (SDValue N)

static bool	selectVSplatImmHelper (SDValue N, SDValue &SplatVal, SelectionDAG &DAG, const RISCVSubtarget &Subtarget, std::function< bool(int64_t)> ValidateImm)

static bool	usesAllOnesMask (SDValue MaskOp, SDValue GlueOp)

static bool	usesAllOnesMask (SDNode *N, unsigned MaskOpIdx)

static bool	isImplicitDef (SDValue V)

static bool	IsVMerge (SDNode *N)

static bool	IsVMv (SDNode *N)

static unsigned	GetVMSetForLMul (RISCVII::VLMUL LMUL)

Macro Definition Documentation

◆ CASE_VMERGE_TO_VMV

#define CASE_VMERGE_TO_VMV ( lmul )

Value:

  case RISCV::PseudoVMERGE_VVM_##lmul:                                    \
    NewOpc = RISCV::PseudoVMV_V_V_##lmul;                                 \
    break;

◆ CASE_VMSLT_OPCODES

#define CASE_VMSLT_OPCODES	(	lmulenum,
		suffix,
		suffix_b
	)

Value:

  case RISCVII::VLMUL::lmulenum:                                               \
    VMSLTOpcode = IsUnsigned ? RISCV::PseudoVMSLTU_VX_##suffix                 \
                             : RISCV::PseudoVMSLT_VX_##suffix;                 \
    VMSLTMaskOpcode = IsUnsigned ? RISCV::PseudoVMSLTU_VX_##suffix##_MASK      \
                                 : RISCV::PseudoVMSLT_VX_##suffix##_MASK;      \
    break;

◆ CASE_VMSLT_VMNAND_VMSET_OPCODES

#define CASE_VMSLT_VMNAND_VMSET_OPCODES	(	lmulenum,
		suffix,
		suffix_b
	)

Value:

  case RISCVII::VLMUL::lmulenum:                                               \
    VMSLTOpcode = IsUnsigned ? RISCV::PseudoVMSLTU_VX_##suffix                 \
                             : RISCV::PseudoVMSLT_VX_##suffix;                 \
    VMNANDOpcode = RISCV::PseudoVMNAND_MM_##suffix;                            \
    VMSetOpcode = RISCV::PseudoVMSET_M_##suffix_b;                             \
    break;

◆ CASE_VMXOR_VMANDN_VMOR_OPCODES

#define CASE_VMXOR_VMANDN_VMOR_OPCODES	(	lmulenum,
		suffix
	)

Value:

  case RISCVII::VLMUL::lmulenum:                                               \
    VMXOROpcode = RISCV::PseudoVMXOR_MM_##suffix;                              \
    VMANDNOpcode = RISCV::PseudoVMANDN_MM_##suffix;                            \
    VMOROpcode = RISCV::PseudoVMOR_MM_##suffix;                                \
    break;

◆ DEBUG_TYPE

#define DEBUG_TYPE "riscv-isel"

Definition at line 29 of file RISCVISelDAGToDAG.cpp.

◆ GET_RISCVMaskedPseudosTable_IMPL

#define GET_RISCVMaskedPseudosTable_IMPL

Definition at line 41 of file RISCVISelDAGToDAG.cpp.

◆ GET_RISCVVLETable_IMPL

#define GET_RISCVVLETable_IMPL

Definition at line 37 of file RISCVISelDAGToDAG.cpp.

◆ GET_RISCVVLSEGTable_IMPL

#define GET_RISCVVLSEGTable_IMPL

Definition at line 34 of file RISCVISelDAGToDAG.cpp.

◆ GET_RISCVVLXSEGTable_IMPL

#define GET_RISCVVLXSEGTable_IMPL

Definition at line 35 of file RISCVISelDAGToDAG.cpp.

◆ GET_RISCVVLXTable_IMPL

#define GET_RISCVVLXTable_IMPL

Definition at line 39 of file RISCVISelDAGToDAG.cpp.

◆ GET_RISCVVSETable_IMPL

#define GET_RISCVVSETable_IMPL

Definition at line 38 of file RISCVISelDAGToDAG.cpp.

◆ GET_RISCVVSSEGTable_IMPL

#define GET_RISCVVSSEGTable_IMPL

Definition at line 33 of file RISCVISelDAGToDAG.cpp.

◆ GET_RISCVVSXSEGTable_IMPL

#define GET_RISCVVSXSEGTable_IMPL

Definition at line 36 of file RISCVISelDAGToDAG.cpp.

◆ GET_RISCVVSXTable_IMPL

#define GET_RISCVVSXTable_IMPL

Definition at line 40 of file RISCVISelDAGToDAG.cpp.

◆ PASS_NAME

#define PASS_NAME "RISC-V DAG->DAG Pattern Instruction Selection"

Definition at line 30 of file RISCVISelDAGToDAG.cpp.

Function Documentation

◆ createTuple()

static SDValue createTuple	(	SelectionDAG &	CurDAG,
		ArrayRef< SDValue >	Regs,
		unsigned	NF,
		RISCVII::VLMUL	LMUL
	)

static

Definition at line 228 of file RISCVISelDAGToDAG.cpp.

References assert(), DL, llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getTargetConstant(), I, llvm_unreachable, llvm::RISCVII::LMUL_1, llvm::RISCVII::LMUL_2, llvm::RISCVII::LMUL_4, llvm::RISCVII::LMUL_F2, llvm::RISCVII::LMUL_F4, llvm::RISCVII::LMUL_F8, N, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::ArrayRef< T >::size().

◆ findVSplat()

static SDValue findVSplat ( SDValue N )

static

Definition at line 2963 of file RISCVISelDAGToDAG.cpp.

References assert(), llvm::ISD::INSERT_SUBVECTOR, N, llvm::Splat, llvm::RISCVISD::VMV_S_X_VL, and llvm::RISCVISD::VMV_V_X_VL.

Referenced by llvm::RISCVDAGToDAGISel::selectVSplat(), and selectVSplatImmHelper().

◆ GetVMSetForLMul()

static unsigned GetVMSetForLMul ( RISCVII::VLMUL LMUL )

static

Definition at line 3300 of file RISCVISelDAGToDAG.cpp.

References llvm_unreachable, llvm::RISCVII::LMUL_1, llvm::RISCVII::LMUL_2, llvm::RISCVII::LMUL_4, llvm::RISCVII::LMUL_8, llvm::RISCVII::LMUL_F2, llvm::RISCVII::LMUL_F4, llvm::RISCVII::LMUL_F8, and llvm::RISCVII::LMUL_RESERVED.

◆ isImplicitDef()

static bool isImplicitDef ( SDValue V )

static

Definition at line 3222 of file RISCVISelDAGToDAG.cpp.

◆ IsVMerge()

static bool IsVMerge ( SDNode * N )

static

Definition at line 3282 of file RISCVISelDAGToDAG.cpp.

References N.

◆ IsVMv()

static bool IsVMv ( SDNode * N )

static

Definition at line 3292 of file RISCVISelDAGToDAG.cpp.

References N.

◆ isWorthFoldingAdd()

static bool isWorthFoldingAdd ( SDValue Add )

static

Definition at line 2277 of file RISCVISelDAGToDAG.cpp.

References llvm::Add, llvm::ISD::ATOMIC_LOAD, llvm::ISD::ATOMIC_STORE, llvm::EVT::isScalarInteger(), llvm::ISD::LOAD, and llvm::ISD::STORE.

Referenced by llvm::RISCVDAGToDAGISel::SelectAddrRegImm().

◆ selectConstantAddr()

static bool selectConstantAddr	(	SelectionDAG *	CurDAG,
		const SDLoc &	DL,
		const MVT	VT,
		const RISCVSubtarget *	Subtarget,
		SDValue	Addr,
		SDValue &	Base,
		SDValue &	Offset
	)

static

Definition at line 2229 of file RISCVISelDAGToDAG.cpp.

References Addr, assert(), llvm::SmallVectorTemplateCommon< T, typename >::back(), llvm::sampleprof::Base, DL, llvm::SmallVectorBase< Size_T >::empty(), llvm::RISCVMatInt::generateInstSeq(), llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getRegister(), llvm::SelectionDAG::getTargetConstant(), llvm::Hi, llvm::RISCVSubtarget::is64Bit(), llvm::Offset, llvm::SmallVectorTemplateBase< T, bool >::pop_back(), and selectImmSeq().

Referenced by llvm::RISCVDAGToDAGISel::SelectAddrRegImm().

◆ selectImm()

static SDValue selectImm	(	SelectionDAG *	CurDAG,
		const SDLoc &	DL,
		const MVT	VT,
		int64_t	Imm,
		const RISCVSubtarget &	Subtarget
	)

static

Definition at line 193 of file RISCVISelDAGToDAG.cpp.

References DL, llvm::RISCVMatInt::generateInstSeq(), llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getTargetConstant(), llvm::Hi_32(), llvm::Lo, llvm::Lo_32(), selectImmSeq(), and llvm::SmallVectorBase< Size_T >::size().

Referenced by llvm::RISCVDAGToDAGISel::Select(), and llvm::RISCVDAGToDAGISel::selectFPImm().

◆ selectImmSeq()

static SDValue selectImmSeq	(	SelectionDAG *	CurDAG,
		const SDLoc &	DL,
		const MVT	VT,
		RISCVMatInt::InstSeq &	Seq
	)

static

Definition at line 164 of file RISCVISelDAGToDAG.cpp.

References DL, llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getRegister(), llvm::SelectionDAG::getTargetConstant(), llvm::RISCVMatInt::Imm, llvm::RISCVMatInt::RegImm, llvm::RISCVMatInt::RegReg, and llvm::RISCVMatInt::RegX0.

Referenced by selectConstantAddr(), and selectImm().

◆ selectVSplatImmHelper()

static bool selectVSplatImmHelper	(	SDValue	N,
		SDValue &	SplatVal,
		SelectionDAG &	DAG,
		const RISCVSubtarget &	Subtarget,
		std::function< bool(int64_t)>	ValidateImm
	)

static

Definition at line 2987 of file RISCVISelDAGToDAG.cpp.

References assert(), findVSplat(), llvm::APInt::getSExtValue(), llvm::SelectionDAG::getTargetConstant(), llvm::RISCVSubtarget::getXLenVT(), N, and llvm::Splat.

Referenced by llvm::RISCVDAGToDAGISel::selectVSplatSimm5(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5Plus1(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5Plus1NonZero(), and llvm::RISCVDAGToDAGISel::selectVSplatUimm().

◆ usesAllOnesMask() [1/2]

static bool usesAllOnesMask	(	SDNode *	N,
		unsigned	MaskOpIdx
	)

static

Definition at line 3217 of file RISCVISelDAGToDAG.cpp.

References N, and usesAllOnesMask().

◆ usesAllOnesMask() [2/2]

static bool usesAllOnesMask	(	SDValue	MaskOp,
		SDValue	GlueOp
	)

static

Definition at line 3176 of file RISCVISelDAGToDAG.cpp.

References llvm::ISD::CopyToReg, llvm::SDValue::getMachineOpcode(), llvm::SDNode::getMachineOpcode(), llvm::SDValue::getNode(), llvm::SDNode::getOperand(), getReg(), and llvm::SDNode::isMachineOpcode().

Referenced by usesAllOnesMask().

Namespaces

Macros

Functions

Macro Definition Documentation

◆ CASE_VMERGE_TO_VMV

◆ CASE_VMSLT_OPCODES

◆ CASE_VMSLT_VMNAND_VMSET_OPCODES

◆ CASE_VMXOR_VMANDN_VMOR_OPCODES

◆ DEBUG_TYPE

◆ GET_RISCVMaskedPseudosTable_IMPL

◆ GET_RISCVVLETable_IMPL

◆ GET_RISCVVLSEGTable_IMPL

◆ GET_RISCVVLXSEGTable_IMPL

◆ GET_RISCVVLXTable_IMPL

◆ GET_RISCVVSETable_IMPL

◆ GET_RISCVVSSEGTable_IMPL

◆ GET_RISCVVSXSEGTable_IMPL

◆ GET_RISCVVSXTable_IMPL

◆ PASS_NAME

Function Documentation

◆ createTuple()

◆ findVSplat()

◆ GetVMSetForLMul()

◆ isImplicitDef()

◆ IsVMerge()

◆ IsVMv()

◆ isWorthFoldingAdd()

◆ selectConstantAddr()

◆ selectImm()

◆ selectImmSeq()

◆ selectVSplatImmHelper()

◆ usesAllOnesMask() [1/2]

◆ usesAllOnesMask() [2/2]