LLVM 19.0.0git
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1//===- RISCVTargetTransformInfo.h - RISC-V specific TTI ---------*- C++ -*-===//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8/// \file
9/// This file defines a TargetTransformInfo::Concept conforming object specific
10/// to the RISC-V target machine. It uses the target's detailed information to
11/// provide more precise answers to certain TTI queries, while letting the
12/// target independent and default TTI implementations handle the rest.
19#include "RISCVSubtarget.h"
20#include "RISCVTargetMachine.h"
24#include "llvm/IR/Function.h"
25#include <optional>
27namespace llvm {
29class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
33 friend BaseT;
35 const RISCVSubtarget *ST;
36 const RISCVTargetLowering *TLI;
38 const RISCVSubtarget *getST() const { return ST; }
39 const RISCVTargetLowering *getTLI() const { return TLI; }
41 /// This function returns an estimate for VL to be used in VL based terms
42 /// of the cost model. For fixed length vectors, this is simply the
43 /// vector length. For scalable vectors, we return results consistent
44 /// with getVScaleForTuning under the assumption that clients are also
45 /// using that when comparing costs between scalar and vector representation.
46 /// This does unfortunately mean that we can both undershoot and overshot
47 /// the true cost significantly if getVScaleForTuning is wildly off for the
48 /// actual target hardware.
49 unsigned getEstimatedVLFor(VectorType *Ty);
51 InstructionCost getRISCVInstructionCost(ArrayRef<unsigned> OpCodes, MVT VT,
54 /// Return the cost of accessing a constant pool entry of the specified
55 /// type.
56 InstructionCost getConstantPoolLoadCost(Type *Ty,
59 explicit RISCVTTIImpl(const RISCVTargetMachine *TM, const Function &F)
60 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
61 TLI(ST->getTargetLowering()) {}
63 bool areInlineCompatible(const Function *Caller,
64 const Function *Callee) const;
66 /// Return the cost of materializing an immediate for a value operand of
67 /// a store instruction.
73 InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx,
74 const APInt &Imm, Type *Ty,
76 Instruction *Inst = nullptr);
78 const APInt &Imm, Type *Ty,
81 /// \name EVL Support for predicated vectorization.
82 /// Whether the target supports the %evl parameter of VP intrinsic efficiently
83 /// in hardware, for the given opcode and type/alignment. (see LLVM Language
84 /// Reference - "Vector Predication Intrinsics",
85 /// https://llvm.org/docs/LangRef.html#vector-predication-intrinsics and
86 /// "IR-level VP intrinsics",
87 /// https://llvm.org/docs/Proposals/VectorPredication.html#ir-level-vp-intrinsics).
88 /// \param Opcode the opcode of the instruction checked for predicated version
89 /// support.
90 /// \param DataType the type of the instruction with the \p Opcode checked for
91 /// prediction support.
92 /// \param Alignment the alignment for memory access operation checked for
93 /// predicated version support.
94 bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
95 Align Alignment) const;
99 bool shouldExpandReduction(const IntrinsicInst *II) const;
100 bool supportsScalableVectors() const { return ST->hasVInstructions(); }
101 bool enableOrderedReductions() const { return true; }
102 bool enableScalableVectorization() const { return ST->hasVInstructions(); }
104 getPreferredTailFoldingStyle(bool IVUpdateMayOverflow) const {
105 return ST->hasVInstructions() ? TailFoldingStyle::Data
107 }
108 std::optional<unsigned> getMaxVScale() const;
109 std::optional<unsigned> getVScaleForTuning() const;
113 unsigned getRegUsageForType(Type *Ty);
115 unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const;
118 // Epilogue vectorization is usually unprofitable - tail folding or
119 // a smaller VF would have been better. This a blunt hammer - we
120 // should re-examine this once vectorization is better tuned.
121 return false;
122 }
124 InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
125 Align Alignment, unsigned AddressSpace,
129 const Value *Base,
131 Type *AccessTy,
142 return ST->useRVVForFixedLengthVectors() ? 16 : 0;
143 }
146 ArrayRef<int> Mask,
148 VectorType *SubTp,
149 ArrayRef<const Value *> Args = std::nullopt,
150 const Instruction *CxtI = nullptr);
156 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
157 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
158 bool UseMaskForCond = false, bool UseMaskForGaps = false);
160 InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
161 const Value *Ptr, bool VariableMask,
162 Align Alignment,
164 const Instruction *I);
166 InstructionCost getStridedMemoryOpCost(unsigned Opcode, Type *DataTy,
167 const Value *Ptr, bool VariableMask,
168 Align Alignment,
170 const Instruction *I);
172 InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
175 const Instruction *I = nullptr);
178 FastMathFlags FMF,
182 std::optional<FastMathFlags> FMF,
185 InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned,
186 Type *ResTy, VectorType *ValTy,
187 FastMathFlags FMF,
191 getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment,
194 const Instruction *I = nullptr);
196 InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
197 CmpInst::Predicate VecPred,
199 const Instruction *I = nullptr);
201 InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind,
202 const Instruction *I = nullptr);
205 InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
207 unsigned Index, Value *Op0, Value *Op1);
209 InstructionCost getArithmeticInstrCost(
210 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
211 TTI::OperandValueInfo Op1Info = {TTI::OK_AnyValue, TTI::OP_None},
212 TTI::OperandValueInfo Op2Info = {TTI::OK_AnyValue, TTI::OP_None},
213 ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
214 const Instruction *CxtI = nullptr);
217 return TLI->isLegalElementTypeForRVV(TLI->getValueType(DL, Ty));
218 }
220 bool isLegalMaskedLoadStore(Type *DataType, Align Alignment) {
221 if (!ST->hasVInstructions())
222 return false;
224 EVT DataTypeVT = TLI->getValueType(DL, DataType);
226 // Only support fixed vectors if we know the minimum vector size.
227 if (DataTypeVT.isFixedLengthVector() && !ST->useRVVForFixedLengthVectors())
228 return false;
230 EVT ElemType = DataTypeVT.getScalarType();
231 if (!ST->enableUnalignedVectorMem() && Alignment < ElemType.getStoreSize())
232 return false;
234 return TLI->isLegalElementTypeForRVV(ElemType);
236 }
238 bool isLegalMaskedLoad(Type *DataType, Align Alignment) {
239 return isLegalMaskedLoadStore(DataType, Alignment);
240 }
241 bool isLegalMaskedStore(Type *DataType, Align Alignment) {
242 return isLegalMaskedLoadStore(DataType, Alignment);
243 }
245 bool isLegalMaskedGatherScatter(Type *DataType, Align Alignment) {
246 if (!ST->hasVInstructions())
247 return false;
249 EVT DataTypeVT = TLI->getValueType(DL, DataType);
251 // Only support fixed vectors if we know the minimum vector size.
252 if (DataTypeVT.isFixedLengthVector() && !ST->useRVVForFixedLengthVectors())
253 return false;
255 EVT ElemType = DataTypeVT.getScalarType();
256 if (!ST->enableUnalignedVectorMem() && Alignment < ElemType.getStoreSize())
257 return false;
259 return TLI->isLegalElementTypeForRVV(ElemType);
260 }
262 bool isLegalMaskedGather(Type *DataType, Align Alignment) {
263 return isLegalMaskedGatherScatter(DataType, Alignment);
264 }
265 bool isLegalMaskedScatter(Type *DataType, Align Alignment) {
266 return isLegalMaskedGatherScatter(DataType, Alignment);
267 }
270 // Scalarize masked gather for RV64 if EEW=64 indices aren't supported.
271 return ST->is64Bit() && !ST->hasVInstructionsI64();
272 }
275 // Scalarize masked scatter for RV64 if EEW=64 indices aren't supported.
276 return ST->is64Bit() && !ST->hasVInstructionsI64();
277 }
279 bool isLegalStridedLoadStore(Type *DataType, Align Alignment) {
280 EVT DataTypeVT = TLI->getValueType(DL, DataType);
281 return TLI->isLegalStridedLoadStore(DataTypeVT, Alignment);
282 }
284 bool isLegalMaskedCompressStore(Type *DataTy, Align Alignment);
287 return TLI->isVScaleKnownToBeAPowerOfTwo();
288 }
290 /// \returns How the target needs this vector-predicated operation to be
291 /// transformed.
295 if (!ST->hasVInstructions() ||
296 (PI.getIntrinsicID() == Intrinsic::vp_reduce_mul &&
297 cast<VectorType>(PI.getArgOperand(1)->getType())
298 ->getElementType()
299 ->getIntegerBitWidth() != 1))
302 }
305 ElementCount VF) const {
306 if (!VF.isScalable())
307 return true;
309 Type *Ty = RdxDesc.getRecurrenceType();
310 if (!TLI->isLegalElementTypeForRVV(TLI->getValueType(DL, Ty)))
311 return false;
313 switch (RdxDesc.getRecurrenceKind()) {
314 case RecurKind::Add:
315 case RecurKind::FAdd:
316 case RecurKind::And:
317 case RecurKind::Or:
318 case RecurKind::Xor:
319 case RecurKind::SMin:
320 case RecurKind::SMax:
321 case RecurKind::UMin:
322 case RecurKind::UMax:
323 case RecurKind::FMin:
324 case RecurKind::FMax:
328 return true;
329 default:
330 return false;
331 }
332 }
335 // Don't interleave if the loop has been vectorized with scalable vectors.
336 if (VF.isScalable())
337 return 1;
338 // If the loop will not be vectorized, don't interleave the loop.
339 // Let regular unroll to unroll the loop.
340 return VF.isScalar() ? 1 : ST->getMaxInterleaveFactor();
341 }
346 unsigned getNumberOfRegisters(unsigned ClassID) const {
347 switch (ClassID) {
349 // 31 = 32 GPR - x0 (zero register)
350 // FIXME: Should we exclude fixed registers like SP, TP or GP?
351 return 31;
353 if (ST->hasStdExtF())
354 return 32;
355 return 0;
357 // Although there are 32 vector registers, v0 is special in that it is the
358 // only register that can be used to hold a mask.
359 // FIXME: Should we conservatively return 31 as the number of usable
360 // vector registers?
361 return ST->hasVInstructions() ? 32 : 0;
362 }
363 llvm_unreachable("unknown register class");
364 }
366 unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const {
367 if (Vector)
369 if (!Ty)
372 Type *ScalarTy = Ty->getScalarType();
373 if ((ScalarTy->isHalfTy() && ST->hasStdExtZfhmin()) ||
374 (ScalarTy->isFloatTy() && ST->hasStdExtF()) ||
375 (ScalarTy->isDoubleTy() && ST->hasStdExtD())) {
377 }
380 }
382 const char *getRegisterClassName(unsigned ClassID) const {
383 switch (ClassID) {
385 return "RISCV::GPRRC";
387 return "RISCV::FPRRC";
389 return "RISCV::VRRC";
390 }
391 llvm_unreachable("unknown register class");
392 }
398 return true;
399 }
402} // end namespace llvm
static const Function * getParent(const Value *V)
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
TargetTransformInfo::VPLegalization VPLegalization
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
const char LLVMTargetMachineRef TM
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition: APInt.h:76
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
Base class which can be used to help build a TTI implementation.
Definition: BasicTTIImpl.h:80
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Op0, Value *Op1)
Value * getArgOperand(unsigned i) const
Definition: InstrTypes.h:1687
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:993
constexpr bool isScalar() const
Exactly one element.
Definition: TypeSize.h:307
Convenience struct for specifying and reasoning about fast-math flags.
Definition: FMF.h:20
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:47
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
Definition: IntrinsicInst.h:54
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:44
Machine Value Type.
The optimization diagnostic interface.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Op0, Value *Op1)
bool shouldFoldTerminatingConditionAfterLSR() const
const char * getRegisterClassName(unsigned ClassID) const
InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I)
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args=std::nullopt, const Instruction *CxtI=nullptr)
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2)
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind)
bool isLegalMaskedGatherScatter(Type *DataType, Align Alignment)
InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const
TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow) const
TargetTransformInfo::VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const
bool isLegalMaskedStore(Type *DataType, Align Alignment)
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getNumberOfRegisters(unsigned ClassID) const
bool isElementTypeLegalForScalableVector(Type *Ty) const
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
unsigned getMaxInterleaveFactor(ElementCount VF)
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind)
bool isLegalMaskedLoadStore(Type *DataType, Align Alignment)
InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr)
bool enableScalableVectorization() const
bool preferEpilogueVectorization() const
bool areInlineCompatible(const Function *Caller, const Function *Callee) const
bool forceScalarizeMaskedGather(VectorType *VTy, Align Alignment)
bool isVScaleKnownToBeAPowerOfTwo() const
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
bool isLegalMaskedLoad(Type *DataType, Align Alignment)
InstructionCost getStridedMemoryOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I)
std::optional< unsigned > getVScaleForTuning() const
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *ValTy, FastMathFlags FMF, TTI::TargetCostKind CostKind)
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind)
std::optional< unsigned > getMaxVScale() const
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE)
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
RISCVTTIImpl(const RISCVTargetMachine *TM, const Function &F)
InstructionCost getPointersChainCost(ArrayRef< const Value * > Ptrs, const Value *Base, const TTI::PointersChainInfo &Info, Type *AccessTy, TTI::TargetCostKind CostKind)
TargetTransformInfo::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
bool shouldExpandReduction(const IntrinsicInst *II) const
InstructionCost getStoreImmCost(Type *VecTy, TTI::OperandValueInfo OpInfo, TTI::TargetCostKind CostKind)
Return the cost of materializing an immediate for a value operand of a store instruction.
bool isLegalMaskedCompressStore(Type *DataTy, Align Alignment)
bool isLegalStridedLoadStore(Type *DataType, Align Alignment)
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getRegUsageForType(Type *Ty)
bool forceScalarizeMaskedScatter(VectorType *VTy, Align Alignment)
bool isLegalMaskedGather(Type *DataType, Align Alignment)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpdInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr)
bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const
bool isLegalMaskedScatter(Type *DataType, Align Alignment)
unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const
InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
bool hasActiveVectorLength(unsigned Opcode, Type *DataType, Align Alignment) const
unsigned getMinVectorRegisterBitWidth() const
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false)
bool isLegalElementTypeForRVV(EVT ScalarTy) const
bool isVScaleKnownToBeAPowerOfTwo() const override
Return true only if vscale must be a power of two.
bool isLegalStridedLoadStore(EVT DataType, Align Alignment) const
Return true if a stride load store of the given result type and alignment is legal.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
Definition: IVDescriptors.h:71
Type * getRecurrenceType() const
Returns the type of the recurrence.
RecurKind getRecurrenceKind() const
The main scalar evolution driver.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
const DataLayout & getDataLayout() const
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
The kind of cost model.
Flags indicating the kind of support for population count.
The various kinds of shuffle patterns for vector queries.
Represents a hint about the context in which a cast is used.
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
bool isFloatTy() const
Return true if this is 'float', a 32-bit IEEE fp type.
Definition: Type.h:154
bool isHalfTy() const
Return true if this is 'half', a 16-bit IEEE fp type.
Definition: Type.h:143
bool isDoubleTy() const
Return true if this is 'double', a 64-bit IEEE fp type.
Definition: Type.h:157
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition: Type.h:348
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Definition: Value.h:74
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
Base class of all SIMD vector types.
Definition: DerivedTypes.h:403
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition: TypeSize.h:171
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Definition: NVPTXBaseInfo.h:21
@ UMin
Unsigned integer min implemented in terms of select(cmp()).
@ FAnyOf
Any_of reduction with select(fcmp(),x,y) where one of (x,y) is loop invariant, and both x and y are i...
@ Or
Bitwise or logical OR of integers.
@ Xor
Bitwise or logical XOR of integers.
@ FMax
FP max implemented in terms of select(cmp()).
@ FMulAdd
Sum of float products with llvm.fmuladd(a * b + sum).
@ SMax
Signed integer max implemented in terms of select(cmp()).
@ And
Bitwise or logical AND of integers.
@ SMin
Signed integer min implemented in terms of select(cmp()).
@ FMin
FP min implemented in terms of select(cmp()).
@ Add
Sum of integers.
@ FAdd
Sum of floats.
@ IAnyOf
Any_of reduction with select(icmp(),x,y) where one of (x,y) is loop invariant, and both x and y are i...
@ UMax
Unsigned integer max implemented in terms of select(cmp()).
@ DataWithoutLaneMask
Same as Data, but avoids using the get.active.lane.mask intrinsic to calculate the mask and instead i...
@ Data
Use predicate only to mask operations on data in the loop.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
Extended Value Type.
Definition: ValueTypes.h:34
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
Definition: ValueTypes.h:380
bool isFixedLengthVector() const
Definition: ValueTypes.h:177
EVT getScalarType() const
If this is a vector type, return the element type, otherwise return this.
Definition: ValueTypes.h:313
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Definition: Alignment.h:117
Describe known properties for a set of pointers.
Parameters that control the generic loop unrolling transformation.