LLVM 19.0.0git
WebAssemblyTargetMachine.cpp
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1//===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file defines the WebAssembly-specific subclass of TargetMachine.
11///
12//===----------------------------------------------------------------------===//
13
17#include "WebAssembly.h"
25#include "llvm/CodeGen/Passes.h"
28#include "llvm/IR/Function.h"
30#include "llvm/MC/MCAsmInfo.h"
36#include <optional>
37using namespace llvm;
38
39#define DEBUG_TYPE "wasm"
40
41// A command-line option to keep implicit locals
42// for the purpose of testing with lit/llc ONLY.
43// This produces output which is not valid WebAssembly, and is not supported
44// by assemblers/disassemblers and other MC based tools.
46 "wasm-disable-explicit-locals", cl::Hidden,
47 cl::desc("WebAssembly: output implicit locals in"
48 " instruction output for test purposes only."),
49 cl::init(false));
50
52 "wasm-disable-fix-irreducible-control-flow-pass", cl::Hidden,
53 cl::desc("webassembly: disables the fix "
54 " irreducible control flow optimization pass"),
55 cl::init(false));
56
57// A temporary option to control emission of multivalue until multivalue
58// implementation is stable enough. We currently don't emit multivalue by
59// default even if the feature section allows it.
60// TODO Stabilize multivalue and delete this option
62 WasmEmitMultiValue("wasm-emit-multivalue", cl::Hidden,
63 cl::desc("WebAssembly: Emit multivalue in the backend"),
64 cl::init(false));
65
67 // Register the target.
72
73 // Register backend passes
102}
103
104//===----------------------------------------------------------------------===//
105// WebAssembly Lowering public interface.
106//===----------------------------------------------------------------------===//
107
108static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM,
109 const Triple &TT) {
110 if (!RM) {
111 // Default to static relocation model. This should always be more optimial
112 // than PIC since the static linker can determine all global addresses and
113 // assume direct function calls.
114 return Reloc::Static;
115 }
116
117 return *RM;
118}
119
120/// Create an WebAssembly architecture model.
121///
123 const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
124 const TargetOptions &Options, std::optional<Reloc::Model> RM,
125 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, bool JIT)
127 T,
128 TT.isArch64Bit()
129 ? (TT.isOSEmscripten() ? "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
130 "f128:64-n32:64-S128-ni:1:10:20"
131 : "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
132 "n32:64-S128-ni:1:10:20")
133 : (TT.isOSEmscripten() ? "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
134 "f128:64-n32:64-S128-ni:1:10:20"
135 : "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
136 "n32:64-S128-ni:1:10:20"),
137 TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
138 getEffectiveCodeModel(CM, CodeModel::Large), OL),
139 TLOF(new WebAssemblyTargetObjectFile()) {
140 // WebAssembly type-checks instructions, but a noreturn function with a return
141 // type that doesn't match the context will cause a check failure. So we lower
142 // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
143 // 'unreachable' instructions which is meant for that case.
144 this->Options.TrapUnreachable = true;
145 this->Options.NoTrapAfterNoreturn = false;
146
147 // WebAssembly treats each function as an independent unit. Force
148 // -ffunction-sections, effectively, so that we can emit them independently.
149 this->Options.FunctionSections = true;
150 this->Options.DataSections = true;
151 this->Options.UniqueSectionNames = true;
152
153 initAsmInfo();
154
155 // Note that we don't use setRequiresStructuredCFG(true). It disables
156 // optimizations than we're ok with, and want, such as critical edge
157 // splitting and tail merging.
158}
159
161
163 return getSubtargetImpl(std::string(getTargetCPU()),
164 std::string(getTargetFeatureString()));
165}
166
169 std::string FS) const {
170 auto &I = SubtargetMap[CPU + FS];
171 if (!I) {
172 I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
173 }
174 return I.get();
175}
176
179 Attribute CPUAttr = F.getFnAttribute("target-cpu");
180 Attribute FSAttr = F.getFnAttribute("target-features");
181
182 std::string CPU =
183 CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
184 std::string FS =
185 FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
186
187 // This needs to be done before we create a new subtarget since any
188 // creation will depend on the TM and the code generation flags on the
189 // function that reside in TargetOptions.
191
192 return getSubtargetImpl(CPU, FS);
193}
194
195namespace {
196
197class CoalesceFeaturesAndStripAtomics final : public ModulePass {
198 // Take the union of all features used in the module and use it for each
199 // function individually, since having multiple feature sets in one module
200 // currently does not make sense for WebAssembly. If atomics are not enabled,
201 // also strip atomic operations and thread local storage.
202 static char ID;
204
205public:
206 CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
207 : ModulePass(ID), WasmTM(WasmTM) {}
208
209 bool runOnModule(Module &M) override {
210 FeatureBitset Features = coalesceFeatures(M);
211
212 std::string FeatureStr =
213 getFeatureString(Features, WasmTM->getTargetFeatureString());
214 WasmTM->setTargetFeatureString(FeatureStr);
215 for (auto &F : M)
216 replaceFeatures(F, FeatureStr);
217
218 bool StrippedAtomics = false;
219 bool StrippedTLS = false;
220
221 if (!Features[WebAssembly::FeatureAtomics]) {
222 StrippedAtomics = stripAtomics(M);
223 StrippedTLS = stripThreadLocals(M);
224 } else if (!Features[WebAssembly::FeatureBulkMemory]) {
225 StrippedTLS |= stripThreadLocals(M);
226 }
227
228 if (StrippedAtomics && !StrippedTLS)
229 stripThreadLocals(M);
230 else if (StrippedTLS && !StrippedAtomics)
231 stripAtomics(M);
232
233 recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
234
235 // Conservatively assume we have made some change
236 return true;
237 }
238
239private:
240 FeatureBitset coalesceFeatures(const Module &M) {
241 FeatureBitset Features =
242 WasmTM
243 ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
244 std::string(WasmTM->getTargetFeatureString()))
245 ->getFeatureBits();
246 for (auto &F : M)
247 Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
248 return Features;
249 }
250
251 static std::string getFeatureString(const FeatureBitset &Features,
252 StringRef TargetFS) {
253 std::string Ret;
254 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
255 if (Features[KV.Value])
256 Ret += (StringRef("+") + KV.Key + ",").str();
257 }
258 SubtargetFeatures TF{TargetFS};
259 for (std::string const &F : TF.getFeatures())
261 Ret += F + ",";
262 return Ret;
263 }
264
265 void replaceFeatures(Function &F, const std::string &Features) {
266 F.removeFnAttr("target-features");
267 F.removeFnAttr("target-cpu");
268 F.addFnAttr("target-features", Features);
269 }
270
271 bool stripAtomics(Module &M) {
272 // Detect whether any atomics will be lowered, since there is no way to tell
273 // whether the LowerAtomic pass lowers e.g. stores.
274 bool Stripped = false;
275 for (auto &F : M) {
276 for (auto &B : F) {
277 for (auto &I : B) {
278 if (I.isAtomic()) {
279 Stripped = true;
280 goto done;
281 }
282 }
283 }
284 }
285
286 done:
287 if (!Stripped)
288 return false;
289
290 LowerAtomicPass Lowerer;
292 for (auto &F : M)
293 Lowerer.run(F, FAM);
294
295 return true;
296 }
297
298 bool stripThreadLocals(Module &M) {
299 bool Stripped = false;
300 for (auto &GV : M.globals()) {
301 if (GV.isThreadLocal()) {
302 Stripped = true;
303 GV.setThreadLocal(false);
304 }
305 }
306 return Stripped;
307 }
308
309 void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
310 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
311 if (Features[KV.Value]) {
312 // Mark features as used
313 std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
314 M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
316 }
317 }
318 // Code compiled without atomics or bulk-memory may have had its atomics or
319 // thread-local data lowered to nonatomic operations or non-thread-local
320 // data. In that case, we mark the pseudo-feature "shared-mem" as disallowed
321 // to tell the linker that it would be unsafe to allow this code ot be used
322 // in a module with shared memory.
323 if (Stripped) {
324 M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem",
326 }
327 }
328};
329char CoalesceFeaturesAndStripAtomics::ID = 0;
330
331/// WebAssembly Code Generator Pass Configuration Options.
332class WebAssemblyPassConfig final : public TargetPassConfig {
333public:
334 WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
335 : TargetPassConfig(TM, PM) {}
336
337 WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
338 return getTM<WebAssemblyTargetMachine>();
339 }
340
341 FunctionPass *createTargetRegisterAllocator(bool) override;
342
343 void addIRPasses() override;
344 void addISelPrepare() override;
345 bool addInstSelector() override;
346 void addOptimizedRegAlloc() override;
347 void addPostRegAlloc() override;
348 bool addGCPasses() override { return false; }
349 void addPreEmitPass() override;
350 bool addPreISel() override;
351
352 // No reg alloc
353 bool addRegAssignAndRewriteFast() override { return false; }
354
355 // No reg alloc
356 bool addRegAssignAndRewriteOptimized() override { return false; }
357};
358} // end anonymous namespace
359
361 BumpPtrAllocator &Allocator, const Function &F,
362 const TargetSubtargetInfo *STI) const {
363 return WebAssemblyFunctionInfo::create<WebAssemblyFunctionInfo>(Allocator, F,
364 STI);
365}
366
370}
371
374 return new WebAssemblyPassConfig(*this, PM);
375}
376
377FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
378 return nullptr; // No reg alloc
379}
380
385
387 // Before checking, we make sure TargetOptions.ExceptionModel is the same as
388 // MCAsmInfo.ExceptionsType. Normally these have to be the same, because clang
389 // stores the exception model info in LangOptions, which is later transferred
390 // to TargetOptions and MCAsmInfo. But when clang compiles bitcode directly,
391 // clang's LangOptions is not used and thus the exception model info is not
392 // correctly transferred to TargetOptions and MCAsmInfo, so we make sure we
393 // have the correct exception model in WebAssemblyMCAsmInfo constructor.
394 // But in this case TargetOptions is still not updated, so we make sure they
395 // are the same.
396 TM->Options.ExceptionModel = TM->getMCAsmInfo()->getExceptionHandlingType();
397
398 // Basic Correctness checking related to -exception-model
399 if (TM->Options.ExceptionModel != ExceptionHandling::None &&
400 TM->Options.ExceptionModel != ExceptionHandling::Wasm)
401 report_fatal_error("-exception-model should be either 'none' or 'wasm'");
402 if (WasmEnableEmEH && TM->Options.ExceptionModel == ExceptionHandling::Wasm)
403 report_fatal_error("-exception-model=wasm not allowed with "
404 "-enable-emscripten-cxx-exceptions");
405 if (WasmEnableEH && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
407 "-wasm-enable-eh only allowed with -exception-model=wasm");
408 if (WasmEnableSjLj && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
410 "-wasm-enable-sjlj only allowed with -exception-model=wasm");
411 if ((!WasmEnableEH && !WasmEnableSjLj) &&
412 TM->Options.ExceptionModel == ExceptionHandling::Wasm)
414 "-exception-model=wasm only allowed with at least one of "
415 "-wasm-enable-eh or -wasm-enable-sjlj");
416
417 // You can't enable two modes of EH at the same time
418 if (WasmEnableEmEH && WasmEnableEH)
420 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-eh");
421 // You can't enable two modes of SjLj at the same time
422 if (WasmEnableEmSjLj && WasmEnableSjLj)
424 "-enable-emscripten-sjlj not allowed with -wasm-enable-sjlj");
425 // You can't mix Emscripten EH with Wasm SjLj.
426 if (WasmEnableEmEH && WasmEnableSjLj)
428 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-sjlj");
429 // Currently it is allowed to mix Wasm EH with Emscripten SjLj as an interim
430 // measure, but some code will error out at compile time in this combination.
431 // See WebAssemblyLowerEmscriptenEHSjLj pass for details.
432}
433
434//===----------------------------------------------------------------------===//
435// The following functions are called from lib/CodeGen/Passes.cpp to modify
436// the CodeGen pass sequence.
437//===----------------------------------------------------------------------===//
438
439void WebAssemblyPassConfig::addIRPasses() {
440 // Add signatures to prototype-less function declarations
442
443 // Lower .llvm.global_dtors into .llvm.global_ctors with __cxa_atexit calls.
445
446 // Fix function bitcasts, as WebAssembly requires caller and callee signatures
447 // to match.
449
450 // Optimize "returned" function attributes.
451 if (getOptLevel() != CodeGenOptLevel::None)
453
455
456 // If exception handling is not enabled and setjmp/longjmp handling is
457 // enabled, we lower invokes into calls and delete unreachable landingpad
458 // blocks. Lowering invokes when there is no EH support is done in
459 // TargetPassConfig::addPassesToHandleExceptions, but that runs after these IR
460 // passes and Emscripten SjLj handling expects all invokes to be lowered
461 // before.
462 if (!WasmEnableEmEH && !WasmEnableEH) {
463 addPass(createLowerInvokePass());
464 // The lower invoke pass may create unreachable code. Remove it in order not
465 // to process dead blocks in setjmp/longjmp handling.
467 }
468
469 // Handle exceptions and setjmp/longjmp if enabled. Unlike Wasm EH preparation
470 // done in WasmEHPrepare pass, Wasm SjLj preparation shares libraries and
471 // transformation algorithms with Emscripten SjLj, so we run
472 // LowerEmscriptenEHSjLj pass also when Wasm SjLj is enabled.
473 if (WasmEnableEmEH || WasmEnableEmSjLj || WasmEnableSjLj)
475
476 // Expand indirectbr instructions to switches.
478
480}
481
482void WebAssemblyPassConfig::addISelPrepare() {
484 static_cast<WebAssemblyTargetMachine *>(TM);
485 const WebAssemblySubtarget *Subtarget =
486 WasmTM->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
487 std::string(WasmTM->getTargetFeatureString()));
488 if (Subtarget->hasReferenceTypes()) {
489 // We need to remove allocas for reference types
491 }
492 // Lower atomics and TLS if necessary
493 addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
494
495 // This is a no-op if atomics are not used in the module
497
499}
500
501bool WebAssemblyPassConfig::addInstSelector() {
503 addPass(
504 createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
505 // Run the argument-move pass immediately after the ScheduleDAG scheduler
506 // so that we can fix up the ARGUMENT instructions before anything else
507 // sees them in the wrong place.
509 // Set the p2align operands. This information is present during ISel, however
510 // it's inconvenient to collect. Collect it now, and update the immediate
511 // operands.
513
514 // Eliminate range checks and add default targets to br_table instructions.
516
517 return false;
518}
519
520void WebAssemblyPassConfig::addOptimizedRegAlloc() {
521 // Currently RegisterCoalesce degrades wasm debug info quality by a
522 // significant margin. As a quick fix, disable this for -O1, which is often
523 // used for debugging large applications. Disabling this increases code size
524 // of Emscripten core benchmarks by ~5%, which is acceptable for -O1, which is
525 // usually not used for production builds.
526 // TODO Investigate why RegisterCoalesce degrades debug info quality and fix
527 // it properly
528 if (getOptLevel() == CodeGenOptLevel::Less)
529 disablePass(&RegisterCoalescerID);
531}
532
533void WebAssemblyPassConfig::addPostRegAlloc() {
534 // TODO: The following CodeGen passes don't currently support code containing
535 // virtual registers. Consider removing their restrictions and re-enabling
536 // them.
537
538 // These functions all require the NoVRegs property.
539 disablePass(&MachineLateInstrsCleanupID);
540 disablePass(&MachineCopyPropagationID);
541 disablePass(&PostRAMachineSinkingID);
542 disablePass(&PostRASchedulerID);
543 disablePass(&FuncletLayoutID);
544 disablePass(&StackMapLivenessID);
545 disablePass(&PatchableFunctionID);
546 disablePass(&ShrinkWrapID);
547
548 // This pass hurts code size for wasm because it can generate irreducible
549 // control flow.
550 disablePass(&MachineBlockPlacementID);
551
553}
554
555void WebAssemblyPassConfig::addPreEmitPass() {
557
558 // Nullify DBG_VALUE_LISTs that we cannot handle.
560
561 // Eliminate multiple-entry loops.
564
565 // Do various transformations for exception handling.
566 // Every CFG-changing optimizations should come before this.
567 if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
569
570 // Now that we have a prologue and epilogue and all frame indices are
571 // rewritten, eliminate SP and FP. This allows them to be stackified,
572 // colored, and numbered with the rest of the registers.
574
575 // Preparations and optimizations related to register stackification.
576 if (getOptLevel() != CodeGenOptLevel::None) {
577 // Depend on LiveIntervals and perform some optimizations on it.
579
580 // Prepare memory intrinsic calls for register stackifying.
582
583 // Mark registers as representing wasm's value stack. This is a key
584 // code-compression technique in WebAssembly. We run this pass (and
585 // MemIntrinsicResults above) very late, so that it sees as much code as
586 // possible, including code emitted by PEI and expanded by late tail
587 // duplication.
589
590 // Run the register coloring pass to reduce the total number of registers.
591 // This runs after stackification so that it doesn't consider registers
592 // that become stackified.
594 }
595
596 // Sort the blocks of the CFG into topological order, a prerequisite for
597 // BLOCK and LOOP markers.
598 addPass(createWebAssemblyCFGSort());
599
600 // Insert BLOCK and LOOP markers.
602
603 // Insert explicit local.get and local.set operators.
606
607 // Lower br_unless into br_if.
609
610 // Perform the very last peephole optimizations on the code.
611 if (getOptLevel() != CodeGenOptLevel::None)
612 addPass(createWebAssemblyPeephole());
613
614 // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
616
617 // Fix debug_values whose defs have been stackified.
620
621 // Collect information to prepare for MC lowering / asm printing.
623}
624
625bool WebAssemblyPassConfig::addPreISel() {
628 return false;
629}
630
634}
635
637 const MachineFunction &MF) const {
638 const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
639 return new yaml::WebAssemblyFunctionInfo(MF, *MFI);
640}
641
644 SMDiagnostic &Error, SMRange &SourceRange) const {
645 const auto &YamlMFI = static_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
646 MachineFunction &MF = PFS.MF;
647 MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(MF, YamlMFI);
648 return false;
649}
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:135
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static LVOptions Options
Definition: LVOptions.cpp:25
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
FunctionAnalysisManager FAM
const char LLVMTargetMachineRef TM
Basic Register Allocator
Target-Independent Code Generator Pass Configuration Options pass.
This file defines the interfaces that WebAssembly uses to lower LLVM code into a selection DAG.
This file provides WebAssembly-specific target descriptions.
This file declares WebAssembly-specific per-machine-function information.
This file registers the WebAssembly target.
cl::opt< bool > WasmEmitMultiValue("wasm-emit-multivalue", cl::Hidden, cl::desc("WebAssembly: Emit multivalue in the backend"), cl::init(false))
static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM, const Triple &TT)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget()
static void basicCheckForEHAndSjLj(TargetMachine *TM)
static cl::opt< bool > WasmDisableExplicitLocals("wasm-disable-explicit-locals", cl::Hidden, cl::desc("WebAssembly: output implicit locals in" " instruction output for test purposes only."), cl::init(false))
static cl::opt< bool > WasmDisableFixIrreducibleControlFlowPass("wasm-disable-fix-irreducible-control-flow-pass", cl::Hidden, cl::desc("webassembly: disables the fix " " irreducible control flow optimization pass"), cl::init(false))
This file declares the WebAssembly-specific subclass of TargetMachine.
This file declares the WebAssembly-specific subclass of TargetLoweringObjectFile.
This file a TargetTransformInfo::Concept conforming object specific to the WebAssembly target machine...
This file contains the declaration of the WebAssembly-specific utility functions.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.
A container for analyses that lazily runs them and caches their results.
Definition: PassManager.h:348
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:318
bool isValid() const
Return true if the attribute is any kind of attribute.
Definition: Attributes.h:184
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
Lightweight error class with error context and mandatory checking.
Definition: Error.h:160
Container class for subtarget features.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
This class describes a target machine that is implemented with the LLVM target-independent code gener...
A pass that lowers atomic intrinsic into non-atomic intrinsics.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &)
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
Definition: Pass.h:251
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:281
Represents a range in source code.
Definition: SMLoc.h:48
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:222
Manages the enabling and disabling of subtarget specific features.
static bool isEnabled(StringRef Feature)
Return true if enable flag; '+'.
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:76
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:95
std::string TargetFS
Definition: TargetMachine.h:97
StringRef getTargetFeatureString() const
StringRef getTargetCPU() const
std::string TargetCPU
Definition: TargetMachine.h:96
std::unique_ptr< const MCSubtargetInfo > STI
void setTargetFeatureString(StringRef FS)
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
unsigned UniqueSectionNames
unsigned FunctionSections
Emit functions into separate sections.
unsigned NoTrapAfterNoreturn
Do not emit a trap instruction for 'unreachable' IR instructions behind noreturn calls,...
unsigned DataSections
Emit data into separate sections.
unsigned TrapUnreachable
Emit target-specific trap instruction for 'unreachable' IR instructions.
Target-Independent Code Generator Pass Configuration Options.
virtual void addPostRegAlloc()
This method may be implemented by targets that want to run passes after register allocation pass pipe...
virtual bool addInstSelector()
addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...
virtual bool addPreISel()
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
virtual void addOptimizedRegAlloc()
addOptimizedRegAlloc - Add passes related to register allocation.
virtual void addPreEmitPass()
This pass may be implemented by targets that want to run passes immediately before machine code is em...
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
virtual void addISelPrepare()
Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
yaml::MachineFunctionInfo * createDefaultFuncInfoYAML() const override
Allocate and return a default initialized instance of the YAML representation for the MachineFunction...
bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
Parse out the target's MachineFunctionInfo from the YAML reprsentation.
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
Create an WebAssembly architecture model.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
const WebAssemblySubtarget * getSubtargetImpl() const
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const override
Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
cl::opt< bool > WasmEnableEH
cl::opt< bool > WasmEnableSjLj
cl::opt< bool > WasmEnableEmEH
cl::opt< bool > WasmEnableEmSjLj
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:450
@ WASM_FEATURE_PREFIX_USED
Definition: Wasm.h:168
@ WASM_FEATURE_PREFIX_DISALLOWED
Definition: Wasm.h:170
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void initializeOptimizeReturnedPass(PassRegistry &)
FunctionPass * createIndirectBrExpandPass()
void initializeWebAssemblyLowerBrUnlessPass(PassRegistry &)
void initializeWebAssemblyDAGToDAGISelPass(PassRegistry &)
FunctionPass * createWebAssemblyLowerRefTypesIntPtrConv()
FunctionPass * createWebAssemblyRegNumbering()
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
ModulePass * createWebAssemblyAddMissingPrototypes()
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
FunctionPass * createWebAssemblyLateEHPrepare()
const SubtargetFeatureKV WebAssemblyFeatureKV[WebAssembly::NumSubtargetFeatures]
void initializeWebAssemblyLateEHPreparePass(PassRegistry &)
@ None
No exception support.
@ Wasm
WebAssembly Exception Handling.
FunctionPass * createWebAssemblyFixBrTableDefaults()
void initializeWebAssemblyAddMissingPrototypesPass(PassRegistry &)
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
void initializeWebAssemblyExceptionInfoPass(PassRegistry &)
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
void initializeWebAssemblyRegNumberingPass(PassRegistry &)
void initializeWebAssemblyLowerRefTypesIntPtrConvPass(PassRegistry &)
FunctionPass * createWebAssemblyReplacePhysRegs()
void initializeWebAssemblyRegColoringPass(PassRegistry &)
CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
FunctionPass * createWebAssemblyMemIntrinsicResults()
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:286
char & MachineLateInstrsCleanupID
MachineLateInstrsCleanup - This pass removes redundant identical instructions after register allocati...
FunctionPass * createWebAssemblyDebugFixup()
ModulePass * createLowerGlobalDtorsLegacyPass()
FunctionPass * createLowerInvokePass()
Definition: LowerInvoke.cpp:85
void initializeLowerGlobalDtorsLegacyPassPass(PassRegistry &)
Target & getTheWebAssemblyTarget32()
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:156
void initializeWebAssemblyNullifyDebugValueListsPass(PassRegistry &)
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
void initializeWebAssemblyFixIrreducibleControlFlowPass(PassRegistry &)
FunctionPass * createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, CodeGenOptLevel OptLevel)
This pass converts a legalized DAG into a WebAssembly-specific DAG, ready for instruction scheduling.
char & FuncletLayoutID
This pass lays out funclets contiguously.
void initializeWebAssemblyRegStackifyPass(PassRegistry &)
FunctionPass * createWebAssemblyCFGStackify()
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
CodeGenOptLevel
Code generation optimization level.
Definition: CodeGen.h:54
FunctionPass * createWebAssemblyOptimizeReturned()
void initializeWebAssemblyOptimizeLiveIntervalsPass(PassRegistry &)
FunctionPass * createWebAssemblySetP2AlignOperands()
ModulePass * createWebAssemblyLowerEmscriptenEHSjLj()
void initializeWebAssemblyLowerEmscriptenEHSjLjPass(PassRegistry &)
FunctionPass * createWebAssemblyArgumentMove()
FunctionPass * createWebAssemblyExplicitLocals()
Target & getTheWebAssemblyTarget64()
void initializeWebAssemblyMemIntrinsicResultsPass(PassRegistry &)
void initializeWebAssemblyMCLowerPrePassPass(PassRegistry &)
void initializeWebAssemblyExplicitLocalsPass(PassRegistry &)
FunctionPass * createWebAssemblyFixIrreducibleControlFlow()
ModulePass * createWebAssemblyFixFunctionBitcasts()
FunctionPass * createWebAssemblyLowerBrUnless()
void initializeFixFunctionBitcastsPass(PassRegistry &)
FunctionPass * createWebAssemblyRegColoring()
void initializeWebAssemblyPeepholePass(PassRegistry &)
ModulePass * createWebAssemblyMCLowerPrePass()
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
FunctionPass * createAtomicExpandLegacyPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
FunctionPass * createWebAssemblyRegStackify()
FunctionPass * createWebAssemblyCFGSort()
void initializeWebAssemblyCFGSortPass(PassRegistry &)
void initializeWebAssemblyFixBrTableDefaultsPass(PassRegistry &)
FunctionPass * createWebAssemblyNullifyDebugValueLists()
void initializeWebAssemblyCFGStackifyPass(PassRegistry &)
void initializeWebAssemblySetP2AlignOperandsPass(PassRegistry &)
void initializeWebAssemblyDebugFixupPass(PassRegistry &)
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
void initializeWebAssemblyArgumentMovePass(PassRegistry &)
FunctionPass * createWebAssemblyPeephole()
FunctionPass * createPromoteMemoryToRegisterPass(bool IsForced=false)
Definition: Mem2Reg.cpp:118
void initializeWebAssemblyReplacePhysRegsPass(PassRegistry &)
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
RegisterTargetMachine - Helper template for registering a target machine implementation,...
Used to provide key value pairs for feature and CPU bit flags.
Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.