LLVM 19.0.0git
WebAssemblyTargetMachine.cpp
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1//===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file defines the WebAssembly-specific subclass of TargetMachine.
11///
12//===----------------------------------------------------------------------===//
13
17#include "WebAssembly.h"
25#include "llvm/CodeGen/Passes.h"
28#include "llvm/IR/Function.h"
30#include "llvm/MC/MCAsmInfo.h"
36#include <optional>
37using namespace llvm;
38
39#define DEBUG_TYPE "wasm"
40
41// A command-line option to keep implicit locals
42// for the purpose of testing with lit/llc ONLY.
43// This produces output which is not valid WebAssembly, and is not supported
44// by assemblers/disassemblers and other MC based tools.
46 "wasm-disable-explicit-locals", cl::Hidden,
47 cl::desc("WebAssembly: output implicit locals in"
48 " instruction output for test purposes only."),
49 cl::init(false));
50
52 "wasm-disable-fix-irreducible-control-flow-pass", cl::Hidden,
53 cl::desc("webassembly: disables the fix "
54 " irreducible control flow optimization pass"),
55 cl::init(false));
56
58 // Register the target.
63
64 // Register backend passes
94}
95
96//===----------------------------------------------------------------------===//
97// WebAssembly Lowering public interface.
98//===----------------------------------------------------------------------===//
99
100static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM,
101 const Triple &TT) {
102 if (!RM) {
103 // Default to static relocation model. This should always be more optimial
104 // than PIC since the static linker can determine all global addresses and
105 // assume direct function calls.
106 return Reloc::Static;
107 }
108
109 return *RM;
110}
111
112/// Create an WebAssembly architecture model.
113///
115 const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
116 const TargetOptions &Options, std::optional<Reloc::Model> RM,
117 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, bool JIT)
119 T,
120 TT.isArch64Bit()
121 ? (TT.isOSEmscripten() ? "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
122 "f128:64-n32:64-S128-ni:1:10:20"
123 : "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
124 "n32:64-S128-ni:1:10:20")
125 : (TT.isOSEmscripten() ? "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
126 "f128:64-n32:64-S128-ni:1:10:20"
127 : "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
128 "n32:64-S128-ni:1:10:20"),
129 TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
130 getEffectiveCodeModel(CM, CodeModel::Large), OL),
131 TLOF(new WebAssemblyTargetObjectFile()) {
132 // WebAssembly type-checks instructions, but a noreturn function with a return
133 // type that doesn't match the context will cause a check failure. So we lower
134 // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
135 // 'unreachable' instructions which is meant for that case.
136 this->Options.TrapUnreachable = true;
137 this->Options.NoTrapAfterNoreturn = false;
138
139 // WebAssembly treats each function as an independent unit. Force
140 // -ffunction-sections, effectively, so that we can emit them independently.
141 this->Options.FunctionSections = true;
142 this->Options.DataSections = true;
143 this->Options.UniqueSectionNames = true;
144
145 initAsmInfo();
146
147 // Note that we don't use setRequiresStructuredCFG(true). It disables
148 // optimizations than we're ok with, and want, such as critical edge
149 // splitting and tail merging.
150}
151
153
155 return getSubtargetImpl(std::string(getTargetCPU()),
156 std::string(getTargetFeatureString()));
157}
158
161 std::string FS) const {
162 auto &I = SubtargetMap[CPU + FS];
163 if (!I) {
164 I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
165 }
166 return I.get();
167}
168
171 Attribute CPUAttr = F.getFnAttribute("target-cpu");
172 Attribute FSAttr = F.getFnAttribute("target-features");
173
174 std::string CPU =
175 CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
176 std::string FS =
177 FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
178
179 // This needs to be done before we create a new subtarget since any
180 // creation will depend on the TM and the code generation flags on the
181 // function that reside in TargetOptions.
183
184 return getSubtargetImpl(CPU, FS);
185}
186
187namespace {
188
189class CoalesceFeaturesAndStripAtomics final : public ModulePass {
190 // Take the union of all features used in the module and use it for each
191 // function individually, since having multiple feature sets in one module
192 // currently does not make sense for WebAssembly. If atomics are not enabled,
193 // also strip atomic operations and thread local storage.
194 static char ID;
196
197public:
198 CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
199 : ModulePass(ID), WasmTM(WasmTM) {}
200
201 bool runOnModule(Module &M) override {
202 FeatureBitset Features = coalesceFeatures(M);
203
204 std::string FeatureStr =
205 getFeatureString(Features, WasmTM->getTargetFeatureString());
206 WasmTM->setTargetFeatureString(FeatureStr);
207 for (auto &F : M)
208 replaceFeatures(F, FeatureStr);
209
210 bool StrippedAtomics = false;
211 bool StrippedTLS = false;
212
213 if (!Features[WebAssembly::FeatureAtomics]) {
214 StrippedAtomics = stripAtomics(M);
215 StrippedTLS = stripThreadLocals(M);
216 } else if (!Features[WebAssembly::FeatureBulkMemory]) {
217 StrippedTLS |= stripThreadLocals(M);
218 }
219
220 if (StrippedAtomics && !StrippedTLS)
221 stripThreadLocals(M);
222 else if (StrippedTLS && !StrippedAtomics)
223 stripAtomics(M);
224
225 recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
226
227 // Conservatively assume we have made some change
228 return true;
229 }
230
231private:
232 FeatureBitset coalesceFeatures(const Module &M) {
233 FeatureBitset Features =
234 WasmTM
235 ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
236 std::string(WasmTM->getTargetFeatureString()))
237 ->getFeatureBits();
238 for (auto &F : M)
239 Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
240 return Features;
241 }
242
243 static std::string getFeatureString(const FeatureBitset &Features,
244 StringRef TargetFS) {
245 std::string Ret;
246 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
247 if (Features[KV.Value])
248 Ret += (StringRef("+") + KV.Key + ",").str();
249 }
250 SubtargetFeatures TF{TargetFS};
251 for (std::string const &F : TF.getFeatures())
253 Ret += F + ",";
254 return Ret;
255 }
256
257 void replaceFeatures(Function &F, const std::string &Features) {
258 F.removeFnAttr("target-features");
259 F.removeFnAttr("target-cpu");
260 F.addFnAttr("target-features", Features);
261 }
262
263 bool stripAtomics(Module &M) {
264 // Detect whether any atomics will be lowered, since there is no way to tell
265 // whether the LowerAtomic pass lowers e.g. stores.
266 bool Stripped = false;
267 for (auto &F : M) {
268 for (auto &B : F) {
269 for (auto &I : B) {
270 if (I.isAtomic()) {
271 Stripped = true;
272 goto done;
273 }
274 }
275 }
276 }
277
278 done:
279 if (!Stripped)
280 return false;
281
282 LowerAtomicPass Lowerer;
284 for (auto &F : M)
285 Lowerer.run(F, FAM);
286
287 return true;
288 }
289
290 bool stripThreadLocals(Module &M) {
291 bool Stripped = false;
292 for (auto &GV : M.globals()) {
293 if (GV.isThreadLocal()) {
294 Stripped = true;
295 GV.setThreadLocal(false);
296 }
297 }
298 return Stripped;
299 }
300
301 void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
302 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
303 if (Features[KV.Value]) {
304 // Mark features as used
305 std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
306 M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
308 }
309 }
310 // Code compiled without atomics or bulk-memory may have had its atomics or
311 // thread-local data lowered to nonatomic operations or non-thread-local
312 // data. In that case, we mark the pseudo-feature "shared-mem" as disallowed
313 // to tell the linker that it would be unsafe to allow this code ot be used
314 // in a module with shared memory.
315 if (Stripped) {
316 M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem",
318 }
319 }
320};
321char CoalesceFeaturesAndStripAtomics::ID = 0;
322
323/// WebAssembly Code Generator Pass Configuration Options.
324class WebAssemblyPassConfig final : public TargetPassConfig {
325public:
326 WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
327 : TargetPassConfig(TM, PM) {}
328
329 WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
330 return getTM<WebAssemblyTargetMachine>();
331 }
332
333 FunctionPass *createTargetRegisterAllocator(bool) override;
334
335 void addIRPasses() override;
336 void addISelPrepare() override;
337 bool addInstSelector() override;
338 void addOptimizedRegAlloc() override;
339 void addPostRegAlloc() override;
340 bool addGCPasses() override { return false; }
341 void addPreEmitPass() override;
342 bool addPreISel() override;
343
344 // No reg alloc
345 bool addRegAssignAndRewriteFast() override { return false; }
346
347 // No reg alloc
348 bool addRegAssignAndRewriteOptimized() override { return false; }
349};
350} // end anonymous namespace
351
353 BumpPtrAllocator &Allocator, const Function &F,
354 const TargetSubtargetInfo *STI) const {
355 return WebAssemblyFunctionInfo::create<WebAssemblyFunctionInfo>(Allocator, F,
356 STI);
357}
358
362}
363
366 return new WebAssemblyPassConfig(*this, PM);
367}
368
369FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
370 return nullptr; // No reg alloc
371}
372
377
379 // Before checking, we make sure TargetOptions.ExceptionModel is the same as
380 // MCAsmInfo.ExceptionsType. Normally these have to be the same, because clang
381 // stores the exception model info in LangOptions, which is later transferred
382 // to TargetOptions and MCAsmInfo. But when clang compiles bitcode directly,
383 // clang's LangOptions is not used and thus the exception model info is not
384 // correctly transferred to TargetOptions and MCAsmInfo, so we make sure we
385 // have the correct exception model in WebAssemblyMCAsmInfo constructor.
386 // But in this case TargetOptions is still not updated, so we make sure they
387 // are the same.
388 TM->Options.ExceptionModel = TM->getMCAsmInfo()->getExceptionHandlingType();
389
390 // Basic Correctness checking related to -exception-model
391 if (TM->Options.ExceptionModel != ExceptionHandling::None &&
392 TM->Options.ExceptionModel != ExceptionHandling::Wasm)
393 report_fatal_error("-exception-model should be either 'none' or 'wasm'");
394 if (WasmEnableEmEH && TM->Options.ExceptionModel == ExceptionHandling::Wasm)
395 report_fatal_error("-exception-model=wasm not allowed with "
396 "-enable-emscripten-cxx-exceptions");
397 if (WasmEnableEH && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
399 "-wasm-enable-eh only allowed with -exception-model=wasm");
400 if (WasmEnableSjLj && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
402 "-wasm-enable-sjlj only allowed with -exception-model=wasm");
403 if ((!WasmEnableEH && !WasmEnableSjLj) &&
404 TM->Options.ExceptionModel == ExceptionHandling::Wasm)
406 "-exception-model=wasm only allowed with at least one of "
407 "-wasm-enable-eh or -wasm-enable-sjlj");
408
409 // You can't enable two modes of EH at the same time
410 if (WasmEnableEmEH && WasmEnableEH)
412 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-eh");
413 // You can't enable two modes of SjLj at the same time
414 if (WasmEnableEmSjLj && WasmEnableSjLj)
416 "-enable-emscripten-sjlj not allowed with -wasm-enable-sjlj");
417 // You can't mix Emscripten EH with Wasm SjLj.
418 if (WasmEnableEmEH && WasmEnableSjLj)
420 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-sjlj");
421 // Currently it is allowed to mix Wasm EH with Emscripten SjLj as an interim
422 // measure, but some code will error out at compile time in this combination.
423 // See WebAssemblyLowerEmscriptenEHSjLj pass for details.
424}
425
426//===----------------------------------------------------------------------===//
427// The following functions are called from lib/CodeGen/Passes.cpp to modify
428// the CodeGen pass sequence.
429//===----------------------------------------------------------------------===//
430
431void WebAssemblyPassConfig::addIRPasses() {
432 // Add signatures to prototype-less function declarations
434
435 // Lower .llvm.global_dtors into .llvm.global_ctors with __cxa_atexit calls.
437
438 // Fix function bitcasts, as WebAssembly requires caller and callee signatures
439 // to match.
441
442 // Optimize "returned" function attributes.
443 if (getOptLevel() != CodeGenOptLevel::None)
445
447
448 // If exception handling is not enabled and setjmp/longjmp handling is
449 // enabled, we lower invokes into calls and delete unreachable landingpad
450 // blocks. Lowering invokes when there is no EH support is done in
451 // TargetPassConfig::addPassesToHandleExceptions, but that runs after these IR
452 // passes and Emscripten SjLj handling expects all invokes to be lowered
453 // before.
454 if (!WasmEnableEmEH && !WasmEnableEH) {
455 addPass(createLowerInvokePass());
456 // The lower invoke pass may create unreachable code. Remove it in order not
457 // to process dead blocks in setjmp/longjmp handling.
459 }
460
461 // Handle exceptions and setjmp/longjmp if enabled. Unlike Wasm EH preparation
462 // done in WasmEHPrepare pass, Wasm SjLj preparation shares libraries and
463 // transformation algorithms with Emscripten SjLj, so we run
464 // LowerEmscriptenEHSjLj pass also when Wasm SjLj is enabled.
465 if (WasmEnableEmEH || WasmEnableEmSjLj || WasmEnableSjLj)
467
468 // Expand indirectbr instructions to switches.
470
472}
473
474void WebAssemblyPassConfig::addISelPrepare() {
476 static_cast<WebAssemblyTargetMachine *>(TM);
477 const WebAssemblySubtarget *Subtarget =
478 WasmTM->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
479 std::string(WasmTM->getTargetFeatureString()));
480 if (Subtarget->hasReferenceTypes()) {
481 // We need to move reference type allocas to WASM_ADDRESS_SPACE_VAR so that
482 // loads and stores are promoted to local.gets/local.sets.
484 }
485 // Lower atomics and TLS if necessary
486 addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
487
488 // This is a no-op if atomics are not used in the module
490
492}
493
494bool WebAssemblyPassConfig::addInstSelector() {
496 addPass(
497 createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
498 // Run the argument-move pass immediately after the ScheduleDAG scheduler
499 // so that we can fix up the ARGUMENT instructions before anything else
500 // sees them in the wrong place.
502 // Set the p2align operands. This information is present during ISel, however
503 // it's inconvenient to collect. Collect it now, and update the immediate
504 // operands.
506
507 // Eliminate range checks and add default targets to br_table instructions.
509
510 return false;
511}
512
513void WebAssemblyPassConfig::addOptimizedRegAlloc() {
514 // Currently RegisterCoalesce degrades wasm debug info quality by a
515 // significant margin. As a quick fix, disable this for -O1, which is often
516 // used for debugging large applications. Disabling this increases code size
517 // of Emscripten core benchmarks by ~5%, which is acceptable for -O1, which is
518 // usually not used for production builds.
519 // TODO Investigate why RegisterCoalesce degrades debug info quality and fix
520 // it properly
521 if (getOptLevel() == CodeGenOptLevel::Less)
522 disablePass(&RegisterCoalescerID);
524}
525
526void WebAssemblyPassConfig::addPostRegAlloc() {
527 // TODO: The following CodeGen passes don't currently support code containing
528 // virtual registers. Consider removing their restrictions and re-enabling
529 // them.
530
531 // These functions all require the NoVRegs property.
532 disablePass(&MachineLateInstrsCleanupID);
533 disablePass(&MachineCopyPropagationID);
534 disablePass(&PostRAMachineSinkingID);
535 disablePass(&PostRASchedulerID);
536 disablePass(&FuncletLayoutID);
537 disablePass(&StackMapLivenessID);
538 disablePass(&PatchableFunctionID);
539 disablePass(&ShrinkWrapID);
540
541 // This pass hurts code size for wasm because it can generate irreducible
542 // control flow.
543 disablePass(&MachineBlockPlacementID);
544
546}
547
548void WebAssemblyPassConfig::addPreEmitPass() {
550
551 // Nullify DBG_VALUE_LISTs that we cannot handle.
553
554 // Eliminate multiple-entry loops.
557
558 // Do various transformations for exception handling.
559 // Every CFG-changing optimizations should come before this.
560 if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
562
563 // Now that we have a prologue and epilogue and all frame indices are
564 // rewritten, eliminate SP and FP. This allows them to be stackified,
565 // colored, and numbered with the rest of the registers.
567
568 // Preparations and optimizations related to register stackification.
569 if (getOptLevel() != CodeGenOptLevel::None) {
570 // Depend on LiveIntervals and perform some optimizations on it.
572
573 // Prepare memory intrinsic calls for register stackifying.
575
576 // Mark registers as representing wasm's value stack. This is a key
577 // code-compression technique in WebAssembly. We run this pass (and
578 // MemIntrinsicResults above) very late, so that it sees as much code as
579 // possible, including code emitted by PEI and expanded by late tail
580 // duplication.
582
583 // Run the register coloring pass to reduce the total number of registers.
584 // This runs after stackification so that it doesn't consider registers
585 // that become stackified.
587 }
588
589 // Sort the blocks of the CFG into topological order, a prerequisite for
590 // BLOCK and LOOP markers.
591 addPass(createWebAssemblyCFGSort());
592
593 // Insert BLOCK and LOOP markers.
595
596 // Insert explicit local.get and local.set operators.
599
600 // Lower br_unless into br_if.
602
603 // Perform the very last peephole optimizations on the code.
604 if (getOptLevel() != CodeGenOptLevel::None)
605 addPass(createWebAssemblyPeephole());
606
607 // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
609
610 // Fix debug_values whose defs have been stackified.
613
614 // Collect information to prepare for MC lowering / asm printing.
616}
617
618bool WebAssemblyPassConfig::addPreISel() {
621 return false;
622}
623
627}
628
630 const MachineFunction &MF) const {
631 const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
632 return new yaml::WebAssemblyFunctionInfo(MF, *MFI);
633}
634
637 SMDiagnostic &Error, SMRange &SourceRange) const {
638 const auto &YamlMFI = static_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
639 MachineFunction &MF = PFS.MF;
640 MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(MF, YamlMFI);
641 return false;
642}
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:135
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static LVOptions Options
Definition: LVOptions.cpp:25
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
FunctionAnalysisManager FAM
const char LLVMTargetMachineRef TM
Basic Register Allocator
Target-Independent Code Generator Pass Configuration Options pass.
This file defines the interfaces that WebAssembly uses to lower LLVM code into a selection DAG.
This file provides WebAssembly-specific target descriptions.
This file declares WebAssembly-specific per-machine-function information.
This file registers the WebAssembly target.
static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM, const Triple &TT)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget()
static void basicCheckForEHAndSjLj(TargetMachine *TM)
static cl::opt< bool > WasmDisableExplicitLocals("wasm-disable-explicit-locals", cl::Hidden, cl::desc("WebAssembly: output implicit locals in" " instruction output for test purposes only."), cl::init(false))
static cl::opt< bool > WasmDisableFixIrreducibleControlFlowPass("wasm-disable-fix-irreducible-control-flow-pass", cl::Hidden, cl::desc("webassembly: disables the fix " " irreducible control flow optimization pass"), cl::init(false))
This file declares the WebAssembly-specific subclass of TargetMachine.
This file declares the WebAssembly-specific subclass of TargetLoweringObjectFile.
This file a TargetTransformInfo::Concept conforming object specific to the WebAssembly target machine...
This file contains the declaration of the WebAssembly-specific utility functions.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.
A container for analyses that lazily runs them and caches their results.
Definition: PassManager.h:348
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:349
bool isValid() const
Return true if the attribute is any kind of attribute.
Definition: Attributes.h:193
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
Lightweight error class with error context and mandatory checking.
Definition: Error.h:160
Container class for subtarget features.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
This class describes a target machine that is implemented with the LLVM target-independent code gener...
A pass that lowers atomic intrinsic into non-atomic intrinsics.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &)
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
Definition: Pass.h:251
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:281
Represents a range in source code.
Definition: SMLoc.h:48
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:222
Manages the enabling and disabling of subtarget specific features.
static bool isEnabled(StringRef Feature)
Return true if enable flag; '+'.
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:76
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:95
std::string TargetFS
Definition: TargetMachine.h:97
StringRef getTargetFeatureString() const
StringRef getTargetCPU() const
std::string TargetCPU
Definition: TargetMachine.h:96
std::unique_ptr< const MCSubtargetInfo > STI
void setTargetFeatureString(StringRef FS)
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
unsigned UniqueSectionNames
unsigned FunctionSections
Emit functions into separate sections.
unsigned NoTrapAfterNoreturn
Do not emit a trap instruction for 'unreachable' IR instructions behind noreturn calls,...
unsigned DataSections
Emit data into separate sections.
unsigned TrapUnreachable
Emit target-specific trap instruction for 'unreachable' IR instructions.
Target-Independent Code Generator Pass Configuration Options.
virtual void addPostRegAlloc()
This method may be implemented by targets that want to run passes after register allocation pass pipe...
virtual bool addInstSelector()
addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...
virtual bool addPreISel()
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
virtual void addOptimizedRegAlloc()
addOptimizedRegAlloc - Add passes related to register allocation.
virtual void addPreEmitPass()
This pass may be implemented by targets that want to run passes immediately before machine code is em...
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
virtual void addISelPrepare()
Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
yaml::MachineFunctionInfo * createDefaultFuncInfoYAML() const override
Allocate and return a default initialized instance of the YAML representation for the MachineFunction...
bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
Parse out the target's MachineFunctionInfo from the YAML reprsentation.
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
Create an WebAssembly architecture model.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
const WebAssemblySubtarget * getSubtargetImpl() const
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const override
Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
cl::opt< bool > WasmEnableEH
cl::opt< bool > WasmEnableSjLj
cl::opt< bool > WasmEnableEmEH
cl::opt< bool > WasmEnableEmSjLj
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:450
@ WASM_FEATURE_PREFIX_USED
Definition: Wasm.h:168
@ WASM_FEATURE_PREFIX_DISALLOWED
Definition: Wasm.h:170
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void initializeOptimizeReturnedPass(PassRegistry &)
FunctionPass * createIndirectBrExpandPass()
void initializeWebAssemblyLowerBrUnlessPass(PassRegistry &)
void initializeWebAssemblyDAGToDAGISelPass(PassRegistry &)
FunctionPass * createWebAssemblyLowerRefTypesIntPtrConv()
FunctionPass * createWebAssemblyRegNumbering()
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
ModulePass * createWebAssemblyAddMissingPrototypes()
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
FunctionPass * createWebAssemblyLateEHPrepare()
const SubtargetFeatureKV WebAssemblyFeatureKV[WebAssembly::NumSubtargetFeatures]
void initializeWebAssemblyLateEHPreparePass(PassRegistry &)
@ None
No exception support.
@ Wasm
WebAssembly Exception Handling.
FunctionPass * createWebAssemblyFixBrTableDefaults()
void initializeWebAssemblyAddMissingPrototypesPass(PassRegistry &)
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
void initializeWebAssemblyExceptionInfoPass(PassRegistry &)
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
void initializeWebAssemblyRegNumberingPass(PassRegistry &)
void initializeWebAssemblyLowerRefTypesIntPtrConvPass(PassRegistry &)
FunctionPass * createWebAssemblyReplacePhysRegs()
void initializeWebAssemblyRegColoringPass(PassRegistry &)
CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
FunctionPass * createWebAssemblyMemIntrinsicResults()
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:286
char & MachineLateInstrsCleanupID
MachineLateInstrsCleanup - This pass removes redundant identical instructions after register allocati...
FunctionPass * createWebAssemblyDebugFixup()
ModulePass * createLowerGlobalDtorsLegacyPass()
FunctionPass * createLowerInvokePass()
Definition: LowerInvoke.cpp:85
void initializeLowerGlobalDtorsLegacyPassPass(PassRegistry &)
Target & getTheWebAssemblyTarget32()
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:156
void initializeWebAssemblyNullifyDebugValueListsPass(PassRegistry &)
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
void initializeWebAssemblyFixIrreducibleControlFlowPass(PassRegistry &)
FunctionPass * createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, CodeGenOptLevel OptLevel)
This pass converts a legalized DAG into a WebAssembly-specific DAG, ready for instruction scheduling.
char & FuncletLayoutID
This pass lays out funclets contiguously.
void initializeWebAssemblyRegStackifyPass(PassRegistry &)
FunctionPass * createWebAssemblyCFGStackify()
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
CodeGenOptLevel
Code generation optimization level.
Definition: CodeGen.h:54
FunctionPass * createWebAssemblyOptimizeReturned()
FunctionPass * createWebAssemblyRefTypeMem2Local()
void initializeWebAssemblyOptimizeLiveIntervalsPass(PassRegistry &)
FunctionPass * createWebAssemblySetP2AlignOperands()
ModulePass * createWebAssemblyLowerEmscriptenEHSjLj()
void initializeWebAssemblyLowerEmscriptenEHSjLjPass(PassRegistry &)
FunctionPass * createWebAssemblyArgumentMove()
FunctionPass * createWebAssemblyExplicitLocals()
Target & getTheWebAssemblyTarget64()
void initializeWebAssemblyMemIntrinsicResultsPass(PassRegistry &)
void initializeWebAssemblyMCLowerPrePassPass(PassRegistry &)
void initializeWebAssemblyExplicitLocalsPass(PassRegistry &)
FunctionPass * createWebAssemblyFixIrreducibleControlFlow()
ModulePass * createWebAssemblyFixFunctionBitcasts()
FunctionPass * createWebAssemblyLowerBrUnless()
void initializeFixFunctionBitcastsPass(PassRegistry &)
FunctionPass * createWebAssemblyRegColoring()
void initializeWebAssemblyPeepholePass(PassRegistry &)
ModulePass * createWebAssemblyMCLowerPrePass()
void initializeWebAssemblyRefTypeMem2LocalPass(PassRegistry &)
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
FunctionPass * createAtomicExpandLegacyPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
FunctionPass * createWebAssemblyRegStackify()
FunctionPass * createWebAssemblyCFGSort()
void initializeWebAssemblyCFGSortPass(PassRegistry &)
void initializeWebAssemblyFixBrTableDefaultsPass(PassRegistry &)
FunctionPass * createWebAssemblyNullifyDebugValueLists()
void initializeWebAssemblyCFGStackifyPass(PassRegistry &)
void initializeWebAssemblySetP2AlignOperandsPass(PassRegistry &)
void initializeWebAssemblyDebugFixupPass(PassRegistry &)
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
void initializeWebAssemblyArgumentMovePass(PassRegistry &)
FunctionPass * createWebAssemblyPeephole()
void initializeWebAssemblyReplacePhysRegsPass(PassRegistry &)
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
RegisterTargetMachine - Helper template for registering a target machine implementation,...
Used to provide key value pairs for feature and CPU bit flags.
Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.