LLVM 18.0.0git
WebAssemblyTargetMachine.cpp
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1//===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file defines the WebAssembly-specific subclass of TargetMachine.
11///
12//===----------------------------------------------------------------------===//
13
17#include "WebAssembly.h"
25#include "llvm/CodeGen/Passes.h"
28#include "llvm/IR/Function.h"
30#include "llvm/MC/MCAsmInfo.h"
36#include <optional>
37using namespace llvm;
38
39#define DEBUG_TYPE "wasm"
40
41// A command-line option to keep implicit locals
42// for the purpose of testing with lit/llc ONLY.
43// This produces output which is not valid WebAssembly, and is not supported
44// by assemblers/disassemblers and other MC based tools.
46 "wasm-disable-explicit-locals", cl::Hidden,
47 cl::desc("WebAssembly: output implicit locals in"
48 " instruction output for test purposes only."),
49 cl::init(false));
50
52 // Register the target.
57
58 // Register backend passes
87}
88
89//===----------------------------------------------------------------------===//
90// WebAssembly Lowering public interface.
91//===----------------------------------------------------------------------===//
92
93static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM,
94 const Triple &TT) {
95 if (!RM) {
96 // Default to static relocation model. This should always be more optimial
97 // than PIC since the static linker can determine all global addresses and
98 // assume direct function calls.
99 return Reloc::Static;
100 }
101
102 return *RM;
103}
104
105/// Create an WebAssembly architecture model.
106///
108 const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
109 const TargetOptions &Options, std::optional<Reloc::Model> RM,
110 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, bool JIT)
112 T,
113 TT.isArch64Bit()
114 ? (TT.isOSEmscripten() ? "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
115 "f128:64-n32:64-S128-ni:1:10:20"
116 : "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
117 "n32:64-S128-ni:1:10:20")
118 : (TT.isOSEmscripten() ? "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
119 "f128:64-n32:64-S128-ni:1:10:20"
120 : "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
121 "n32:64-S128-ni:1:10:20"),
122 TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
123 getEffectiveCodeModel(CM, CodeModel::Large), OL),
124 TLOF(new WebAssemblyTargetObjectFile()) {
125 // WebAssembly type-checks instructions, but a noreturn function with a return
126 // type that doesn't match the context will cause a check failure. So we lower
127 // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
128 // 'unreachable' instructions which is meant for that case.
129 this->Options.TrapUnreachable = true;
130
131 // WebAssembly treats each function as an independent unit. Force
132 // -ffunction-sections, effectively, so that we can emit them independently.
133 this->Options.FunctionSections = true;
134 this->Options.DataSections = true;
135 this->Options.UniqueSectionNames = true;
136
137 initAsmInfo();
138
139 // Note that we don't use setRequiresStructuredCFG(true). It disables
140 // optimizations than we're ok with, and want, such as critical edge
141 // splitting and tail merging.
142}
143
145
147 return getSubtargetImpl(std::string(getTargetCPU()),
148 std::string(getTargetFeatureString()));
149}
150
153 std::string FS) const {
154 auto &I = SubtargetMap[CPU + FS];
155 if (!I) {
156 I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
157 }
158 return I.get();
159}
160
163 Attribute CPUAttr = F.getFnAttribute("target-cpu");
164 Attribute FSAttr = F.getFnAttribute("target-features");
165
166 std::string CPU =
167 CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
168 std::string FS =
169 FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
170
171 // This needs to be done before we create a new subtarget since any
172 // creation will depend on the TM and the code generation flags on the
173 // function that reside in TargetOptions.
175
176 return getSubtargetImpl(CPU, FS);
177}
178
179namespace {
180
181class CoalesceFeaturesAndStripAtomics final : public ModulePass {
182 // Take the union of all features used in the module and use it for each
183 // function individually, since having multiple feature sets in one module
184 // currently does not make sense for WebAssembly. If atomics are not enabled,
185 // also strip atomic operations and thread local storage.
186 static char ID;
188
189public:
190 CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
191 : ModulePass(ID), WasmTM(WasmTM) {}
192
193 bool runOnModule(Module &M) override {
194 FeatureBitset Features = coalesceFeatures(M);
195
196 std::string FeatureStr = getFeatureString(Features);
197 WasmTM->setTargetFeatureString(FeatureStr);
198 for (auto &F : M)
199 replaceFeatures(F, FeatureStr);
200
201 bool StrippedAtomics = false;
202 bool StrippedTLS = false;
203
204 if (!Features[WebAssembly::FeatureAtomics]) {
205 StrippedAtomics = stripAtomics(M);
206 StrippedTLS = stripThreadLocals(M);
207 } else if (!Features[WebAssembly::FeatureBulkMemory]) {
208 StrippedTLS |= stripThreadLocals(M);
209 }
210
211 if (StrippedAtomics && !StrippedTLS)
212 stripThreadLocals(M);
213 else if (StrippedTLS && !StrippedAtomics)
214 stripAtomics(M);
215
216 recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
217
218 // Conservatively assume we have made some change
219 return true;
220 }
221
222private:
223 FeatureBitset coalesceFeatures(const Module &M) {
224 FeatureBitset Features =
225 WasmTM
226 ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
227 std::string(WasmTM->getTargetFeatureString()))
228 ->getFeatureBits();
229 for (auto &F : M)
230 Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
231 return Features;
232 }
233
234 std::string getFeatureString(const FeatureBitset &Features) {
235 std::string Ret;
236 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
237 if (Features[KV.Value])
238 Ret += (StringRef("+") + KV.Key + ",").str();
239 }
240 return Ret;
241 }
242
243 void replaceFeatures(Function &F, const std::string &Features) {
244 F.removeFnAttr("target-features");
245 F.removeFnAttr("target-cpu");
246 F.addFnAttr("target-features", Features);
247 }
248
249 bool stripAtomics(Module &M) {
250 // Detect whether any atomics will be lowered, since there is no way to tell
251 // whether the LowerAtomic pass lowers e.g. stores.
252 bool Stripped = false;
253 for (auto &F : M) {
254 for (auto &B : F) {
255 for (auto &I : B) {
256 if (I.isAtomic()) {
257 Stripped = true;
258 goto done;
259 }
260 }
261 }
262 }
263
264 done:
265 if (!Stripped)
266 return false;
267
268 LowerAtomicPass Lowerer;
270 for (auto &F : M)
271 Lowerer.run(F, FAM);
272
273 return true;
274 }
275
276 bool stripThreadLocals(Module &M) {
277 bool Stripped = false;
278 for (auto &GV : M.globals()) {
279 if (GV.isThreadLocal()) {
280 Stripped = true;
281 GV.setThreadLocal(false);
282 }
283 }
284 return Stripped;
285 }
286
287 void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
288 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
289 if (Features[KV.Value]) {
290 // Mark features as used
291 std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
292 M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
294 }
295 }
296 // Code compiled without atomics or bulk-memory may have had its atomics or
297 // thread-local data lowered to nonatomic operations or non-thread-local
298 // data. In that case, we mark the pseudo-feature "shared-mem" as disallowed
299 // to tell the linker that it would be unsafe to allow this code ot be used
300 // in a module with shared memory.
301 if (Stripped) {
302 M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem",
304 }
305 }
306};
307char CoalesceFeaturesAndStripAtomics::ID = 0;
308
309/// WebAssembly Code Generator Pass Configuration Options.
310class WebAssemblyPassConfig final : public TargetPassConfig {
311public:
312 WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
313 : TargetPassConfig(TM, PM) {}
314
315 WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
316 return getTM<WebAssemblyTargetMachine>();
317 }
318
319 FunctionPass *createTargetRegisterAllocator(bool) override;
320
321 void addIRPasses() override;
322 void addISelPrepare() override;
323 bool addInstSelector() override;
324 void addOptimizedRegAlloc() override;
325 void addPostRegAlloc() override;
326 bool addGCPasses() override { return false; }
327 void addPreEmitPass() override;
328 bool addPreISel() override;
329
330 // No reg alloc
331 bool addRegAssignAndRewriteFast() override { return false; }
332
333 // No reg alloc
334 bool addRegAssignAndRewriteOptimized() override { return false; }
335};
336} // end anonymous namespace
337
339 BumpPtrAllocator &Allocator, const Function &F,
340 const TargetSubtargetInfo *STI) const {
341 return WebAssemblyFunctionInfo::create<WebAssemblyFunctionInfo>(Allocator, F,
342 STI);
343}
344
348}
349
352 return new WebAssemblyPassConfig(*this, PM);
353}
354
355FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
356 return nullptr; // No reg alloc
357}
358
363
365 // Before checking, we make sure TargetOptions.ExceptionModel is the same as
366 // MCAsmInfo.ExceptionsType. Normally these have to be the same, because clang
367 // stores the exception model info in LangOptions, which is later transferred
368 // to TargetOptions and MCAsmInfo. But when clang compiles bitcode directly,
369 // clang's LangOptions is not used and thus the exception model info is not
370 // correctly transferred to TargetOptions and MCAsmInfo, so we make sure we
371 // have the correct exception model in WebAssemblyMCAsmInfo constructor.
372 // But in this case TargetOptions is still not updated, so we make sure they
373 // are the same.
374 TM->Options.ExceptionModel = TM->getMCAsmInfo()->getExceptionHandlingType();
375
376 // Basic Correctness checking related to -exception-model
377 if (TM->Options.ExceptionModel != ExceptionHandling::None &&
378 TM->Options.ExceptionModel != ExceptionHandling::Wasm)
379 report_fatal_error("-exception-model should be either 'none' or 'wasm'");
380 if (WasmEnableEmEH && TM->Options.ExceptionModel == ExceptionHandling::Wasm)
381 report_fatal_error("-exception-model=wasm not allowed with "
382 "-enable-emscripten-cxx-exceptions");
383 if (WasmEnableEH && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
385 "-wasm-enable-eh only allowed with -exception-model=wasm");
386 if (WasmEnableSjLj && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
388 "-wasm-enable-sjlj only allowed with -exception-model=wasm");
389 if ((!WasmEnableEH && !WasmEnableSjLj) &&
390 TM->Options.ExceptionModel == ExceptionHandling::Wasm)
392 "-exception-model=wasm only allowed with at least one of "
393 "-wasm-enable-eh or -wasm-enable-sjj");
394
395 // You can't enable two modes of EH at the same time
396 if (WasmEnableEmEH && WasmEnableEH)
398 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-eh");
399 // You can't enable two modes of SjLj at the same time
400 if (WasmEnableEmSjLj && WasmEnableSjLj)
402 "-enable-emscripten-sjlj not allowed with -wasm-enable-sjlj");
403 // You can't mix Emscripten EH with Wasm SjLj.
404 if (WasmEnableEmEH && WasmEnableSjLj)
406 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-sjlj");
407 // Currently it is allowed to mix Wasm EH with Emscripten SjLj as an interim
408 // measure, but some code will error out at compile time in this combination.
409 // See WebAssemblyLowerEmscriptenEHSjLj pass for details.
410}
411
412//===----------------------------------------------------------------------===//
413// The following functions are called from lib/CodeGen/Passes.cpp to modify
414// the CodeGen pass sequence.
415//===----------------------------------------------------------------------===//
416
417void WebAssemblyPassConfig::addIRPasses() {
418 // Add signatures to prototype-less function declarations
420
421 // Lower .llvm.global_dtors into .llvm.global_ctors with __cxa_atexit calls.
423
424 // Fix function bitcasts, as WebAssembly requires caller and callee signatures
425 // to match.
427
428 // Optimize "returned" function attributes.
429 if (getOptLevel() != CodeGenOptLevel::None)
431
433
434 // If exception handling is not enabled and setjmp/longjmp handling is
435 // enabled, we lower invokes into calls and delete unreachable landingpad
436 // blocks. Lowering invokes when there is no EH support is done in
437 // TargetPassConfig::addPassesToHandleExceptions, but that runs after these IR
438 // passes and Emscripten SjLj handling expects all invokes to be lowered
439 // before.
440 if (!WasmEnableEmEH && !WasmEnableEH) {
441 addPass(createLowerInvokePass());
442 // The lower invoke pass may create unreachable code. Remove it in order not
443 // to process dead blocks in setjmp/longjmp handling.
445 }
446
447 // Handle exceptions and setjmp/longjmp if enabled. Unlike Wasm EH preparation
448 // done in WasmEHPrepare pass, Wasm SjLj preparation shares libraries and
449 // transformation algorithms with Emscripten SjLj, so we run
450 // LowerEmscriptenEHSjLj pass also when Wasm SjLj is enabled.
451 if (WasmEnableEmEH || WasmEnableEmSjLj || WasmEnableSjLj)
453
454 // Expand indirectbr instructions to switches.
456
458}
459
460void WebAssemblyPassConfig::addISelPrepare() {
462 static_cast<WebAssemblyTargetMachine *>(TM);
463 const WebAssemblySubtarget *Subtarget =
464 WasmTM->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
465 std::string(WasmTM->getTargetFeatureString()));
466 if (Subtarget->hasReferenceTypes()) {
467 // We need to remove allocas for reference types
469 }
470 // Lower atomics and TLS if necessary
471 addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
472
473 // This is a no-op if atomics are not used in the module
474 addPass(createAtomicExpandPass());
475
477}
478
479bool WebAssemblyPassConfig::addInstSelector() {
481 addPass(
482 createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
483 // Run the argument-move pass immediately after the ScheduleDAG scheduler
484 // so that we can fix up the ARGUMENT instructions before anything else
485 // sees them in the wrong place.
487 // Set the p2align operands. This information is present during ISel, however
488 // it's inconvenient to collect. Collect it now, and update the immediate
489 // operands.
491
492 // Eliminate range checks and add default targets to br_table instructions.
494
495 return false;
496}
497
498void WebAssemblyPassConfig::addOptimizedRegAlloc() {
499 // Currently RegisterCoalesce degrades wasm debug info quality by a
500 // significant margin. As a quick fix, disable this for -O1, which is often
501 // used for debugging large applications. Disabling this increases code size
502 // of Emscripten core benchmarks by ~5%, which is acceptable for -O1, which is
503 // usually not used for production builds.
504 // TODO Investigate why RegisterCoalesce degrades debug info quality and fix
505 // it properly
506 if (getOptLevel() == CodeGenOptLevel::Less)
507 disablePass(&RegisterCoalescerID);
509}
510
511void WebAssemblyPassConfig::addPostRegAlloc() {
512 // TODO: The following CodeGen passes don't currently support code containing
513 // virtual registers. Consider removing their restrictions and re-enabling
514 // them.
515
516 // These functions all require the NoVRegs property.
517 disablePass(&MachineLateInstrsCleanupID);
518 disablePass(&MachineCopyPropagationID);
519 disablePass(&PostRAMachineSinkingID);
520 disablePass(&PostRASchedulerID);
521 disablePass(&FuncletLayoutID);
522 disablePass(&StackMapLivenessID);
523 disablePass(&PatchableFunctionID);
524 disablePass(&ShrinkWrapID);
525
526 // This pass hurts code size for wasm because it can generate irreducible
527 // control flow.
528 disablePass(&MachineBlockPlacementID);
529
531}
532
533void WebAssemblyPassConfig::addPreEmitPass() {
535
536 // Nullify DBG_VALUE_LISTs that we cannot handle.
538
539 // Eliminate multiple-entry loops.
541
542 // Do various transformations for exception handling.
543 // Every CFG-changing optimizations should come before this.
544 if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
546
547 // Now that we have a prologue and epilogue and all frame indices are
548 // rewritten, eliminate SP and FP. This allows them to be stackified,
549 // colored, and numbered with the rest of the registers.
551
552 // Preparations and optimizations related to register stackification.
553 if (getOptLevel() != CodeGenOptLevel::None) {
554 // Depend on LiveIntervals and perform some optimizations on it.
556
557 // Prepare memory intrinsic calls for register stackifying.
559
560 // Mark registers as representing wasm's value stack. This is a key
561 // code-compression technique in WebAssembly. We run this pass (and
562 // MemIntrinsicResults above) very late, so that it sees as much code as
563 // possible, including code emitted by PEI and expanded by late tail
564 // duplication.
566
567 // Run the register coloring pass to reduce the total number of registers.
568 // This runs after stackification so that it doesn't consider registers
569 // that become stackified.
571 }
572
573 // Sort the blocks of the CFG into topological order, a prerequisite for
574 // BLOCK and LOOP markers.
575 addPass(createWebAssemblyCFGSort());
576
577 // Insert BLOCK and LOOP markers.
579
580 // Insert explicit local.get and local.set operators.
583
584 // Lower br_unless into br_if.
586
587 // Perform the very last peephole optimizations on the code.
588 if (getOptLevel() != CodeGenOptLevel::None)
589 addPass(createWebAssemblyPeephole());
590
591 // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
593
594 // Fix debug_values whose defs have been stackified.
597
598 // Collect information to prepare for MC lowering / asm printing.
600}
601
602bool WebAssemblyPassConfig::addPreISel() {
605 return false;
606}
607
611}
612
614 const MachineFunction &MF) const {
615 const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
616 return new yaml::WebAssemblyFunctionInfo(MF, *MFI);
617}
618
621 SMDiagnostic &Error, SMRange &SourceRange) const {
622 const auto &YamlMFI = static_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
623 MachineFunction &MF = PFS.MF;
624 MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(MF, YamlMFI);
625 return false;
626}
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:135
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static LVOptions Options
Definition: LVOptions.cpp:25
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
FunctionAnalysisManager FAM
const char LLVMTargetMachineRef TM
Basic Register Allocator
Target-Independent Code Generator Pass Configuration Options pass.
This file defines the interfaces that WebAssembly uses to lower LLVM code into a selection DAG.
This file provides WebAssembly-specific target descriptions.
This file declares WebAssembly-specific per-machine-function information.
This file registers the WebAssembly target.
static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM, const Triple &TT)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget()
static void basicCheckForEHAndSjLj(TargetMachine *TM)
static cl::opt< bool > WasmDisableExplicitLocals("wasm-disable-explicit-locals", cl::Hidden, cl::desc("WebAssembly: output implicit locals in" " instruction output for test purposes only."), cl::init(false))
This file declares the WebAssembly-specific subclass of TargetMachine.
This file declares the WebAssembly-specific subclass of TargetLoweringObjectFile.
This file a TargetTransformInfo::Concept conforming object specific to the WebAssembly target machine...
This file contains the declaration of the WebAssembly-specific utility functions.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.
A container for analyses that lazily runs them and caches their results.
Definition: PassManager.h:620
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:318
bool isValid() const
Return true if the attribute is any kind of attribute.
Definition: Attributes.h:184
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
Lightweight error class with error context and mandatory checking.
Definition: Error.h:160
Container class for subtarget features.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
This class describes a target machine that is implemented with the LLVM target-independent code gener...
A pass that lowers atomic intrinsic into non-atomic intrinsics.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &)
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
Definition: Pass.h:251
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:281
Represents a range in source code.
Definition: SMLoc.h:48
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:222
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:78
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:97
std::string TargetFS
Definition: TargetMachine.h:99
StringRef getTargetFeatureString() const
StringRef getTargetCPU() const
std::string TargetCPU
Definition: TargetMachine.h:98
std::unique_ptr< const MCSubtargetInfo > STI
void setTargetFeatureString(StringRef FS)
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
unsigned UniqueSectionNames
unsigned FunctionSections
Emit functions into separate sections.
unsigned DataSections
Emit data into separate sections.
unsigned TrapUnreachable
Emit target-specific trap instruction for 'unreachable' IR instructions.
Target-Independent Code Generator Pass Configuration Options.
virtual void addPostRegAlloc()
This method may be implemented by targets that want to run passes after register allocation pass pipe...
virtual bool addInstSelector()
addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...
virtual bool addPreISel()
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
virtual void addOptimizedRegAlloc()
addOptimizedRegAlloc - Add passes related to register allocation.
virtual void addPreEmitPass()
This pass may be implemented by targets that want to run passes immediately before machine code is em...
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
virtual void addISelPrepare()
Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
yaml::MachineFunctionInfo * createDefaultFuncInfoYAML() const override
Allocate and return a default initialized instance of the YAML representation for the MachineFunction...
bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
Parse out the target's MachineFunctionInfo from the YAML reprsentation.
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
Create an WebAssembly architecture model.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
const WebAssemblySubtarget * getSubtargetImpl() const
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const override
Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
cl::opt< bool > WasmEnableEH
cl::opt< bool > WasmEnableSjLj
cl::opt< bool > WasmEnableEmEH
cl::opt< bool > WasmEnableEmSjLj
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:445
@ WASM_FEATURE_PREFIX_USED
Definition: Wasm.h:344
@ WASM_FEATURE_PREFIX_DISALLOWED
Definition: Wasm.h:346
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void initializeOptimizeReturnedPass(PassRegistry &)
FunctionPass * createIndirectBrExpandPass()
void initializeWebAssemblyLowerBrUnlessPass(PassRegistry &)
void initializeWebAssemblyDAGToDAGISelPass(PassRegistry &)
FunctionPass * createWebAssemblyLowerRefTypesIntPtrConv()
FunctionPass * createWebAssemblyRegNumbering()
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
ModulePass * createWebAssemblyAddMissingPrototypes()
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
FunctionPass * createWebAssemblyLateEHPrepare()
const SubtargetFeatureKV WebAssemblyFeatureKV[WebAssembly::NumSubtargetFeatures]
void initializeWebAssemblyLateEHPreparePass(PassRegistry &)
@ None
No exception support.
@ Wasm
WebAssembly Exception Handling.
FunctionPass * createAtomicExpandPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
FunctionPass * createWebAssemblyFixBrTableDefaults()
void initializeWebAssemblyAddMissingPrototypesPass(PassRegistry &)
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
void initializeWebAssemblyExceptionInfoPass(PassRegistry &)
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
void initializeWebAssemblyRegNumberingPass(PassRegistry &)
void initializeWebAssemblyLowerRefTypesIntPtrConvPass(PassRegistry &)
FunctionPass * createWebAssemblyReplacePhysRegs()
void initializeWebAssemblyRegColoringPass(PassRegistry &)
CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
FunctionPass * createWebAssemblyMemIntrinsicResults()
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:286
char & MachineLateInstrsCleanupID
MachineLateInstrsCleanup - This pass removes redundant identical instructions after register allocati...
FunctionPass * createWebAssemblyDebugFixup()
ModulePass * createLowerGlobalDtorsLegacyPass()
FunctionPass * createLowerInvokePass()
Definition: LowerInvoke.cpp:85
void initializeLowerGlobalDtorsLegacyPassPass(PassRegistry &)
Target & getTheWebAssemblyTarget32()
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:156
void initializeWebAssemblyNullifyDebugValueListsPass(PassRegistry &)
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
void initializeWebAssemblyFixIrreducibleControlFlowPass(PassRegistry &)
FunctionPass * createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, CodeGenOptLevel OptLevel)
This pass converts a legalized DAG into a WebAssembly-specific DAG, ready for instruction scheduling.
char & FuncletLayoutID
This pass lays out funclets contiguously.
void initializeWebAssemblyRegStackifyPass(PassRegistry &)
FunctionPass * createWebAssemblyCFGStackify()
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
CodeGenOptLevel
Code generation optimization level.
Definition: CodeGen.h:54
FunctionPass * createWebAssemblyOptimizeReturned()
void initializeWebAssemblyOptimizeLiveIntervalsPass(PassRegistry &)
FunctionPass * createWebAssemblySetP2AlignOperands()
ModulePass * createWebAssemblyLowerEmscriptenEHSjLj()
void initializeWebAssemblyLowerEmscriptenEHSjLjPass(PassRegistry &)
FunctionPass * createWebAssemblyArgumentMove()
FunctionPass * createWebAssemblyExplicitLocals()
Target & getTheWebAssemblyTarget64()
void initializeWebAssemblyMemIntrinsicResultsPass(PassRegistry &)
void initializeWebAssemblyMCLowerPrePassPass(PassRegistry &)
void initializeWebAssemblyExplicitLocalsPass(PassRegistry &)
FunctionPass * createWebAssemblyFixIrreducibleControlFlow()
ModulePass * createWebAssemblyFixFunctionBitcasts()
FunctionPass * createWebAssemblyLowerBrUnless()
void initializeFixFunctionBitcastsPass(PassRegistry &)
FunctionPass * createWebAssemblyRegColoring()
void initializeWebAssemblyPeepholePass(PassRegistry &)
ModulePass * createWebAssemblyMCLowerPrePass()
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
FunctionPass * createWebAssemblyRegStackify()
FunctionPass * createWebAssemblyCFGSort()
void initializeWebAssemblyCFGSortPass(PassRegistry &)
void initializeWebAssemblyFixBrTableDefaultsPass(PassRegistry &)
FunctionPass * createWebAssemblyNullifyDebugValueLists()
void initializeWebAssemblyCFGStackifyPass(PassRegistry &)
void initializeWebAssemblySetP2AlignOperandsPass(PassRegistry &)
void initializeWebAssemblyDebugFixupPass(PassRegistry &)
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
void initializeWebAssemblyArgumentMovePass(PassRegistry &)
FunctionPass * createWebAssemblyPeephole()
FunctionPass * createPromoteMemoryToRegisterPass(bool IsForced=false)
Definition: Mem2Reg.cpp:118
void initializeWebAssemblyReplacePhysRegsPass(PassRegistry &)
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
RegisterTargetMachine - Helper template for registering a target machine implementation,...
Used to provide key value pairs for feature and CPU bit flags.
Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.