LLVM  14.0.0git
MachineCopyPropagation.cpp
Go to the documentation of this file.
1 //===- MachineCopyPropagation.cpp - Machine Copy Propagation Pass ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This is an extremely simple MachineInstr-level copy propagation pass.
10 //
11 // This pass forwards the source of COPYs to the users of their destinations
12 // when doing so is legal. For example:
13 //
14 // %reg1 = COPY %reg0
15 // ...
16 // ... = OP %reg1
17 //
18 // If
19 // - %reg0 has not been clobbered by the time of the use of %reg1
20 // - the register class constraints are satisfied
21 // - the COPY def is the only value that reaches OP
22 // then this pass replaces the above with:
23 //
24 // %reg1 = COPY %reg0
25 // ...
26 // ... = OP %reg0
27 //
28 // This pass also removes some redundant COPYs. For example:
29 //
30 // %R1 = COPY %R0
31 // ... // No clobber of %R1
32 // %R0 = COPY %R1 <<< Removed
33 //
34 // or
35 //
36 // %R1 = COPY %R0
37 // ... // No clobber of %R0
38 // %R1 = COPY %R0 <<< Removed
39 //
40 // or
41 //
42 // $R0 = OP ...
43 // ... // No read/clobber of $R0 and $R1
44 // $R1 = COPY $R0 // $R0 is killed
45 // Replace $R0 with $R1 and remove the COPY
46 // $R1 = OP ...
47 // ...
48 //
49 //===----------------------------------------------------------------------===//
50 
51 #include "llvm/ADT/DenseMap.h"
52 #include "llvm/ADT/STLExtras.h"
53 #include "llvm/ADT/SetVector.h"
54 #include "llvm/ADT/SmallSet.h"
55 #include "llvm/ADT/SmallVector.h"
56 #include "llvm/ADT/Statistic.h"
67 #include "llvm/InitializePasses.h"
68 #include "llvm/MC/MCRegisterInfo.h"
69 #include "llvm/Pass.h"
70 #include "llvm/Support/Debug.h"
73 #include <cassert>
74 #include <iterator>
75 
76 using namespace llvm;
77 
78 #define DEBUG_TYPE "machine-cp"
79 
80 STATISTIC(NumDeletes, "Number of dead copies deleted");
81 STATISTIC(NumCopyForwards, "Number of copy uses forwarded");
82 STATISTIC(NumCopyBackwardPropagated, "Number of copy defs backward propagated");
83 DEBUG_COUNTER(FwdCounter, "machine-cp-fwd",
84  "Controls which register COPYs are forwarded");
85 
86 namespace {
87 
88 class CopyTracker {
89  struct CopyInfo {
92  bool Avail;
93  };
94 
96 
97 public:
98  /// Mark all of the given registers and their subregisters as unavailable for
99  /// copying.
100  void markRegsUnavailable(ArrayRef<MCRegister> Regs,
101  const TargetRegisterInfo &TRI) {
102  for (MCRegister Reg : Regs) {
103  // Source of copy is no longer available for propagation.
104  for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
105  auto CI = Copies.find(*RUI);
106  if (CI != Copies.end())
107  CI->second.Avail = false;
108  }
109  }
110  }
111 
112  /// Remove register from copy maps.
113  void invalidateRegister(MCRegister Reg, const TargetRegisterInfo &TRI) {
114  // Since Reg might be a subreg of some registers, only invalidate Reg is not
115  // enough. We have to find the COPY defines Reg or registers defined by Reg
116  // and invalidate all of them.
117  SmallSet<MCRegister, 8> RegsToInvalidate;
118  RegsToInvalidate.insert(Reg);
119  for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
120  auto I = Copies.find(*RUI);
121  if (I != Copies.end()) {
122  if (MachineInstr *MI = I->second.MI) {
123  RegsToInvalidate.insert(MI->getOperand(0).getReg().asMCReg());
124  RegsToInvalidate.insert(MI->getOperand(1).getReg().asMCReg());
125  }
126  RegsToInvalidate.insert(I->second.DefRegs.begin(),
127  I->second.DefRegs.end());
128  }
129  }
130  for (MCRegister InvalidReg : RegsToInvalidate)
131  for (MCRegUnitIterator RUI(InvalidReg, &TRI); RUI.isValid(); ++RUI)
132  Copies.erase(*RUI);
133  }
134 
135  /// Clobber a single register, removing it from the tracker's copy maps.
136  void clobberRegister(MCRegister Reg, const TargetRegisterInfo &TRI) {
137  for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
138  auto I = Copies.find(*RUI);
139  if (I != Copies.end()) {
140  // When we clobber the source of a copy, we need to clobber everything
141  // it defined.
142  markRegsUnavailable(I->second.DefRegs, TRI);
143  // When we clobber the destination of a copy, we need to clobber the
144  // whole register it defined.
145  if (MachineInstr *MI = I->second.MI)
146  markRegsUnavailable({MI->getOperand(0).getReg().asMCReg()}, TRI);
147  // Now we can erase the copy.
148  Copies.erase(I);
149  }
150  }
151  }
152 
153  /// Add this copy's registers into the tracker's copy maps.
154  void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI) {
155  assert(MI->isCopy() && "Tracking non-copy?");
156 
157  MCRegister Def = MI->getOperand(0).getReg().asMCReg();
158  MCRegister Src = MI->getOperand(1).getReg().asMCReg();
159 
160  // Remember Def is defined by the copy.
161  for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); ++RUI)
162  Copies[*RUI] = {MI, {}, true};
163 
164  // Remember source that's copied to Def. Once it's clobbered, then
165  // it's no longer available for copy propagation.
166  for (MCRegUnitIterator RUI(Src, &TRI); RUI.isValid(); ++RUI) {
167  auto I = Copies.insert({*RUI, {nullptr, {}, false}});
168  auto &Copy = I.first->second;
169  if (!is_contained(Copy.DefRegs, Def))
170  Copy.DefRegs.push_back(Def);
171  }
172  }
173 
174  bool hasAnyCopies() {
175  return !Copies.empty();
176  }
177 
178  MachineInstr *findCopyForUnit(MCRegister RegUnit,
179  const TargetRegisterInfo &TRI,
180  bool MustBeAvailable = false) {
181  auto CI = Copies.find(RegUnit);
182  if (CI == Copies.end())
183  return nullptr;
184  if (MustBeAvailable && !CI->second.Avail)
185  return nullptr;
186  return CI->second.MI;
187  }
188 
189  MachineInstr *findCopyDefViaUnit(MCRegister RegUnit,
190  const TargetRegisterInfo &TRI) {
191  auto CI = Copies.find(RegUnit);
192  if (CI == Copies.end())
193  return nullptr;
194  if (CI->second.DefRegs.size() != 1)
195  return nullptr;
196  MCRegUnitIterator RUI(CI->second.DefRegs[0], &TRI);
197  return findCopyForUnit(*RUI, TRI, true);
198  }
199 
200  MachineInstr *findAvailBackwardCopy(MachineInstr &I, MCRegister Reg,
201  const TargetRegisterInfo &TRI) {
202  MCRegUnitIterator RUI(Reg, &TRI);
203  MachineInstr *AvailCopy = findCopyDefViaUnit(*RUI, TRI);
204  if (!AvailCopy ||
205  !TRI.isSubRegisterEq(AvailCopy->getOperand(1).getReg(), Reg))
206  return nullptr;
207 
208  Register AvailSrc = AvailCopy->getOperand(1).getReg();
209  Register AvailDef = AvailCopy->getOperand(0).getReg();
210  for (const MachineInstr &MI :
211  make_range(AvailCopy->getReverseIterator(), I.getReverseIterator()))
212  for (const MachineOperand &MO : MI.operands())
213  if (MO.isRegMask())
214  // FIXME: Shall we simultaneously invalidate AvailSrc or AvailDef?
215  if (MO.clobbersPhysReg(AvailSrc) || MO.clobbersPhysReg(AvailDef))
216  return nullptr;
217 
218  return AvailCopy;
219  }
220 
221  MachineInstr *findAvailCopy(MachineInstr &DestCopy, MCRegister Reg,
222  const TargetRegisterInfo &TRI) {
223  // We check the first RegUnit here, since we'll only be interested in the
224  // copy if it copies the entire register anyway.
225  MCRegUnitIterator RUI(Reg, &TRI);
226  MachineInstr *AvailCopy =
227  findCopyForUnit(*RUI, TRI, /*MustBeAvailable=*/true);
228  if (!AvailCopy ||
229  !TRI.isSubRegisterEq(AvailCopy->getOperand(0).getReg(), Reg))
230  return nullptr;
231 
232  // Check that the available copy isn't clobbered by any regmasks between
233  // itself and the destination.
234  Register AvailSrc = AvailCopy->getOperand(1).getReg();
235  Register AvailDef = AvailCopy->getOperand(0).getReg();
236  for (const MachineInstr &MI :
237  make_range(AvailCopy->getIterator(), DestCopy.getIterator()))
238  for (const MachineOperand &MO : MI.operands())
239  if (MO.isRegMask())
240  if (MO.clobbersPhysReg(AvailSrc) || MO.clobbersPhysReg(AvailDef))
241  return nullptr;
242 
243  return AvailCopy;
244  }
245 
246  void clear() {
247  Copies.clear();
248  }
249 };
250 
251 class MachineCopyPropagation : public MachineFunctionPass {
252  const TargetRegisterInfo *TRI;
253  const TargetInstrInfo *TII;
254  const MachineRegisterInfo *MRI;
255 
256 public:
257  static char ID; // Pass identification, replacement for typeid
258 
259  MachineCopyPropagation() : MachineFunctionPass(ID) {
261  }
262 
263  void getAnalysisUsage(AnalysisUsage &AU) const override {
264  AU.setPreservesCFG();
266  }
267 
268  bool runOnMachineFunction(MachineFunction &MF) override;
269 
270  MachineFunctionProperties getRequiredProperties() const override {
273  }
274 
275 private:
276  typedef enum { DebugUse = false, RegularUse = true } DebugType;
277 
278  void ReadRegister(MCRegister Reg, MachineInstr &Reader, DebugType DT);
279  void ForwardCopyPropagateBlock(MachineBasicBlock &MBB);
280  void BackwardCopyPropagateBlock(MachineBasicBlock &MBB);
281  bool eraseIfRedundant(MachineInstr &Copy, MCRegister Src, MCRegister Def);
282  void forwardUses(MachineInstr &MI);
283  void propagateDefs(MachineInstr &MI);
284  bool isForwardableRegClassCopy(const MachineInstr &Copy,
285  const MachineInstr &UseI, unsigned UseIdx);
286  bool isBackwardPropagatableRegClassCopy(const MachineInstr &Copy,
287  const MachineInstr &UseI,
288  unsigned UseIdx);
289  bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use);
290  bool hasOverlappingMultipleDef(const MachineInstr &MI,
291  const MachineOperand &MODef, Register Def);
292 
293  /// Candidates for deletion.
294  SmallSetVector<MachineInstr *, 8> MaybeDeadCopies;
295 
296  /// Multimap tracking debug users in current BB
298 
299  CopyTracker Tracker;
300 
301  bool Changed;
302 };
303 
304 } // end anonymous namespace
305 
307 
309 
310 INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
311  "Machine Copy Propagation Pass", false, false)
312 
313 void MachineCopyPropagation::ReadRegister(MCRegister Reg, MachineInstr &Reader,
314  DebugType DT) {
315  // If 'Reg' is defined by a copy, the copy is no longer a candidate
316  // for elimination. If a copy is "read" by a debug user, record the user
317  // for propagation.
318  for (MCRegUnitIterator RUI(Reg, TRI); RUI.isValid(); ++RUI) {
319  if (MachineInstr *Copy = Tracker.findCopyForUnit(*RUI, *TRI)) {
320  if (DT == RegularUse) {
321  LLVM_DEBUG(dbgs() << "MCP: Copy is used - not dead: "; Copy->dump());
322  MaybeDeadCopies.remove(Copy);
323  } else {
324  CopyDbgUsers[Copy].insert(&Reader);
325  }
326  }
327  }
328 }
329 
330 /// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
331 /// This fact may have been obscured by sub register usage or may not be true at
332 /// all even though Src and Def are subregisters of the registers used in
333 /// PreviousCopy. e.g.
334 /// isNopCopy("ecx = COPY eax", AX, CX) == true
335 /// isNopCopy("ecx = COPY eax", AH, CL) == false
336 static bool isNopCopy(const MachineInstr &PreviousCopy, MCRegister Src,
338  MCRegister PreviousSrc = PreviousCopy.getOperand(1).getReg().asMCReg();
339  MCRegister PreviousDef = PreviousCopy.getOperand(0).getReg().asMCReg();
340  if (Src == PreviousSrc && Def == PreviousDef)
341  return true;
342  if (!TRI->isSubRegister(PreviousSrc, Src))
343  return false;
344  unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
345  return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
346 }
347 
348 /// Remove instruction \p Copy if there exists a previous copy that copies the
349 /// register \p Src to the register \p Def; This may happen indirectly by
350 /// copying the super registers.
351 bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy,
352  MCRegister Src, MCRegister Def) {
353  // Avoid eliminating a copy from/to a reserved registers as we cannot predict
354  // the value (Example: The sparc zero register is writable but stays zero).
355  if (MRI->isReserved(Src) || MRI->isReserved(Def))
356  return false;
357 
358  // Search for an existing copy.
359  MachineInstr *PrevCopy = Tracker.findAvailCopy(Copy, Def, *TRI);
360  if (!PrevCopy)
361  return false;
362 
363  // Check that the existing copy uses the correct sub registers.
364  if (PrevCopy->getOperand(0).isDead())
365  return false;
366  if (!isNopCopy(*PrevCopy, Src, Def, TRI))
367  return false;
368 
369  LLVM_DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump());
370 
371  // Copy was redundantly redefining either Src or Def. Remove earlier kill
372  // flags between Copy and PrevCopy because the value will be reused now.
373  assert(Copy.isCopy());
374  Register CopyDef = Copy.getOperand(0).getReg();
375  assert(CopyDef == Src || CopyDef == Def);
376  for (MachineInstr &MI :
377  make_range(PrevCopy->getIterator(), Copy.getIterator()))
378  MI.clearRegisterKills(CopyDef, TRI);
379 
380  Copy.eraseFromParent();
381  Changed = true;
382  ++NumDeletes;
383  return true;
384 }
385 
386 bool MachineCopyPropagation::isBackwardPropagatableRegClassCopy(
387  const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) {
388  Register Def = Copy.getOperand(0).getReg();
389 
390  if (const TargetRegisterClass *URC =
391  UseI.getRegClassConstraint(UseIdx, TII, TRI))
392  return URC->contains(Def);
393 
394  // We don't process further if UseI is a COPY, since forward copy propagation
395  // should handle that.
396  return false;
397 }
398 
399 /// Decide whether we should forward the source of \param Copy to its use in
400 /// \param UseI based on the physical register class constraints of the opcode
401 /// and avoiding introducing more cross-class COPYs.
402 bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
403  const MachineInstr &UseI,
404  unsigned UseIdx) {
405 
406  Register CopySrcReg = Copy.getOperand(1).getReg();
407 
408  // If the new register meets the opcode register constraints, then allow
409  // forwarding.
410  if (const TargetRegisterClass *URC =
411  UseI.getRegClassConstraint(UseIdx, TII, TRI))
412  return URC->contains(CopySrcReg);
413 
414  if (!UseI.isCopy())
415  return false;
416 
417  const TargetRegisterClass *CopySrcRC =
418  TRI->getMinimalPhysRegClass(CopySrcReg);
419  const TargetRegisterClass *UseDstRC =
421  const TargetRegisterClass *CrossCopyRC = TRI->getCrossCopyRegClass(CopySrcRC);
422 
423  // If cross copy register class is not the same as copy source register class
424  // then it is not possible to copy the register directly and requires a cross
425  // register class copy. Fowarding this copy without checking register class of
426  // UseDst may create additional cross register copies when expanding the copy
427  // instruction in later passes.
428  if (CopySrcRC != CrossCopyRC) {
429  const TargetRegisterClass *CopyDstRC =
430  TRI->getMinimalPhysRegClass(Copy.getOperand(0).getReg());
431 
432  // Check if UseDstRC matches the necessary register class to copy from
433  // CopySrc's register class. If so then forwarding the copy will not
434  // introduce any cross-class copys. Else if CopyDstRC matches then keep the
435  // copy and do not forward. If neither UseDstRC or CopyDstRC matches then
436  // we may need a cross register copy later but we do not worry about it
437  // here.
438  if (UseDstRC != CrossCopyRC && CopyDstRC == CrossCopyRC)
439  return false;
440  }
441 
442  /// COPYs don't have register class constraints, so if the user instruction
443  /// is a COPY, we just try to avoid introducing additional cross-class
444  /// COPYs. For example:
445  ///
446  /// RegClassA = COPY RegClassB // Copy parameter
447  /// ...
448  /// RegClassB = COPY RegClassA // UseI parameter
449  ///
450  /// which after forwarding becomes
451  ///
452  /// RegClassA = COPY RegClassB
453  /// ...
454  /// RegClassB = COPY RegClassB
455  ///
456  /// so we have reduced the number of cross-class COPYs and potentially
457  /// introduced a nop COPY that can be removed.
458  const TargetRegisterClass *SuperRC = UseDstRC;
459  for (TargetRegisterClass::sc_iterator SuperRCI = UseDstRC->getSuperClasses();
460  SuperRC; SuperRC = *SuperRCI++)
461  if (SuperRC->contains(CopySrcReg))
462  return true;
463 
464  return false;
465 }
466 
467 /// Check that \p MI does not have implicit uses that overlap with it's \p Use
468 /// operand (the register being replaced), since these can sometimes be
469 /// implicitly tied to other operands. For example, on AMDGPU:
470 ///
471 /// V_MOVRELS_B32_e32 %VGPR2, %M0<imp-use>, %EXEC<imp-use>, %VGPR2_VGPR3_VGPR4_VGPR5<imp-use>
472 ///
473 /// the %VGPR2 is implicitly tied to the larger reg operand, but we have no
474 /// way of knowing we need to update the latter when updating the former.
475 bool MachineCopyPropagation::hasImplicitOverlap(const MachineInstr &MI,
476  const MachineOperand &Use) {
477  for (const MachineOperand &MIUse : MI.uses())
478  if (&MIUse != &Use && MIUse.isReg() && MIUse.isImplicit() &&
479  MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg()))
480  return true;
481 
482  return false;
483 }
484 
485 /// For an MI that has multiple definitions, check whether \p MI has
486 /// a definition that overlaps with another of its definitions.
487 /// For example, on ARM: umull r9, r9, lr, r0
488 /// The umull instruction is unpredictable unless RdHi and RdLo are different.
489 bool MachineCopyPropagation::hasOverlappingMultipleDef(
490  const MachineInstr &MI, const MachineOperand &MODef, Register Def) {
491  for (const MachineOperand &MIDef : MI.defs()) {
492  if ((&MIDef != &MODef) && MIDef.isReg() &&
493  TRI->regsOverlap(Def, MIDef.getReg()))
494  return true;
495  }
496 
497  return false;
498 }
499 
500 /// Look for available copies whose destination register is used by \p MI and
501 /// replace the use in \p MI with the copy's source register.
502 void MachineCopyPropagation::forwardUses(MachineInstr &MI) {
503  if (!Tracker.hasAnyCopies())
504  return;
505 
506  // Look for non-tied explicit vreg uses that have an active COPY
507  // instruction that defines the physical register allocated to them.
508  // Replace the vreg with the source of the active COPY.
509  for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd;
510  ++OpIdx) {
511  MachineOperand &MOUse = MI.getOperand(OpIdx);
512  // Don't forward into undef use operands since doing so can cause problems
513  // with the machine verifier, since it doesn't treat undef reads as reads,
514  // so we can end up with a live range that ends on an undef read, leading to
515  // an error that the live range doesn't end on a read of the live range
516  // register.
517  if (!MOUse.isReg() || MOUse.isTied() || MOUse.isUndef() || MOUse.isDef() ||
518  MOUse.isImplicit())
519  continue;
520 
521  if (!MOUse.getReg())
522  continue;
523 
524  // Check that the register is marked 'renamable' so we know it is safe to
525  // rename it without violating any constraints that aren't expressed in the
526  // IR (e.g. ABI or opcode requirements).
527  if (!MOUse.isRenamable())
528  continue;
529 
530  MachineInstr *Copy =
531  Tracker.findAvailCopy(MI, MOUse.getReg().asMCReg(), *TRI);
532  if (!Copy)
533  continue;
534 
535  Register CopyDstReg = Copy->getOperand(0).getReg();
536  const MachineOperand &CopySrc = Copy->getOperand(1);
537  Register CopySrcReg = CopySrc.getReg();
538 
539  // FIXME: Don't handle partial uses of wider COPYs yet.
540  if (MOUse.getReg() != CopyDstReg) {
541  LLVM_DEBUG(
542  dbgs() << "MCP: FIXME! Not forwarding COPY to sub-register use:\n "
543  << MI);
544  continue;
545  }
546 
547  // Don't forward COPYs of reserved regs unless they are constant.
548  if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg))
549  continue;
550 
551  if (!isForwardableRegClassCopy(*Copy, MI, OpIdx))
552  continue;
553 
554  if (hasImplicitOverlap(MI, MOUse))
555  continue;
556 
557  // Check that the instruction is not a copy that partially overwrites the
558  // original copy source that we are about to use. The tracker mechanism
559  // cannot cope with that.
560  if (MI.isCopy() && MI.modifiesRegister(CopySrcReg, TRI) &&
561  !MI.definesRegister(CopySrcReg)) {
562  LLVM_DEBUG(dbgs() << "MCP: Copy source overlap with dest in " << MI);
563  continue;
564  }
565 
566  if (!DebugCounter::shouldExecute(FwdCounter)) {
567  LLVM_DEBUG(dbgs() << "MCP: Skipping forwarding due to debug counter:\n "
568  << MI);
569  continue;
570  }
571 
572  LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI)
573  << "\n with " << printReg(CopySrcReg, TRI)
574  << "\n in " << MI << " from " << *Copy);
575 
576  MOUse.setReg(CopySrcReg);
577  if (!CopySrc.isRenamable())
578  MOUse.setIsRenamable(false);
579 
580  LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
581 
582  // Clear kill markers that may have been invalidated.
583  for (MachineInstr &KMI :
584  make_range(Copy->getIterator(), std::next(MI.getIterator())))
585  KMI.clearRegisterKills(CopySrcReg, TRI);
586 
587  ++NumCopyForwards;
588  Changed = true;
589  }
590 }
591 
592 void MachineCopyPropagation::ForwardCopyPropagateBlock(MachineBasicBlock &MBB) {
593  LLVM_DEBUG(dbgs() << "MCP: ForwardCopyPropagateBlock " << MBB.getName()
594  << "\n");
595 
596  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ) {
597  MachineInstr *MI = &*I;
598  ++I;
599 
600  // Analyze copies (which don't overlap themselves).
601  if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(),
602  MI->getOperand(1).getReg())) {
603  assert(MI->getOperand(0).getReg().isPhysical() &&
604  MI->getOperand(1).getReg().isPhysical() &&
605  "MachineCopyPropagation should be run after register allocation!");
606 
607  MCRegister Def = MI->getOperand(0).getReg().asMCReg();
608  MCRegister Src = MI->getOperand(1).getReg().asMCReg();
609 
610  // The two copies cancel out and the source of the first copy
611  // hasn't been overridden, eliminate the second one. e.g.
612  // %ecx = COPY %eax
613  // ... nothing clobbered eax.
614  // %eax = COPY %ecx
615  // =>
616  // %ecx = COPY %eax
617  //
618  // or
619  //
620  // %ecx = COPY %eax
621  // ... nothing clobbered eax.
622  // %ecx = COPY %eax
623  // =>
624  // %ecx = COPY %eax
625  if (eraseIfRedundant(*MI, Def, Src) || eraseIfRedundant(*MI, Src, Def))
626  continue;
627 
628  forwardUses(*MI);
629 
630  // Src may have been changed by forwardUses()
631  Src = MI->getOperand(1).getReg().asMCReg();
632 
633  // If Src is defined by a previous copy, the previous copy cannot be
634  // eliminated.
635  ReadRegister(Src, *MI, RegularUse);
636  for (const MachineOperand &MO : MI->implicit_operands()) {
637  if (!MO.isReg() || !MO.readsReg())
638  continue;
639  MCRegister Reg = MO.getReg().asMCReg();
640  if (!Reg)
641  continue;
642  ReadRegister(Reg, *MI, RegularUse);
643  }
644 
645  LLVM_DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI->dump());
646 
647  // Copy is now a candidate for deletion.
648  if (!MRI->isReserved(Def))
649  MaybeDeadCopies.insert(MI);
650 
651  // If 'Def' is previously source of another copy, then this earlier copy's
652  // source is no longer available. e.g.
653  // %xmm9 = copy %xmm2
654  // ...
655  // %xmm2 = copy %xmm0
656  // ...
657  // %xmm2 = copy %xmm9
658  Tracker.clobberRegister(Def, *TRI);
659  for (const MachineOperand &MO : MI->implicit_operands()) {
660  if (!MO.isReg() || !MO.isDef())
661  continue;
662  MCRegister Reg = MO.getReg().asMCReg();
663  if (!Reg)
664  continue;
665  Tracker.clobberRegister(Reg, *TRI);
666  }
667 
668  Tracker.trackCopy(MI, *TRI);
669 
670  continue;
671  }
672 
673  // Clobber any earlyclobber regs first.
674  for (const MachineOperand &MO : MI->operands())
675  if (MO.isReg() && MO.isEarlyClobber()) {
676  MCRegister Reg = MO.getReg().asMCReg();
677  // If we have a tied earlyclobber, that means it is also read by this
678  // instruction, so we need to make sure we don't remove it as dead
679  // later.
680  if (MO.isTied())
681  ReadRegister(Reg, *MI, RegularUse);
682  Tracker.clobberRegister(Reg, *TRI);
683  }
684 
685  forwardUses(*MI);
686 
687  // Not a copy.
689  const MachineOperand *RegMask = nullptr;
690  for (const MachineOperand &MO : MI->operands()) {
691  if (MO.isRegMask())
692  RegMask = &MO;
693  if (!MO.isReg())
694  continue;
695  Register Reg = MO.getReg();
696  if (!Reg)
697  continue;
698 
699  assert(!Reg.isVirtual() &&
700  "MachineCopyPropagation should be run after register allocation!");
701 
702  if (MO.isDef() && !MO.isEarlyClobber()) {
703  Defs.push_back(Reg.asMCReg());
704  continue;
705  } else if (MO.readsReg())
706  ReadRegister(Reg.asMCReg(), *MI, MO.isDebug() ? DebugUse : RegularUse);
707  }
708 
709  // The instruction has a register mask operand which means that it clobbers
710  // a large set of registers. Treat clobbered registers the same way as
711  // defined registers.
712  if (RegMask) {
713  // Erase any MaybeDeadCopies whose destination register is clobbered.
715  MaybeDeadCopies.begin();
716  DI != MaybeDeadCopies.end();) {
717  MachineInstr *MaybeDead = *DI;
718  MCRegister Reg = MaybeDead->getOperand(0).getReg().asMCReg();
719  assert(!MRI->isReserved(Reg));
720 
721  if (!RegMask->clobbersPhysReg(Reg)) {
722  ++DI;
723  continue;
724  }
725 
726  LLVM_DEBUG(dbgs() << "MCP: Removing copy due to regmask clobbering: ";
727  MaybeDead->dump());
728 
729  // Make sure we invalidate any entries in the copy maps before erasing
730  // the instruction.
731  Tracker.clobberRegister(Reg, *TRI);
732 
733  // erase() will return the next valid iterator pointing to the next
734  // element after the erased one.
735  DI = MaybeDeadCopies.erase(DI);
736  MaybeDead->eraseFromParent();
737  Changed = true;
738  ++NumDeletes;
739  }
740  }
741 
742  // Any previous copy definition or reading the Defs is no longer available.
743  for (MCRegister Reg : Defs)
744  Tracker.clobberRegister(Reg, *TRI);
745  }
746 
747  // If MBB doesn't have successors, delete the copies whose defs are not used.
748  // If MBB does have successors, then conservative assume the defs are live-out
749  // since we don't want to trust live-in lists.
750  if (MBB.succ_empty()) {
751  for (MachineInstr *MaybeDead : MaybeDeadCopies) {
752  LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: ";
753  MaybeDead->dump());
754  assert(!MRI->isReserved(MaybeDead->getOperand(0).getReg()));
755 
756  // Update matching debug values, if any.
757  assert(MaybeDead->isCopy());
758  Register SrcReg = MaybeDead->getOperand(1).getReg();
759  Register DestReg = MaybeDead->getOperand(0).getReg();
760  SmallVector<MachineInstr *> MaybeDeadDbgUsers(
761  CopyDbgUsers[MaybeDead].begin(), CopyDbgUsers[MaybeDead].end());
762  MRI->updateDbgUsersToReg(DestReg.asMCReg(), SrcReg.asMCReg(),
763  MaybeDeadDbgUsers);
764 
765  MaybeDead->eraseFromParent();
766  Changed = true;
767  ++NumDeletes;
768  }
769  }
770 
771  MaybeDeadCopies.clear();
772  CopyDbgUsers.clear();
773  Tracker.clear();
774 }
775 
777  const MachineRegisterInfo &MRI) {
778  assert(MI.isCopy() && "MI is expected to be a COPY");
779  Register Def = MI.getOperand(0).getReg();
780  Register Src = MI.getOperand(1).getReg();
781 
782  if (!Def || !Src)
783  return false;
784 
785  if (MRI.isReserved(Def) || MRI.isReserved(Src))
786  return false;
787 
788  return MI.getOperand(1).isRenamable() && MI.getOperand(1).isKill();
789 }
790 
791 void MachineCopyPropagation::propagateDefs(MachineInstr &MI) {
792  if (!Tracker.hasAnyCopies())
793  return;
794 
795  for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx != OpEnd;
796  ++OpIdx) {
797  MachineOperand &MODef = MI.getOperand(OpIdx);
798 
799  if (!MODef.isReg() || MODef.isUse())
800  continue;
801 
802  // Ignore non-trivial cases.
803  if (MODef.isTied() || MODef.isUndef() || MODef.isImplicit())
804  continue;
805 
806  if (!MODef.getReg())
807  continue;
808 
809  // We only handle if the register comes from a vreg.
810  if (!MODef.isRenamable())
811  continue;
812 
813  MachineInstr *Copy =
814  Tracker.findAvailBackwardCopy(MI, MODef.getReg().asMCReg(), *TRI);
815  if (!Copy)
816  continue;
817 
818  Register Def = Copy->getOperand(0).getReg();
819  Register Src = Copy->getOperand(1).getReg();
820 
821  if (MODef.getReg() != Src)
822  continue;
823 
824  if (!isBackwardPropagatableRegClassCopy(*Copy, MI, OpIdx))
825  continue;
826 
827  if (hasImplicitOverlap(MI, MODef))
828  continue;
829 
830  if (hasOverlappingMultipleDef(MI, MODef, Def))
831  continue;
832 
833  LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MODef.getReg(), TRI)
834  << "\n with " << printReg(Def, TRI) << "\n in "
835  << MI << " from " << *Copy);
836 
837  MODef.setReg(Def);
838  MODef.setIsRenamable(Copy->getOperand(0).isRenamable());
839 
840  LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
841  MaybeDeadCopies.insert(Copy);
842  Changed = true;
843  ++NumCopyBackwardPropagated;
844  }
845 }
846 
847 void MachineCopyPropagation::BackwardCopyPropagateBlock(
849  LLVM_DEBUG(dbgs() << "MCP: BackwardCopyPropagateBlock " << MBB.getName()
850  << "\n");
851 
853  I != E;) {
854  MachineInstr *MI = &*I;
855  ++I;
856 
857  // Ignore non-trivial COPYs.
858  if (MI->isCopy() && MI->getNumOperands() == 2 &&
859  !TRI->regsOverlap(MI->getOperand(0).getReg(),
860  MI->getOperand(1).getReg())) {
861 
862  MCRegister Def = MI->getOperand(0).getReg().asMCReg();
863  MCRegister Src = MI->getOperand(1).getReg().asMCReg();
864 
865  // Unlike forward cp, we don't invoke propagateDefs here,
866  // just let forward cp do COPY-to-COPY propagation.
868  Tracker.invalidateRegister(Src, *TRI);
869  Tracker.invalidateRegister(Def, *TRI);
870  Tracker.trackCopy(MI, *TRI);
871  continue;
872  }
873  }
874 
875  // Invalidate any earlyclobber regs first.
876  for (const MachineOperand &MO : MI->operands())
877  if (MO.isReg() && MO.isEarlyClobber()) {
878  MCRegister Reg = MO.getReg().asMCReg();
879  if (!Reg)
880  continue;
881  Tracker.invalidateRegister(Reg, *TRI);
882  }
883 
884  propagateDefs(*MI);
885  for (const MachineOperand &MO : MI->operands()) {
886  if (!MO.isReg())
887  continue;
888 
889  if (!MO.getReg())
890  continue;
891 
892  if (MO.isDef())
893  Tracker.invalidateRegister(MO.getReg().asMCReg(), *TRI);
894 
895  if (MO.readsReg()) {
896  if (MO.isDebug()) {
897  // Check if the register in the debug instruction is utilized
898  // in a copy instruction, so we can update the debug info if the
899  // register is changed.
900  for (MCRegUnitIterator RUI(MO.getReg().asMCReg(), TRI); RUI.isValid();
901  ++RUI) {
902  if (auto *Copy = Tracker.findCopyDefViaUnit(*RUI, *TRI)) {
903  CopyDbgUsers[Copy].insert(MI);
904  }
905  }
906  } else {
907  Tracker.invalidateRegister(MO.getReg().asMCReg(), *TRI);
908  }
909  }
910  }
911  }
912 
913  for (auto *Copy : MaybeDeadCopies) {
914 
915  Register Src = Copy->getOperand(1).getReg();
916  Register Def = Copy->getOperand(0).getReg();
917  SmallVector<MachineInstr *> MaybeDeadDbgUsers(CopyDbgUsers[Copy].begin(),
918  CopyDbgUsers[Copy].end());
919 
920  MRI->updateDbgUsersToReg(Src.asMCReg(), Def.asMCReg(), MaybeDeadDbgUsers);
921  Copy->eraseFromParent();
922  ++NumDeletes;
923  }
924 
925  MaybeDeadCopies.clear();
926  CopyDbgUsers.clear();
927  Tracker.clear();
928 }
929 
930 bool MachineCopyPropagation::runOnMachineFunction(MachineFunction &MF) {
931  if (skipFunction(MF.getFunction()))
932  return false;
933 
934  Changed = false;
935 
937  TII = MF.getSubtarget().getInstrInfo();
938  MRI = &MF.getRegInfo();
939 
940  for (MachineBasicBlock &MBB : MF) {
941  BackwardCopyPropagateBlock(MBB);
942  ForwardCopyPropagateBlock(MBB);
943  }
944 
945  return Changed;
946 }
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:103
MachineInstr.h
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::tgtok::Def
@ Def
Definition: TGLexer.h:50
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::TargetRegisterInfo::getCrossCopyRegClass
virtual const TargetRegisterClass * getCrossCopyRegClass(const TargetRegisterClass *RC) const
Returns a legal register class to copy a register in the specified class to or from.
Definition: TargetRegisterInfo.h:768
llvm::make_range
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition: iterator_range.h:53
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
Pass.h
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
Statistic.h
llvm::MachineOperand::isTied
bool isTied() const
Definition: MachineOperand.h:441
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
MachineBasicBlock.h
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::initializeMachineCopyPropagationPass
void initializeMachineCopyPropagationPass(PassRegistry &)
DenseMap.h
llvm::ilist_node_impl::getReverseIterator
reverse_self_iterator getReverseIterator()
Definition: ilist_node.h:84
TargetInstrInfo.h
llvm::sys::path::end
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:233
llvm::sys::path::begin
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:224
llvm::SmallSet
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:134
llvm::MachineFunctionProperties
Properties which a MachineFunction may have at a given point in time.
Definition: MachineFunction.h:111
llvm::MachineInstr::isCopy
bool isCopy() const
Definition: MachineInstr.h:1291
STLExtras.h
llvm::MachineCopyPropagationID
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
Definition: MachineCopyPropagation.cpp:308
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::MachineFunctionPass::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: MachineFunctionPass.cpp:102
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
MachineRegisterInfo.h
isBackwardPropagatableCopy
static bool isBackwardPropagatableCopy(MachineInstr &MI, const MachineRegisterInfo &MRI)
Definition: MachineCopyPropagation.cpp:776
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
clear
static void clear(coro::Shape &Shape)
Definition: Coroutines.cpp:233
llvm::MachineOperand::isRenamable
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
Definition: MachineOperand.cpp:118
llvm::TargetRegisterClass::contains
bool contains(Register Reg) const
Return true if the specified register is included in this register class.
Definition: TargetRegisterInfo.h:93
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:636
llvm::MachineOperand::isImplicit
bool isImplicit() const
Definition: MachineOperand.h:380
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::SetVector::begin
iterator begin()
Get an iterator to the beginning of the SetVector.
Definition: SetVector.h:82
llvm::PassRegistry::getPassRegistry
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Definition: PassRegistry.cpp:31
llvm::COFF::DebugType
DebugType
Definition: COFF.h:652
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::isUse
bool isUse() const
Definition: MachineOperand.h:370
llvm::MachineInstr::getOperand
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:499
llvm::MachineRegisterInfo::isReserved
bool isReserved(MCRegister PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
Definition: MachineRegisterInfo.h:915
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::MCRegisterInfo::getSubRegIndex
unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
Definition: MCRegisterInfo.cpp:44
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::MachineFunctionProperties::set
MachineFunctionProperties & set(Property P)
Definition: MachineFunction.h:169
llvm::DebugCounter::shouldExecute
static bool shouldExecute(unsigned CounterName)
Definition: DebugCounter.h:74
llvm::MachineBasicBlock::rend
reverse_iterator rend()
Definition: MachineBasicBlock.h:278
llvm::STATISTIC
STATISTIC(NumFunctions, "Total number of functions")
llvm::TargetRegisterInfo::regsOverlap
bool regsOverlap(Register regA, Register regB) const
Returns true if the two registers are equal or alias each other.
Definition: TargetRegisterInfo.h:418
Copies
SI Lower i1 Copies
Definition: SILowerI1Copies.cpp:406
llvm::MCRegisterInfo::isSubRegisterEq
bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
Definition: MCRegisterInfo.h:568
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::MachineFunctionProperties::Property::NoVRegs
@ NoVRegs
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:626
llvm::MachineOperand::clobbersPhysReg
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
Definition: MachineOperand.h:617
llvm::MachineOperand::isUndef
bool isUndef() const
Definition: MachineOperand.h:395
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:321
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::DenseMap
Definition: DenseMap.h:714
llvm::codeview::FrameCookieKind::Copy
@ Copy
llvm::MachineOperand::isDead
bool isDead() const
Definition: MachineOperand.h:385
I
#define I(x, y, z)
Definition: MD5.cpp:59
MCRegisterInfo.h
llvm::is_contained
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1612
MachineFunctionPass.h
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
iterator_range.h
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:360
llvm::Register::asMCReg
MCRegister asMCReg() const
Utility to check-convert this value to a MCRegister.
Definition: Register.h:120
llvm::MachineRegisterInfo::updateDbgUsersToReg
void updateDbgUsersToReg(MCRegister OldReg, MCRegister NewReg, ArrayRef< MachineInstr * > Users) const
updateDbgUsersToReg - Update a collection of DBG_VALUE instructions to refer to the designated regist...
Definition: MachineRegisterInfo.h:826
llvm::MachineFunction
Definition: MachineFunction.h:230
llvm::MachineInstr::dump
void dump() const
Definition: MachineInstr.cpp:1540
llvm::MachineBasicBlock::succ_empty
bool succ_empty() const
Definition: MachineBasicBlock.h:347
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::AnalysisUsage::setPreservesCFG
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:253
llvm::MachineBasicBlock::rbegin
reverse_iterator rbegin()
Definition: MachineBasicBlock.h:272
llvm::MachineOperand::setIsRenamable
void setIsRenamable(bool Val=true)
Definition: MachineOperand.cpp:136
llvm::ilist_node_impl::getIterator
self_iterator getIterator()
Definition: ilist_node.h:81
TargetSubtargetInfo.h
llvm::MachineOperand::isDef
bool isDef() const
Definition: MachineOperand.h:375
llvm::SmallSet::insert
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
Definition: SmallSet.h:180
llvm::Pass::dump
void dump() const
Definition: Pass.cpp:131
llvm::MachineInstr::getRegClassConstraint
const TargetRegisterClass * getRegClassConstraint(unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Compute the static register class constraint for operand OpIdx.
Definition: MachineInstr.cpp:880
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineRegisterInfo::isConstantPhysReg
bool isConstantPhysReg(MCRegister PhysReg) const
Returns true if PhysReg is unallocatable and constant throughout the function.
Definition: MachineRegisterInfo.cpp:513
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:592
llvm::TargetRegisterClass::getSuperClasses
sc_iterator getSuperClasses() const
Returns a NULL-terminated list of super-classes.
Definition: TargetRegisterInfo.h:176
INITIALIZE_PASS
INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE, "Machine Copy Propagation Pass", false, false) void MachineCopyPropagation
Definition: MachineCopyPropagation.cpp:310
DebugCounter.h
llvm::TargetRegisterClass::sc_iterator
const TargetRegisterClass *const * sc_iterator
Definition: TargetRegisterInfo.h:50
llvm::MCRegisterInfo::isSubRegister
bool isSubRegister(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA.
Definition: MCRegisterInfo.h:560
llvm::MCRegUnitIterator
Definition: MCRegisterInfo.h:677
SmallVector.h
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:268
llvm::MCRegisterInfo::DiffListIterator::isValid
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
Definition: MCRegisterInfo.h:224
llvm::MachineOperand::setReg
void setReg(Register Reg)
Change the register this operand corresponds to.
Definition: MachineOperand.cpp:55
MachineOperand.h
llvm::SmallSetVector
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:307
DEBUG_COUNTER
DEBUG_COUNTER(FwdCounter, "machine-cp-fwd", "Controls which register COPYs are forwarded")
llvm::TargetRegisterInfo::getMinimalPhysRegClass
const TargetRegisterClass * getMinimalPhysRegClass(MCRegister Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
Definition: TargetRegisterInfo.cpp:211
raw_ostream.h
MachineFunction.h
llvm::printReg
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition: TargetRegisterInfo.cpp:110
llvm::MachineInstr::eraseFromParent
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
Definition: MachineInstr.cpp:677
llvm::MachineInstrBundleIterator< MachineInstr >
DEBUG_TYPE
#define DEBUG_TYPE
Definition: MachineCopyPropagation.cpp:78
InitializePasses.h
TargetRegisterInfo.h
llvm::MachineBasicBlock::getName
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
Definition: MachineBasicBlock.cpp:314
Debug.h
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
isNopCopy
static bool isNopCopy(const MachineInstr &PreviousCopy, MCRegister Src, MCRegister Def, const TargetRegisterInfo *TRI)
Return true if PreviousCopy did copy register Src to register Def.
Definition: MachineCopyPropagation.cpp:336
SetVector.h
getReg
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
Definition: MipsDisassembler.cpp:580
llvm::Use
A Use represents the edge between a Value definition and its users.
Definition: Use.h:44
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:23
SmallSet.h
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:37