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MachineCopyPropagation.cpp
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1 //===- MachineCopyPropagation.cpp - Machine Copy Propagation Pass ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This is an extremely simple MachineInstr-level copy propagation pass.
10 //
11 // This pass forwards the source of COPYs to the users of their destinations
12 // when doing so is legal. For example:
13 //
14 // %reg1 = COPY %reg0
15 // ...
16 // ... = OP %reg1
17 //
18 // If
19 // - %reg0 has not been clobbered by the time of the use of %reg1
20 // - the register class constraints are satisfied
21 // - the COPY def is the only value that reaches OP
22 // then this pass replaces the above with:
23 //
24 // %reg1 = COPY %reg0
25 // ...
26 // ... = OP %reg0
27 //
28 // This pass also removes some redundant COPYs. For example:
29 //
30 // %R1 = COPY %R0
31 // ... // No clobber of %R1
32 // %R0 = COPY %R1 <<< Removed
33 //
34 // or
35 //
36 // %R1 = COPY %R0
37 // ... // No clobber of %R0
38 // %R1 = COPY %R0 <<< Removed
39 //
40 // or
41 //
42 // $R0 = OP ...
43 // ... // No read/clobber of $R0 and $R1
44 // $R1 = COPY $R0 // $R0 is killed
45 // Replace $R0 with $R1 and remove the COPY
46 // $R1 = OP ...
47 // ...
48 //
49 //===----------------------------------------------------------------------===//
50 
51 #include "llvm/ADT/DenseMap.h"
52 #include "llvm/ADT/STLExtras.h"
53 #include "llvm/ADT/SetVector.h"
54 #include "llvm/ADT/SmallSet.h"
55 #include "llvm/ADT/SmallVector.h"
56 #include "llvm/ADT/Statistic.h"
67 #include "llvm/InitializePasses.h"
68 #include "llvm/MC/MCRegisterInfo.h"
69 #include "llvm/Pass.h"
70 #include "llvm/Support/Debug.h"
73 #include <cassert>
74 #include <iterator>
75 
76 using namespace llvm;
77 
78 #define DEBUG_TYPE "machine-cp"
79 
80 STATISTIC(NumDeletes, "Number of dead copies deleted");
81 STATISTIC(NumCopyForwards, "Number of copy uses forwarded");
82 STATISTIC(NumCopyBackwardPropagated, "Number of copy defs backward propagated");
83 DEBUG_COUNTER(FwdCounter, "machine-cp-fwd",
84  "Controls which register COPYs are forwarded");
85 
86 static cl::opt<bool> MCPUseCopyInstr("mcp-use-is-copy-instr", cl::init(false),
87  cl::Hidden);
88 
89 namespace {
90 
91 static std::optional<DestSourcePair> isCopyInstr(const MachineInstr &MI,
92  const TargetInstrInfo &TII,
93  bool UseCopyInstr) {
94  if (UseCopyInstr)
95  return TII.isCopyInstr(MI);
96 
97  if (MI.isCopy())
98  return std::optional<DestSourcePair>(
99  DestSourcePair{MI.getOperand(0), MI.getOperand(1)});
100 
101  return std::nullopt;
102 }
103 
104 class CopyTracker {
105  struct CopyInfo {
106  MachineInstr *MI;
108  bool Avail;
109  };
110 
112 
113 public:
114  /// Mark all of the given registers and their subregisters as unavailable for
115  /// copying.
116  void markRegsUnavailable(ArrayRef<MCRegister> Regs,
117  const TargetRegisterInfo &TRI) {
118  for (MCRegister Reg : Regs) {
119  // Source of copy is no longer available for propagation.
120  for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
121  auto CI = Copies.find(*RUI);
122  if (CI != Copies.end())
123  CI->second.Avail = false;
124  }
125  }
126  }
127 
128  /// Remove register from copy maps.
129  void invalidateRegister(MCRegister Reg, const TargetRegisterInfo &TRI,
130  const TargetInstrInfo &TII, bool UseCopyInstr) {
131  // Since Reg might be a subreg of some registers, only invalidate Reg is not
132  // enough. We have to find the COPY defines Reg or registers defined by Reg
133  // and invalidate all of them.
134  SmallSet<MCRegister, 8> RegsToInvalidate;
135  RegsToInvalidate.insert(Reg);
136  for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
137  auto I = Copies.find(*RUI);
138  if (I != Copies.end()) {
139  if (MachineInstr *MI = I->second.MI) {
140  std::optional<DestSourcePair> CopyOperands =
141  isCopyInstr(*MI, TII, UseCopyInstr);
142  assert(CopyOperands && "Expect copy");
143 
144  RegsToInvalidate.insert(
145  CopyOperands->Destination->getReg().asMCReg());
146  RegsToInvalidate.insert(CopyOperands->Source->getReg().asMCReg());
147  }
148  RegsToInvalidate.insert(I->second.DefRegs.begin(),
149  I->second.DefRegs.end());
150  }
151  }
152  for (MCRegister InvalidReg : RegsToInvalidate)
153  for (MCRegUnitIterator RUI(InvalidReg, &TRI); RUI.isValid(); ++RUI)
154  Copies.erase(*RUI);
155  }
156 
157  /// Clobber a single register, removing it from the tracker's copy maps.
158  void clobberRegister(MCRegister Reg, const TargetRegisterInfo &TRI,
159  const TargetInstrInfo &TII, bool UseCopyInstr) {
160  for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
161  auto I = Copies.find(*RUI);
162  if (I != Copies.end()) {
163  // When we clobber the source of a copy, we need to clobber everything
164  // it defined.
165  markRegsUnavailable(I->second.DefRegs, TRI);
166  // When we clobber the destination of a copy, we need to clobber the
167  // whole register it defined.
168  if (MachineInstr *MI = I->second.MI) {
169  std::optional<DestSourcePair> CopyOperands =
170  isCopyInstr(*MI, TII, UseCopyInstr);
171  markRegsUnavailable({CopyOperands->Destination->getReg().asMCReg()},
172  TRI);
173  }
174  // Now we can erase the copy.
175  Copies.erase(I);
176  }
177  }
178  }
179 
180  /// Add this copy's registers into the tracker's copy maps.
181  void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI,
182  const TargetInstrInfo &TII, bool UseCopyInstr) {
183  std::optional<DestSourcePair> CopyOperands =
184  isCopyInstr(*MI, TII, UseCopyInstr);
185  assert(CopyOperands && "Tracking non-copy?");
186 
187  MCRegister Src = CopyOperands->Source->getReg().asMCReg();
188  MCRegister Def = CopyOperands->Destination->getReg().asMCReg();
189 
190  // Remember Def is defined by the copy.
191  for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); ++RUI)
192  Copies[*RUI] = {MI, {}, true};
193 
194  // Remember source that's copied to Def. Once it's clobbered, then
195  // it's no longer available for copy propagation.
196  for (MCRegUnitIterator RUI(Src, &TRI); RUI.isValid(); ++RUI) {
197  auto I = Copies.insert({*RUI, {nullptr, {}, false}});
198  auto &Copy = I.first->second;
199  if (!is_contained(Copy.DefRegs, Def))
200  Copy.DefRegs.push_back(Def);
201  }
202  }
203 
204  bool hasAnyCopies() {
205  return !Copies.empty();
206  }
207 
208  MachineInstr *findCopyForUnit(MCRegister RegUnit,
209  const TargetRegisterInfo &TRI,
210  bool MustBeAvailable = false) {
211  auto CI = Copies.find(RegUnit);
212  if (CI == Copies.end())
213  return nullptr;
214  if (MustBeAvailable && !CI->second.Avail)
215  return nullptr;
216  return CI->second.MI;
217  }
218 
219  MachineInstr *findCopyDefViaUnit(MCRegister RegUnit,
220  const TargetRegisterInfo &TRI) {
221  auto CI = Copies.find(RegUnit);
222  if (CI == Copies.end())
223  return nullptr;
224  if (CI->second.DefRegs.size() != 1)
225  return nullptr;
226  MCRegUnitIterator RUI(CI->second.DefRegs[0], &TRI);
227  return findCopyForUnit(*RUI, TRI, true);
228  }
229 
230  MachineInstr *findAvailBackwardCopy(MachineInstr &I, MCRegister Reg,
231  const TargetRegisterInfo &TRI,
232  const TargetInstrInfo &TII,
233  bool UseCopyInstr) {
234  MCRegUnitIterator RUI(Reg, &TRI);
235  MachineInstr *AvailCopy = findCopyDefViaUnit(*RUI, TRI);
236 
237  if (!AvailCopy)
238  return nullptr;
239 
240  std::optional<DestSourcePair> CopyOperands =
241  isCopyInstr(*AvailCopy, TII, UseCopyInstr);
242  Register AvailSrc = CopyOperands->Source->getReg();
243  Register AvailDef = CopyOperands->Destination->getReg();
244  if (!TRI.isSubRegisterEq(AvailSrc, Reg))
245  return nullptr;
246 
247  for (const MachineInstr &MI :
248  make_range(AvailCopy->getReverseIterator(), I.getReverseIterator()))
249  for (const MachineOperand &MO : MI.operands())
250  if (MO.isRegMask())
251  // FIXME: Shall we simultaneously invalidate AvailSrc or AvailDef?
252  if (MO.clobbersPhysReg(AvailSrc) || MO.clobbersPhysReg(AvailDef))
253  return nullptr;
254 
255  return AvailCopy;
256  }
257 
258  MachineInstr *findAvailCopy(MachineInstr &DestCopy, MCRegister Reg,
259  const TargetRegisterInfo &TRI,
260  const TargetInstrInfo &TII, bool UseCopyInstr) {
261  // We check the first RegUnit here, since we'll only be interested in the
262  // copy if it copies the entire register anyway.
263  MCRegUnitIterator RUI(Reg, &TRI);
264  MachineInstr *AvailCopy =
265  findCopyForUnit(*RUI, TRI, /*MustBeAvailable=*/true);
266 
267  if (!AvailCopy)
268  return nullptr;
269 
270  std::optional<DestSourcePair> CopyOperands =
271  isCopyInstr(*AvailCopy, TII, UseCopyInstr);
272  Register AvailSrc = CopyOperands->Source->getReg();
273  Register AvailDef = CopyOperands->Destination->getReg();
274  if (!TRI.isSubRegisterEq(AvailDef, Reg))
275  return nullptr;
276 
277  // Check that the available copy isn't clobbered by any regmasks between
278  // itself and the destination.
279  for (const MachineInstr &MI :
280  make_range(AvailCopy->getIterator(), DestCopy.getIterator()))
281  for (const MachineOperand &MO : MI.operands())
282  if (MO.isRegMask())
283  if (MO.clobbersPhysReg(AvailSrc) || MO.clobbersPhysReg(AvailDef))
284  return nullptr;
285 
286  return AvailCopy;
287  }
288 
289  void clear() {
290  Copies.clear();
291  }
292 };
293 
294 class MachineCopyPropagation : public MachineFunctionPass {
295  const TargetRegisterInfo *TRI;
296  const TargetInstrInfo *TII;
297  const MachineRegisterInfo *MRI;
298 
299  // Return true if this is a copy instruction and false otherwise.
300  bool UseCopyInstr;
301 
302 public:
303  static char ID; // Pass identification, replacement for typeid
304 
305  MachineCopyPropagation(bool CopyInstr = false)
306  : MachineFunctionPass(ID), UseCopyInstr(CopyInstr || MCPUseCopyInstr) {
308  }
309 
310  void getAnalysisUsage(AnalysisUsage &AU) const override {
311  AU.setPreservesCFG();
313  }
314 
315  bool runOnMachineFunction(MachineFunction &MF) override;
316 
317  MachineFunctionProperties getRequiredProperties() const override {
320  }
321 
322 private:
323  typedef enum { DebugUse = false, RegularUse = true } DebugType;
324 
325  void ReadRegister(MCRegister Reg, MachineInstr &Reader, DebugType DT);
326  void ForwardCopyPropagateBlock(MachineBasicBlock &MBB);
327  void BackwardCopyPropagateBlock(MachineBasicBlock &MBB);
328  bool eraseIfRedundant(MachineInstr &Copy, MCRegister Src, MCRegister Def);
329  void forwardUses(MachineInstr &MI);
330  void propagateDefs(MachineInstr &MI);
331  bool isForwardableRegClassCopy(const MachineInstr &Copy,
332  const MachineInstr &UseI, unsigned UseIdx);
333  bool isBackwardPropagatableRegClassCopy(const MachineInstr &Copy,
334  const MachineInstr &UseI,
335  unsigned UseIdx);
336  bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use);
337  bool hasOverlappingMultipleDef(const MachineInstr &MI,
338  const MachineOperand &MODef, Register Def);
339 
340  /// Candidates for deletion.
341  SmallSetVector<MachineInstr *, 8> MaybeDeadCopies;
342 
343  /// Multimap tracking debug users in current BB
345 
346  CopyTracker Tracker;
347 
348  bool Changed;
349 };
350 
351 } // end anonymous namespace
352 
354 
356 
357 INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
358  "Machine Copy Propagation Pass", false, false)
359 
360 void MachineCopyPropagation::ReadRegister(MCRegister Reg, MachineInstr &Reader,
361  DebugType DT) {
362  // If 'Reg' is defined by a copy, the copy is no longer a candidate
363  // for elimination. If a copy is "read" by a debug user, record the user
364  // for propagation.
365  for (MCRegUnitIterator RUI(Reg, TRI); RUI.isValid(); ++RUI) {
366  if (MachineInstr *Copy = Tracker.findCopyForUnit(*RUI, *TRI)) {
367  if (DT == RegularUse) {
368  LLVM_DEBUG(dbgs() << "MCP: Copy is used - not dead: "; Copy->dump());
369  MaybeDeadCopies.remove(Copy);
370  } else {
371  CopyDbgUsers[Copy].insert(&Reader);
372  }
373  }
374  }
375 }
376 
377 /// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
378 /// This fact may have been obscured by sub register usage or may not be true at
379 /// all even though Src and Def are subregisters of the registers used in
380 /// PreviousCopy. e.g.
381 /// isNopCopy("ecx = COPY eax", AX, CX) == true
382 /// isNopCopy("ecx = COPY eax", AH, CL) == false
383 static bool isNopCopy(const MachineInstr &PreviousCopy, MCRegister Src,
385  const TargetInstrInfo *TII, bool UseCopyInstr) {
386 
387  std::optional<DestSourcePair> CopyOperands =
388  isCopyInstr(PreviousCopy, *TII, UseCopyInstr);
389  MCRegister PreviousSrc = CopyOperands->Source->getReg().asMCReg();
390  MCRegister PreviousDef = CopyOperands->Destination->getReg().asMCReg();
391  if (Src == PreviousSrc && Def == PreviousDef)
392  return true;
393  if (!TRI->isSubRegister(PreviousSrc, Src))
394  return false;
395  unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
396  return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
397 }
398 
399 /// Remove instruction \p Copy if there exists a previous copy that copies the
400 /// register \p Src to the register \p Def; This may happen indirectly by
401 /// copying the super registers.
402 bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy,
403  MCRegister Src, MCRegister Def) {
404  // Avoid eliminating a copy from/to a reserved registers as we cannot predict
405  // the value (Example: The sparc zero register is writable but stays zero).
406  if (MRI->isReserved(Src) || MRI->isReserved(Def))
407  return false;
408 
409  // Search for an existing copy.
410  MachineInstr *PrevCopy =
411  Tracker.findAvailCopy(Copy, Def, *TRI, *TII, UseCopyInstr);
412  if (!PrevCopy)
413  return false;
414 
415  auto PrevCopyOperands = isCopyInstr(*PrevCopy, *TII, UseCopyInstr);
416  // Check that the existing copy uses the correct sub registers.
417  if (PrevCopyOperands->Destination->isDead())
418  return false;
419  if (!isNopCopy(*PrevCopy, Src, Def, TRI, TII, UseCopyInstr))
420  return false;
421 
422  LLVM_DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump());
423 
424  // Copy was redundantly redefining either Src or Def. Remove earlier kill
425  // flags between Copy and PrevCopy because the value will be reused now.
426  std::optional<DestSourcePair> CopyOperands =
427  isCopyInstr(Copy, *TII, UseCopyInstr);
428  assert(CopyOperands);
429 
430  Register CopyDef = CopyOperands->Destination->getReg();
431  assert(CopyDef == Src || CopyDef == Def);
432  for (MachineInstr &MI :
433  make_range(PrevCopy->getIterator(), Copy.getIterator()))
434  MI.clearRegisterKills(CopyDef, TRI);
435 
436  Copy.eraseFromParent();
437  Changed = true;
438  ++NumDeletes;
439  return true;
440 }
441 
442 bool MachineCopyPropagation::isBackwardPropagatableRegClassCopy(
443  const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) {
444  std::optional<DestSourcePair> CopyOperands =
445  isCopyInstr(Copy, *TII, UseCopyInstr);
446  Register Def = CopyOperands->Destination->getReg();
447 
448  if (const TargetRegisterClass *URC =
449  UseI.getRegClassConstraint(UseIdx, TII, TRI))
450  return URC->contains(Def);
451 
452  // We don't process further if UseI is a COPY, since forward copy propagation
453  // should handle that.
454  return false;
455 }
456 
457 /// Decide whether we should forward the source of \param Copy to its use in
458 /// \param UseI based on the physical register class constraints of the opcode
459 /// and avoiding introducing more cross-class COPYs.
460 bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
461  const MachineInstr &UseI,
462  unsigned UseIdx) {
463  std::optional<DestSourcePair> CopyOperands =
464  isCopyInstr(Copy, *TII, UseCopyInstr);
465  Register CopySrcReg = CopyOperands->Source->getReg();
466 
467  // If the new register meets the opcode register constraints, then allow
468  // forwarding.
469  if (const TargetRegisterClass *URC =
470  UseI.getRegClassConstraint(UseIdx, TII, TRI))
471  return URC->contains(CopySrcReg);
472 
473  auto UseICopyOperands = isCopyInstr(UseI, *TII, UseCopyInstr);
474  if (!UseICopyOperands)
475  return false;
476 
477  /// COPYs don't have register class constraints, so if the user instruction
478  /// is a COPY, we just try to avoid introducing additional cross-class
479  /// COPYs. For example:
480  ///
481  /// RegClassA = COPY RegClassB // Copy parameter
482  /// ...
483  /// RegClassB = COPY RegClassA // UseI parameter
484  ///
485  /// which after forwarding becomes
486  ///
487  /// RegClassA = COPY RegClassB
488  /// ...
489  /// RegClassB = COPY RegClassB
490  ///
491  /// so we have reduced the number of cross-class COPYs and potentially
492  /// introduced a nop COPY that can be removed.
493 
494  // Allow forwarding if src and dst belong to any common class, so long as they
495  // don't belong to any (possibly smaller) common class that requires copies to
496  // go via a different class.
497  Register UseDstReg = UseICopyOperands->Destination->getReg();
498  bool Found = false;
499  bool IsCrossClass = false;
500  for (const TargetRegisterClass *RC : TRI->regclasses()) {
501  if (RC->contains(CopySrcReg) && RC->contains(UseDstReg)) {
502  Found = true;
503  if (TRI->getCrossCopyRegClass(RC) != RC) {
504  IsCrossClass = true;
505  break;
506  }
507  }
508  }
509  if (!Found)
510  return false;
511  if (!IsCrossClass)
512  return true;
513  // The forwarded copy would be cross-class. Only do this if the original copy
514  // was also cross-class.
515  Register CopyDstReg = CopyOperands->Destination->getReg();
516  for (const TargetRegisterClass *RC : TRI->regclasses()) {
517  if (RC->contains(CopySrcReg) && RC->contains(CopyDstReg) &&
518  TRI->getCrossCopyRegClass(RC) != RC)
519  return true;
520  }
521  return false;
522 }
523 
524 /// Check that \p MI does not have implicit uses that overlap with it's \p Use
525 /// operand (the register being replaced), since these can sometimes be
526 /// implicitly tied to other operands. For example, on AMDGPU:
527 ///
528 /// V_MOVRELS_B32_e32 %VGPR2, %M0<imp-use>, %EXEC<imp-use>, %VGPR2_VGPR3_VGPR4_VGPR5<imp-use>
529 ///
530 /// the %VGPR2 is implicitly tied to the larger reg operand, but we have no
531 /// way of knowing we need to update the latter when updating the former.
532 bool MachineCopyPropagation::hasImplicitOverlap(const MachineInstr &MI,
533  const MachineOperand &Use) {
534  for (const MachineOperand &MIUse : MI.uses())
535  if (&MIUse != &Use && MIUse.isReg() && MIUse.isImplicit() &&
536  MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg()))
537  return true;
538 
539  return false;
540 }
541 
542 /// For an MI that has multiple definitions, check whether \p MI has
543 /// a definition that overlaps with another of its definitions.
544 /// For example, on ARM: umull r9, r9, lr, r0
545 /// The umull instruction is unpredictable unless RdHi and RdLo are different.
546 bool MachineCopyPropagation::hasOverlappingMultipleDef(
547  const MachineInstr &MI, const MachineOperand &MODef, Register Def) {
548  for (const MachineOperand &MIDef : MI.defs()) {
549  if ((&MIDef != &MODef) && MIDef.isReg() &&
550  TRI->regsOverlap(Def, MIDef.getReg()))
551  return true;
552  }
553 
554  return false;
555 }
556 
557 /// Look for available copies whose destination register is used by \p MI and
558 /// replace the use in \p MI with the copy's source register.
559 void MachineCopyPropagation::forwardUses(MachineInstr &MI) {
560  if (!Tracker.hasAnyCopies())
561  return;
562 
563  // Look for non-tied explicit vreg uses that have an active COPY
564  // instruction that defines the physical register allocated to them.
565  // Replace the vreg with the source of the active COPY.
566  for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd;
567  ++OpIdx) {
568  MachineOperand &MOUse = MI.getOperand(OpIdx);
569  // Don't forward into undef use operands since doing so can cause problems
570  // with the machine verifier, since it doesn't treat undef reads as reads,
571  // so we can end up with a live range that ends on an undef read, leading to
572  // an error that the live range doesn't end on a read of the live range
573  // register.
574  if (!MOUse.isReg() || MOUse.isTied() || MOUse.isUndef() || MOUse.isDef() ||
575  MOUse.isImplicit())
576  continue;
577 
578  if (!MOUse.getReg())
579  continue;
580 
581  // Check that the register is marked 'renamable' so we know it is safe to
582  // rename it without violating any constraints that aren't expressed in the
583  // IR (e.g. ABI or opcode requirements).
584  if (!MOUse.isRenamable())
585  continue;
586 
587  MachineInstr *Copy = Tracker.findAvailCopy(MI, MOUse.getReg().asMCReg(),
588  *TRI, *TII, UseCopyInstr);
589  if (!Copy)
590  continue;
591 
592  std::optional<DestSourcePair> CopyOperands =
593  isCopyInstr(*Copy, *TII, UseCopyInstr);
594  Register CopyDstReg = CopyOperands->Destination->getReg();
595  const MachineOperand &CopySrc = *CopyOperands->Source;
596  Register CopySrcReg = CopySrc.getReg();
597 
598  // FIXME: Don't handle partial uses of wider COPYs yet.
599  if (MOUse.getReg() != CopyDstReg) {
600  LLVM_DEBUG(
601  dbgs() << "MCP: FIXME! Not forwarding COPY to sub-register use:\n "
602  << MI);
603  continue;
604  }
605 
606  // Don't forward COPYs of reserved regs unless they are constant.
607  if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg))
608  continue;
609 
610  if (!isForwardableRegClassCopy(*Copy, MI, OpIdx))
611  continue;
612 
613  if (hasImplicitOverlap(MI, MOUse))
614  continue;
615 
616  // Check that the instruction is not a copy that partially overwrites the
617  // original copy source that we are about to use. The tracker mechanism
618  // cannot cope with that.
619  if (isCopyInstr(MI, *TII, UseCopyInstr) &&
620  MI.modifiesRegister(CopySrcReg, TRI) &&
621  !MI.definesRegister(CopySrcReg)) {
622  LLVM_DEBUG(dbgs() << "MCP: Copy source overlap with dest in " << MI);
623  continue;
624  }
625 
626  if (!DebugCounter::shouldExecute(FwdCounter)) {
627  LLVM_DEBUG(dbgs() << "MCP: Skipping forwarding due to debug counter:\n "
628  << MI);
629  continue;
630  }
631 
632  LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI)
633  << "\n with " << printReg(CopySrcReg, TRI)
634  << "\n in " << MI << " from " << *Copy);
635 
636  MOUse.setReg(CopySrcReg);
637  if (!CopySrc.isRenamable())
638  MOUse.setIsRenamable(false);
639  MOUse.setIsUndef(CopySrc.isUndef());
640 
641  LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
642 
643  // Clear kill markers that may have been invalidated.
644  for (MachineInstr &KMI :
645  make_range(Copy->getIterator(), std::next(MI.getIterator())))
646  KMI.clearRegisterKills(CopySrcReg, TRI);
647 
648  ++NumCopyForwards;
649  Changed = true;
650  }
651 }
652 
653 void MachineCopyPropagation::ForwardCopyPropagateBlock(MachineBasicBlock &MBB) {
654  LLVM_DEBUG(dbgs() << "MCP: ForwardCopyPropagateBlock " << MBB.getName()
655  << "\n");
656 
658  // Analyze copies (which don't overlap themselves).
659  std::optional<DestSourcePair> CopyOperands =
660  isCopyInstr(MI, *TII, UseCopyInstr);
661  if (CopyOperands) {
662 
663  Register RegSrc = CopyOperands->Source->getReg();
664  Register RegDef = CopyOperands->Destination->getReg();
665 
666  if (!TRI->regsOverlap(RegDef, RegSrc)) {
667  assert(RegDef.isPhysical() && RegSrc.isPhysical() &&
668  "MachineCopyPropagation should be run after register allocation!");
669 
670  MCRegister Def = RegDef.asMCReg();
671  MCRegister Src = RegSrc.asMCReg();
672 
673  // The two copies cancel out and the source of the first copy
674  // hasn't been overridden, eliminate the second one. e.g.
675  // %ecx = COPY %eax
676  // ... nothing clobbered eax.
677  // %eax = COPY %ecx
678  // =>
679  // %ecx = COPY %eax
680  //
681  // or
682  //
683  // %ecx = COPY %eax
684  // ... nothing clobbered eax.
685  // %ecx = COPY %eax
686  // =>
687  // %ecx = COPY %eax
688  if (eraseIfRedundant(MI, Def, Src) || eraseIfRedundant(MI, Src, Def))
689  continue;
690 
691  forwardUses(MI);
692 
693  // Src may have been changed by forwardUses()
694  CopyOperands = isCopyInstr(MI, *TII, UseCopyInstr);
695  Src = CopyOperands->Source->getReg().asMCReg();
696 
697  // If Src is defined by a previous copy, the previous copy cannot be
698  // eliminated.
699  ReadRegister(Src, MI, RegularUse);
700  for (const MachineOperand &MO : MI.implicit_operands()) {
701  if (!MO.isReg() || !MO.readsReg())
702  continue;
703  MCRegister Reg = MO.getReg().asMCReg();
704  if (!Reg)
705  continue;
706  ReadRegister(Reg, MI, RegularUse);
707  }
708 
709  LLVM_DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI.dump());
710 
711  // Copy is now a candidate for deletion.
712  if (!MRI->isReserved(Def))
713  MaybeDeadCopies.insert(&MI);
714 
715  // If 'Def' is previously source of another copy, then this earlier copy's
716  // source is no longer available. e.g.
717  // %xmm9 = copy %xmm2
718  // ...
719  // %xmm2 = copy %xmm0
720  // ...
721  // %xmm2 = copy %xmm9
722  Tracker.clobberRegister(Def, *TRI, *TII, UseCopyInstr);
723  for (const MachineOperand &MO : MI.implicit_operands()) {
724  if (!MO.isReg() || !MO.isDef())
725  continue;
726  MCRegister Reg = MO.getReg().asMCReg();
727  if (!Reg)
728  continue;
729  Tracker.clobberRegister(Reg, *TRI, *TII, UseCopyInstr);
730  }
731 
732  Tracker.trackCopy(&MI, *TRI, *TII, UseCopyInstr);
733 
734  continue;
735  }
736  }
737 
738  // Clobber any earlyclobber regs first.
739  for (const MachineOperand &MO : MI.operands())
740  if (MO.isReg() && MO.isEarlyClobber()) {
741  MCRegister Reg = MO.getReg().asMCReg();
742  // If we have a tied earlyclobber, that means it is also read by this
743  // instruction, so we need to make sure we don't remove it as dead
744  // later.
745  if (MO.isTied())
746  ReadRegister(Reg, MI, RegularUse);
747  Tracker.clobberRegister(Reg, *TRI, *TII, UseCopyInstr);
748  }
749 
750  forwardUses(MI);
751 
752  // Not a copy.
754  const MachineOperand *RegMask = nullptr;
755  for (const MachineOperand &MO : MI.operands()) {
756  if (MO.isRegMask())
757  RegMask = &MO;
758  if (!MO.isReg())
759  continue;
760  Register Reg = MO.getReg();
761  if (!Reg)
762  continue;
763 
764  assert(!Reg.isVirtual() &&
765  "MachineCopyPropagation should be run after register allocation!");
766 
767  if (MO.isDef() && !MO.isEarlyClobber()) {
768  Defs.push_back(Reg.asMCReg());
769  continue;
770  } else if (MO.readsReg())
771  ReadRegister(Reg.asMCReg(), MI, MO.isDebug() ? DebugUse : RegularUse);
772  }
773 
774  // The instruction has a register mask operand which means that it clobbers
775  // a large set of registers. Treat clobbered registers the same way as
776  // defined registers.
777  if (RegMask) {
778  // Erase any MaybeDeadCopies whose destination register is clobbered.
780  MaybeDeadCopies.begin();
781  DI != MaybeDeadCopies.end();) {
782  MachineInstr *MaybeDead = *DI;
783  std::optional<DestSourcePair> CopyOperands =
784  isCopyInstr(*MaybeDead, *TII, UseCopyInstr);
785  MCRegister Reg = CopyOperands->Destination->getReg().asMCReg();
786  assert(!MRI->isReserved(Reg));
787 
788  if (!RegMask->clobbersPhysReg(Reg)) {
789  ++DI;
790  continue;
791  }
792 
793  LLVM_DEBUG(dbgs() << "MCP: Removing copy due to regmask clobbering: ";
794  MaybeDead->dump());
795 
796  // Make sure we invalidate any entries in the copy maps before erasing
797  // the instruction.
798  Tracker.clobberRegister(Reg, *TRI, *TII, UseCopyInstr);
799 
800  // erase() will return the next valid iterator pointing to the next
801  // element after the erased one.
802  DI = MaybeDeadCopies.erase(DI);
803  MaybeDead->eraseFromParent();
804  Changed = true;
805  ++NumDeletes;
806  }
807  }
808 
809  // Any previous copy definition or reading the Defs is no longer available.
810  for (MCRegister Reg : Defs)
811  Tracker.clobberRegister(Reg, *TRI, *TII, UseCopyInstr);
812  }
813 
814  // If MBB doesn't have successors, delete the copies whose defs are not used.
815  // If MBB does have successors, then conservative assume the defs are live-out
816  // since we don't want to trust live-in lists.
817  if (MBB.succ_empty()) {
818  for (MachineInstr *MaybeDead : MaybeDeadCopies) {
819  LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: ";
820  MaybeDead->dump());
821 
822  std::optional<DestSourcePair> CopyOperands =
823  isCopyInstr(*MaybeDead, *TII, UseCopyInstr);
824  assert(CopyOperands);
825 
826  Register SrcReg = CopyOperands->Source->getReg();
827  Register DestReg = CopyOperands->Destination->getReg();
828  assert(!MRI->isReserved(DestReg));
829 
830  // Update matching debug values, if any.
831  SmallVector<MachineInstr *> MaybeDeadDbgUsers(
832  CopyDbgUsers[MaybeDead].begin(), CopyDbgUsers[MaybeDead].end());
833  MRI->updateDbgUsersToReg(DestReg.asMCReg(), SrcReg.asMCReg(),
834  MaybeDeadDbgUsers);
835 
836  MaybeDead->eraseFromParent();
837  Changed = true;
838  ++NumDeletes;
839  }
840  }
841 
842  MaybeDeadCopies.clear();
843  CopyDbgUsers.clear();
844  Tracker.clear();
845 }
846 
848  const MachineRegisterInfo &MRI,
849  const TargetInstrInfo &TII,
850  bool UseCopyInstr) {
851  std::optional<DestSourcePair> CopyOperands =
852  isCopyInstr(MI, TII, UseCopyInstr);
853  assert(CopyOperands && "MI is expected to be a COPY");
854 
855  Register Def = CopyOperands->Destination->getReg();
856  Register Src = CopyOperands->Source->getReg();
857 
858  if (!Def || !Src)
859  return false;
860 
861  if (MRI.isReserved(Def) || MRI.isReserved(Src))
862  return false;
863 
864  return CopyOperands->Source->isRenamable() && CopyOperands->Source->isKill();
865 }
866 
867 void MachineCopyPropagation::propagateDefs(MachineInstr &MI) {
868  if (!Tracker.hasAnyCopies())
869  return;
870 
871  for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx != OpEnd;
872  ++OpIdx) {
873  MachineOperand &MODef = MI.getOperand(OpIdx);
874 
875  if (!MODef.isReg() || MODef.isUse())
876  continue;
877 
878  // Ignore non-trivial cases.
879  if (MODef.isTied() || MODef.isUndef() || MODef.isImplicit())
880  continue;
881 
882  if (!MODef.getReg())
883  continue;
884 
885  // We only handle if the register comes from a vreg.
886  if (!MODef.isRenamable())
887  continue;
888 
889  MachineInstr *Copy = Tracker.findAvailBackwardCopy(
890  MI, MODef.getReg().asMCReg(), *TRI, *TII, UseCopyInstr);
891  if (!Copy)
892  continue;
893 
894  std::optional<DestSourcePair> CopyOperands =
895  isCopyInstr(*Copy, *TII, UseCopyInstr);
896  Register Def = CopyOperands->Destination->getReg();
897  Register Src = CopyOperands->Source->getReg();
898 
899  if (MODef.getReg() != Src)
900  continue;
901 
902  if (!isBackwardPropagatableRegClassCopy(*Copy, MI, OpIdx))
903  continue;
904 
905  if (hasImplicitOverlap(MI, MODef))
906  continue;
907 
908  if (hasOverlappingMultipleDef(MI, MODef, Def))
909  continue;
910 
911  LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MODef.getReg(), TRI)
912  << "\n with " << printReg(Def, TRI) << "\n in "
913  << MI << " from " << *Copy);
914 
915  MODef.setReg(Def);
916  MODef.setIsRenamable(CopyOperands->Destination->isRenamable());
917 
918  LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
919  MaybeDeadCopies.insert(Copy);
920  Changed = true;
921  ++NumCopyBackwardPropagated;
922  }
923 }
924 
925 void MachineCopyPropagation::BackwardCopyPropagateBlock(
927  LLVM_DEBUG(dbgs() << "MCP: BackwardCopyPropagateBlock " << MBB.getName()
928  << "\n");
929 
931  // Ignore non-trivial COPYs.
932  std::optional<DestSourcePair> CopyOperands =
933  isCopyInstr(MI, *TII, UseCopyInstr);
934  if (CopyOperands && MI.getNumOperands() == 2) {
935  Register DefReg = CopyOperands->Destination->getReg();
936  Register SrcReg = CopyOperands->Source->getReg();
937 
938  if (!TRI->regsOverlap(DefReg, SrcReg)) {
939  MCRegister Def = DefReg.asMCReg();
940  MCRegister Src = SrcReg.asMCReg();
941 
942  // Unlike forward cp, we don't invoke propagateDefs here,
943  // just let forward cp do COPY-to-COPY propagation.
944  if (isBackwardPropagatableCopy(MI, *MRI, *TII, UseCopyInstr)) {
945  Tracker.invalidateRegister(Src, *TRI, *TII, UseCopyInstr);
946  Tracker.invalidateRegister(Def, *TRI, *TII, UseCopyInstr);
947  Tracker.trackCopy(&MI, *TRI, *TII, UseCopyInstr);
948  continue;
949  }
950  }
951  }
952 
953  // Invalidate any earlyclobber regs first.
954  for (const MachineOperand &MO : MI.operands())
955  if (MO.isReg() && MO.isEarlyClobber()) {
956  MCRegister Reg = MO.getReg().asMCReg();
957  if (!Reg)
958  continue;
959  Tracker.invalidateRegister(Reg, *TRI, *TII, UseCopyInstr);
960  }
961 
962  propagateDefs(MI);
963  for (const MachineOperand &MO : MI.operands()) {
964  if (!MO.isReg())
965  continue;
966 
967  if (!MO.getReg())
968  continue;
969 
970  if (MO.isDef())
971  Tracker.invalidateRegister(MO.getReg().asMCReg(), *TRI, *TII,
972  UseCopyInstr);
973 
974  if (MO.readsReg()) {
975  if (MO.isDebug()) {
976  // Check if the register in the debug instruction is utilized
977  // in a copy instruction, so we can update the debug info if the
978  // register is changed.
979  for (MCRegUnitIterator RUI(MO.getReg().asMCReg(), TRI); RUI.isValid();
980  ++RUI) {
981  if (auto *Copy = Tracker.findCopyDefViaUnit(*RUI, *TRI)) {
982  CopyDbgUsers[Copy].insert(&MI);
983  }
984  }
985  } else {
986  Tracker.invalidateRegister(MO.getReg().asMCReg(), *TRI, *TII,
987  UseCopyInstr);
988  }
989  }
990  }
991  }
992 
993  for (auto *Copy : MaybeDeadCopies) {
994  std::optional<DestSourcePair> CopyOperands =
995  isCopyInstr(*Copy, *TII, UseCopyInstr);
996  Register Src = CopyOperands->Source->getReg();
997  Register Def = CopyOperands->Destination->getReg();
998  SmallVector<MachineInstr *> MaybeDeadDbgUsers(CopyDbgUsers[Copy].begin(),
999  CopyDbgUsers[Copy].end());
1000 
1001  MRI->updateDbgUsersToReg(Src.asMCReg(), Def.asMCReg(), MaybeDeadDbgUsers);
1002  Copy->eraseFromParent();
1003  ++NumDeletes;
1004  }
1005 
1006  MaybeDeadCopies.clear();
1007  CopyDbgUsers.clear();
1008  Tracker.clear();
1009 }
1010 
1011 bool MachineCopyPropagation::runOnMachineFunction(MachineFunction &MF) {
1012  if (skipFunction(MF.getFunction()))
1013  return false;
1014 
1015  Changed = false;
1016 
1017  TRI = MF.getSubtarget().getRegisterInfo();
1018  TII = MF.getSubtarget().getInstrInfo();
1019  MRI = &MF.getRegInfo();
1020 
1021  for (MachineBasicBlock &MBB : MF) {
1022  BackwardCopyPropagateBlock(MBB);
1023  ForwardCopyPropagateBlock(MBB);
1024  }
1025 
1026  return Changed;
1027 }
1028 
1030 llvm::createMachineCopyPropagationPass(bool UseCopyInstr = false) {
1031  return new MachineCopyPropagation(UseCopyInstr);
1032 }
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:109
MachineInstr.h
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::tgtok::Def
@ Def
Definition: TGLexer.h:50
llvm::TargetRegisterInfo::getCrossCopyRegClass
virtual const TargetRegisterClass * getCrossCopyRegClass(const TargetRegisterClass *RC) const
Returns a legal register class to copy a register in the specified class to or from.
Definition: TargetRegisterInfo.h:799
llvm::createMachineCopyPropagationPass
MachineFunctionPass * createMachineCopyPropagationPass(bool UseCopyInstr)
Definition: MachineCopyPropagation.cpp:1030
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iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition: iterator_range.h:53
llvm::AArch64PACKey::ID
ID
Definition: AArch64BaseInfo.h:818
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
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virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:95
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1199
Statistic.h
llvm::MachineOperand::isTied
bool isTied() const
Definition: MachineOperand.h:440
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
MachineBasicBlock.h
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:127
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:139
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:236
llvm::initializeMachineCopyPropagationPass
void initializeMachineCopyPropagationPass(PassRegistry &)
DenseMap.h
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reverse_self_iterator getReverseIterator()
Definition: ilist_node.h:85
TargetInstrInfo.h
llvm::sys::path::end
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:235
llvm::sys::path::begin
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:226
llvm::SmallSet
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:136
llvm::MachineFunctionProperties
Properties which a MachineFunction may have at a given point in time.
Definition: MachineFunction.h:127
STLExtras.h
llvm::MachineCopyPropagationID
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
Definition: MachineCopyPropagation.cpp:355
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::MachineFunctionPass::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: MachineFunctionPass.cpp:167
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
MachineRegisterInfo.h
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
clear
static void clear(coro::Shape &Shape)
Definition: Coroutines.cpp:149
llvm::Register::isPhysical
bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:97
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bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
Definition: MachineOperand.cpp:119
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MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:667
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bool isImplicit() const
Definition: MachineOperand.h:379
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TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:98
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iterator begin()
Get an iterator to the beginning of the SetVector.
Definition: SetVector.h:82
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static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Definition: PassRegistry.cpp:24
llvm::COFF::DebugType
DebugType
Definition: COFF.h:652
isBackwardPropagatableCopy
static bool isBackwardPropagatableCopy(MachineInstr &MI, const MachineRegisterInfo &MRI, const TargetInstrInfo &TII, bool UseCopyInstr)
Definition: MachineCopyPropagation.cpp:847
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bool isUse() const
Definition: MachineOperand.h:369
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bool isReserved(MCRegister PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
Definition: MachineRegisterInfo.h:930
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Definition: TargetRegisterInfo.h:45
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
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const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
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unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
Definition: MCRegisterInfo.cpp:44
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
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MachineFunctionProperties & set(Property P)
Definition: MachineFunction.h:196
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static bool shouldExecute(unsigned CounterName)
Definition: DebugCounter.h:72
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STATISTIC(NumFunctions, "Total number of functions")
Copies
SI Lower i1 Copies
Definition: SILowerI1Copies.cpp:397
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bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
Definition: MCRegisterInfo.h:568
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unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
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Definition: MachineBasicBlock.h:94
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iterator_range< regclass_iterator > regclasses() const
Definition: TargetRegisterInfo.h:760
llvm::MachineFunctionProperties::Property::NoVRegs
@ NoVRegs
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:657
llvm::cl::opt< bool >
llvm::MachineOperand::clobbersPhysReg
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
Definition: MachineOperand.h:626
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bool isUndef() const
Definition: MachineOperand.h:394
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bool regsOverlap(Register RegA, Register RegB) const
Returns true if the two registers are equal or alias each other.
Definition: TargetRegisterInfo.h:421
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bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:320
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Representation of each machine instruction.
Definition: MachineInstr.h:66
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Definition: DenseMap.h:714
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@ Copy
I
#define I(x, y, z)
Definition: MD5.cpp:58
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initializer< Ty > init(const Ty &Val)
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Make a range that does early increment to allow mutation of the underlying range without disrupting i...
Definition: STLExtras.h:716
MCRegisterInfo.h
llvm::is_contained
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1868
MachineFunctionPass.h
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
iterator_range.h
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Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:359
llvm::Register::asMCReg
MCRegister asMCReg() const
Utility to check-convert this value to a MCRegister.
Definition: Register.h:120
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void updateDbgUsersToReg(MCRegister OldReg, MCRegister NewReg, ArrayRef< MachineInstr * > Users) const
updateDbgUsersToReg - Update a collection of debug instructions to refer to the designated register.
Definition: MachineRegisterInfo.h:839
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Definition: MachineFunction.h:257
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void dump() const
Definition: MachineInstr.cpp:1526
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bool succ_empty() const
Definition: MachineBasicBlock.h:384
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ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
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void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:265
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void setIsUndef(bool Val=true)
Definition: MachineOperand.h:520
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void setIsRenamable(bool Val=true)
Definition: MachineOperand.cpp:137
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Definition: ilist_node.h:82
TargetSubtargetInfo.h
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bool isDef() const
Definition: MachineOperand.h:374
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void dump() const
Definition: Pass.cpp:136
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const TargetRegisterClass * getRegClassConstraint(unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Compute the static register class constraint for operand OpIdx.
Definition: MachineInstr.cpp:875
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
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bool isConstantPhysReg(MCRegister PhysReg) const
Returns true if PhysReg is unallocatable and constant throughout the function.
Definition: MachineRegisterInfo.cpp:515
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:623
llvm::DestSourcePair
Definition: TargetInstrInfo.h:69
INITIALIZE_PASS
INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE, "Machine Copy Propagation Pass", false, false) void MachineCopyPropagation
Definition: MachineCopyPropagation.cpp:357
DebugCounter.h
llvm::MCRegisterInfo::isSubRegister
bool isSubRegister(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA.
Definition: MCRegisterInfo.h:560
llvm::SmallSet::insert
std::pair< const_iterator, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
Definition: SmallSet.h:178
llvm::MCRegUnitIterator
Definition: MCRegisterInfo.h:680
SmallVector.h
llvm::MCRegisterInfo::DiffListIterator::isValid
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
Definition: MCRegisterInfo.h:224
llvm::MachineOperand::setReg
void setReg(Register Reg)
Change the register this operand corresponds to.
Definition: MachineOperand.cpp:56
MCPUseCopyInstr
static cl::opt< bool > MCPUseCopyInstr("mcp-use-is-copy-instr", cl::init(false), cl::Hidden)
llvm::reverse
auto reverse(ContainerTy &&C)
Definition: STLExtras.h:485
MachineOperand.h
llvm::SmallSetVector
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:307
DEBUG_COUNTER
DEBUG_COUNTER(FwdCounter, "machine-cp-fwd", "Controls which register COPYs are forwarded")
raw_ostream.h
MachineFunction.h
llvm::printReg
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition: TargetRegisterInfo.cpp:111
llvm::MachineInstr::eraseFromParent
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
Definition: MachineInstr.cpp:692
DEBUG_TYPE
#define DEBUG_TYPE
Definition: MachineCopyPropagation.cpp:78
InitializePasses.h
TargetRegisterInfo.h
llvm::MachineBasicBlock::getName
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
Definition: MachineBasicBlock.cpp:311
Debug.h
SetVector.h
isNopCopy
static bool isNopCopy(const MachineInstr &PreviousCopy, MCRegister Src, MCRegister Def, const TargetRegisterInfo *TRI, const TargetInstrInfo *TII, bool UseCopyInstr)
Return true if PreviousCopy did copy register Src to register Def.
Definition: MachineCopyPropagation.cpp:383
llvm::Use
A Use represents the edge between a Value definition and its users.
Definition: Use.h:43
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24
SmallSet.h