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SPIRVAsmPrinter.cpp
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1 //===-- SPIRVAsmPrinter.cpp - SPIR-V LLVM assembly writer ------*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to the SPIR-V assembly language.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "SPIRV.h"
16 #include "SPIRVInstrInfo.h"
17 #include "SPIRVMCInstLower.h"
18 #include "SPIRVModuleAnalysis.h"
19 #include "SPIRVSubtarget.h"
20 #include "SPIRVTargetMachine.h"
21 #include "SPIRVUtils.h"
23 #include "llvm/ADT/DenseMap.h"
31 #include "llvm/MC/MCAsmInfo.h"
32 #include "llvm/MC/MCInst.h"
33 #include "llvm/MC/MCStreamer.h"
34 #include "llvm/MC/MCSymbol.h"
35 #include "llvm/MC/TargetRegistry.h"
37 
38 using namespace llvm;
39 
40 #define DEBUG_TYPE "asm-printer"
41 
42 namespace {
43 class SPIRVAsmPrinter : public AsmPrinter {
44 public:
45  explicit SPIRVAsmPrinter(TargetMachine &TM,
46  std::unique_ptr<MCStreamer> Streamer)
47  : AsmPrinter(TM, std::move(Streamer)), ST(nullptr), TII(nullptr) {}
48  bool ModuleSectionsEmitted;
49  const SPIRVSubtarget *ST;
50  const SPIRVInstrInfo *TII;
51 
52  StringRef getPassName() const override { return "SPIRV Assembly Printer"; }
53  void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
54  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
55  const char *ExtraCode, raw_ostream &O) override;
56 
57  void outputMCInst(MCInst &Inst);
58  void outputInstruction(const MachineInstr *MI);
59  void outputModuleSection(SPIRV::ModuleSectionType MSType);
60  void outputGlobalRequirements();
61  void outputEntryPoints();
62  void outputDebugSourceAndStrings(const Module &M);
63  void outputOpExtInstImports(const Module &M);
64  void outputOpMemoryModel();
65  void outputOpFunctionEnd();
66  void outputExtFuncDecls();
67  void outputExecutionModeFromMDNode(Register Reg, MDNode *Node,
68  SPIRV::ExecutionMode::ExecutionMode EM);
69  void outputExecutionMode(const Module &M);
70  void outputAnnotations(const Module &M);
71  void outputModuleSections();
72 
73  void emitInstruction(const MachineInstr *MI) override;
74  void emitFunctionEntryLabel() override {}
75  void emitFunctionHeader() override;
76  void emitFunctionBodyStart() override {}
77  void emitFunctionBodyEnd() override;
78  void emitBasicBlockStart(const MachineBasicBlock &MBB) override;
79  void emitBasicBlockEnd(const MachineBasicBlock &MBB) override {}
80  void emitGlobalVariable(const GlobalVariable *GV) override {}
81  void emitOpLabel(const MachineBasicBlock &MBB);
82  void emitEndOfAsmFile(Module &M) override;
83  bool doInitialization(Module &M) override;
84 
85  void getAnalysisUsage(AnalysisUsage &AU) const override;
87 };
88 } // namespace
89 
90 void SPIRVAsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const {
94 }
95 
96 // If the module has no functions, we need output global info anyway.
97 void SPIRVAsmPrinter::emitEndOfAsmFile(Module &M) {
98  if (ModuleSectionsEmitted == false) {
99  outputModuleSections();
100  ModuleSectionsEmitted = true;
101  }
102 }
103 
104 void SPIRVAsmPrinter::emitFunctionHeader() {
105  if (ModuleSectionsEmitted == false) {
106  outputModuleSections();
107  ModuleSectionsEmitted = true;
108  }
109  // Get the subtarget from the current MachineFunction.
110  ST = &MF->getSubtarget<SPIRVSubtarget>();
111  TII = ST->getInstrInfo();
112  const Function &F = MF->getFunction();
113 
114  if (isVerbose()) {
115  OutStreamer->getCommentOS()
116  << "-- Begin function "
117  << GlobalValue::dropLLVMManglingEscape(F.getName()) << '\n';
118  }
119 
120  auto Section = getObjFileLowering().SectionForGlobal(&F, TM);
121  MF->setSection(Section);
122 }
123 
124 void SPIRVAsmPrinter::outputOpFunctionEnd() {
125  MCInst FunctionEndInst;
126  FunctionEndInst.setOpcode(SPIRV::OpFunctionEnd);
127  outputMCInst(FunctionEndInst);
128 }
129 
130 // Emit OpFunctionEnd at the end of MF and clear BBNumToRegMap.
131 void SPIRVAsmPrinter::emitFunctionBodyEnd() {
132  outputOpFunctionEnd();
133  MAI->BBNumToRegMap.clear();
134 }
135 
136 void SPIRVAsmPrinter::emitOpLabel(const MachineBasicBlock &MBB) {
137  if (MAI->MBBsToSkip.contains(&MBB))
138  return;
139  MCInst LabelInst;
140  LabelInst.setOpcode(SPIRV::OpLabel);
141  LabelInst.addOperand(MCOperand::createReg(MAI->getOrCreateMBBRegister(MBB)));
142  outputMCInst(LabelInst);
143 }
144 
145 void SPIRVAsmPrinter::emitBasicBlockStart(const MachineBasicBlock &MBB) {
146  // If it's the first MBB in MF, it has OpFunction and OpFunctionParameter, so
147  // OpLabel should be output after them.
148  if (MBB.getNumber() == MF->front().getNumber()) {
149  for (const MachineInstr &MI : MBB)
150  if (MI.getOpcode() == SPIRV::OpFunction)
151  return;
152  // TODO: this case should be checked by the verifier.
153  report_fatal_error("OpFunction is expected in the front MBB of MF");
154  }
155  emitOpLabel(MBB);
156 }
157 
158 void SPIRVAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
159  raw_ostream &O) {
160  const MachineOperand &MO = MI->getOperand(OpNum);
161 
162  switch (MO.getType()) {
165  break;
166 
168  O << MO.getImm();
169  break;
170 
172  O << MO.getFPImm();
173  break;
174 
176  O << *MO.getMBB()->getSymbol();
177  break;
178 
180  O << *getSymbol(MO.getGlobal());
181  break;
182 
184  MCSymbol *BA = GetBlockAddressSymbol(MO.getBlockAddress());
185  O << BA->getName();
186  break;
187  }
188 
190  O << *GetExternalSymbolSymbol(MO.getSymbolName());
191  break;
192 
195  default:
196  llvm_unreachable("<unknown operand type>");
197  }
198 }
199 
200 bool SPIRVAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
201  const char *ExtraCode, raw_ostream &O) {
202  if (ExtraCode && ExtraCode[0])
203  return true; // Invalid instruction - SPIR-V does not have special modifiers
204 
205  printOperand(MI, OpNo, O);
206  return false;
207 }
208 
210  const SPIRVInstrInfo *TII) {
211  return TII->isHeaderInstr(*MI) || MI->getOpcode() == SPIRV::OpFunction ||
212  MI->getOpcode() == SPIRV::OpFunctionParameter;
213 }
214 
215 void SPIRVAsmPrinter::outputMCInst(MCInst &Inst) {
216  OutStreamer->emitInstruction(Inst, *OutContext.getSubtargetInfo());
217 }
218 
219 void SPIRVAsmPrinter::outputInstruction(const MachineInstr *MI) {
220  SPIRVMCInstLower MCInstLowering;
221  MCInst TmpInst;
222  MCInstLowering.lower(MI, TmpInst, MAI);
223  outputMCInst(TmpInst);
224 }
225 
226 void SPIRVAsmPrinter::emitInstruction(const MachineInstr *MI) {
227  SPIRV_MC::verifyInstructionPredicates(MI->getOpcode(),
228  getSubtargetInfo().getFeatureBits());
229 
230  if (!MAI->getSkipEmission(MI))
231  outputInstruction(MI);
232 
233  // Output OpLabel after OpFunction and OpFunctionParameter in the first MBB.
234  const MachineInstr *NextMI = MI->getNextNode();
235  if (!MAI->hasMBBRegister(*MI->getParent()) && isFuncOrHeaderInstr(MI, TII) &&
236  (!NextMI || !isFuncOrHeaderInstr(NextMI, TII))) {
237  assert(MI->getParent()->getNumber() == MF->front().getNumber() &&
238  "OpFunction is not in the front MBB of MF");
239  emitOpLabel(*MI->getParent());
240  }
241 }
242 
243 void SPIRVAsmPrinter::outputModuleSection(SPIRV::ModuleSectionType MSType) {
244  for (MachineInstr *MI : MAI->getMSInstrs(MSType))
245  outputInstruction(MI);
246 }
247 
248 void SPIRVAsmPrinter::outputDebugSourceAndStrings(const Module &M) {
249  // Output OpSourceExtensions.
250  for (auto &Str : MAI->SrcExt) {
251  MCInst Inst;
252  Inst.setOpcode(SPIRV::OpSourceExtension);
253  addStringImm(Str.first(), Inst);
254  outputMCInst(Inst);
255  }
256  // Output OpSource.
257  MCInst Inst;
258  Inst.setOpcode(SPIRV::OpSource);
259  Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->SrcLang)));
260  Inst.addOperand(
261  MCOperand::createImm(static_cast<unsigned>(MAI->SrcLangVersion)));
262  outputMCInst(Inst);
263 }
264 
265 void SPIRVAsmPrinter::outputOpExtInstImports(const Module &M) {
266  for (auto &CU : MAI->ExtInstSetMap) {
267  unsigned Set = CU.first;
268  Register Reg = CU.second;
269  MCInst Inst;
270  Inst.setOpcode(SPIRV::OpExtInstImport);
273  static_cast<SPIRV::InstructionSet::InstructionSet>(Set)),
274  Inst);
275  outputMCInst(Inst);
276  }
277 }
278 
279 void SPIRVAsmPrinter::outputOpMemoryModel() {
280  MCInst Inst;
281  Inst.setOpcode(SPIRV::OpMemoryModel);
282  Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Addr)));
283  Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Mem)));
284  outputMCInst(Inst);
285 }
286 
287 // Before the OpEntryPoints' output, we need to add the entry point's
288 // interfaces. The interface is a list of IDs of global OpVariable instructions.
289 // These declare the set of global variables from a module that form
290 // the interface of this entry point.
291 void SPIRVAsmPrinter::outputEntryPoints() {
292  // Find all OpVariable IDs with required StorageClass.
293  DenseSet<Register> InterfaceIDs;
294  for (MachineInstr *MI : MAI->GlobalVarList) {
295  assert(MI->getOpcode() == SPIRV::OpVariable);
296  auto SC = static_cast<SPIRV::StorageClass::StorageClass>(
297  MI->getOperand(2).getImm());
298  // Before version 1.4, the interface's storage classes are limited to
299  // the Input and Output storage classes. Starting with version 1.4,
300  // the interface's storage classes are all storage classes used in
301  // declaring all global variables referenced by the entry point call tree.
302  if (ST->getSPIRVVersion() >= 14 || SC == SPIRV::StorageClass::Input ||
303  SC == SPIRV::StorageClass::Output) {
304  MachineFunction *MF = MI->getMF();
305  Register Reg = MAI->getRegisterAlias(MF, MI->getOperand(0).getReg());
306  InterfaceIDs.insert(Reg);
307  }
308  }
309 
310  // Output OpEntryPoints adding interface args to all of them.
311  for (MachineInstr *MI : MAI->getMSInstrs(SPIRV::MB_EntryPoints)) {
312  SPIRVMCInstLower MCInstLowering;
313  MCInst TmpInst;
314  MCInstLowering.lower(MI, TmpInst, MAI);
315  for (Register Reg : InterfaceIDs) {
316  assert(Reg.isValid());
318  }
319  outputMCInst(TmpInst);
320  }
321 }
322 
323 // Create global OpCapability instructions for the required capabilities.
324 void SPIRVAsmPrinter::outputGlobalRequirements() {
325  // Abort here if not all requirements can be satisfied.
326  MAI->Reqs.checkSatisfiable(*ST);
327 
328  for (const auto &Cap : MAI->Reqs.getMinimalCapabilities()) {
329  MCInst Inst;
330  Inst.setOpcode(SPIRV::OpCapability);
331  Inst.addOperand(MCOperand::createImm(Cap));
332  outputMCInst(Inst);
333  }
334 
335  // Generate the final OpExtensions with strings instead of enums.
336  for (const auto &Ext : MAI->Reqs.getExtensions()) {
337  MCInst Inst;
338  Inst.setOpcode(SPIRV::OpExtension);
340  SPIRV::OperandCategory::ExtensionOperand, Ext),
341  Inst);
342  outputMCInst(Inst);
343  }
344  // TODO add a pseudo instr for version number.
345 }
346 
347 void SPIRVAsmPrinter::outputExtFuncDecls() {
348  // Insert OpFunctionEnd after each declaration.
350  I = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).begin(),
351  E = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).end();
352  for (; I != E; ++I) {
353  outputInstruction(*I);
354  if ((I + 1) == E || (*(I + 1))->getOpcode() == SPIRV::OpFunction)
355  outputOpFunctionEnd();
356  }
357 }
358 
359 // Encode LLVM type by SPIR-V execution mode VecTypeHint.
360 static unsigned encodeVecTypeHint(Type *Ty) {
361  if (Ty->isHalfTy())
362  return 4;
363  if (Ty->isFloatTy())
364  return 5;
365  if (Ty->isDoubleTy())
366  return 6;
367  if (IntegerType *IntTy = dyn_cast<IntegerType>(Ty)) {
368  switch (IntTy->getIntegerBitWidth()) {
369  case 8:
370  return 0;
371  case 16:
372  return 1;
373  case 32:
374  return 2;
375  case 64:
376  return 3;
377  default:
378  llvm_unreachable("invalid integer type");
379  }
380  }
381  if (FixedVectorType *VecTy = dyn_cast<FixedVectorType>(Ty)) {
382  Type *EleTy = VecTy->getElementType();
383  unsigned Size = VecTy->getNumElements();
384  return Size << 16 | encodeVecTypeHint(EleTy);
385  }
386  llvm_unreachable("invalid type");
387 }
388 
389 static void addOpsFromMDNode(MDNode *MDN, MCInst &Inst,
391  for (const MDOperand &MDOp : MDN->operands()) {
392  if (auto *CMeta = dyn_cast<ConstantAsMetadata>(MDOp)) {
393  Constant *C = CMeta->getValue();
394  if (ConstantInt *Const = dyn_cast<ConstantInt>(C)) {
395  Inst.addOperand(MCOperand::createImm(Const->getZExtValue()));
396  } else if (auto *CE = dyn_cast<Function>(C)) {
397  Register FuncReg = MAI->getFuncReg(CE);
398  assert(FuncReg.isValid());
399  Inst.addOperand(MCOperand::createReg(FuncReg));
400  }
401  }
402  }
403 }
404 
405 void SPIRVAsmPrinter::outputExecutionModeFromMDNode(
406  Register Reg, MDNode *Node, SPIRV::ExecutionMode::ExecutionMode EM) {
407  MCInst Inst;
408  Inst.setOpcode(SPIRV::OpExecutionMode);
410  Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM)));
411  addOpsFromMDNode(Node, Inst, MAI);
412  outputMCInst(Inst);
413 }
414 
415 void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
416  NamedMDNode *Node = M.getNamedMetadata("spirv.ExecutionMode");
417  if (Node) {
418  for (unsigned i = 0; i < Node->getNumOperands(); i++) {
419  MCInst Inst;
420  Inst.setOpcode(SPIRV::OpExecutionMode);
421  addOpsFromMDNode(cast<MDNode>(Node->getOperand(i)), Inst, MAI);
422  outputMCInst(Inst);
423  }
424  }
425  for (auto FI = M.begin(), E = M.end(); FI != E; ++FI) {
426  const Function &F = *FI;
427  if (F.isDeclaration())
428  continue;
429  Register FReg = MAI->getFuncReg(&F);
430  assert(FReg.isValid());
431  if (MDNode *Node = F.getMetadata("reqd_work_group_size"))
432  outputExecutionModeFromMDNode(FReg, Node,
433  SPIRV::ExecutionMode::LocalSize);
434  if (MDNode *Node = F.getMetadata("work_group_size_hint"))
435  outputExecutionModeFromMDNode(FReg, Node,
436  SPIRV::ExecutionMode::LocalSizeHint);
437  if (MDNode *Node = F.getMetadata("intel_reqd_sub_group_size"))
438  outputExecutionModeFromMDNode(FReg, Node,
439  SPIRV::ExecutionMode::SubgroupSize);
440  if (MDNode *Node = F.getMetadata("vec_type_hint")) {
441  MCInst Inst;
442  Inst.setOpcode(SPIRV::OpExecutionMode);
443  Inst.addOperand(MCOperand::createReg(FReg));
444  unsigned EM = static_cast<unsigned>(SPIRV::ExecutionMode::VecTypeHint);
446  unsigned TypeCode = encodeVecTypeHint(getMDOperandAsType(Node, 0));
447  Inst.addOperand(MCOperand::createImm(TypeCode));
448  outputMCInst(Inst);
449  }
450  }
451 }
452 
453 void SPIRVAsmPrinter::outputAnnotations(const Module &M) {
454  outputModuleSection(SPIRV::MB_Annotations);
455  // Process llvm.global.annotations special global variable.
456  for (auto F = M.global_begin(), E = M.global_end(); F != E; ++F) {
457  if ((*F).getName() != "llvm.global.annotations")
458  continue;
459  const GlobalVariable *V = &(*F);
460  const ConstantArray *CA = cast<ConstantArray>(V->getOperand(0));
461  for (Value *Op : CA->operands()) {
462  ConstantStruct *CS = cast<ConstantStruct>(Op);
463  // The first field of the struct contains a pointer to
464  // the annotated variable.
465  Value *AnnotatedVar = CS->getOperand(0)->stripPointerCasts();
466  if (!isa<Function>(AnnotatedVar))
467  report_fatal_error("Unsupported value in llvm.global.annotations");
468  Function *Func = cast<Function>(AnnotatedVar);
469  Register Reg = MAI->getFuncReg(Func);
470 
471  // The second field contains a pointer to a global annotation string.
472  GlobalVariable *GV =
473  cast<GlobalVariable>(CS->getOperand(1)->stripPointerCasts());
474 
475  StringRef AnnotationString;
476  getConstantStringInfo(GV, AnnotationString);
477  MCInst Inst;
478  Inst.setOpcode(SPIRV::OpDecorate);
480  unsigned Dec = static_cast<unsigned>(SPIRV::Decoration::UserSemantic);
481  Inst.addOperand(MCOperand::createImm(Dec));
482  addStringImm(AnnotationString, Inst);
483  outputMCInst(Inst);
484  }
485  }
486 }
487 
488 void SPIRVAsmPrinter::outputModuleSections() {
489  const Module *M = MMI->getModule();
490  // Get the global subtarget to output module-level info.
491  ST = static_cast<const SPIRVTargetMachine &>(TM).getSubtargetImpl();
492  TII = ST->getInstrInfo();
494  assert(ST && TII && MAI && M && "Module analysis is required");
495  // Output instructions according to the Logical Layout of a Module:
496  // 1,2. All OpCapability instructions, then optional OpExtension instructions.
497  outputGlobalRequirements();
498  // 3. Optional OpExtInstImport instructions.
499  outputOpExtInstImports(*M);
500  // 4. The single required OpMemoryModel instruction.
501  outputOpMemoryModel();
502  // 5. All entry point declarations, using OpEntryPoint.
503  outputEntryPoints();
504  // 6. Execution-mode declarations, using OpExecutionMode or OpExecutionModeId.
505  outputExecutionMode(*M);
506  // 7a. Debug: all OpString, OpSourceExtension, OpSource, and
507  // OpSourceContinued, without forward references.
508  outputDebugSourceAndStrings(*M);
509  // 7b. Debug: all OpName and all OpMemberName.
510  outputModuleSection(SPIRV::MB_DebugNames);
511  // 7c. Debug: all OpModuleProcessed instructions.
512  outputModuleSection(SPIRV::MB_DebugModuleProcessed);
513  // 8. All annotation instructions (all decorations).
514  outputAnnotations(*M);
515  // 9. All type declarations (OpTypeXXX instructions), all constant
516  // instructions, and all global variable declarations. This section is
517  // the first section to allow use of: OpLine and OpNoLine debug information;
518  // non-semantic instructions with OpExtInst.
519  outputModuleSection(SPIRV::MB_TypeConstVars);
520  // 10. All function declarations (functions without a body).
521  outputExtFuncDecls();
522  // 11. All function definitions (functions with a body).
523  // This is done in regular function output.
524 }
525 
526 bool SPIRVAsmPrinter::doInitialization(Module &M) {
527  ModuleSectionsEmitted = false;
528  // We need to call the parent's one explicitly.
530 }
531 
532 // Force static initialization.
536 }
i
i
Definition: README.txt:29
AsmPrinter.h
llvm::SPIRV::ModuleSectionType
ModuleSectionType
Definition: SPIRVModuleAnalysis.h:33
llvm::MachineOperand::MO_BlockAddress
@ MO_BlockAddress
Address of a basic block.
Definition: MachineOperand.h:62
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:108
MachineInstr.h
llvm::MachineOperand::MO_Immediate
@ MO_Immediate
Immediate operand.
Definition: MachineOperand.h:52
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
SPIRVModuleAnalysis.h
llvm::NamedMDNode
A tuple of MDNodes.
Definition: Metadata.h:1588
llvm::User::operands
op_range operands()
Definition: User.h:242
llvm::SPIRV::MB_TypeConstVars
@ MB_TypeConstVars
Definition: SPIRVModuleAnalysis.h:40
llvm::MachineOperand::getGlobal
const GlobalValue * getGlobal() const
Definition: MachineOperand.h:572
llvm::GlobalValue::dropLLVMManglingEscape
static StringRef dropLLVMManglingEscape(StringRef Name)
If the given string begins with the GlobalValue name mangling escape character '\1',...
Definition: GlobalValue.h:562
llvm::MCOperand::createImm
static MCOperand createImm(int64_t Val)
Definition: MCInst.h:141
llvm::Function
Definition: Function.h:60
llvm::MachineOperand::getBlockAddress
const BlockAddress * getBlockAddress() const
Definition: MachineOperand.h:577
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::GlobalVariable
Definition: GlobalVariable.h:39
ValueTracking.h
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
DenseMap.h
llvm::SPIRV::ModuleAnalysisInfo::getFuncReg
Register getFuncReg(const Function *F)
Definition: SPIRVModuleAnalysis.h:154
llvm::SPIRVSubtarget
Definition: SPIRVSubtarget.h:35
printOperand
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Definition: SelectionDAGDumper.cpp:958
llvm::SPIRV::ModuleAnalysisInfo
Definition: SPIRVModuleAnalysis.h:124
SPIRVSubtarget.h
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::SPIRVMCInstLower::lower
void lower(const MachineInstr *MI, MCInst &OutMI, SPIRV::ModuleAnalysisInfo *MAI) const
Definition: SPIRVMCInstLower.cpp:23
llvm::detail::DenseSetImpl< ValueT, DenseMap< ValueT, detail::DenseSetEmpty, DenseMapInfo< ValueT >, detail::DenseSetPair< ValueT > >, DenseMapInfo< ValueT > >::insert
std::pair< iterator, bool > insert(const ValueT &V)
Definition: DenseSet.h:206
llvm::FixedVectorType
Class to represent fixed width SIMD vectors.
Definition: DerivedTypes.h:525
SPIRVTargetInfo.h
llvm::MachineOperand::MO_Register
@ MO_Register
Register operand.
Definition: MachineOperand.h:51
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::MCInst::setOpcode
void setOpcode(unsigned Op)
Definition: MCInst.h:197
llvm::ARMBuildAttrs::Section
@ Section
Legacy Tags.
Definition: ARMBuildAttributes.h:82
llvm::MachineBasicBlock::getSymbol
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
Definition: MachineBasicBlock.cpp:58
llvm::ConstantInt
This is the shared class of boolean and integer constants.
Definition: Constants.h:79
llvm::AMDGPU::HSAMD::Kernel::Attrs::Key::VecTypeHint
constexpr char VecTypeHint[]
Key for Kernel::Attr::Metadata::mVecTypeHint.
Definition: AMDGPUMetadata.h:132
llvm::addStringImm
void addStringImm(const StringRef &Str, MCInst &Inst)
Definition: SPIRVUtils.cpp:49
llvm::getTheSPIRV32Target
Target & getTheSPIRV32Target()
Definition: SPIRVTargetInfo.cpp:14
llvm::PPCISD::SC
@ SC
CHAIN = SC CHAIN, Imm128 - System call.
Definition: PPCISelLowering.h:419
llvm::MachineOperand::MO_GlobalAddress
@ MO_GlobalAddress
Address of a global value.
Definition: MachineOperand.h:61
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::getImm
int64_t getImm() const
Definition: MachineOperand.h:546
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::SPIRVInstPrinter::getRegisterName
static const char * getRegisterName(unsigned RegNo)
StorageClass
COFF::SymbolStorageClass StorageClass
Definition: COFFYAML.cpp:361
Y
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
llvm::MDNode::operands
ArrayRef< MDOperand > operands() const
Definition: Metadata.h:1290
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
MCSymbol.h
llvm::SPIRVModuleAnalysis::MAI
static struct SPIRV::ModuleAnalysisInfo MAI
Definition: SPIRVModuleAnalysis.h:205
SPIRVInstPrinter.h
MCInst.h
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
llvm::IntegerType
Class to represent integer types.
Definition: DerivedTypes.h:40
llvm::ConstantArray
ConstantArray - Constant Array Declarations.
Definition: Constants.h:410
SPIRVUtils.h
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:145
llvm::SPIRV::MB_Annotations
@ MB_Annotations
Definition: SPIRVModuleAnalysis.h:39
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::getConstantStringInfo
bool getConstantStringInfo(const Value *V, StringRef &Str, bool TrimAtNul=true)
This function computes the length of a null-terminated C string pointed to by V.
Definition: ValueTracking.cpp:4321
llvm::MCSymbol::getName
StringRef getName() const
getName - Get the symbol name.
Definition: MCSymbol.h:198
isFuncOrHeaderInstr
static bool isFuncOrHeaderInstr(const MachineInstr *MI, const SPIRVInstrInfo *TII)
Definition: SPIRVAsmPrinter.cpp:209
llvm::SPIRV::MB_DebugModuleProcessed
@ MB_DebugModuleProcessed
Definition: SPIRVModuleAnalysis.h:38
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::MCInst::addOperand
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
llvm::getMDOperandAsType
Type * getMDOperandAsType(const MDNode *N, unsigned I)
Definition: SPIRVUtils.cpp:239
llvm::SPIRV::MB_ExtFuncDecls
@ MB_ExtFuncDecls
Definition: SPIRVModuleAnalysis.h:41
SPIRVTargetMachine.h
llvm::DenseSet
Implements a dense probed hash-table based set.
Definition: DenseSet.h:268
SPIRVInstrInfo.h
llvm::RISCVFenceField::O
@ O
Definition: RISCVBaseInfo.h:264
llvm::MipsISD::Ext
@ Ext
Definition: MipsISelLowering.h:159
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:127
llvm::ARM_MB::ST
@ ST
Definition: ARMBaseInfo.h:73
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
I
#define I(x, y, z)
Definition: MD5.cpp:58
MachineConstantPool.h
llvm::MachineOperand::getType
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
Definition: MachineOperand.h:218
MachineFunctionPass.h
llvm::Type::isHalfTy
bool isHalfTy() const
Return true if this is 'half', a 16-bit IEEE fp type.
Definition: Type.h:142
llvm::MachineOperand::getFPImm
const ConstantFP * getFPImm() const
Definition: MachineOperand.h:556
SPIRV.h
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:76
llvm::SPIRV::MB_DebugNames
@ MB_DebugNames
Definition: SPIRVModuleAnalysis.h:37
MachineModuleInfo.h
llvm::MachineOperand::MO_FPImmediate
@ MO_FPImmediate
Floating-point immediate operand.
Definition: MachineOperand.h:54
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:359
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::MDNode
Metadata node.
Definition: Metadata.h:944
getOpcode
static std::optional< unsigned > getOpcode(ArrayRef< VPValue * > Values)
Returns the opcode of Values or ~0 if they do not all agree.
Definition: VPlanSLP.cpp:191
llvm::ConstantStruct
Definition: Constants.h:442
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::MachineOperand::MO_JumpTableIndex
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
Definition: MachineOperand.h:59
llvm::SPIRVInstrInfo
Definition: SPIRVInstrInfo.h:24
llvm::MachineOperand::getMBB
MachineBasicBlock * getMBB() const
Definition: MachineOperand.h:561
llvm::MachineBasicBlock::getNumber
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
Definition: MachineBasicBlock.h:1115
MCAsmInfo.h
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::AsmPrinter::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
Record analysis usage.
Definition: AsmPrinter.cpp:425
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::MCOperand::createReg
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:134
llvm::AnalysisUsage::addPreserved
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
Definition: PassAnalysisSupport.h:98
llvm::MachineOperand::MO_MachineBasicBlock
@ MO_MachineBasicBlock
MachineBasicBlock reference.
Definition: MachineOperand.h:55
llvm::SPIRVModuleAnalysis
Definition: SPIRVModuleAnalysis.h:197
llvm::ifs::IFSSymbolType::Func
@ Func
llvm::getTheSPIRV64Target
Target & getTheSPIRV64Target()
Definition: SPIRVTargetInfo.cpp:18
llvm::getExtInstSetName
std::string getExtInstSetName(SPIRV::InstructionSet::InstructionSet Set)
Definition: SPIRVBaseInfo.cpp:177
llvm::SPIRVTargetMachine
Definition: SPIRVTargetMachine.h:20
llvm::Value::stripPointerCasts
const Value * stripPointerCasts() const
Strip off pointer casts, all-zero GEPs and address space casts.
Definition: Value.cpp:685
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::Type::isFloatTy
bool isFloatTy() const
Return true if this is 'float', a 32-bit IEEE fp type.
Definition: Type.h:153
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::MachineOperand::MO_ExternalSymbol
@ MO_ExternalSymbol
Name of external global symbol.
Definition: MachineOperand.h:60
LLVMInitializeSPIRVAsmPrinter
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSPIRVAsmPrinter()
Definition: SPIRVAsmPrinter.cpp:533
llvm::Type::isDoubleTy
bool isDoubleTy() const
Return true if this is 'double', a 64-bit IEEE fp type.
Definition: Type.h:156
llvm::AsmPrinter
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:84
addOpsFromMDNode
static void addOpsFromMDNode(MDNode *MDN, MCInst &Inst, SPIRV::ModuleAnalysisInfo *MAI)
Definition: SPIRVAsmPrinter.cpp:389
llvm::getSymbolicOperandMnemonic
std::string getSymbolicOperandMnemonic(SPIRV::OperandCategory::OperandCategory Category, int32_t Value)
Definition: SPIRVBaseInfo.cpp:57
SPIRVMCInstLower.h
llvm::SPIRV::MB_EntryPoints
@ MB_EntryPoints
Definition: SPIRVModuleAnalysis.h:35
llvm::MachineOperand::getSymbolName
const char * getSymbolName() const
Definition: MachineOperand.h:617
llvm::Register::isValid
bool isValid() const
Definition: Register.h:126
MCStreamer.h
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::AnalysisUsage::addRequired
AnalysisUsage & addRequired()
Definition: PassAnalysisSupport.h:75
llvm::RegisterAsmPrinter
RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...
Definition: TargetRegistry.h:1419
llvm::User::getOperand
Value * getOperand(unsigned i) const
Definition: User.h:169
raw_ostream.h
TargetRegistry.h
CU
Definition: AArch64AsmBackend.cpp:504
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::SPIRVMCInstLower
Definition: SPIRVMCInstLower.h:22
encodeVecTypeHint
static unsigned encodeVecTypeHint(Type *Ty)
Definition: SPIRVAsmPrinter.cpp:360
llvm::MDOperand
Tracking metadata reference owned by Metadata.
Definition: Metadata.h:773
llvm::MachineOperand::MO_ConstantPoolIndex
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
Definition: MachineOperand.h:57
llvm::AsmPrinter::doInitialization
bool doInitialization(Module &M) override
Set up the AsmPrinter when we are working on a new module.
Definition: AsmPrinter.cpp:432
TargetLoweringObjectFileImpl.h