LLVM  13.0.0git
Classes | Public Member Functions | Public Attributes | List of all members
llvm::HexagonSubtarget Class Reference

#include "Target/Hexagon/HexagonSubtarget.h"

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Classes

struct  BankConflictMutation
 
struct  CallMutation
 
struct  HVXMemLatencyMutation
 
struct  UsrOverflowMutation
 

Public Member Functions

 HexagonSubtarget (const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM)
 
const Triple & getTargetTriple () const
 
bool isEnvironmentMusl () const
 
const InstrItineraryData * getInstrItineraryData () const override
 getInstrItins - Return the instruction itineraries based on subtarget selection. More...
 
const HexagonInstrInfo * getInstrInfo () const override
 
const HexagonRegisterInfo * getRegisterInfo () const override
 
const HexagonTargetLowering * getTargetLowering () const override
 
const HexagonFrameLowering * getFrameLowering () const override
 
const HexagonSelectionDAGInfo * getSelectionDAGInfo () const override
 
HexagonSubtarget & initializeSubtargetDependencies (StringRef CPU, StringRef FS)
 
void ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
 ParseSubtargetFeatures - Parses features string setting specified subtarget options. More...
 
bool hasV5Ops () const
 
bool hasV5OpsOnly () const
 
bool hasV55Ops () const
 
bool hasV55OpsOnly () const
 
bool hasV60Ops () const
 
bool hasV60OpsOnly () const
 
bool hasV62Ops () const
 
bool hasV62OpsOnly () const
 
bool hasV65Ops () const
 
bool hasV65OpsOnly () const
 
bool hasV66Ops () const
 
bool hasV66OpsOnly () const
 
bool hasV67Ops () const
 
bool hasV67OpsOnly () const
 
bool hasV68Ops () const
 
bool hasV68OpsOnly () const
 
bool useAudioOps () const
 
bool useCompound () const
 
bool useLongCalls () const
 
bool useMemops () const
 
bool usePackets () const
 
bool useNewValueJumps () const
 
bool useNewValueStores () const
 
bool useSmallData () const
 
bool useUnsafeMath () const
 
bool useZRegOps () const
 
bool isTinyCore () const
 
bool isTinyCoreWithDuplex () const
 
bool useHVXOps () const
 
bool useHVXV60Ops () const
 
bool useHVXV62Ops () const
 
bool useHVXV65Ops () const
 
bool useHVXV66Ops () const
 
bool useHVXV67Ops () const
 
bool useHVXV68Ops () const
 
bool useHVX128BOps () const
 
bool useHVX64BOps () const
 
bool hasMemNoShuf () const
 
bool hasReservedR19 () const
 
bool usePredicatedCalls () const
 
bool noreturnStackElim () const
 
bool useBSBScheduling () const
 
bool enableMachineScheduler () const override
 
bool enableMachineSchedDefaultSched () const override
 
AntiDepBreakMode getAntiDepBreakMode () const override
 
bool enablePostRAScheduler () const override
 True if the subtarget should run a scheduler after register allocation. More...
 
bool enableSubRegLiveness () const override
 
const std::string & getCPUString () const
 
const Hexagon::ArchEnum & getHexagonArchVersion () const
 
void getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
 
void getSMSMutations (std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
 
bool useAA () const override
 Enable use of alias analysis during code generation (during MI scheduling, DAGCombine, etc.). More...
 
void adjustSchedDependency (SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep) const override
 Perform target specific adjustments to the latency of a schedule dependency. More...
 
unsigned getVectorLength () const
 
ArrayRef< MVT > getHVXElementTypes () const
 
bool isHVXElementType (MVT Ty, bool IncludeBool=false) const
 
bool isHVXVectorType (MVT VecTy, bool IncludeBool=false) const
 
bool isTypeForHVX (Type *VecTy, bool IncludeBool=false) const
 
unsigned getTypeAlignment (MVT Ty) const
 
unsigned getL1CacheLineSize () const
 
unsigned getL1PrefetchDistance () const
 

Public Attributes

Hexagon::ArchEnum HexagonArchVersion
 
Hexagon::ArchEnum HexagonHVXVersion = Hexagon::ArchEnum::NoArch
 
CodeGenOpt::Level OptLevel
 
bool UseBSBScheduling
 True if the target should use Back-Skip-Back scheduling. More...
 

Detailed Description

Definition at line 42 of file HexagonSubtarget.h.

Constructor & Destructor Documentation

◆ HexagonSubtarget()

HexagonSubtarget::HexagonSubtarget ( const Triple &  TT,
StringRef  CPU,
StringRef  FS,
const TargetMachine &  TM 
)

Definition at line 78 of file HexagonSubtarget.cpp.

References llvm::Hexagon_MC::addArchSubtarget(), assert(), llvm::X86AS::FS, llvm::InstrItineraryData::Itineraries, and string.

Member Function Documentation

◆ adjustSchedDependency()

void HexagonSubtarget::adjustSchedDependency ( SUnit *  Def,
int  DefOpIdx,
SUnit *  Use,
int  UseOpIdx,
SDep &  Dep 
) const
override

Perform target specific adjustments to the latency of a schedule dependency.

Definition at line 389 of file HexagonSubtarget.cpp.

References llvm::HexagonInstrInfo::canExecuteInBundle(), llvm::SmallSet< T, N, C >::clear(), llvm::M68kBeads::DReg, EnableDotCurSched, llvm::SUnit::getInstr(), getInstrInfo(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::MachineOperand::getReg(), hasV60Ops(), llvm::MachineInstr::isCopy(), llvm::SUnit::isInstr(), llvm::MachineOperand::isReg(), llvm::MachineInstr::isRegSequence(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), llvm::MachineOperand::isUse(), llvm::max(), llvm::SUnit::NumSuccs, llvm::SDep::setLatency(), and llvm::SUnit::Succs.

◆ enableMachineSchedDefaultSched()

bool llvm::HexagonSubtarget::enableMachineSchedDefaultSched ( ) const
inlineoverride

Definition at line 239 of file HexagonSubtarget.h.

◆ enableMachineScheduler()

bool HexagonSubtarget::enableMachineScheduler ( ) const
override

Definition at line 462 of file HexagonSubtarget.cpp.

References DisableHexagonMISched, and llvm::cl::Option::getNumOccurrences().

◆ enablePostRAScheduler()

bool llvm::HexagonSubtarget::enablePostRAScheduler ( ) const
inlineoverride

True if the subtarget should run a scheduler after register allocation.

Definition at line 246 of file HexagonSubtarget.h.

◆ enableSubRegLiveness()

bool HexagonSubtarget::enableSubRegLiveness ( ) const
override

Definition at line 659 of file HexagonSubtarget.cpp.

References EnableSubregLiveness.

◆ getAntiDepBreakMode()

AntiDepBreakMode llvm::HexagonSubtarget::getAntiDepBreakMode ( ) const
inlineoverride

Definition at line 243 of file HexagonSubtarget.h.

◆ getCPUString()

const std::string& llvm::HexagonSubtarget::getCPUString ( ) const
inline

Definition at line 250 of file HexagonSubtarget.h.

◆ getFrameLowering()

const HexagonFrameLowering* llvm::HexagonSubtarget::getFrameLowering ( ) const
inlineoverride

Definition at line 126 of file HexagonSubtarget.h.

Referenced by llvm::HexagonDAGToDAGISel::emitFunctionEntryCode(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerVASTART(), llvm::HexagonDAGToDAGISel::SelectAddrFI(), and llvm::HexagonDAGToDAGISel::SelectFrameIndex().

◆ getHexagonArchVersion()

const Hexagon::ArchEnum& llvm::HexagonSubtarget::getHexagonArchVersion ( ) const
inline

Definition at line 252 of file HexagonSubtarget.h.

References HexagonArchVersion.

Referenced by hasV55Ops(), hasV55OpsOnly(), hasV5Ops(), hasV5OpsOnly(), hasV60Ops(), hasV60OpsOnly(), hasV62Ops(), hasV62OpsOnly(), hasV65Ops(), hasV65OpsOnly(), hasV66Ops(), hasV66OpsOnly(), hasV67Ops(), hasV67OpsOnly(), hasV68Ops(), and hasV68OpsOnly().

◆ getHVXElementTypes()

ArrayRef<MVT> llvm::HexagonSubtarget::getHVXElementTypes ( ) const
inline

Definition at line 282 of file HexagonSubtarget.h.

References llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, and llvm::makeArrayRef().

Referenced by isHVXElementType(), and isHVXVectorType().

◆ getInstrInfo()

const HexagonInstrInfo* llvm::HexagonSubtarget::getInstrInfo ( ) const
inlineoverride

Definition at line 119 of file HexagonSubtarget.h.

Referenced by adjustSchedDependency(), llvm::HexagonSubtarget::CallMutation::apply(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::HexagonAsmPrinter::emitInstruction(), llvm::HexagonTargetLowering::getPostIndexedAddressParts(), llvm::VLIWResourceModel::isResourceAvailable(), llvm::HexagonDAGToDAGISel::runOnMachineFunction(), and llvm::ConvergingVLIWScheduler::SchedulingCost().

◆ getInstrItineraryData()

const InstrItineraryData* llvm::HexagonSubtarget::getInstrItineraryData ( ) const
inlineoverride

getInstrItins - Return the instruction itineraries based on subtarget selection.

Definition at line 116 of file HexagonSubtarget.h.

Referenced by llvm::HexagonInstrInfo::getUnits().

◆ getL1CacheLineSize()

unsigned HexagonSubtarget::getL1CacheLineSize ( ) const

Definition at line 651 of file HexagonSubtarget.cpp.

Referenced by llvm::HexagonTTIImpl::getCacheLineSize().

◆ getL1PrefetchDistance()

unsigned HexagonSubtarget::getL1PrefetchDistance ( ) const

Definition at line 655 of file HexagonSubtarget.cpp.

Referenced by llvm::HexagonTTIImpl::getPrefetchDistance().

◆ getPostRAMutations()

void HexagonSubtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation >> &  Mutations) const
override

Definition at line 446 of file HexagonSubtarget.cpp.

◆ getRegisterInfo()

const HexagonRegisterInfo* llvm::HexagonSubtarget::getRegisterInfo ( ) const
inlineoverride

Definition at line 120 of file HexagonSubtarget.h.

Referenced by llvm::HexagonInstrInfo::ClobbersPredicate(), llvm::HexagonInstrInfo::copyPhysReg(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::HexagonInstrInfo::getDuplexCandidateGroup(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::HexagonInstrInfo::isDependent(), llvm::HexagonTargetLowering::LowerCall(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerINLINEASM(), llvm::HexagonTargetLowering::LowerRETURNADDR(), and llvm::HexagonDAGToDAGISel::runOnMachineFunction().

◆ getSelectionDAGInfo()

const HexagonSelectionDAGInfo* llvm::HexagonSubtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 129 of file HexagonSubtarget.h.

◆ getSMSMutations()

void HexagonSubtarget::getSMSMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation >> &  Mutations) const
override

Definition at line 453 of file HexagonSubtarget.cpp.

◆ getTargetLowering()

const HexagonTargetLowering* llvm::HexagonSubtarget::getTargetLowering ( ) const
inlineoverride

Definition at line 123 of file HexagonSubtarget.h.

Referenced by isTypeForHVX().

◆ getTargetTriple()

const Triple& llvm::HexagonSubtarget::getTargetTriple ( ) const
inline

Definition at line 109 of file HexagonSubtarget.h.

◆ getTypeAlignment()

unsigned llvm::HexagonSubtarget::getTypeAlignment ( MVT  Ty) const
inline

Definition at line 291 of file HexagonSubtarget.h.

References llvm::MVT::getSizeInBits(), getVectorLength(), and isHVXVectorType().

Referenced by llvm::HexagonTargetLowering::LowerStore(), and llvm::HexagonTargetLowering::LowerUnalignedLoad().

◆ getVectorLength()

unsigned llvm::HexagonSubtarget::getVectorLength ( ) const
inline

Definition at line 273 of file HexagonSubtarget.h.

References assert(), llvm_unreachable, useHVX128BOps(), useHVX64BOps(), and useHVXOps().

Referenced by llvm::HexagonTTIImpl::getMinimumVF(), llvm::HexagonTTIImpl::getMinVectorRegisterBitWidth(), getTypeAlignment(), isHVXVectorType(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::HvxSelector::selectRor(), and llvm::HexagonDAGToDAGISel::SelectV2Q().

◆ hasMemNoShuf()

bool llvm::HexagonSubtarget::hasMemNoShuf ( ) const
inline

Definition at line 227 of file HexagonSubtarget.h.

◆ hasReservedR19()

bool llvm::HexagonSubtarget::hasReservedR19 ( ) const
inline

Definition at line 228 of file HexagonSubtarget.h.

Referenced by llvm::HexagonRegisterInfo::getReservedRegs().

◆ hasV55Ops()

bool llvm::HexagonSubtarget::hasV55Ops ( ) const
inline

Definition at line 146 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V55.

◆ hasV55OpsOnly()

bool llvm::HexagonSubtarget::hasV55OpsOnly ( ) const
inline

Definition at line 149 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V55.

◆ hasV5Ops()

bool llvm::HexagonSubtarget::hasV5Ops ( ) const
inline

Definition at line 140 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V5.

◆ hasV5OpsOnly()

bool llvm::HexagonSubtarget::hasV5OpsOnly ( ) const
inline

Definition at line 143 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V5.

◆ hasV60Ops()

bool llvm::HexagonSubtarget::hasV60Ops ( ) const
inline

Definition at line 152 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V60.

Referenced by adjustSchedDependency(), llvm::HexagonInstrInfo::getDotOldOp(), llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), llvm::HexagonTargetLowering::HexagonTargetLowering(), initializeSubtargetDependencies(), llvm::HexagonTargetLowering::LowerCall(), and llvm::HexagonInstrInfo::mayBeCurLoad().

◆ hasV60OpsOnly()

bool llvm::HexagonSubtarget::hasV60OpsOnly ( ) const
inline

Definition at line 155 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V60.

Referenced by cannotCoexistAsymm().

◆ hasV62Ops()

bool llvm::HexagonSubtarget::hasV62Ops ( ) const
inline

Definition at line 158 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V62.

Referenced by llvm::HexagonInstrInfo::isPredicable().

◆ hasV62OpsOnly()

bool llvm::HexagonSubtarget::hasV62OpsOnly ( ) const
inline

Definition at line 161 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V62.

◆ hasV65Ops()

bool llvm::HexagonSubtarget::hasV65Ops ( ) const
inline

Definition at line 164 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V65.

Referenced by llvm::HexagonPacketizerList::isLegalToPacketizeTogether().

◆ hasV65OpsOnly()

bool llvm::HexagonSubtarget::hasV65OpsOnly ( ) const
inline

Definition at line 167 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V65.

◆ hasV66Ops()

bool llvm::HexagonSubtarget::hasV66Ops ( ) const
inline

Definition at line 170 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V66.

Referenced by llvm::HexagonTargetLowering::HexagonTargetLowering().

◆ hasV66OpsOnly()

bool llvm::HexagonSubtarget::hasV66OpsOnly ( ) const
inline

Definition at line 173 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V66.

◆ hasV67Ops()

bool llvm::HexagonSubtarget::hasV67Ops ( ) const
inline

Definition at line 176 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V67.

Referenced by llvm::HexagonTargetLowering::HexagonTargetLowering().

◆ hasV67OpsOnly()

bool llvm::HexagonSubtarget::hasV67OpsOnly ( ) const
inline

Definition at line 179 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V67.

◆ hasV68Ops()

bool llvm::HexagonSubtarget::hasV68Ops ( ) const
inline

Definition at line 182 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V68.

◆ hasV68OpsOnly()

bool llvm::HexagonSubtarget::hasV68OpsOnly ( ) const
inline

Definition at line 185 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V68.

◆ initializeSubtargetDependencies()

HexagonSubtarget & HexagonSubtarget::initializeSubtargetDependencies ( StringRef  CPU,
StringRef  FS 
)

Definition at line 93 of file HexagonSubtarget.cpp.

References llvm::Hexagon_MC::completeHVXFeatures(), llvm::Hexagon::CpuTable, EnableBSBSched, llvm::X86AS::FS, llvm::Hexagon::GetCpu(), llvm::cl::Option::getPosition(), hasV60Ops(), HexagonArchVersion, llvm::HexagonDisableDuplex, isTinyCore(), llvm_unreachable, OverrideLongCalls, ParseSubtargetFeatures(), llvm::FeatureBitset::reset(), and UseBSBScheduling.

◆ isEnvironmentMusl()

bool llvm::HexagonSubtarget::isEnvironmentMusl ( ) const
inline

Definition at line 110 of file HexagonSubtarget.h.

References llvm::Triple::getEnvironment(), and llvm::Triple::Musl.

Referenced by llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::HexagonTargetLowering::LowerCall(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerVACOPY(), and llvm::HexagonTargetLowering::LowerVASTART().

◆ isHVXElementType()

bool HexagonSubtarget::isHVXElementType ( MVT  Ty,
bool  IncludeBool = false 
) const

Definition at line 128 of file HexagonSubtarget.cpp.

References getHVXElementTypes(), llvm::MVT::getVectorElementType(), llvm::MVT::i1, llvm::is_contained(), llvm::MVT::isVector(), and useHVXOps().

◆ isHVXVectorType()

bool HexagonSubtarget::isHVXVectorType ( MVT  VecTy,
bool  IncludeBool = false 
) const

Definition at line 139 of file HexagonSubtarget.cpp.

References getHVXElementTypes(), llvm::MVT::getSizeInBits(), llvm::MVT::getVectorElementType(), getVectorLength(), llvm::MVT::getVectorNumElements(), llvm::MVT::i1, llvm::is_contained(), llvm::MVT::isScalableVector(), llvm::MVT::isVector(), T, and useHVXOps().

Referenced by llvm::HexagonTargetLowering::allowsMemoryAccess(), llvm::HexagonTargetLowering::allowsMisalignedMemoryAccesses(), llvm::HexagonTargetLowering::getPostIndexedAddressParts(), getTypeAlignment(), isTypeForHVX(), llvm::HexagonTargetLowering::LowerCall(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), and llvm::HexagonDAGToDAGISel::SelectVAlign().

◆ isTinyCore()

bool llvm::HexagonSubtarget::isTinyCore ( ) const
inline

Definition at line 200 of file HexagonSubtarget.h.

Referenced by initializeSubtargetDependencies(), and isTinyCoreWithDuplex().

◆ isTinyCoreWithDuplex()

bool llvm::HexagonSubtarget::isTinyCoreWithDuplex ( ) const
inline

Definition at line 201 of file HexagonSubtarget.h.

References isTinyCore().

◆ isTypeForHVX()

bool HexagonSubtarget::isTypeForHVX ( Type *  VecTy,
bool  IncludeBool = false 
) const

Definition at line 165 of file HexagonSubtarget.cpp.

References llvm::EVT::getEVT(), llvm::HexagonTargetLowering::getPreferredVectorAction(), llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), getTargetLowering(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::MVT::getVectorVT(), isHVXVectorType(), llvm::EVT::isSimple(), llvm::MVT::isValid(), llvm::Type::isVectorTy(), llvm::PowerOf2Ceil(), and llvm::TargetLoweringBase::TypeWidenVector.

Referenced by llvm::HexagonTTIImpl::getMemoryOpCost(), llvm::HexagonTTIImpl::isLegalMaskedLoad(), and llvm::HexagonTTIImpl::isLegalMaskedStore().

◆ noreturnStackElim()

bool llvm::HexagonSubtarget::noreturnStackElim ( ) const
inline

Definition at line 231 of file HexagonSubtarget.h.

◆ ParseSubtargetFeatures()

void llvm::HexagonSubtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS 
)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

Referenced by initializeSubtargetDependencies().

◆ useAA()

bool HexagonSubtarget::useAA ( ) const
override

Enable use of alias analysis during code generation (during MI scheduling, DAGCombine, etc.).

Definition at line 381 of file HexagonSubtarget.cpp.

References llvm::CodeGenOpt::None, and OptLevel.

◆ useAudioOps()

bool llvm::HexagonSubtarget::useAudioOps ( ) const
inline

Definition at line 189 of file HexagonSubtarget.h.

◆ useBSBScheduling()

bool llvm::HexagonSubtarget::useBSBScheduling ( ) const
inline

Definition at line 233 of file HexagonSubtarget.h.

References UseBSBScheduling.

◆ useCompound()

bool llvm::HexagonSubtarget::useCompound ( ) const
inline

Definition at line 190 of file HexagonSubtarget.h.

Referenced by llvm::HexagonDAGToDAGISel::SelectVAlign().

◆ useHVX128BOps()

bool llvm::HexagonSubtarget::useHVX128BOps ( ) const
inline

Definition at line 224 of file HexagonSubtarget.h.

References useHVXOps().

Referenced by llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), and getVectorLength().

◆ useHVX64BOps()

bool llvm::HexagonSubtarget::useHVX64BOps ( ) const
inline

Definition at line 225 of file HexagonSubtarget.h.

References useHVXOps().

Referenced by getVectorLength().

◆ useHVXOps()

bool llvm::HexagonSubtarget::useHVXOps ( ) const
inline

Definition at line 203 of file HexagonSubtarget.h.

References HexagonHVXVersion, and llvm::Hexagon::NoArch.

Referenced by llvm::HexagonTargetLowering::CanLowerReturn(), llvm::HexagonTargetLowering::getConstraintType(), llvm::HexagonTargetLowering::getPreferredVectorAction(), getVectorLength(), llvm::HexagonTargetLowering::HexagonTargetLowering(), isHVXElementType(), isHVXVectorType(), llvm::HexagonTargetLowering::LowerCall(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerReturn(), llvm::HexagonDAGToDAGISel::Select(), llvm::HexagonRegisterInfo::shouldCoalesce(), useHVX128BOps(), and useHVX64BOps().

◆ useHVXV60Ops()

bool llvm::HexagonSubtarget::useHVXV60Ops ( ) const
inline

Definition at line 206 of file HexagonSubtarget.h.

References HexagonHVXVersion, and llvm::Hexagon::V60.

◆ useHVXV62Ops()

bool llvm::HexagonSubtarget::useHVXV62Ops ( ) const
inline

Definition at line 209 of file HexagonSubtarget.h.

References HexagonHVXVersion, and llvm::Hexagon::V62.

◆ useHVXV65Ops()

bool llvm::HexagonSubtarget::useHVXV65Ops ( ) const
inline

Definition at line 212 of file HexagonSubtarget.h.

References HexagonHVXVersion, and llvm::Hexagon::V65.

◆ useHVXV66Ops()

bool llvm::HexagonSubtarget::useHVXV66Ops ( ) const
inline

Definition at line 215 of file HexagonSubtarget.h.

References HexagonHVXVersion, and llvm::Hexagon::V66.

◆ useHVXV67Ops()

bool llvm::HexagonSubtarget::useHVXV67Ops ( ) const
inline

Definition at line 218 of file HexagonSubtarget.h.

References HexagonHVXVersion, and llvm::Hexagon::V67.

◆ useHVXV68Ops()

bool llvm::HexagonSubtarget::useHVXV68Ops ( ) const
inline

Definition at line 221 of file HexagonSubtarget.h.

References HexagonHVXVersion, and llvm::Hexagon::V68.

◆ useLongCalls()

bool llvm::HexagonSubtarget::useLongCalls ( ) const
inline

Definition at line 191 of file HexagonSubtarget.h.

◆ useMemops()

bool llvm::HexagonSubtarget::useMemops ( ) const
inline

Definition at line 192 of file HexagonSubtarget.h.

◆ useNewValueJumps()

bool llvm::HexagonSubtarget::useNewValueJumps ( ) const
inline

Definition at line 194 of file HexagonSubtarget.h.

◆ useNewValueStores()

bool llvm::HexagonSubtarget::useNewValueStores ( ) const
inline

Definition at line 195 of file HexagonSubtarget.h.

Referenced by llvm::HexagonInstrInfo::mayBeNewStore().

◆ usePackets()

bool llvm::HexagonSubtarget::usePackets ( ) const
inline

Definition at line 193 of file HexagonSubtarget.h.

◆ usePredicatedCalls()

bool HexagonSubtarget::usePredicatedCalls ( ) const

Definition at line 468 of file HexagonSubtarget.cpp.

References EnablePredicatedCalls.

Referenced by llvm::HexagonInstrInfo::isPredicable().

◆ useSmallData()

bool llvm::HexagonSubtarget::useSmallData ( ) const
inline

Definition at line 196 of file HexagonSubtarget.h.

Referenced by llvm::HexagonTargetLowering::LowerGLOBALADDRESS().

◆ useUnsafeMath()

bool llvm::HexagonSubtarget::useUnsafeMath ( ) const
inline

Definition at line 197 of file HexagonSubtarget.h.

◆ useZRegOps()

bool llvm::HexagonSubtarget::useZRegOps ( ) const
inline

Definition at line 198 of file HexagonSubtarget.h.

Member Data Documentation

◆ HexagonArchVersion

Hexagon::ArchEnum llvm::HexagonSubtarget::HexagonArchVersion

Definition at line 66 of file HexagonSubtarget.h.

Referenced by getHexagonArchVersion(), and initializeSubtargetDependencies().

◆ HexagonHVXVersion

Hexagon::ArchEnum llvm::HexagonSubtarget::HexagonHVXVersion = Hexagon::ArchEnum::NoArch

Definition at line 67 of file HexagonSubtarget.h.

Referenced by useHVXOps(), useHVXV60Ops(), useHVXV62Ops(), useHVXV65Ops(), useHVXV66Ops(), useHVXV67Ops(), and useHVXV68Ops().

◆ OptLevel

CodeGenOpt::Level llvm::HexagonSubtarget::OptLevel

Definition at line 68 of file HexagonSubtarget.h.

Referenced by useAA().

◆ UseBSBScheduling

bool llvm::HexagonSubtarget::UseBSBScheduling

True if the target should use Back-Skip-Back scheduling.

This is the default for V60.

Definition at line 71 of file HexagonSubtarget.h.

Referenced by initializeSubtargetDependencies(), and useBSBScheduling().

The documentation for this class was generated from the following files:
Generated on Wed May 12 2021 05:44:26 for LLVM by   doxygen 1.8.17