#include "Target/PowerPC/PPCRegisterInfo.h"

Inheritance diagram for llvm::PPCRegisterInfo:

Public Member Functions
	PPCRegisterInfo (const PPCTargetMachine &TM)
unsigned	getMappedIdxOpcForImmOpc (unsigned ImmOpcode) const
	getMappedIdxOpcForImmOpc - Return the mapped index form load/store opcode for a given imm form load/store opcode `ImmFormOpcode`.
const TargetRegisterClass *	getPointerRegClass (unsigned Kind=0) const override
	getPointerRegClass - Return the register class to use to hold pointers.
const TargetRegisterClass *	getCrossCopyRegClass (const TargetRegisterClass *RC) const override
unsigned	getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
const TargetRegisterClass *	getLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &MF) const override
const MCPhysReg *	getCalleeSavedRegs (const MachineFunction *MF) const override
	Code Generation virtual methods...
const uint32_t *	getCallPreservedMask (const MachineFunction &MF, CallingConv::ID CC) const override
const uint32_t *	getNoPreservedMask () const override
void	adjustStackMapLiveOutMask (uint32_t *Mask) const override
BitVector	getReservedRegs (const MachineFunction &MF) const override
bool	isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override
bool	isCallerPreservedPhysReg (MCRegister PhysReg, const MachineFunction &MF) const override
bool	getRegAllocationHints (Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap VRM, const LiveRegMatrix Matrix) const override
bool	requiresRegisterScavenging (const MachineFunction &MF) const override
	We require the register scavenger.
bool	requiresFrameIndexScavenging (const MachineFunction &MF) const override
bool	requiresVirtualBaseRegisters (const MachineFunction &MF) const override
void	lowerDynamicAlloc (MachineBasicBlock::iterator II) const
	lowerDynamicAlloc - Generate the code for allocating an object in the current frame.
void	lowerDynamicAreaOffset (MachineBasicBlock::iterator II) const
void	prepareDynamicAlloca (MachineBasicBlock::iterator II, Register &NegSizeReg, bool &KillNegSizeReg, Register &FramePointer) const
	To accomplish dynamic stack allocation, we have to calculate exact size subtracted from the stack pointer according alignment information and get previous frame pointer.
void	lowerPrepareProbedAlloca (MachineBasicBlock::iterator II) const
void	lowerCRSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	lowerCRSpilling - Generate the code for spilling a CR register.
void	lowerCRRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
void	lowerCRBitSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
void	lowerCRBitRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
void	lowerOctWordSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	Remove any STXVP[X] instructions and split them out into a pair of STXV[X] instructions if –disable-auto-paired-vec-st is specified on the command line.
void	lowerACCSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	lowerACCSpilling - Generate the code for spilling the accumulator register.
void	lowerACCRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	lowerACCRestore - Generate the code to restore the accumulator register.
void	lowerWACCSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	lowerWACCSpilling - Generate the code for spilling the wide accumulator register.
void	lowerWACCRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	lowerWACCRestore - Generate the code to restore the wide accumulator register.
void	lowerQuadwordSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	lowerQuadwordSpilling - Generate code to spill paired general register.
void	lowerQuadwordRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	lowerQuadwordRestore - Generate code to restore paired general register.
void	lowerDMRSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	lowerDMRSpilling - Generate the code for spilling the DMR register.
void	lowerDMRRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
	lowerDMRRestore - Generate the code to restore the DMR register.
bool	hasReservedSpillSlot (const MachineFunction &MF, Register Reg, int &FrameIdx) const override
bool	eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
	Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.
Register	materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override
	Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.
void	resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override
bool	isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override
Register	getFrameRegister (const MachineFunction &MF) const override
Register	getBaseRegister (const MachineFunction &MF) const
bool	hasBasePointer (const MachineFunction &MF) const
bool	isNonallocatableRegisterCalleeSave (MCRegister Reg) const override
bool	isVirtualFrameRegister (MCRegister Reg) const override

Static Public Member Functions
static void	emitAccCopyInfo (MachineBasicBlock &MBB, MCRegister DestReg, MCRegister SrcReg)

Detailed Description

Definition at line 57 of file PPCRegisterInfo.h.

Constructor & Destructor Documentation

◆ PPCRegisterInfo()

PPCRegisterInfo::PPCRegisterInfo ( const PPCTargetMachine & TM )

Definition at line 96 of file PPCRegisterInfo.cpp.

Member Function Documentation

◆ adjustStackMapLiveOutMask()

void PPCRegisterInfo::adjustStackMapLiveOutMask ( uint32_t * Mask ) const

override

Definition at line 346 of file PPCRegisterInfo.cpp.

◆ eliminateFrameIndex()

bool PPCRegisterInfo::eliminateFrameIndex	(	MachineBasicBlock::iterator	II,
		int	SPAdj,
		unsigned	FIOperandNum,
		RegScavenger *	RS = nullptr ) const

override

Definition at line 1673 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BitVector::any(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DisableAutoPairedVecSt, getBaseRegister(), llvm::MachineFunction::getFrameInfo(), llvm::PPCFunctionInfo::getFramePointerSaveIndex(), getFrameRegister(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFrameInfo::getObjectOffset(), getOffsetONFromFION(), llvm::MachineFunction::getRegInfo(), llvm::RegScavenger::getRegsAvailable(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::Function::hasFnAttribute(), II, is64Bit(), llvm::isInt(), llvm::isUInt(), llvm::RegState::Kill, lowerACCRestore(), lowerACCSpilling(), lowerCRBitRestore(), lowerCRBitSpilling(), lowerCRRestore(), lowerCRSpilling(), lowerDMRRestore(), lowerDMRSpilling(), lowerDynamicAlloc(), lowerDynamicAreaOffset(), lowerOctWordSpilling(), lowerPrepareProbedAlloca(), lowerQuadwordRestore(), lowerQuadwordSpilling(), lowerWACCRestore(), lowerWACCSpilling(), MBB, MI, llvm::BitVector::none(), llvm::Offset, offsetMinAlign(), and TII.

◆ emitAccCopyInfo()

void PPCRegisterInfo::emitAccCopyInfo	(	MachineBasicBlock &	MBB,
		MCRegister	DestReg,
		MCRegister	SrcReg )

static

Definition at line 1218 of file PPCRegisterInfo.cpp.

References llvm::dbgs(), MBB, and ReportAccMoves.

Referenced by llvm::PPCInstrInfo::copyPhysReg().

◆ getBaseRegister()

Register PPCRegisterInfo::getBaseRegister ( const MachineFunction & MF ) const

Definition at line 1934 of file PPCRegisterInfo.cpp.

References getFrameRegister(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), and llvm::PPCSubtarget::isSVR4ABI().

Referenced by eliminateFrameIndex(), and needsFrameBaseReg().

◆ getCalleeSavedRegs()

const MCPhysReg * PPCRegisterInfo::getCalleeSavedRegs ( const MachineFunction * MF ) const

override

Code Generation virtual methods...

Definition at line 182 of file PPCRegisterInfo.cpp.

References llvm::CallingConv::AnyReg, llvm::CallingConv::Cold, llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::PPCSubtarget::isAIXABI(), llvm::MachineRegisterInfo::isAllocatable(), llvm::PPCSubtarget::isUsingPCRelativeCalls(), and llvm::report_fatal_error().

◆ getCallPreservedMask()

const uint32_t * PPCRegisterInfo::getCallPreservedMask	(	const MachineFunction &	MF,
		CallingConv::ID	CC ) const

override

Definition at line 275 of file PPCRegisterInfo.cpp.

References llvm::CallingConv::AnyReg, llvm::CallingConv::Cold, llvm::MachineFunction::getSubtarget(), and llvm::PPCSubtarget::isAIXABI().

◆ getCrossCopyRegClass()

const TargetRegisterClass * PPCRegisterInfo::getCrossCopyRegClass ( const TargetRegisterClass * RC ) const

override

Definition at line 628 of file PPCRegisterInfo.cpp.

◆ getFrameRegister()

Register PPCRegisterInfo::getFrameRegister ( const MachineFunction & MF ) const

override

Definition at line 1925 of file PPCRegisterInfo.cpp.

References llvm::TargetFrameLowering::hasFP().

Referenced by eliminateFrameIndex(), and getBaseRegister().

◆ getLargestLegalSuperClass()

const TargetRegisterClass * PPCRegisterInfo::getLargestLegalSuperClass	(	const TargetRegisterClass *	RC,
		const MachineFunction &	MF ) const

override

Definition at line 679 of file PPCRegisterInfo.cpp.

References EnableGPRToVecSpills, llvm::TargetRegisterInfo::getLargestLegalSuperClass(), getRegClass(), llvm::MachineFunction::getSubtarget(), llvm::PPCSubtarget::isAIXABI(), and llvm::TargetRegisterClass::superclasses().

◆ getMappedIdxOpcForImmOpc()

unsigned llvm::PPCRegisterInfo::getMappedIdxOpcForImmOpc ( unsigned ImmOpcode ) const

inline

getMappedIdxOpcForImmOpc - Return the mapped index form load/store opcode for a given imm form load/store opcode ImmFormOpcode.

FIXME: move this to PPCInstrInfo class.

Definition at line 72 of file PPCRegisterInfo.h.

◆ getNoPreservedMask()

const uint32_t * PPCRegisterInfo::getNoPreservedMask ( ) const

override

Definition at line 342 of file PPCRegisterInfo.cpp.

◆ getPointerRegClass()

const TargetRegisterClass * PPCRegisterInfo::getPointerRegClass ( unsigned Kind = 0 ) const

override

getPointerRegClass - Return the register class to use to hold pointers.

This is used for addressing modes.

Definition at line 167 of file PPCRegisterInfo.cpp.

Referenced by materializeFrameBaseRegister().

◆ getRegAllocationHints()

bool PPCRegisterInfo::getRegAllocationHints	(	Register	VirtReg,
		ArrayRef< MCPhysReg >	Order,
		SmallVectorImpl< MCPhysReg > &	Hints,
		const MachineFunction &	MF,
		const VirtRegMap *	VRM,
		const LiveRegMatrix *	Matrix ) const

override

Definition at line 554 of file PPCRegisterInfo.cpp.

References assert(), llvm::TargetRegisterClass::contains(), llvm::VirtRegMap::getPhys(), llvm::MachineOperand::getReg(), llvm::TargetRegisterInfo::getRegAllocationHints(), llvm::MachineFunction::getRegInfo(), llvm::MachineOperand::getSubReg(), llvm::MachineFunction::getSubtarget(), llvm::VirtRegMap::hasPhys(), llvm::Register::isVirtual(), Matrix, MRI, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

◆ getRegPressureLimit()

unsigned PPCRegisterInfo::getRegPressureLimit	(	const TargetRegisterClass *	RC,
		MachineFunction &	MF ) const

override

Definition at line 634 of file PPCRegisterInfo.cpp.

References FP, llvm::TargetRegisterClass::getID(), llvm::MachineFunction::getSubtarget(), llvm::TargetFrameLowering::hasFP(), and llvm::PPCSubtarget::isAIXABI().

◆ getReservedRegs()

BitVector PPCRegisterInfo::getReservedRegs ( const MachineFunction & MF ) const

override

Definition at line 351 of file PPCRegisterInfo.cpp.

References assert(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::MachineFunction::hasInlineAsm(), llvm::PPCSubtarget::is32BitELFABI(), llvm::PPCSubtarget::isAIXABI(), llvm::PPCSubtarget::isSVR4ABI(), llvm::MCRegAliasIterator::isValid(), llvm::Reserved, and llvm::PPCFunctionInfo::usesTOCBasePtr().

Referenced by isAsmClobberable(), and isCallerPreservedPhysReg().

◆ hasBasePointer()

bool PPCRegisterInfo::hasBasePointer ( const MachineFunction & MF ) const

Definition at line 1948 of file PPCRegisterInfo.cpp.

References AlwaysBasePointer, and EnableBasePointer.

Referenced by eliminateFrameIndex(), getBaseRegister(), getReservedRegs(), and llvm::PPCFrameLowering::replaceFPWithRealFP().

◆ hasReservedSpillSlot()

bool PPCRegisterInfo::hasReservedSpillSlot	(	const MachineFunction &	MF,
		Register	Reg,
		int &	FrameIdx ) const

override

Definition at line 1602 of file PPCRegisterInfo.cpp.

References llvm::MachineFunction::getInfo().

◆ isAsmClobberable()

bool PPCRegisterInfo::isAsmClobberable	(	const MachineFunction &	MF,
		MCRegister	PhysReg ) const

override

Definition at line 437 of file PPCRegisterInfo.cpp.

References getReservedRegs(), and llvm::BitVector::test().

◆ isCallerPreservedPhysReg()

bool PPCRegisterInfo::isCallerPreservedPhysReg	(	MCRegister	PhysReg,
		const MachineFunction &	MF ) const

override

Definition at line 531 of file PPCRegisterInfo.cpp.

References assert(), llvm::MachineFunction::getFrameInfo(), getReservedRegs(), llvm::PPCSubtarget::getStackPointerRegister(), llvm::MachineFunction::getSubtarget(), llvm::PPCSubtarget::getTOCPointerRegister(), llvm::PPCSubtarget::is64BitELFABI(), llvm::PPCSubtarget::isAIXABI(), llvm::MCRegister::isPhysical(), StackPtrConst, and test.

◆ isFrameOffsetLegal()

bool PPCRegisterInfo::isFrameOffsetLegal	(	const MachineInstr *	MI,
		Register	BaseReg,
		int64_t	Offset ) const

override

Definition at line 2057 of file PPCRegisterInfo.cpp.

References assert(), getOffsetONFromFION(), llvm::isInt(), MI, llvm::Offset, and offsetMinAlign().

Referenced by needsFrameBaseReg().

◆ isNonallocatableRegisterCalleeSave()

bool llvm::PPCRegisterInfo::isNonallocatableRegisterCalleeSave ( MCRegister Reg ) const

inlineoverride

Definition at line 189 of file PPCRegisterInfo.h.

References Reg.

◆ isVirtualFrameRegister()

bool llvm::PPCRegisterInfo::isVirtualFrameRegister ( MCRegister Reg ) const

inlineoverride

Definition at line 193 of file PPCRegisterInfo.h.

References Reg.

◆ lowerACCRestore()

void PPCRegisterInfo::lowerACCRestore	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

lowerACCRestore - Generate the code to restore the accumulator register.

Definition at line 1359 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), DL, emitAccSpillRestoreInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerACCSpilling()

void PPCRegisterInfo::lowerACCSpilling	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

lowerACCSpilling - Generate the code for spilling the accumulator register.

Similarly to other spills/reloads that use pseudo-ops, we do not actually eliminate the FrameIndex here nor compute the stack offset. We simply create a real instruction with an FI and rely on eliminateFrameIndex to handle the FI elimination.

Definition at line 1310 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DisableAutoPairedVecSt, DL, emitAccSpillRestoreInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MCRegisterInfo::getSubReg(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerCRBitRestore()

void PPCRegisterInfo::lowerCRBitRestore	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

Definition at line 1168 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::getCRFromCRBit(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::RegState::Implicit, llvm::RegState::Kill, MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerCRBitSpilling()

void PPCRegisterInfo::lowerCRBitSpilling	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

◆ lowerCRRestore()

void PPCRegisterInfo::lowerCRRestore	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

Definition at line 1001 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::RegState::Kill, MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerCRSpilling()

void PPCRegisterInfo::lowerCRSpilling	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

lowerCRSpilling - Generate the code for spilling a CR register.

Instead of reserving a whole register (R0), we scrounge for one here. This generates code like this:

mfcr rA ; Move the conditional register into GPR rA. rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot. stw rA, FI ; Store rA to the frame.

Definition at line 956 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::RegState::Kill, MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerDMRRestore()

void PPCRegisterInfo::lowerDMRRestore	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

lowerDMRRestore - Generate the code to restore the DMR register.

Definition at line 1558 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getRegInfo(), llvm::MCRegisterInfo::getSubReg(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), llvm::RegState::Kill, MBB, MI, Opc, and TII.

Referenced by eliminateFrameIndex().

◆ lowerDMRSpilling()

void PPCRegisterInfo::lowerDMRSpilling	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

lowerDMRSpilling - Generate the code for spilling the DMR register.

Definition at line 1513 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getRegInfo(), llvm::MCRegisterInfo::getSubReg(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), llvm::RegState::Kill, MBB, MI, Opc, and TII.

Referenced by eliminateFrameIndex().

◆ lowerDynamicAlloc()

void PPCRegisterInfo::lowerDynamicAlloc ( MachineBasicBlock::iterator II ) const

lowerDynamicAlloc - Generate the code for allocating an object in the current frame.

The sequence of code will be in the general form

addi R0, SP, #frameSize ; get the address of the previous frame stwxu R0, SP, Rnegsize ; add and update the SP with the negated size addi Rnew, SP, #maxCalFrameSize ; get the top of the allocation

Definition at line 736 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineFunction::getFrameInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFrameInfo::getMaxAlign(), llvm::MachineFrameInfo::getMaxCallFrameSize(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::isAligned(), llvm::RegState::Kill, MBB, MI, prepareDynamicAlloca(), and TII.

Referenced by eliminateFrameIndex().

◆ lowerDynamicAreaOffset()

void PPCRegisterInfo::lowerDynamicAreaOffset ( MachineBasicBlock::iterator II ) const

Definition at line 925 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineFunction::getFrameInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFrameInfo::getMaxCallFrameSize(), llvm::MachineFunction::getSubtarget(), II, is64Bit(), MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerOctWordSpilling()

void PPCRegisterInfo::lowerOctWordSpilling	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

Remove any STXVP[X] instructions and split them out into a pair of STXV[X] instructions if –disable-auto-paired-vec-st is specified on the command line.

Definition at line 1272 of file PPCRegisterInfo.cpp.

References assert(), DisableAutoPairedVecSt, DL, llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerPrepareProbedAlloca()

void PPCRegisterInfo::lowerPrepareProbedAlloca ( MachineBasicBlock::iterator II ) const

Definition at line 884 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getSubtarget(), II, MBB, MI, prepareDynamicAlloca(), and TII.

Referenced by eliminateFrameIndex().

◆ lowerQuadwordRestore()

void PPCRegisterInfo::lowerQuadwordRestore	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

lowerQuadwordRestore - Generate code to restore paired general register.

Definition at line 1487 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), assert(), llvm::BuildMI(), DL, llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerQuadwordSpilling()

void PPCRegisterInfo::lowerQuadwordSpilling	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

lowerQuadwordSpilling - Generate code to spill paired general register.

Definition at line 1460 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DL, llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerWACCRestore()

void PPCRegisterInfo::lowerWACCRestore	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

lowerWACCRestore - Generate the code to restore the wide accumulator register.

Definition at line 1428 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, emitWAccSpillRestoreInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), llvm::RegState::Kill, MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ lowerWACCSpilling()

void PPCRegisterInfo::lowerWACCSpilling	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex ) const

lowerWACCSpilling - Generate the code for spilling the wide accumulator register.

Definition at line 1394 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, emitWAccSpillRestoreInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), llvm::RegState::Kill, MBB, MI, and TII.

Referenced by eliminateFrameIndex().

◆ materializeFrameBaseRegister()

Register PPCRegisterInfo::materializeFrameBaseRegister	(	MachineBasicBlock *	MBB,
		int	FrameIdx,
		int64_t	Offset ) const

override

Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.

Definition at line 2009 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), DL, llvm::PPCSubtarget::getInstrInfo(), getPointerRegClass(), llvm::MachineFunction::getSubtarget(), MBB, MRI, llvm::Offset, and TII.

◆ needsFrameBaseReg()

bool PPCRegisterInfo::needsFrameBaseReg	(	MachineInstr *	MI,
		int64_t	Offset ) const

override

Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.

Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 1964 of file PPCRegisterInfo.cpp.

References assert(), llvm::PPCFrameLowering::determineFrameLayout(), getBaseRegister(), isFrameOffsetLegal(), MBB, MI, and llvm::Offset.

◆ prepareDynamicAlloca()

void PPCRegisterInfo::prepareDynamicAlloca	(	MachineBasicBlock::iterator	II,
		Register &	NegSizeReg,
		bool &	KillNegSizeReg,
		Register &	FramePointer ) const

To accomplish dynamic stack allocation, we have to calculate exact size subtracted from the stack pointer according alignment information and get previous frame pointer.

Definition at line 793 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineFunction::getFrameInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFrameInfo::getMaxAlign(), llvm::MachineFunction::getRegInfo(), llvm::TargetFrameLowering::getStackAlign(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), II, llvm::isInt(), llvm::RegState::Kill, MBB, MI, TII, and llvm::Align::value().

Referenced by lowerDynamicAlloc(), and lowerPrepareProbedAlloca().

◆ requiresFrameIndexScavenging()

bool PPCRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction & MF ) const

override

Definition at line 447 of file PPCRegisterInfo.cpp.

References llvm::dbgs(), llvm::MachineFrameInfo::getCalleeSavedInfo(), llvm::MachineFunction::getFrameInfo(), llvm::PPCSubtarget::getInstrInfo(), getMinimalPhysRegClass(), llvm::MachineFunction::getName(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), llvm::MachineFrameInfo::isCalleeSavedInfoValid(), llvm::MachineFrameInfo::isFixedObjectIndex(), LLVM_DEBUG, offsetMinAlignForOpcode(), and llvm::printReg().

◆ requiresRegisterScavenging()

bool llvm::PPCRegisterInfo::requiresRegisterScavenging ( const MachineFunction & MF ) const

inlineoverride

We require the register scavenger.

Definition at line 119 of file PPCRegisterInfo.h.

◆ requiresVirtualBaseRegisters()

bool PPCRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction & MF ) const

override

Definition at line 521 of file PPCRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget().

◆ resolveFrameIndex()

void PPCRegisterInfo::resolveFrameIndex	(	MachineInstr &	MI,
		Register	BaseReg,
		int64_t	Offset ) const

override

Definition at line 2034 of file PPCRegisterInfo.cpp.

References assert(), llvm::PPCSubtarget::getInstrInfo(), getOffsetONFromFION(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), MBB, MI, MRI, llvm::Offset, and TII.

The documentation for this class was generated from the following files:

lib/Target/PowerPC/PPCRegisterInfo.h
lib/Target/PowerPC/PPCRegisterInfo.cpp

Public Member Functions

Static Public Member Functions

Detailed Description

Constructor & Destructor Documentation

◆ PPCRegisterInfo()

Member Function Documentation

◆ adjustStackMapLiveOutMask()

◆ eliminateFrameIndex()

◆ emitAccCopyInfo()

◆ getBaseRegister()

◆ getCalleeSavedRegs()

◆ getCallPreservedMask()

◆ getCrossCopyRegClass()

◆ getFrameRegister()

◆ getLargestLegalSuperClass()

◆ getMappedIdxOpcForImmOpc()

◆ getNoPreservedMask()

◆ getPointerRegClass()

◆ getRegAllocationHints()

◆ getRegPressureLimit()

◆ getReservedRegs()

◆ hasBasePointer()

◆ hasReservedSpillSlot()

◆ isAsmClobberable()

◆ isCallerPreservedPhysReg()

◆ isFrameOffsetLegal()

◆ isNonallocatableRegisterCalleeSave()

◆ isVirtualFrameRegister()

◆ lowerACCRestore()

◆ lowerACCSpilling()

◆ lowerCRBitRestore()

◆ lowerCRBitSpilling()

◆ lowerCRRestore()

◆ lowerCRSpilling()

◆ lowerDMRRestore()

◆ lowerDMRSpilling()

◆ lowerDynamicAlloc()

◆ lowerDynamicAreaOffset()

◆ lowerOctWordSpilling()

◆ lowerPrepareProbedAlloca()

◆ lowerQuadwordRestore()

◆ lowerQuadwordSpilling()

◆ lowerWACCRestore()

◆ lowerWACCSpilling()

◆ materializeFrameBaseRegister()

◆ needsFrameBaseReg()

◆ prepareDynamicAlloca()

◆ requiresFrameIndexScavenging()

◆ requiresRegisterScavenging()

◆ requiresVirtualBaseRegisters()

◆ resolveFrameIndex()