LLVM  14.0.0git
Public Member Functions | Static Public Member Functions | List of all members
llvm::PPCRegisterInfo Class Reference

#include "Target/PowerPC/PPCRegisterInfo.h"

Inheritance diagram for llvm::PPCRegisterInfo:
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Collaboration diagram for llvm::PPCRegisterInfo:
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Public Member Functions

 PPCRegisterInfo (const PPCTargetMachine &TM)
 
unsigned getMappedIdxOpcForImmOpc (unsigned ImmOpcode) const
 getMappedIdxOpcForImmOpc - Return the mapped index form load/store opcode for a given imm form load/store opcode ImmFormOpcode. More...
 
const TargetRegisterClassgetPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
 getPointerRegClass - Return the register class to use to hold pointers. More...
 
unsigned getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
 
const TargetRegisterClassgetLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &MF) const override
 
const MCPhysReggetCalleeSavedRegs (const MachineFunction *MF) const override
 Code Generation virtual methods... More...
 
const uint32_tgetCallPreservedMask (const MachineFunction &MF, CallingConv::ID CC) const override
 
const uint32_tgetNoPreservedMask () const override
 
void adjustStackMapLiveOutMask (uint32_t *Mask) const override
 
BitVector getReservedRegs (const MachineFunction &MF) const override
 
bool isCallerPreservedPhysReg (MCRegister PhysReg, const MachineFunction &MF) const override
 
bool getRegAllocationHints (Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override
 
bool requiresRegisterScavenging (const MachineFunction &MF) const override
 We require the register scavenger. More...
 
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
 
bool requiresVirtualBaseRegisters (const MachineFunction &MF) const override
 
void lowerDynamicAlloc (MachineBasicBlock::iterator II) const
 lowerDynamicAlloc - Generate the code for allocating an object in the current frame. More...
 
void lowerDynamicAreaOffset (MachineBasicBlock::iterator II) const
 
void prepareDynamicAlloca (MachineBasicBlock::iterator II, Register &NegSizeReg, bool &KillNegSizeReg, Register &FramePointer) const
 To accomplish dynamic stack allocation, we have to calculate exact size subtracted from the stack pointer according alignment information and get previous frame pointer. More...
 
void lowerPrepareProbedAlloca (MachineBasicBlock::iterator II) const
 
void lowerCRSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 lowerCRSpilling - Generate the code for spilling a CR register. More...
 
void lowerCRRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerCRBitSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerCRBitRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerACCSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 lowerACCSpilling - Generate the code for spilling the accumulator register. More...
 
void lowerACCRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 lowerACCRestore - Generate the code to restore the accumulator register. More...
 
void lowerQuadwordSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 lowerQuadwordSpilling - Generate code to spill paired general register. More...
 
void lowerQuadwordRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 lowerQuadwordRestore - Generate code to restore paired general register. More...
 
bool hasReservedSpillSlot (const MachineFunction &MF, Register Reg, int &FrameIdx) const override
 
void eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
 
bool needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
 Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. More...
 
Register materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override
 Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block. More...
 
void resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override
 
bool isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override
 
Register getFrameRegister (const MachineFunction &MF) const override
 
Register getBaseRegister (const MachineFunction &MF) const
 
bool hasBasePointer (const MachineFunction &MF) const
 

Static Public Member Functions

static void emitAccCopyInfo (MachineBasicBlock &MBB, MCRegister DestReg, MCRegister SrcReg)
 
static const char * stripRegisterPrefix (const char *RegName)
 stripRegisterPrefix - This method strips the character prefix from a register name so that only the number is left. More...
 

Detailed Description

Definition at line 57 of file PPCRegisterInfo.h.

Constructor & Destructor Documentation

◆ PPCRegisterInfo()

PPCRegisterInfo::PPCRegisterInfo ( const PPCTargetMachine TM)

Definition at line 95 of file PPCRegisterInfo.cpp.

References llvm::ARM_MB::LD.

Member Function Documentation

◆ adjustStackMapLiveOutMask()

void PPCRegisterInfo::adjustStackMapLiveOutMask ( uint32_t Mask) const
override

Definition at line 299 of file PPCRegisterInfo.cpp.

References llvm::BitmaskEnumDetail::Mask(), and llvm::AArch64::RM.

◆ eliminateFrameIndex()

void PPCRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II,
int  SPAdj,
unsigned  FIOperandNum,
RegScavenger RS = nullptr 
) const
override

◆ emitAccCopyInfo()

void PPCRegisterInfo::emitAccCopyInfo ( MachineBasicBlock MBB,
MCRegister  DestReg,
MCRegister  SrcReg 
)
static

◆ getBaseRegister()

Register PPCRegisterInfo::getBaseRegister ( const MachineFunction MF) const

◆ getCalleeSavedRegs()

const MCPhysReg * PPCRegisterInfo::getCalleeSavedRegs ( const MachineFunction MF) const
override

◆ getCallPreservedMask()

const uint32_t * PPCRegisterInfo::getCallPreservedMask ( const MachineFunction MF,
CallingConv::ID  CC 
) const
override

◆ getFrameRegister()

Register PPCRegisterInfo::getFrameRegister ( const MachineFunction MF) const
override

◆ getLargestLegalSuperClass()

const TargetRegisterClass * PPCRegisterInfo::getLargestLegalSuperClass ( const TargetRegisterClass RC,
const MachineFunction MF 
) const
override

◆ getMappedIdxOpcForImmOpc()

unsigned llvm::PPCRegisterInfo::getMappedIdxOpcForImmOpc ( unsigned  ImmOpcode) const
inline

getMappedIdxOpcForImmOpc - Return the mapped index form load/store opcode for a given imm form load/store opcode ImmFormOpcode.

FIXME: move this to PPCInstrInfo class.

Definition at line 67 of file PPCRegisterInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), and llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find().

Referenced by llvm::PPCInstrInfo::convertToImmediateForm(), and llvm::PPCInstrInfo::isImmInstrEligibleForFolding().

◆ getNoPreservedMask()

const uint32_t * PPCRegisterInfo::getNoPreservedMask ( ) const
override

Definition at line 295 of file PPCRegisterInfo.cpp.

◆ getPointerRegClass()

const TargetRegisterClass * PPCRegisterInfo::getPointerRegClass ( const MachineFunction MF,
unsigned  Kind = 0 
) const
override

getPointerRegClass - Return the register class to use to hold pointers.

This is used for addressing modes.

Definition at line 164 of file PPCRegisterInfo.cpp.

References llvm::PPCTargetMachine::isPPC64().

Referenced by materializeFrameBaseRegister().

◆ getRegAllocationHints()

bool PPCRegisterInfo::getRegAllocationHints ( Register  VirtReg,
ArrayRef< MCPhysReg Order,
SmallVectorImpl< MCPhysReg > &  Hints,
const MachineFunction MF,
const VirtRegMap VRM,
const LiveRegMatrix Matrix 
) const
override

◆ getRegPressureLimit()

unsigned PPCRegisterInfo::getRegPressureLimit ( const TargetRegisterClass RC,
MachineFunction MF 
) const
override

◆ getReservedRegs()

BitVector PPCRegisterInfo::getReservedRegs ( const MachineFunction MF) const
override

◆ hasBasePointer()

bool PPCRegisterInfo::hasBasePointer ( const MachineFunction MF) const

◆ hasReservedSpillSlot()

bool PPCRegisterInfo::hasReservedSpillSlot ( const MachineFunction MF,
Register  Reg,
int FrameIdx 
) const
override

Definition at line 1283 of file PPCRegisterInfo.cpp.

References llvm::MachineFunction::getInfo(), and Reg.

◆ isCallerPreservedPhysReg()

bool PPCRegisterInfo::isCallerPreservedPhysReg ( MCRegister  PhysReg,
const MachineFunction MF 
) const
override

◆ isFrameOffsetLegal()

bool PPCRegisterInfo::isFrameOffsetLegal ( const MachineInstr MI,
Register  BaseReg,
int64_t  Offset 
) const
override

◆ lowerACCRestore()

void PPCRegisterInfo::lowerACCRestore ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

◆ lowerACCSpilling()

void PPCRegisterInfo::lowerACCSpilling ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

lowerACCSpilling - Generate the code for spilling the accumulator register.

Similarly to other spills/reloads that use pseudo-ops, we do not actually eliminate the FrameIndex here nor compute the stack offset. We simply create a real instruction with an FI and rely on eliminateFrameIndex to handle the FI elimination.

Definition at line 1159 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DL, emitAccSpillRestoreInfo(), llvm::MachineBasicBlock::erase(), llvm::ISD::FrameIndex, llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), llvm::PPCSubtarget::isLittleEndian(), MBB, MI, Reg, TII, and llvm::PPCISD::XXMFACC.

Referenced by eliminateFrameIndex().

◆ lowerCRBitRestore()

void PPCRegisterInfo::lowerCRBitRestore ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

◆ lowerCRBitSpilling()

void PPCRegisterInfo::lowerCRBitSpilling ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

◆ lowerCRRestore()

void PPCRegisterInfo::lowerCRRestore ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

◆ lowerCRSpilling()

void PPCRegisterInfo::lowerCRSpilling ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

lowerCRSpilling - Generate the code for spilling a CR register.

Instead of reserving a whole register (R0), we scrounge for one here. This generates code like this:

mfcr rA ; Move the conditional register into GPR rA. rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot. stw rA, FI ; Store rA to the frame.

Definition at line 870 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::ISD::FrameIndex, llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, MBB, llvm::PPCISD::MFOCRF, MI, Reg, and TII.

Referenced by eliminateFrameIndex().

◆ lowerDynamicAlloc()

void PPCRegisterInfo::lowerDynamicAlloc ( MachineBasicBlock::iterator  II) const

lowerDynamicAlloc - Generate the code for allocating an object in the current frame.

The sequence of code will be in the general form

addi R0, SP, #frameSize ; get the address of the previous frame stwxu R0, SP, Rnegsize ; add and update the SP with the negated size addi Rnew, SP, #maxCalFrameSize ; get the top of the allocation

Definition at line 650 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::MachineFunction::getFrameInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFrameInfo::getMaxAlign(), llvm::MachineFrameInfo::getMaxCallFrameSize(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::isAligned(), llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, MBB, MI, prepareDynamicAlloca(), Reg, and TII.

Referenced by eliminateFrameIndex().

◆ lowerDynamicAreaOffset()

void PPCRegisterInfo::lowerDynamicAreaOffset ( MachineBasicBlock::iterator  II) const

◆ lowerPrepareProbedAlloca()

void PPCRegisterInfo::lowerPrepareProbedAlloca ( MachineBasicBlock::iterator  II) const

◆ lowerQuadwordRestore()

void PPCRegisterInfo::lowerQuadwordRestore ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

◆ lowerQuadwordSpilling()

void PPCRegisterInfo::lowerQuadwordSpilling ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

◆ materializeFrameBaseRegister()

Register PPCRegisterInfo::materializeFrameBaseRegister ( MachineBasicBlock MBB,
int  FrameIdx,
int64_t  Offset 
) const
override

◆ needsFrameBaseReg()

bool PPCRegisterInfo::needsFrameBaseReg ( MachineInstr MI,
int64_t  Offset 
) const
override

Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.

Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 1575 of file PPCRegisterInfo.cpp.

References assert(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), llvm::PPCFrameLowering::determineFrameLayout(), getBaseRegister(), llvm::MachineBasicBlock::getParent(), isFrameOffsetLegal(), MBB, MI, and Offset.

◆ prepareDynamicAlloca()

void PPCRegisterInfo::prepareDynamicAlloca ( MachineBasicBlock::iterator  II,
Register NegSizeReg,
bool &  KillNegSizeReg,
Register FramePointer 
) const

◆ requiresFrameIndexScavenging()

bool PPCRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction MF) const
override

◆ requiresRegisterScavenging()

bool llvm::PPCRegisterInfo::requiresRegisterScavenging ( const MachineFunction MF) const
inlineoverride

We require the register scavenger.

Definition at line 108 of file PPCRegisterInfo.h.

◆ requiresVirtualBaseRegisters()

bool PPCRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction MF) const
override

◆ resolveFrameIndex()

void PPCRegisterInfo::resolveFrameIndex ( MachineInstr MI,
Register  BaseReg,
int64_t  Offset 
) const
override

◆ stripRegisterPrefix()

static const char* llvm::PPCRegisterInfo::stripRegisterPrefix ( const char *  RegName)
inlinestatic

stripRegisterPrefix - This method strips the character prefix from a register name so that only the number is left.

Used by for linux asm.

Definition at line 168 of file PPCRegisterInfo.h.

References RegName.

Referenced by llvm::PPCInstPrinter::printOperand().


The documentation for this class was generated from the following files: