LLVM 22.0.0git
MipsSEISelLowering.cpp File Reference

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Macros

#define DEBUG_TYPE   "mips-isel"

Functions

static SDValue performANDCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static bool isVSplat (SDValue N, APInt &Imm, bool IsLittleEndian)
static bool isVectorAllOnes (SDValue N)
static bool isBitwiseInverse (SDValue N, SDValue OfNode)
static SDValue performORCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static bool shouldTransformMulToShiftsAddsSubs (APInt C, EVT VT, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
static SDValue genConstMult (SDValue X, APInt C, const SDLoc &DL, EVT VT, EVT ShiftTy, SelectionDAG &DAG)
static SDValue performMULCombine (SDNode *N, SelectionDAG &DAG, const TargetLowering::DAGCombinerInfo &DCI, const MipsSETargetLowering *TL, const MipsSubtarget &Subtarget)
static SDValue performDSPShiftCombine (unsigned Opc, SDNode *N, EVT Ty, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
static SDValue performSHLCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue performSRACombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue performSRLCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static bool isLegalDSPCondCode (EVT Ty, ISD::CondCode CC)
static SDValue performSETCCCombine (SDNode *N, SelectionDAG &DAG)
static SDValue performVSELECTCombine (SDNode *N, SelectionDAG &DAG)
static SDValue performXORCombine (SDNode *N, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
static SDValue initAccumulator (SDValue In, const SDLoc &DL, SelectionDAG &DAG)
static SDValue extractLOHI (SDValue Op, const SDLoc &DL, SelectionDAG &DAG)
static SDValue lowerDSPIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc)
static SDValue lowerMSACopyIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc)
static SDValue lowerMSASplatZExt (SDValue Op, unsigned OpNr, SelectionDAG &DAG)
static SDValue lowerMSASplatImm (SDValue Op, unsigned ImmOp, SelectionDAG &DAG, bool IsSigned=false)
static SDValue getBuildVectorSplat (EVT VecTy, SDValue SplatValue, bool BigEndian, SelectionDAG &DAG)
static SDValue lowerMSABinaryBitImmIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc, SDValue Imm, bool BigEndian)
static SDValue truncateVecElts (SDValue Op, SelectionDAG &DAG)
static SDValue lowerMSABitClear (SDValue Op, SelectionDAG &DAG)
static SDValue lowerMSABitClearImm (SDValue Op, SelectionDAG &DAG)
static SDValue lowerMSALoadIntr (SDValue Op, SelectionDAG &DAG, unsigned Intr, const MipsSubtarget &Subtarget)
static SDValue lowerMSAStoreIntr (SDValue Op, SelectionDAG &DAG, unsigned Intr, const MipsSubtarget &Subtarget)
static bool isConstantOrUndef (const SDValue Op)
static bool isConstantOrUndefBUILD_VECTOR (const BuildVectorSDNode *Op)
static SDValue lowerVECTOR_SHUFFLE_SHF (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
template<typename ValType>
static bool fitsRegularPattern (typename SmallVectorImpl< ValType >::const_iterator Begin, unsigned CheckStride, typename SmallVectorImpl< ValType >::const_iterator End, ValType ExpectedIndex, unsigned ExpectedIndexStride)
 Determine whether a range fits a regular pattern of values.
static bool isVECTOR_SHUFFLE_SPLATI (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_ILVEV (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_ILVOD (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_ILVR (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_ILVL (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_PCKEV (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_PCKOD (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_VSHF (SDValue Op, EVT ResTy, const SmallVector< int, 16 > &Indices, const bool isSPLATI, SelectionDAG &DAG)

Variables

static cl::opt< boolUseMipsTailCalls ("mips-tail-calls", cl::Hidden, cl::desc("MIPS: permit tail calls."), cl::init(false))
static cl::opt< boolNoDPLoadStore ("mno-ldc1-sdc1", cl::init(false), cl::desc("Expand double precision loads and " "stores to their single precision " "counterparts"))

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "mips-isel"

Definition at line 53 of file MipsSEISelLowering.cpp.

Function Documentation

◆ extractLOHI()

◆ fitsRegularPattern()

template<typename ValType>
bool fitsRegularPattern ( typename SmallVectorImpl< ValType >::const_iterator Begin,
unsigned CheckStride,
typename SmallVectorImpl< ValType >::const_iterator End,
ValType ExpectedIndex,
unsigned ExpectedIndexStride )
static

Determine whether a range fits a regular pattern of values.

This function accounts for the possibility of jumping over the End iterator.

Definition at line 2657 of file MipsSEISelLowering.cpp.

References I.

◆ genConstMult()

◆ getBuildVectorSplat()

◆ initAccumulator()

SDValue initAccumulator ( SDValue In,
const SDLoc & DL,
SelectionDAG & DAG )
static

◆ isBitwiseInverse()

bool isBitwiseInverse ( SDValue N,
SDValue OfNode )
static

Definition at line 627 of file MipsSEISelLowering.cpp.

References isVectorAllOnes(), N, and llvm::ISD::XOR.

Referenced by performORCombine().

◆ isConstantOrUndef()

◆ isConstantOrUndefBUILD_VECTOR()

bool isConstantOrUndefBUILD_VECTOR ( const BuildVectorSDNode * Op)
static

Definition at line 2489 of file MipsSEISelLowering.cpp.

References isConstantOrUndef().

◆ isLegalDSPCondCode()

◆ isVECTOR_SHUFFLE_SPLATI()

◆ isVectorAllOnes()

bool isVectorAllOnes ( SDValue N)
static

◆ isVSplat()

bool isVSplat ( SDValue N,
APInt & Imm,
bool IsLittleEndian )
static

Definition at line 583 of file MipsSEISelLowering.cpp.

References llvm::dyn_cast(), and N.

Referenced by performORCombine().

◆ lowerDSPIntr()

◆ lowerMSABinaryBitImmIntr()

◆ lowerMSABitClear()

◆ lowerMSABitClearImm()

◆ lowerMSACopyIntr()

◆ lowerMSALoadIntr()

◆ lowerMSASplatImm()

SDValue lowerMSASplatImm ( SDValue Op,
unsigned ImmOp,
SelectionDAG & DAG,
bool IsSigned = false )
static

Definition at line 1468 of file MipsSEISelLowering.cpp.

References llvm::cast(), and llvm::SelectionDAG::getConstant().

◆ lowerMSASplatZExt()

◆ lowerMSAStoreIntr()

◆ lowerVECTOR_SHUFFLE_ILVEV()

◆ lowerVECTOR_SHUFFLE_ILVL()

◆ lowerVECTOR_SHUFFLE_ILVOD()

◆ lowerVECTOR_SHUFFLE_ILVR()

◆ lowerVECTOR_SHUFFLE_PCKEV()

◆ lowerVECTOR_SHUFFLE_PCKOD()

◆ lowerVECTOR_SHUFFLE_SHF()

◆ lowerVECTOR_SHUFFLE_VSHF()

◆ performANDCombine()

◆ performDSPShiftCombine()

◆ performMULCombine()

◆ performORCombine()

◆ performSETCCCombine()

SDValue performSETCCCombine ( SDNode * N,
SelectionDAG & DAG )
static

◆ performSHLCombine()

SDValue performSHLCombine ( SDNode * N,
SelectionDAG & DAG,
TargetLowering::DAGCombinerInfo & DCI,
const MipsSubtarget & Subtarget )
static

◆ performSRACombine()

◆ performSRLCombine()

◆ performVSELECTCombine()

◆ performXORCombine()

◆ shouldTransformMulToShiftsAddsSubs()

◆ truncateVecElts()

Variable Documentation

◆ NoDPLoadStore

cl::opt< bool > NoDPLoadStore("mno-ldc1-sdc1", cl::init(false), cl::desc("Expand double precision loads and " "stores to their single precision " "counterparts")) ( "mno-ldc1-sdc1" ,
cl::init(false) ,
cl::desc("Expand double precision loads and " "stores to their single precision " "counterparts")  )
static

◆ UseMipsTailCalls

cl::opt< bool > UseMipsTailCalls("mips-tail-calls", cl::Hidden, cl::desc("MIPS: permit tail calls."), cl::init(false)) ( "mips-tail-calls" ,
cl::Hidden ,
cl::desc("MIPS: permit tail calls.") ,
cl::init(false)  )
static