#include "Target/AArch64/AArch64RegisterInfo.h"

Inheritance diagram for llvm::AArch64RegisterInfo:

Collaboration diagram for llvm::AArch64RegisterInfo:

Public Member Functions
	AArch64RegisterInfo (const Triple &TT)

int	getSEHRegNum (unsigned i) const

bool	isReservedReg (const MachineFunction &MF, MCRegister Reg) const

bool	isAnyArgRegReserved (const MachineFunction &MF) const

void	emitReservedArgRegCallError (const MachineFunction &MF) const

void	UpdateCustomCalleeSavedRegs (MachineFunction &MF) const

void	UpdateCustomCallPreservedMask (MachineFunction &MF, const uint32_t **Mask) const

const MCPhysReg *	getCalleeSavedRegs (const MachineFunction *MF) const override
	Code Generation virtual methods... More...

const MCPhysReg *	getDarwinCalleeSavedRegs (const MachineFunction *MF) const

const MCPhysReg *	getCalleeSavedRegsViaCopy (const MachineFunction *MF) const

const uint32_t *	getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override

const uint32_t *	getDarwinCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const

unsigned	getCSRFirstUseCost () const override

const TargetRegisterClass *	getSubClassWithSubReg (const TargetRegisterClass *RC, unsigned Idx) const override

const uint32_t *	getTLSCallPreservedMask () const

const uint32_t *	getNoPreservedMask () const override

const uint32_t *	getCustomEHPadPreservedMask (const MachineFunction &MF) const override

const uint32_t *	getThisReturnPreservedMask (const MachineFunction &MF, CallingConv::ID) const
	getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i64 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e. More...

const uint32_t *	getWindowsStackProbePreservedMask () const
	Stack probing calls preserve different CSRs to the normal CC. More...

BitVector	getReservedRegs (const MachineFunction &MF) const override

bool	isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override

bool	isConstantPhysReg (MCRegister PhysReg) const override

const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override

const TargetRegisterClass *	getCrossCopyRegClass (const TargetRegisterClass *RC) const override

bool	requiresRegisterScavenging (const MachineFunction &MF) const override

bool	useFPForScavengingIndex (const MachineFunction &MF) const override

bool	requiresFrameIndexScavenging (const MachineFunction &MF) const override

bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
	needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. More...

bool	isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override

Register	materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override
	Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block. More...

void	resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override

void	eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override

bool	cannotEliminateFrame (const MachineFunction &MF) const

bool	requiresVirtualBaseRegisters (const MachineFunction &MF) const override

bool	hasBasePointer (const MachineFunction &MF) const

unsigned	getBaseRegister () const

Register	getFrameRegister (const MachineFunction &MF) const override

unsigned	getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override

unsigned	getLocalAddressRegister (const MachineFunction &MF) const

bool	regNeedsCFI (unsigned Reg, unsigned &RegToUseForCFI) const
	Return whether the register needs a CFI entry. More...

bool	shouldCoalesce (MachineInstr MI, const TargetRegisterClass SrcRC, unsigned SubReg, const TargetRegisterClass DstRC, unsigned DstSubReg, const TargetRegisterClass NewRC, LiveIntervals &LIS) const override
	SrcRC and DstRC will be morphed into NewRC if this returns true. More...

void	getOffsetOpcodes (const StackOffset &Offset, SmallVectorImpl< uint64_t > &Ops) const override

Static Public Member Functions
static bool	hasSVEArgsOrReturn (const MachineFunction *MF)

Detailed Description

Definition at line 26 of file AArch64RegisterInfo.h.

Constructor & Destructor Documentation

◆ AArch64RegisterInfo()

AArch64RegisterInfo::AArch64RegisterInfo ( const Triple & TT )

Definition at line 38 of file AArch64RegisterInfo.cpp.

References llvm::AArch64_MC::initLLVMToCVRegMapping().

Member Function Documentation

◆ cannotEliminateFrame()

bool AArch64RegisterInfo::cannotEliminateFrame ( const MachineFunction & MF ) const

Definition at line 460 of file AArch64RegisterInfo.cpp.

References llvm::MachineFrameInfo::adjustsStack(), llvm::TargetOptions::DisableFramePointerElim(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getTarget(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineFrameInfo::isFrameAddressTaken(), and llvm::TargetMachine::Options.

Referenced by llvm::AArch64FrameLowering::determineCalleeSaves().

◆ eliminateFrameIndex()

void AArch64RegisterInfo::eliminateFrameIndex	(	MachineBasicBlock::iterator	II,
		int	SPAdj,
		unsigned	FIOperandNum,
		RegScavenger *	RS = `nullptr`
	)		const

override

Definition at line 637 of file AArch64RegisterInfo.cpp.

References llvm::AArch64FrameOffsetCanUpdate, llvm::AArch64FrameOffsetIsLegal, llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineOperand::ChangeToImmediate(), createScratchRegisterForInstruction(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::emitFrameOffset(), llvm::ISD::FrameIndex, llvm::StackOffset::getFixed(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::AArch64FrameLowering::getNonLocalFrameIndexReference(), llvm::MachineFrameInfo::getObjectOffset(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), llvm::AArch64FunctionInfo::getTaggedBasePointerOffset(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::isAArch64FrameOffsetLegal(), llvm::RegScavenger::isScavengingFrameIndex(), MBB, MI, llvm::AArch64II::MO_TAGGED, Offset, llvm::AArch64FrameLowering::resolveFrameIndexReference(), llvm::rewriteAArch64FrameIndex(), and TII.

◆ emitReservedArgRegCallError()

void AArch64RegisterInfo::emitReservedArgRegCallError ( const MachineFunction & MF ) const

Definition at line 353 of file AArch64RegisterInfo.cpp.

References F, and llvm::MachineFunction::getFunction().

◆ getBaseRegister()

unsigned AArch64RegisterInfo::getBaseRegister ( ) const

Definition at line 382 of file AArch64RegisterInfo.cpp.

Referenced by llvm::AArch64FrameLowering::determineCalleeSaves(), and getLocalAddressRegister().

◆ getCalleeSavedRegs()

const MCPhysReg * AArch64RegisterInfo::getCalleeSavedRegs ( const MachineFunction * MF ) const

override

◆ getCalleeSavedRegsViaCopy()

const MCPhysReg * AArch64RegisterInfo::getCalleeSavedRegsViaCopy ( const MachineFunction * MF ) const

Definition at line 146 of file AArch64RegisterInfo.cpp.

References assert(), llvm::CallingConv::CXX_FAST_TLS, llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), and llvm::AArch64FunctionInfo::isSplitCSR().

◆ getCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getCallPreservedMask	(	const MachineFunction &	MF,
		CallingConv::ID	CC
	)		const

override

Definition at line 214 of file AArch64RegisterInfo.cpp.

References llvm::CallingConv::AArch64_SVE_VectorCall, llvm::CallingConv::AArch64_VectorCall, llvm::CallingConv::AnyReg, llvm::CallingConv::CFGuard_Check, llvm::Function::getAttributes(), getDarwinCallPreservedMask(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::getTargetLowering(), llvm::CallingConv::GHC, llvm::AttributeList::hasAttrSomewhere(), llvm::Function::hasFnAttribute(), llvm::AArch64Subtarget::isTargetDarwin(), llvm::CallingConv::PreserveMost, llvm::report_fatal_error(), llvm::AArch64TargetLowering::supportSwiftError(), and llvm::CallingConv::SwiftTail.

◆ getCrossCopyRegClass()

const TargetRegisterClass * AArch64RegisterInfo::getCrossCopyRegClass ( const TargetRegisterClass * RC ) const

override

Definition at line 376 of file AArch64RegisterInfo.cpp.

◆ getCSRFirstUseCost()

unsigned llvm::AArch64RegisterInfo::getCSRFirstUseCost ( ) const

inlineoverride

Definition at line 57 of file AArch64RegisterInfo.h.

◆ getCustomEHPadPreservedMask()

const uint32_t * AArch64RegisterInfo::getCustomEHPadPreservedMask ( const MachineFunction & MF ) const

override

Definition at line 254 of file AArch64RegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget(), and llvm::AArch64Subtarget::isTargetLinux().

◆ getDarwinCalleeSavedRegs()

const MCPhysReg * AArch64RegisterInfo::getDarwinCalleeSavedRegs ( const MachineFunction * MF ) const

◆ getDarwinCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getDarwinCallPreservedMask	(	const MachineFunction &	MF,
		CallingConv::ID	CC
	)		const

Definition at line 186 of file AArch64RegisterInfo.cpp.

References llvm::CallingConv::AArch64_SVE_VectorCall, llvm::CallingConv::AArch64_VectorCall, assert(), llvm::CallingConv::CFGuard_Check, llvm::CallingConv::CXX_FAST_TLS, llvm::Function::getAttributes(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::getTargetLowering(), llvm::AttributeList::hasAttrSomewhere(), llvm::AArch64Subtarget::isTargetDarwin(), llvm::CallingConv::PreserveMost, llvm::report_fatal_error(), llvm::AArch64TargetLowering::supportSwiftError(), and llvm::CallingConv::SwiftTail.

Referenced by getCallPreservedMask().

◆ getFrameRegister()

Register AArch64RegisterInfo::getFrameRegister ( const MachineFunction & MF ) const

override

Definition at line 421 of file AArch64RegisterInfo.cpp.

References llvm::AArch64FrameLowering::hasFP().

Referenced by getLocalAddressRegister().

◆ getLocalAddressRegister()

unsigned AArch64RegisterInfo::getLocalAddressRegister ( const MachineFunction & MF ) const

Definition at line 773 of file AArch64RegisterInfo.cpp.

References getBaseRegister(), llvm::MachineFunction::getFrameInfo(), getFrameRegister(), and llvm::MachineFunction::hasEHFunclets().

◆ getNoPreservedMask()

const uint32_t * AArch64RegisterInfo::getNoPreservedMask ( ) const

override

Definition at line 290 of file AArch64RegisterInfo.cpp.

◆ getOffsetOpcodes()

void AArch64RegisterInfo::getOffsetOpcodes	(	const StackOffset &	Offset,
		SmallVectorImpl< uint64_t > &	Ops
	)		const

override

Definition at line 610 of file AArch64RegisterInfo.cpp.

References llvm::SmallVectorImpl< T >::append(), llvm::DIExpression::appendOffset(), assert(), getDwarfRegNum(), and Offset.

◆ getPointerRegClass()

const TargetRegisterClass * AArch64RegisterInfo::getPointerRegClass	(	const MachineFunction &	MF,
		unsigned	Kind = `0`
	)		const

override

Definition at line 370 of file AArch64RegisterInfo.cpp.

◆ getRegPressureLimit()

unsigned AArch64RegisterInfo::getRegPressureLimit	(	const TargetRegisterClass *	RC,
		MachineFunction &	MF
	)		const

override

Definition at line 729 of file AArch64RegisterInfo.cpp.

References llvm::TargetRegisterClass::getID(), llvm::AArch64Subtarget::getNumXRegisterReserved(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::AArch64FrameLowering::hasFP(), and llvm::Triple::isOSDarwin().

◆ getReservedRegs()

BitVector AArch64RegisterInfo::getReservedRegs ( const MachineFunction & MF ) const

override

Definition at line 315 of file AArch64RegisterInfo.cpp.

References assert(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::Function::hasFnAttribute(), llvm::AArch64FrameLowering::hasFP(), i, llvm::Triple::isOSDarwin(), and llvm::AArch64Subtarget::isXRegisterReserved().

Referenced by isReservedReg().

◆ getSEHRegNum()

int llvm::AArch64RegisterInfo::getSEHRegNum ( unsigned i ) const

inline

Definition at line 33 of file AArch64RegisterInfo.h.

References i.

◆ getSubClassWithSubReg()

const TargetRegisterClass * AArch64RegisterInfo::getSubClassWithSubReg	(	const TargetRegisterClass *	RC,
		unsigned	Idx
	)		const

override

Definition at line 173 of file AArch64RegisterInfo.cpp.

◆ getThisReturnPreservedMask()

const uint32_t * AArch64RegisterInfo::getThisReturnPreservedMask	(	const MachineFunction &	MF,
		CallingConv::ID	CC
	)		const

getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i64 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e.

it is a calling convention that uses the same register for the first i64 argument and an i64 return value)

Should return NULL in the case that the calling convention does not have this property

Definition at line 295 of file AArch64RegisterInfo.cpp.

References assert(), llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, and llvm::AArch64Subtarget::isTargetDarwin().

◆ getTLSCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getTLSCallPreservedMask ( ) const

Definition at line 262 of file AArch64RegisterInfo.cpp.

References assert(), llvm::Triple::isOSBinFormatELF(), and llvm::Triple::isOSDarwin().

◆ getWindowsStackProbePreservedMask()

const uint32_t * AArch64RegisterInfo::getWindowsStackProbePreservedMask ( ) const

Stack probing calls preserve different CSRs to the normal CC.

Definition at line 310 of file AArch64RegisterInfo.cpp.

◆ hasBasePointer()

bool AArch64RegisterInfo::hasBasePointer ( const MachineFunction & MF ) const

Definition at line 384 of file AArch64RegisterInfo.cpp.

References llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::AArch64FunctionInfo::getStackSizeSVE(), llvm::MachineFunction::getSubtarget(), llvm::AArch64FunctionInfo::hasCalculatedStackSizeSVE(), llvm::MachineFunction::hasEHFunclets(), llvm::AArch64Subtarget::hasSVE(), and llvm::MachineFrameInfo::hasVarSizedObjects().

Referenced by llvm::AArch64FrameLowering::determineCalleeSaves(), getRegPressureLimit(), and getReservedRegs().

◆ hasSVEArgsOrReturn()

bool AArch64RegisterInfo::hasSVEArgsOrReturn ( const MachineFunction * MF )

static

Definition at line 66 of file AArch64RegisterInfo.cpp.

References llvm::any_of(), Arg, F, and llvm::MachineFunction::getFunction().

Referenced by getCalleeSavedRegs().

◆ isAnyArgRegReserved()

bool AArch64RegisterInfo::isAnyArgRegReserved ( const MachineFunction & MF ) const

Definition at line 347 of file AArch64RegisterInfo.cpp.

References llvm::any_of(), and isReservedReg().

◆ isAsmClobberable()

bool AArch64RegisterInfo::isAsmClobberable	(	const MachineFunction &	MF,
		MCRegister	PhysReg
	)		const

override

Definition at line 360 of file AArch64RegisterInfo.cpp.

References isReservedReg().

◆ isConstantPhysReg()

bool AArch64RegisterInfo::isConstantPhysReg ( MCRegister PhysReg ) const

override

Definition at line 365 of file AArch64RegisterInfo.cpp.

◆ isFrameOffsetLegal()

bool AArch64RegisterInfo::isFrameOffsetLegal	(	const MachineInstr *	MI,
		Register	BaseReg,
		int64_t	Offset
	)		const

override

Definition at line 535 of file AArch64RegisterInfo.cpp.

References llvm::AArch64FrameOffsetIsLegal, assert(), llvm::StackOffset::getFixed(), llvm::isAArch64FrameOffsetLegal(), MI, and Offset.

Referenced by needsFrameBaseReg().

◆ isReservedReg()

bool AArch64RegisterInfo::isReservedReg	(	const MachineFunction &	MF,
		MCRegister	Reg
	)		const

Definition at line 342 of file AArch64RegisterInfo.cpp.

References getReservedRegs(), and Reg.

Referenced by llvm::AArch64FrameLowering::determineCalleeSaves(), isAnyArgRegReserved(), isAsmClobberable(), and llvm::AArch64InstrInfo::isMBBSafeToOutlineFrom().

◆ materializeFrameBaseRegister()

Register AArch64RegisterInfo::materializeFrameBaseRegister	(	MachineBasicBlock *	MBB,
		int	FrameIdx,
		int64_t	Offset
	)		const

override

Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.

Definition at line 546 of file AArch64RegisterInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::constrainRegClass(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::AArch64_AM::getShifterImm(), llvm::MachineFunction::getSubtarget(), llvm::MipsISD::Ins, llvm::AArch64_AM::LSL, MBB, MRI, Offset, and TII.

◆ needsFrameBaseReg()

bool AArch64RegisterInfo::needsFrameBaseReg	(	MachineInstr *	MI,
		int64_t	Offset
	)		const

override

needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.

Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 471 of file AArch64RegisterInfo.cpp.

References assert(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::AArch64FrameLowering::hasFP(), i, isFrameOffsetLegal(), MI, and Offset.

◆ regNeedsCFI()

bool AArch64RegisterInfo::regNeedsCFI	(	unsigned	Reg,
		unsigned &	RegToUseForCFI
	)		const

Return whether the register needs a CFI entry.

Not all unwinders may know about SVE registers, so we assume the lowest common denominator, i.e. the callee-saves required by the base ABI. For the SVE registers z8-z15 only the lower 64-bits (d8-d15) need to be saved. The lower 64-bits subreg is returned in RegToUseForCFI.

Definition at line 48 of file AArch64RegisterInfo.cpp.

References contains(), I, and Reg.

◆ requiresFrameIndexScavenging()

bool AArch64RegisterInfo::requiresFrameIndexScavenging ( const MachineFunction & MF ) const

override

Definition at line 454 of file AArch64RegisterInfo.cpp.

◆ requiresRegisterScavenging()

bool AArch64RegisterInfo::requiresRegisterScavenging ( const MachineFunction & MF ) const

override

Definition at line 426 of file AArch64RegisterInfo.cpp.

◆ requiresVirtualBaseRegisters()

bool AArch64RegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction & MF ) const

override

Definition at line 431 of file AArch64RegisterInfo.cpp.

◆ resolveFrameIndex()

void AArch64RegisterInfo::resolveFrameIndex	(	MachineInstr &	MI,
		Register	BaseReg,
		int64_t	Offset
	)		const

override

Definition at line 570 of file AArch64RegisterInfo.cpp.

References assert(), llvm::StackOffset::getFixed(), llvm::MachineFunction::getSubtarget(), i, MI, Offset, llvm::rewriteAArch64FrameIndex(), and TII.

◆ shouldCoalesce()

bool AArch64RegisterInfo::shouldCoalesce	(	MachineInstr *	MI,
		const TargetRegisterClass *	SrcRC,
		unsigned	SubReg,
		const TargetRegisterClass *	DstRC,
		unsigned	DstSubReg,
		const TargetRegisterClass *	NewRC,
		LiveIntervals &	LIS
	)		const

override

SrcRC and DstRC will be morphed into NewRC if this returns true.

Definition at line 784 of file AArch64RegisterInfo.cpp.

References llvm::TargetRegisterClass::getID(), and MI.

◆ UpdateCustomCalleeSavedRegs()

void AArch64RegisterInfo::UpdateCustomCalleeSavedRegs ( MachineFunction & MF ) const

Definition at line 155 of file AArch64RegisterInfo.cpp.

References getCalleeSavedRegs(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), i, I, llvm::AArch64Subtarget::isXRegCustomCalleeSaved(), and llvm::MachineRegisterInfo::setCalleeSavedRegs().

Referenced by llvm::AArch64CallLowering::lowerFormalArguments().

◆ UpdateCustomCallPreservedMask()

void AArch64RegisterInfo::UpdateCustomCallPreservedMask	(	MachineFunction &	MF,
		const uint32_t **	Mask
	)		const

Definition at line 270 of file AArch64RegisterInfo.cpp.

References llvm::MachineFunction::allocateRegMask(), llvm::MachineOperand::getRegMaskSize(), llvm::MachineFunction::getSubtarget(), i, llvm::AArch64Subtarget::isXRegCustomCalleeSaved(), llvm::BitmaskEnumDetail::Mask(), memcpy(), and SubReg.

◆ useFPForScavengingIndex()

bool AArch64RegisterInfo::useFPForScavengingIndex ( const MachineFunction & MF ) const

override

Definition at line 437 of file AArch64RegisterInfo.cpp.

References assert(), llvm::MachineFunction::getInfo(), llvm::AArch64FunctionInfo::getStackSizeSVE(), llvm::MachineFunction::getSubtarget(), llvm::AArch64FunctionInfo::hasCalculatedStackSizeSVE(), llvm::AArch64FrameLowering::hasFP(), and llvm::AArch64Subtarget::hasSVE().

The documentation for this class was generated from the following files:

lib/Target/AArch64/AArch64RegisterInfo.h
lib/Target/AArch64/AArch64RegisterInfo.cpp

Public Member Functions

Static Public Member Functions

Detailed Description

Constructor & Destructor Documentation

◆ AArch64RegisterInfo()

Member Function Documentation

◆ cannotEliminateFrame()

◆ eliminateFrameIndex()

◆ emitReservedArgRegCallError()

◆ getBaseRegister()

◆ getCalleeSavedRegs()

◆ getCalleeSavedRegsViaCopy()

◆ getCallPreservedMask()

◆ getCrossCopyRegClass()

◆ getCSRFirstUseCost()

◆ getCustomEHPadPreservedMask()

◆ getDarwinCalleeSavedRegs()

◆ getDarwinCallPreservedMask()

◆ getFrameRegister()

◆ getLocalAddressRegister()

◆ getNoPreservedMask()

◆ getOffsetOpcodes()

◆ getPointerRegClass()

◆ getRegPressureLimit()

◆ getReservedRegs()

◆ getSEHRegNum()

◆ getSubClassWithSubReg()

◆ getThisReturnPreservedMask()

◆ getTLSCallPreservedMask()

◆ getWindowsStackProbePreservedMask()

◆ hasBasePointer()

◆ hasSVEArgsOrReturn()

◆ isAnyArgRegReserved()

◆ isAsmClobberable()

◆ isConstantPhysReg()

◆ isFrameOffsetLegal()

◆ isReservedReg()

◆ materializeFrameBaseRegister()

◆ needsFrameBaseReg()

◆ regNeedsCFI()

◆ requiresFrameIndexScavenging()

◆ requiresRegisterScavenging()

◆ requiresVirtualBaseRegisters()

◆ resolveFrameIndex()

◆ shouldCoalesce()

◆ UpdateCustomCalleeSavedRegs()

◆ UpdateCustomCallPreservedMask()

◆ useFPForScavengingIndex()