LLVM 20.0.0git
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#include "LoongArchISelLowering.h"
#include "LoongArch.h"
#include "LoongArchMachineFunctionInfo.h"
#include "LoongArchRegisterInfo.h"
#include "LoongArchSubtarget.h"
#include "LoongArchTargetMachine.h"
#include "MCTargetDesc/LoongArchBaseInfo.h"
#include "MCTargetDesc/LoongArchMCTargetDesc.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/RuntimeLibcallUtil.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/IntrinsicsLoongArch.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Support/MathExtras.h"
#include "LoongArchGenAsmMatcher.inc"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "loongarch-isel-lowering" |
#define | IOCSRRD_CASE(NAME, NODE) |
#define | IOCSRWR_CASE(NAME, NODE) |
#define | ASRT_LE_GT_CASE(NAME) |
#define | CRC_CASE_EXT_BINARYOP(NAME, NODE) |
#define | CRC_CASE_EXT_UNARYOP(NAME, NODE) |
#define | CSR_CASE(ID) |
#define | IOCSRRD_CASE(NAME, NODE) |
#define | NODE_NAME_CASE(node) |
#define | GET_REGISTER_MATCHER |
Variables | |
static cl::opt< bool > | ZeroDivCheck ("loongarch-check-zero-division", cl::Hidden, cl::desc("Trap on integer division by zero."), cl::init(false)) |
const MCPhysReg | ArgGPRs [] |
const MCPhysReg | ArgFPR32s [] |
const MCPhysReg | ArgFPR64s [] |
const MCPhysReg | ArgVRs [] |
const MCPhysReg | ArgXRs [] |
#define ASRT_LE_GT_CASE | ( | NAME | ) |
#define CRC_CASE_EXT_BINARYOP | ( | NAME, | |
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#define CRC_CASE_EXT_UNARYOP | ( | NAME, | |
NODE | |||
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#define CSR_CASE | ( | ID | ) |
#define DEBUG_TYPE "loongarch-isel-lowering" |
Definition at line 38 of file LoongArchISelLowering.cpp.
#define GET_REGISTER_MATCHER |
Definition at line 6011 of file LoongArchISelLowering.cpp.
#define IOCSRRD_CASE | ( | NAME, | |
NODE | |||
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#define IOCSRRD_CASE | ( | NAME, | |
NODE | |||
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#define IOCSRWR_CASE | ( | NAME, | |
NODE | |||
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#define NODE_NAME_CASE | ( | node | ) |
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Shuffle vectors by lane to generate more optimized instructions.
256-bit shuffles are always considered as 2-lane 128-bit shuffles.
Therefore, except for the following four cases, other cases are regarded as cross-lane shuffles, where optimization is relatively limited.
The first case is the closest to LoongArch instructions and the other cases need to be converted to it for processing.
This function may modify V1, V2 and Mask
Definition at line 1152 of file LoongArchISelLowering.cpp.
References DL, llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::None, and llvm::LoongArchISD::XVPERMI.
Referenced by lower256BitShuffle().
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Definition at line 4716 of file LoongArchISelLowering.cpp.
References llvm::LoongArchABI::ABI_ILP32D, llvm::LoongArchABI::ABI_ILP32F, llvm::LoongArchABI::ABI_ILP32S, llvm::LoongArchABI::ABI_LP64D, llvm::LoongArchABI::ABI_LP64F, llvm::LoongArchABI::ABI_LP64S, llvm::CCState::addLoc(), llvm::CCState::AllocateReg(), llvm::CCState::AllocateStack(), ArgFPR32s, ArgFPR64s, ArgGPRs, ArgVRs, ArgXRs, assert(), llvm::CCValAssign::BCvt, CC_LoongArchAssign2GRLen(), llvm::SmallVectorImpl< T >::clear(), DL, llvm::SmallVectorBase< Size_T >::empty(), llvm::CCValAssign::Full, llvm::CCState::getFirstUnallocated(), llvm::CCValAssign::getMem(), llvm::ISD::ArgFlagsTy::getNonZeroOrigAlign(), llvm::CCValAssign::getPending(), llvm::CCState::getPendingArgFlags(), llvm::CCState::getPendingLocs(), llvm::CCValAssign::getReg(), llvm::CCValAssign::Indirect, llvm::MVT::is128BitVector(), llvm::MVT::is256BitVector(), llvm::MVT::isFloatingPoint(), llvm::MVT::isScalarInteger(), llvm::ISD::ArgFlagsTy::isSplit(), llvm::ISD::ArgFlagsTy::isSplitEnd(), llvm_unreachable, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::report_fatal_error(), and llvm::SmallVectorBase< Size_T >::size().
Referenced by llvm::LoongArchTargetLowering::CanLowerReturn(), llvm::LoongArchTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerFormalArguments(), and llvm::LoongArchTargetLowering::LowerReturn().
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Definition at line 5005 of file LoongArchISelLowering.cpp.
References llvm::CCState::addLoc(), llvm::CCState::AllocateReg(), llvm::CCValAssign::getReg(), and llvm::report_fatal_error().
Referenced by llvm::LoongArchTargetLowering::LowerCall(), and llvm::LoongArchTargetLowering::LowerFormalArguments().
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Definition at line 4680 of file LoongArchISelLowering.cpp.
References llvm::CCState::addLoc(), llvm::CCState::AllocateReg(), llvm::CCState::AllocateStack(), ArgGPRs, llvm::CCValAssign::Full, llvm::CCValAssign::getLocVT(), llvm::CCValAssign::getMem(), llvm::ISD::ArgFlagsTy::getNonZeroOrigAlign(), llvm::CCValAssign::getReg(), llvm::CCValAssign::getValNo(), and llvm::CCValAssign::getValVT().
Referenced by CC_LoongArch().
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Definition at line 1934 of file LoongArchISelLowering.cpp.
References llvm::LLVMContext::emitError(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getNode(), and llvm::ISD::UNDEF.
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Definition at line 3450 of file LoongArchISelLowering.cpp.
References llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::LoadSDNode::getExtensionType(), llvm::MemSDNode::getMemoryVT(), llvm::VTSDNode::getVT(), llvm::ISD::LOAD, llvm::ISD::NON_EXTLOAD, llvm::ISD::SEXTLOAD, and llvm::ISD::ZEXTLOAD.
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Definition at line 4910 of file LoongArchISelLowering.cpp.
References llvm::CCValAssign::BCvt, llvm::ISD::BITCAST, DL, llvm::CCValAssign::Full, llvm::CCValAssign::getLocInfo(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getNode(), llvm::CCValAssign::getValVT(), llvm::CCValAssign::Indirect, llvm_unreachable, and llvm::LoongArchISD::MOVGR2FR_W_LA64.
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Definition at line 4986 of file LoongArchISelLowering.cpp.
References llvm::CCValAssign::BCvt, llvm::ISD::BITCAST, DL, llvm::CCValAssign::Full, llvm::CCValAssign::getLocInfo(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getNode(), llvm::CCValAssign::getValVT(), llvm_unreachable, and llvm::LoongArchISD::MOVFR2GR_S_LA64.
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Definition at line 2647 of file LoongArchISelLowering.cpp.
References DL, llvm::SelectionDAG::getConstant(), getLoongArchWOpcode(), llvm::SelectionDAG::getNode(), llvm_unreachable, N, llvm::ISD::ROTL, llvm::ISD::SUB, and llvm::ISD::TRUNCATE.
Referenced by llvm::LoongArchTargetLowering::ReplaceNodeResults(), and llvm::RISCVTargetLowering::ReplaceNodeResults().
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Definition at line 2681 of file LoongArchISelLowering.cpp.
References llvm::ISD::ANY_EXTEND, DL, llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getValueType(), N, llvm::ISD::SIGN_EXTEND_INREG, and llvm::ISD::TRUNCATE.
Referenced by llvm::LoongArchTargetLowering::ReplaceNodeResults(), and llvm::RISCVTargetLowering::ReplaceNodeResults().
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Definition at line 2693 of file LoongArchISelLowering.cpp.
References llvm::LLVMContext::emitError(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getUNDEF(), N, and Results.
Referenced by llvm::LoongArchTargetLowering::ReplaceNodeResults(), and replaceVPICKVE2GRResults().
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Definition at line 2351 of file LoongArchISelLowering.cpp.
References llvm::LLVMContext::emitError(), and llvm::SelectionDAG::getContext().
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Definition at line 2228 of file LoongArchISelLowering.cpp.
References llvm::LLVMContext::emitError(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getMergeValues(), and llvm::SelectionDAG::getUNDEF().
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Definition at line 4427 of file LoongArchISelLowering.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DL, llvm::LoongArchSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), Idx, llvm_unreachable, MI, MRI, and TII.
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Definition at line 4302 of file LoongArchISelLowering.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::addSuccessor(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), DL, llvm::MachineBasicBlock::end(), F, llvm::MachineBasicBlock::getBasicBlock(), llvm::LoongArchSubtarget::getInstrInfo(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm_unreachable, MI, MRI, llvm::MachineBasicBlock::splice(), TII, and llvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
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Determine whether a range fits a regular pattern of values.
This function accounts for the possibility of jumping over the End iterator.
Definition at line 436 of file LoongArchISelLowering.cpp.
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Definition at line 5684 of file LoongArchISelLowering.cpp.
References llvm::AtomicRMWInst::Add, llvm_unreachable, llvm::AtomicRMWInst::Max, llvm::AtomicRMWInst::Min, llvm::AtomicRMWInst::Nand, llvm::AtomicRMWInst::Sub, llvm::AtomicRMWInst::UMax, llvm::AtomicRMWInst::UMin, and llvm::AtomicRMWInst::Xchg.
Referenced by llvm::LoongArchTargetLowering::emitMaskedAtomicRMWIntrinsic(), and llvm::RISCVTargetLowering::emitMaskedAtomicRMWIntrinsic().
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Definition at line 2618 of file LoongArchISelLowering.cpp.
References llvm::LoongArchISD::CLZ_W, llvm::ISD::CTLZ, llvm::ISD::CTTZ, llvm::LoongArchISD::CTZ_W, llvm::LoongArchISD::DIV_WU, llvm_unreachable, llvm::LoongArchISD::MOD_WU, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::LoongArchISD::ROTR_W, llvm::ISD::SHL, llvm::LoongArchISD::SLL_W, llvm::ISD::SRA, llvm::LoongArchISD::SRA_W, llvm::ISD::SRL, llvm::LoongArchISD::SRL_W, llvm::ISD::UDIV, and llvm::ISD::UREM.
Referenced by customLegalizeToWOp().
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Definition at line 5257 of file LoongArchISelLowering.cpp.
References llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::DataLayout::getPrefTypeAlign(), and llvm::EVT::getTypeForEVT().
Referenced by llvm::SelectionDAG::CreateStackTemporary(), llvm::LoongArchTargetLowering::LowerCall(), and llvm::RISCVTargetLowering::LowerCall().
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Definition at line 1675 of file LoongArchISelLowering.cpp.
References llvm::SelectionDAG::getTargetBlockAddress(), and N.
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Definition at line 1681 of file LoongArchISelLowering.cpp.
References llvm::SelectionDAG::getTargetConstantPool(), and N.
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Definition at line 1670 of file LoongArchISelLowering.cpp.
References DL, llvm::SelectionDAG::getTargetGlobalAddress(), and N.
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Definition at line 1687 of file LoongArchISelLowering.cpp.
References llvm::SelectionDAG::getTargetJumpTable(), and N.
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Definition at line 4252 of file LoongArchISelLowering.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::addSuccessor(), llvm::BuildMI(), llvm::MachineFunction::CreateMachineBasicBlock(), DL, llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getBasicBlock(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getSubtarget(), llvm::MachineFunction::insert(), llvm::MachineOperand::isKill(), MBB, MI, llvm::MachineOperand::setIsKill(), TII, and ZeroDivCheck.
Referenced by llvm::MipsTargetLowering::EmitInstrWithCustomInserter().
Definition at line 1355 of file LoongArchISelLowering.cpp.
Referenced by isConstantOrUndefBUILD_VECTOR(), isVMerge(), llvm::PPC::isVPKUDUMShuffleMask(), llvm::PPC::isVPKUHUMShuffleMask(), llvm::PPC::isVPKUWUMShuffleMask(), and llvm::PPC::isVSLDOIShuffleMask().
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Definition at line 1365 of file LoongArchISelLowering.cpp.
References llvm::DWARFExpression::Operation::getNumOperands(), and isConstantOrUndef().
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Definition at line 3629 of file LoongArchISelLowering.cpp.
References DL, llvm::LLVMContext::emitError(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::LoongArchSubtarget::getGRLenVT(), llvm::SelectionDAG::getNode(), and llvm::ISD::UNDEF.
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Dispatching routine to lower various 128-bit LoongArch vector shuffles.
This routine breaks down the specific type of 128-bit shuffle and dispatches to the lowering routines accordingly.
Definition at line 830 of file LoongArchISelLowering.cpp.
References assert(), DL, llvm::SDValue::getSimpleValueType(), llvm::MVT::getVectorNumElements(), lowerVECTOR_SHUFFLE_VILVH(), lowerVECTOR_SHUFFLE_VILVL(), lowerVECTOR_SHUFFLE_VPACKEV(), lowerVECTOR_SHUFFLE_VPACKOD(), lowerVECTOR_SHUFFLE_VPICKEV(), lowerVECTOR_SHUFFLE_VPICKOD(), lowerVECTOR_SHUFFLE_VREPLVEI(), lowerVECTOR_SHUFFLE_VSHUF(), lowerVECTOR_SHUFFLE_VSHUF4I(), and llvm::MVT::SimpleTy.
Referenced by lowerVECTOR_SHUFFLE().
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Dispatching routine to lower various 256-bit LoongArch vector shuffles.
This routine breaks down the specific type of 256-bit shuffle and dispatches to the lowering routines accordingly.
Definition at line 1255 of file LoongArchISelLowering.cpp.
References assert(), canonicalizeShuffleVectorByLane(), DL, llvm::SDValue::getSimpleValueType(), llvm::MVT::getVectorNumElements(), lowerVECTOR_SHUFFLE_XVILVH(), lowerVECTOR_SHUFFLE_XVILVL(), lowerVECTOR_SHUFFLE_XVPACKEV(), lowerVECTOR_SHUFFLE_XVPACKOD(), lowerVECTOR_SHUFFLE_XVPICKEV(), lowerVECTOR_SHUFFLE_XVPICKOD(), lowerVECTOR_SHUFFLE_XVREPLVEI(), lowerVECTOR_SHUFFLE_XVSHUF(), lowerVECTOR_SHUFFLE_XVSHUF4I(), and llvm::MVT::SimpleTy.
Referenced by lowerVECTOR_SHUFFLE().
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Lower VECTOR_SHUFFLE into VILVH (if possible).
VILVH interleaves consecutive elements from the left (highest-indexed) half of each vector.
It is possible to lower into VILVH when the mask consists of two of the following forms interleaved: <x, x+1, x+2, ...> <n+x, n+x+1, n+x+2, ...> where n is the number of elements in the vector and x is half n. For example: <x, x, x+1, x+1, x+2, x+2, ...> <x, n+x, x+1, n+x+1, x+2, n+x+2, ...>
When undef's appear in the mask they are treated as if they were whatever value is necessary in order to fit the above forms.
Definition at line 650 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VILVH.
Referenced by lower128BitShuffle().
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Lower VECTOR_SHUFFLE into VILVL (if possible).
VILVL interleaves consecutive elements from the right (lowest-indexed) half of each vector.
It is possible to lower into VILVL when the mask consists of two of the following forms interleaved: <0, 1, 2, ...> <n, n+1, n+2, ...> where n is the number of elements in the vector. For example: <0, 0, 1, 1, 2, 2, ...> <0, n, 1, n+1, 2, n+2, ...>
When undef's appear in the mask they are treated as if they were whatever value is necessary in order to fit the above forms.
Definition at line 693 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VILVL.
Referenced by lower128BitShuffle().
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Lower VECTOR_SHUFFLE into VPACKEV (if possible).
VPACKEV interleaves the even elements from each vector.
It is possible to lower into VPACKEV when the mask consists of two of the following forms interleaved: <0, 2, 4, ...> <n, n+2, n+4, ...> where n is the number of elements in the vector. For example: <0, 0, 2, 2, 4, 4, ...> <0, n, 2, n+2, 4, n+4, ...>
When undef's appear in the mask they are treated as if they were whatever value is necessary in order to fit the above forms.
Definition at line 569 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VPACKEV.
Referenced by lower128BitShuffle(), and lowerVECTOR_SHUFFLE_XVPACKEV().
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Lower VECTOR_SHUFFLE into VPACKOD (if possible).
VPACKOD interleaves the odd elements from each vector.
It is possible to lower into VPACKOD when the mask consists of two of the following forms interleaved: <1, 3, 5, ...> <n+1, n+3, n+5, ...> where n is the number of elements in the vector. For example: <1, 1, 3, 3, 5, 5, ...> <1, n+1, 3, n+3, 5, n+5, ...>
When undef's appear in the mask they are treated as if they were whatever value is necessary in order to fit the above forms.
Definition at line 609 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VPACKOD.
Referenced by lower128BitShuffle(), and lowerVECTOR_SHUFFLE_XVPACKOD().
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Lower VECTOR_SHUFFLE into VPICKEV (if possible).
VPICKEV copies the even elements of each vector into the result vector.
It is possible to lower into VPICKEV when the mask consists of two of the following forms concatenated: <0, 2, 4, ...> <n, n+2, n+4, ...> where n is the number of elements in the vector. For example: <0, 2, 4, ..., 0, 2, 4, ...> <0, 2, 4, ..., n, n+2, n+4, ...>
When undef's appear in the mask they are treated as if they were whatever value is necessary in order to fit the above forms.
Definition at line 733 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VPICKEV.
Referenced by lower128BitShuffle().
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Lower VECTOR_SHUFFLE into VPICKOD (if possible).
VPICKOD copies the odd elements of each vector into the result vector.
It is possible to lower into VPICKOD when the mask consists of two of the following forms concatenated: <1, 3, 5, ...> <n+1, n+3, n+5, ...> where n is the number of elements in the vector. For example: <1, 3, 5, ..., 1, 3, 5, ...> <1, 3, 5, ..., n+1, n+3, n+5, ...>
When undef's appear in the mask they are treated as if they were whatever value is necessary in order to fit the above forms.
Definition at line 775 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VPICKOD.
Referenced by lower128BitShuffle().
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Lower VECTOR_SHUFFLE into VREPLVEI (if possible).
VREPLVEI performs vector broadcast based on an element specified by an integer immediate, with its mask being similar to: <x, x, x, ...> where x is any valid index.
When undef's appear in the mask they are treated as if they were whatever value is necessary in order to fit the above form.
Definition at line 464 of file LoongArchISelLowering.cpp.
References assert(), DL, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getUNDEF(), and llvm::LoongArchISD::VREPLVEI.
Referenced by lower128BitShuffle().
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Lower VECTOR_SHUFFLE into VSHUF.
This mostly consists of converting the shuffle mask into a BUILD_VECTOR and adding it as an operand to the resulting VSHUF.
Definition at line 805 of file LoongArchISelLowering.cpp.
References llvm::MVT::changeVectorElementTypeToInteger(), DL, llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::LoongArchISD::VSHUF.
Referenced by lower128BitShuffle().
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Lower VECTOR_SHUFFLE into VSHUF4I (if possible).
VSHUF4I splits the vector into blocks of four elements, then shuffles these elements according to a <4 x i2> constant (encoded as an integer immediate).
It is therefore possible to lower into VSHUF4I when the mask takes the form: <a, b, c, d, a+4, b+4, c+4, d+4, a+8, b+8, c+8, d+8, ...> When undef's appear they are treated as if they were whatever value is necessary in order to fit the above forms.
For example: %2 = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4> is lowered to: (VSHUF4I_H $v0, $v1, 27) where the 27 comes from: 3 + (2 << 2) + (1 << 4) + (0 << 6)
Definition at line 506 of file LoongArchISelLowering.cpp.
References DL, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), Idx, and llvm::LoongArchISD::VSHUF4I.
Referenced by lower128BitShuffle(), and lowerVECTOR_SHUFFLE_XVSHUF4I().
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Lower VECTOR_SHUFFLE into XVILVH (if possible).
Definition at line 940 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VILVH.
Referenced by lower256BitShuffle().
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Lower VECTOR_SHUFFLE into XVILVL (if possible).
Definition at line 979 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VILVL.
Referenced by lower256BitShuffle().
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Lower VECTOR_SHUFFLE into XVPACKEV (if possible).
Definition at line 926 of file LoongArchISelLowering.cpp.
References DL, and lowerVECTOR_SHUFFLE_VPACKEV().
Referenced by lower256BitShuffle().
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Lower VECTOR_SHUFFLE into XVPACKOD (if possible).
Definition at line 933 of file LoongArchISelLowering.cpp.
References DL, and lowerVECTOR_SHUFFLE_VPACKOD().
Referenced by lower256BitShuffle().
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Lower VECTOR_SHUFFLE into XVPICKEV (if possible).
Definition at line 1013 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VPICKEV.
Referenced by lower256BitShuffle().
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Lower VECTOR_SHUFFLE into XVPICKOD (if possible).
Definition at line 1048 of file LoongArchISelLowering.cpp.
References DL, End, llvm::SelectionDAG::getNode(), and llvm::LoongArchISD::VPICKOD.
Referenced by lower256BitShuffle().
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Lower VECTOR_SHUFFLE into XVREPLVEI (if possible).
It is a XVREPLVEI when the mask is: <x, x, x, ..., x+n, x+n, x+n, ...> where the number of x is equal to n and n is half the length of vector.
When undef's appear in the mask they are treated as if they were whatever value is necessary in order to fit the above form.
Definition at line 883 of file LoongArchISelLowering.cpp.
References assert(), DL, End, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getUNDEF(), and llvm::LoongArchISD::VREPLVEI.
Referenced by lower256BitShuffle().
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Lower VECTOR_SHUFFLE into XVSHUF (if possible).
Definition at line 1084 of file LoongArchISelLowering.cpp.
References assert(), llvm::MVT::changeVectorElementTypeToInteger(), DL, End, llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getTargetConstant(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorBase< Size_T >::size(), and llvm::LoongArchISD::VSHUF.
Referenced by lower256BitShuffle().
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Lower VECTOR_SHUFFLE into XVSHUF4I (if possible).
Definition at line 915 of file LoongArchISelLowering.cpp.
References DL, and lowerVECTOR_SHUFFLE_VSHUF4I().
Referenced by lower256BitShuffle().
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Definition at line 3673 of file LoongArchISelLowering.cpp.
References llvm::ISD::AND, DL, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::ISD::SHL, and truncateVecElts().
Referenced by performINTRINSIC_WO_CHAINCombine().
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Definition at line 3685 of file LoongArchISelLowering.cpp.
References llvm::ISD::AND, DL, llvm::LLVMContext::emitError(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarSizeInBits(), and llvm::ISD::UNDEF.
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Definition at line 3720 of file LoongArchISelLowering.cpp.
References DL, llvm::LLVMContext::emitError(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarSizeInBits(), llvm::ISD::UNDEF, and llvm::ISD::XOR.
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Definition at line 3703 of file LoongArchISelLowering.cpp.
References DL, llvm::LLVMContext::emitError(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarSizeInBits(), llvm::ISD::OR, and llvm::ISD::UNDEF.
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Definition at line 3646 of file LoongArchISelLowering.cpp.
References DL, llvm::LLVMContext::emitError(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), and llvm::ISD::UNDEF.
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Definition at line 3103 of file LoongArchISelLowering.cpp.
References llvm::LoongArchISD::BSTRPICK, DL, llvm::SelectionDAG::getConstant(), llvm::LoongArchSubtarget::getGRLenVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::ConstantSDNode::getSExtValue(), llvm::EVT::getSizeInBits(), llvm::ConstantSDNode::getZExtValue(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), llvm::isShiftedMask_64(), N, llvm::ISD::SHL, llvm::ISD::SRA, llvm::ISD::SRL, and llvm::SDNode::use_size().
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Definition at line 3614 of file LoongArchISelLowering.cpp.
References llvm::LoongArchISD::BITREV_4B, llvm::SelectionDAG::getNode(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), N, and llvm::LoongArchISD::REVB_2W.
Referenced by llvm::LoongArchTargetLowering::PerformDAGCombine().
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Definition at line 3737 of file LoongArchISelLowering.cpp.
References llvm::ISD::ADD, llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::CTLZ, llvm::ISD::CTPOP, DL, llvm::ISD::FADD, llvm::ISD::FDIV, llvm::ISD::FMA, llvm::ISD::FMUL, llvm::ISD::FSUB, llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getConstant(), llvm::LoongArchSubtarget::getGRLenVT(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), llvm::ISD::INSERT_VECTOR_ELT, lowerVectorBitClear(), llvm::ISD::MUL, N, llvm::ISD::OR, llvm::ISD::SDIV, llvm::ISD::SHL, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SUB, truncateVecElts(), llvm::ISD::UDIV, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UREM, llvm::LoongArchISD::VREPLVE, and llvm::ISD::XOR.
Referenced by llvm::LoongArchTargetLowering::PerformDAGCombine().
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Definition at line 3230 of file LoongArchISelLowering.cpp.
References llvm::ISD::AND, llvm::LoongArchISD::BSTRINS, llvm::SelectionDAG::computeKnownBits(), llvm::dbgs(), DL, llvm::SelectionDAG::getConstant(), llvm::LoongArchSubtarget::getGRLenVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::ConstantSDNode::getSExtValue(), llvm::EVT::getSizeInBits(), llvm::ConstantSDNode::getZExtValue(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), llvm::isShiftedMask_64(), llvm::APInt::isSubsetOf(), LLVM_DEBUG, N, llvm::ISD::SHL, llvm::ISD::SRL, std::swap(), and llvm::KnownBits::Zero.
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Definition at line 3545 of file LoongArchISelLowering.cpp.
References llvm::ISD::AND, CC, checkValueWidth(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getSetCC(), llvm::ConstantSDNode::getSExtValue(), llvm::SDNode::getValueType(), N, llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::ISD::SETEQ, llvm::ISD::SETNE, llvm::ISD::SEXTLOAD, llvm::ISD::TRUNCATE, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZEXTLOAD.
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Definition at line 3189 of file LoongArchISelLowering.cpp.
References llvm::ISD::AND, llvm::LoongArchISD::BSTRPICK, DL, llvm::SelectionDAG::getConstant(), llvm::LoongArchSubtarget::getGRLenVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::ConstantSDNode::getZExtValue(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), llvm::isShiftedMask_64(), and N.
Referenced by llvm::LoongArchTargetLowering::PerformDAGCombine(), and llvm::MipsSETargetLowering::PerformDAGCombine().
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Definition at line 2740 of file LoongArchISelLowering.cpp.
References llvm_unreachable, N, replaceVecCondBranchResults(), Results, llvm::LoongArchISD::VALL_NONZERO, llvm::LoongArchISD::VALL_ZERO, llvm::LoongArchISD::VANY_NONZERO, llvm::LoongArchISD::VANY_ZERO, llvm::LoongArchISD::VPICK_SEXT_ELT, and llvm::LoongArchISD::VPICK_ZEXT_ELT.
Referenced by llvm::LoongArchTargetLowering::ReplaceNodeResults().
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Definition at line 2726 of file LoongArchISelLowering.cpp.
References DL, llvm::LoongArchSubtarget::getGRLenVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValue(), N, Results, and llvm::ISD::TRUNCATE.
Referenced by replaceINTRINSIC_WO_CHAINResults().
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Definition at line 2705 of file LoongArchISelLowering.cpp.
References DL, emitErrorAndReplaceIntrinsicResults(), llvm::SelectionDAG::getConstant(), llvm::LoongArchSubtarget::getGRLenVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValue(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getValueType(), llvm::EVT::getVectorElementType(), Results, and llvm::ISD::TRUNCATE.
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Definition at line 3665 of file LoongArchISelLowering.cpp.
References llvm::ISD::AND, DL, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), and llvm::SDValue::getScalarValueSizeInBits().
Referenced by lowerMSABitClear(), lowerVectorBitClear(), and performINTRINSIC_WO_CHAINCombine().
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Definition at line 4961 of file LoongArchISelLowering.cpp.
References llvm::CCValAssign::BCvt, llvm::MachineFrameInfo::CreateFixedObject(), DL, llvm::CCValAssign::Full, llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getExtLoad(), llvm::MachinePointerInfo::getFixedStack(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::MVT::getIntegerVT(), llvm::CCValAssign::getLocInfo(), llvm::CCValAssign::getLocMemOffset(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getMachineFunction(), llvm::DataLayout::getPointerSizeInBits(), llvm::EVT::getStoreSize(), llvm::CCValAssign::getValVT(), llvm::CCValAssign::Indirect, llvm_unreachable, and llvm::ISD::NON_EXTLOAD.
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Definition at line 4928 of file LoongArchISelLowering.cpp.
References llvm::LoongArchMachineFunctionInfo::addSExt32Register(), llvm::BitWidth, convertLocVTToValVT(), DL, llvm::Function::getArg(), llvm::SelectionDAG::getCopyFromReg(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::Type::getIntegerBitWidth(), llvm::CCValAssign::getLocReg(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getMachineFunction(), llvm::TargetLoweringBase::getRegClassFor(), llvm::MachineFunction::getRegInfo(), llvm::EVT::getSimpleVT(), llvm::Value::getType(), and llvm::Type::isIntegerTy().
Definition at line 4662 of file LoongArchISelLowering.cpp.
Referenced by CC_LoongArch(), and llvm::RISCV::CC_RISCV().
Definition at line 4666 of file LoongArchISelLowering.cpp.
Referenced by CC_LoongArch(), and llvm::RISCV::CC_RISCV().
Definition at line 4657 of file LoongArchISelLowering.cpp.
Referenced by llvm::CC_CSKY_ABIV2_SOFT_64(), CC_LoongArch(), CC_LoongArchAssign2GRLen(), llvm::RISCV::CC_RISCV(), CC_RISCVAssign2XLen(), llvm::LoongArchTargetLowering::LowerFormalArguments(), and llvm::Ret_CSKY_ABIV2_SOFT_64().
Definition at line 4670 of file LoongArchISelLowering.cpp.
Referenced by CC_LoongArch().
Definition at line 4674 of file LoongArchISelLowering.cpp.
Referenced by CC_LoongArch().