28#define DEBUG_TYPE "csky-isel-lowering"
32#include "CSKYGenCallingConv.inc"
90 if (!Subtarget.
hasE2()) {
96 if (!Subtarget.
hasE2()) {
103 if (!Subtarget.
has2E3()) {
126 for (
auto VT : AllVTy) {
131 for (
auto CC : FPCCToExtend)
133 for (
auto Op : FPOpToExpand)
162 switch (Op.getOpcode()) {
166 return LowerGlobalAddress(Op, DAG);
168 return LowerExternalSymbol(Op, DAG);
170 return LowerGlobalTLSAddress(Op, DAG);
172 return LowerJumpTable(Op, DAG);
174 return LowerBlockAddress(Op, DAG);
176 return LowerConstantPool(Op, DAG);
178 return LowerVASTART(Op, DAG);
180 return LowerFRAMEADDR(Op, DAG);
182 return LowerRETURNADDR(Op, DAG);
237 RC = &CSKY::GPRRegClass;
241 : &CSKY::FPR32RegClass;
245 : &CSKY::FPR64RegClass;
278 ExtType,
DL, LocVT, Chain, FIN,
322SDValue CSKYTargetLowering::LowerFormalArguments(
338 std::vector<SDValue> OutChains;
344 CCInfo.AnalyzeFormalArguments(Ins, CCAssignFnForCall(CallConv, IsVarArg));
346 for (
unsigned i = 0, e = ArgLocs.
size(); i != e; ++i) {
363 const unsigned XLenInBytes = 4;
367 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs);
376 int VaArgOffset, VarArgsSaveSize;
381 VaArgOffset = CCInfo.getNextStackOffset();
384 VarArgsSaveSize = XLenInBytes * (ArgRegs.
size() -
Idx);
385 VaArgOffset = -VarArgsSaveSize;
395 for (
unsigned I =
Idx;
I < ArgRegs.
size();
396 ++
I, VaArgOffset += XLenInBytes) {
404 cast<StoreSDNode>(
Store.getNode())
406 ->setValue((
Value *)
nullptr);
407 OutChains.push_back(Store);
414 if (!OutChains.empty()) {
415 OutChains.push_back(Chain);
422bool CSKYTargetLowering::CanLowerReturn(
426 CCState CCInfo(CallConv, IsVarArg, MF, CSKYLocs, Context);
427 return CCInfo.CheckReturn(Outs, CCAssignFnForReturn(CallConv, IsVarArg));
442 CCInfo.AnalyzeReturn(Outs, CCAssignFnForReturn(CallConv, IsVarArg));
448 for (
unsigned i = 0, e = CSKYLocs.
size(); i < e; ++i) {
464 assert(RegLo < CSKY::R31 &&
"Invalid register pair");
488 RetOps.push_back(Glue);
500SDValue CSKYTargetLowering::LowerCall(CallLoweringInfo &CLI,
509 bool &IsTailCall = CLI.IsTailCall;
511 bool IsVarArg = CLI.IsVarArg;
521 ArgCCInfo.AnalyzeCallOperands(Outs, CCAssignFnForCall(CallConv, IsVarArg));
529 else if (CLI.CB && CLI.CB->isMustTailCall())
531 "site marked musttail");
534 unsigned NumBytes = ArgCCInfo.getNextStackOffset();
538 for (
unsigned i = 0, e = Outs.
size(); i != e; ++i) {
540 if (!
Flags.isByVal())
545 Align Alignment =
Flags.getNonZeroByValAlign();
566 for (
unsigned i = 0, j = 0, e = ArgLocs.
size(); i != e; ++i) {
583 if (RegLo == CSKY::R3) {
593 assert(RegLo < CSKY::R31 &&
"Invalid register pair");
604 ArgValue = ByValArgs[
j++];
611 assert(!IsTailCall &&
"Tail call not allowed if stack is used "
612 "for passing parameters");
628 if (!MemOpChains.
empty())
634 for (
auto &Reg : RegsToPass) {
641 bool IsRegCall =
false;
652 Ops.
push_back(getAddr<GlobalAddressSDNode, true>(S, DAG, IsLocal));
656 Ops.
push_back(getTargetConstantPoolValue(
665 Ops.
push_back(getAddr<ExternalSymbolSDNode, true>(S, DAG, IsLocal));
669 Ops.
push_back(getTargetConstantPoolValue(
679 for (
auto &Reg : RegsToPass)
686 assert(Mask &&
"Missing call preserved mask for calling convention");
715 RetCCInfo.AnalyzeCallResult(Ins, CCAssignFnForReturn(CallConv, IsVarArg));
718 for (
auto &VA : CSKYLocs) {
735 RetValue, RetValue2);
747 bool IsVarArg)
const {
749 return RetCC_CSKY_ABIV2_SOFT;
751 return RetCC_CSKY_ABIV2_FP;
755 bool IsVarArg)
const {
757 return CC_CSKY_ABIV2_SOFT;
759 return CC_CSKY_ABIV2_FP;
775 assert(0 &&
"unknown CSKYII Modifier");
782 unsigned Flags)
const {
790CSKYTargetLowering::getConstraintType(
StringRef Constraint)
const {
791 if (Constraint.
size() == 1) {
792 switch (Constraint[0]) {
811std::pair<unsigned, const TargetRegisterClass *>
815 if (Constraint.
size() == 1) {
816 switch (Constraint[0]) {
818 return std::make_pair(0U, &CSKY::GPRRegClass);
820 return std::make_pair(0U, &CSKY::mGPRRegClass);
822 return std::make_pair(0U, &CSKY::sGPRRegClass);
824 return std::make_pair(CSKY::R14, &CSKY::GPRRegClass);
826 return std::make_pair(CSKY::C, &CSKY::CARRYRegClass);
831 return std::make_pair(0U, &CSKY::sFPR32RegClass);
835 return std::make_pair(0U, &CSKY::sFPR64RegClass);
839 return std::make_pair(0U, &CSKY::sFPR32RegClass);
841 return std::make_pair(0U, &CSKY::FPR32RegClass);
843 return std::make_pair(0U, &CSKY::sFPR64RegClass);
845 return std::make_pair(0U, &CSKY::FPR64RegClass);
852 if (Constraint ==
"{c}")
853 return std::make_pair(CSKY::C, &CSKY::CARRYRegClass);
860 .
Case(
"{a0}", CSKY::R0)
861 .
Case(
"{a1}", CSKY::R1)
862 .
Case(
"{a2}", CSKY::R2)
863 .
Case(
"{a3}", CSKY::R3)
864 .
Case(
"{l0}", CSKY::R4)
865 .
Case(
"{l1}", CSKY::R5)
866 .
Case(
"{l2}", CSKY::R6)
867 .
Case(
"{l3}", CSKY::R7)
868 .
Case(
"{l4}", CSKY::R8)
869 .
Case(
"{l5}", CSKY::R9)
870 .
Case(
"{l6}", CSKY::R10)
871 .
Case(
"{l7}", CSKY::R11)
872 .
Case(
"{t0}", CSKY::R12)
873 .
Case(
"{t1}", CSKY::R13)
874 .
Case(
"{sp}", CSKY::R14)
875 .
Case(
"{lr}", CSKY::R15)
876 .
Case(
"{l8}", CSKY::R16)
877 .
Case(
"{l9}", CSKY::R17)
878 .
Case(
"{t2}", CSKY::R18)
879 .
Case(
"{t3}", CSKY::R19)
880 .
Case(
"{t4}", CSKY::R20)
881 .
Case(
"{t5}", CSKY::R21)
882 .
Case(
"{t6}", CSKY::R22)
883 .
Cases(
"{t7}",
"{fp}", CSKY::R23)
884 .
Cases(
"{t8}",
"{top}", CSKY::R24)
885 .
Cases(
"{t9}",
"{bsp}", CSKY::R25)
886 .
Case(
"{r26}", CSKY::R26)
887 .
Case(
"{r27}", CSKY::R27)
888 .
Cases(
"{gb}",
"{rgb}",
"{rdb}", CSKY::R28)
889 .
Cases(
"{tb}",
"{rtb}", CSKY::R29)
890 .
Case(
"{svbr}", CSKY::R30)
891 .
Case(
"{tls}", CSKY::R31)
894 if (XRegFromAlias != CSKY::NoRegister)
895 return std::make_pair(XRegFromAlias, &CSKY::GPRRegClass);
906 .
Cases(
"{fr0}",
"{vr0}", CSKY::F0_32)
907 .
Cases(
"{fr1}",
"{vr1}", CSKY::F1_32)
908 .
Cases(
"{fr2}",
"{vr2}", CSKY::F2_32)
909 .
Cases(
"{fr3}",
"{vr3}", CSKY::F3_32)
910 .
Cases(
"{fr4}",
"{vr4}", CSKY::F4_32)
911 .
Cases(
"{fr5}",
"{vr5}", CSKY::F5_32)
912 .
Cases(
"{fr6}",
"{vr6}", CSKY::F6_32)
913 .
Cases(
"{fr7}",
"{vr7}", CSKY::F7_32)
914 .
Cases(
"{fr8}",
"{vr8}", CSKY::F8_32)
915 .
Cases(
"{fr9}",
"{vr9}", CSKY::F9_32)
916 .
Cases(
"{fr10}",
"{vr10}", CSKY::F10_32)
917 .
Cases(
"{fr11}",
"{vr11}", CSKY::F11_32)
918 .
Cases(
"{fr12}",
"{vr12}", CSKY::F12_32)
919 .
Cases(
"{fr13}",
"{vr13}", CSKY::F13_32)
920 .
Cases(
"{fr14}",
"{vr14}", CSKY::F14_32)
921 .
Cases(
"{fr15}",
"{vr15}", CSKY::F15_32)
922 .
Cases(
"{fr16}",
"{vr16}", CSKY::F16_32)
923 .
Cases(
"{fr17}",
"{vr17}", CSKY::F17_32)
924 .
Cases(
"{fr18}",
"{vr18}", CSKY::F18_32)
925 .
Cases(
"{fr19}",
"{vr19}", CSKY::F19_32)
926 .
Cases(
"{fr20}",
"{vr20}", CSKY::F20_32)
927 .
Cases(
"{fr21}",
"{vr21}", CSKY::F21_32)
928 .
Cases(
"{fr22}",
"{vr22}", CSKY::F22_32)
929 .
Cases(
"{fr23}",
"{vr23}", CSKY::F23_32)
930 .
Cases(
"{fr24}",
"{vr24}", CSKY::F24_32)
931 .
Cases(
"{fr25}",
"{vr25}", CSKY::F25_32)
932 .
Cases(
"{fr26}",
"{vr26}", CSKY::F26_32)
933 .
Cases(
"{fr27}",
"{vr27}", CSKY::F27_32)
934 .
Cases(
"{fr28}",
"{vr28}", CSKY::F28_32)
935 .
Cases(
"{fr29}",
"{vr29}", CSKY::F29_32)
936 .
Cases(
"{fr30}",
"{vr30}", CSKY::F30_32)
937 .
Cases(
"{fr31}",
"{vr31}", CSKY::F31_32)
939 if (FReg != CSKY::NoRegister) {
940 assert(CSKY::F0_32 <= FReg && FReg <= CSKY::F31_32 &&
"Unknown fp-reg");
941 unsigned RegNo = FReg - CSKY::F0_32;
942 unsigned DReg = CSKY::F0_64 + RegNo;
945 return std::make_pair(DReg, &CSKY::sFPR64RegClass);
947 return std::make_pair(DReg, &CSKY::FPR64RegClass);
949 return std::make_pair(FReg, &CSKY::sFPR32RegClass);
951 return std::make_pair(FReg, &CSKY::FPR32RegClass);
980 F->insert(It, copyMBB);
981 F->insert(It, sinkMBB);
1016 MI.eraseFromParent();
1024 switch (
MI.getOpcode()) {
1029 if (Subtarget.
hasE2())
1043 unsigned Flags)
const {
1054 unsigned Flags)
const {
1064 unsigned Flags)
const {
1075 unsigned Flags)
const {
1085 unsigned Flags)
const {
1091 unsigned Flags)
const {
1097 unsigned Flags)
const {
1103 unsigned Flags)
const {
1110 unsigned Flags)
const {
1113 N->getOffset(), Flags);
1116const char *CSKYTargetLowering::getTargetNodeName(
unsigned Opcode)
const {
1121 return "CSKYISD::NIE";
1123 return "CSKYISD::NIR";
1125 return "CSKYISD::RET";
1127 return "CSKYISD::CALL";
1129 return "CSKYISD::CALLReg";
1131 return "CSKYISD::TAIL";
1133 return "CSKYISD::TAILReg";
1135 return "CSKYISD::LOAD_ADDR";
1137 return "CSKYISD::BITCAST_TO_LOHI";
1139 return "CSKYISD::BITCAST_FROM_LOHI";
1146 EVT Ty =
Op.getValueType();
1148 int64_t
Offset =
N->getOffset();
1152 SDValue Addr = getAddr<GlobalAddressSDNode, false>(
N, DAG, IsLocal);
1168 return getAddr(
N, DAG,
false);
1175 return getAddr<JumpTableSDNode, false>(
N, DAG);
1182 return getAddr(
N, DAG);
1190 return getAddr(
N, DAG);
1203 const Value *SV = cast<SrcValueSDNode>(
Op.getOperand(2))->getValue();
1215 EVT VT =
Op.getValueType();
1217 unsigned Depth = cast<ConstantSDNode>(
Op.getOperand(0))->getZExtValue();
1236 EVT VT =
Op.getValueType();
1238 unsigned Depth = cast<ConstantSDNode>(
Op.getOperand(0))->getZExtValue();
1240 SDValue FrameAddr = LowerFRAMEADDR(Op, DAG);
1252Register CSKYTargetLowering::getExceptionPointerRegister(
1253 const Constant *PersonalityFn)
const {
1257Register CSKYTargetLowering::getExceptionSelectorRegister(
1258 const Constant *PersonalityFn)
const {
1265 EVT Ty =
Op.getValueType();
1267 int64_t
Offset =
N->getOffset();
1274 Addr = getStaticTLSAddr(
N, DAG,
false);
1277 Addr = getStaticTLSAddr(
N, DAG,
true);
1281 Addr = getDynamicTLSAddr(
N, DAG);
1297 bool UseGOT)
const {
1307 bool AddCurrentAddr = UseGOT ?
true :
false;
1308 unsigned char PCAjust = UseGOT ? 4 : 0;
1312 Flag, AddCurrentAddr, CSKYPCLabelIndex);
1361 Args.push_back(Entry);
static const MCPhysReg GPRArgRegs[]
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
amdgpu Simplify well known AMD library false FunctionCallee Callee
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
static SDValue unpack64(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL)
static const MCPhysReg GPRArgRegs[]
static SDValue convertValVTToLocVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL)
static CSKYCP::CSKYCPModifier getModifier(unsigned Flags)
static SDValue unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL)
static SDValue convertLocVTToValVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL)
static MachineBasicBlock * emitSelectPseudo(MachineInstr &MI, MachineBasicBlock *BB, unsigned Opcode)
static SDValue unpackFromRegLoc(const CSKYSubtarget &Subtarget, SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL)
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
const HexagonInstrInfo * TII
unsigned const TargetRegisterInfo * TRI
typename CallsiteContextGraph< DerivedCCG, FuncTy, CallTy >::FuncInfo FuncInfo
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
LLVM Basic Block Representation.
CCState - This class holds information needed while lowering arguments and return values.
CCValAssign - Represent assignment of one arg/retval to a location.
unsigned getLocMemOffset() const
Register getLocReg() const
LocInfo getLocInfo() const
static CSKYConstantPoolConstant * Create(const Constant *C, CSKYCP::CSKYCPKind Kind, unsigned PCAdjust, CSKYCP::CSKYCPModifier Modifier, bool AddCurrentAddress, unsigned ID=0)
static CSKYConstantPoolJT * Create(Type *Ty, int JTI, unsigned PCAdj, CSKYCP::CSKYCPModifier Modifier)
static CSKYConstantPoolSymbol * Create(Type *Ty, const char *S, unsigned PCAdjust, CSKYCP::CSKYCPModifier Modifier)
CSKYConstantPoolValue - CSKY specific constantpool value.
unsigned createPICLabelUId()
void setVarArgsFrameIndex(int v)
void setVarArgsSaveSize(int Size)
Register getFrameRegister(const MachineFunction &MF) const override
bool hasFPUv2SingleFloat() const
bool hasFPUv3SingleFloat() const
const CSKYRegisterInfo * getRegisterInfo() const override
bool hasFPUv2DoubleFloat() const
bool useHardFloatABI() const
bool useHardFloat() const
bool hasFPUv3DoubleFloat() const
CSKYTargetLowering(const TargetMachine &TM, const CSKYSubtarget &STI)
EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context, EVT VT) const override
Return the ValueType of the result of SETCC operations.
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override
This callback is invoked for operations that are unsupported by the target, which are registered to u...
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Module * getParent()
Get the module that this global value is contained inside of...
Class to represent integer types.
This is an important class for using LLVM in a threaded context.
static MVT getIntegerVT(unsigned BitWidth)
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
void setFrameAddressIsTaken(bool T)
void setHasTailCall(bool V=true)
void setReturnAddressIsTaken(bool s)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Function & getFunction()
Return the LLVM function that this machine code represents.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Register addLiveIn(MCRegister PReg, const TargetRegisterClass *RC)
addLiveIn - Add the specified physical register as a live-in value and create a corresponding virtual...
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
Representation of each machine instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Wrapper class representing virtual and physical registers.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
SDNode * getNode() const
get the SDNode which holds the desired result
SDValue getValue(unsigned R) const
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
SDValue getTargetGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT, int64_t offset=0, unsigned TargetFlags=0)
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
MachineSDNode * getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT)
These are used for target selectors to create a new node with specified return type(s),...
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands,...
void addNoMergeSiteInfo(const SDNode *Node, bool NoMerge)
Set NoMergeSiteInfo to be associated with Node if NoMerge is true.
SDValue getTargetJumpTable(int JTI, EVT VT, unsigned TargetFlags=0)
SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, SDValue InGlue, const SDLoc &DL)
Return a new CALLSEQ_END node, which always must have a glue result (to ensure it's not CSE'd).
SDValue getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVol, bool AlwaysInline, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo, const AAMDNodes &AAInfo=AAMDNodes(), AAResults *AA=nullptr)
const DataLayout & getDataLayout() const
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
SDValue getCALLSEQ_START(SDValue Chain, uint64_t InSize, uint64_t OutSize, const SDLoc &DL)
Return a new CALLSEQ_START node, that starts new call frame, in which InSize bytes are set up inside ...
SDValue getRegister(unsigned Reg, EVT VT)
SDValue getExternalSymbol(const char *Sym, EVT VT)
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N)
SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL, bool isTarget=false)
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
SDValue getTargetBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset=0, unsigned TargetFlags=0)
MachineFunction & getMachineFunction() const
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT)
SDValue getFrameIndex(int FI, EVT VT, bool isTarget=false)
SDValue getRegisterMask(const uint32_t *RegMask)
LLVMContext * getContext() const
SDValue getTargetExternalSymbol(const char *Sym, EVT VT, unsigned TargetFlags=0)
SDValue getTargetConstantPool(const Constant *C, EVT VT, MaybeAlign Align=std::nullopt, int Offset=0, unsigned TargetFlags=0)
SDValue getEntryNode() const
Return the token chain corresponding to the entry of the function.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
constexpr size_t size() const
size - Get the string size.
std::string lower() const
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
StringSwitch & Cases(StringLiteral S0, StringLiteral S1, T Value)
TargetInstrInfo - Interface to description of machine instruction set.
void setBooleanVectorContents(BooleanContent Ty)
Specify how the target extends the result of a vector boolean value from a vector of i1 to a wider ty...
void setOperationAction(unsigned Op, MVT VT, LegalizeAction Action)
Indicate that the specified operation does not work with the specified type and indicate what to do a...
virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const
Return the register class that should be used for the specified value type.
const TargetMachine & getTargetMachine() const
void setMaxAtomicSizeInBitsSupported(unsigned SizeInBits)
Set the maximum atomic operation size supported by the backend.
void setMinFunctionAlignment(Align Alignment)
Set the target's minimum function alignment.
void setBooleanContents(BooleanContent Ty)
Specify how the target extends the result of integer and floating point boolean values from i1 to a w...
void computeRegisterProperties(const TargetRegisterInfo *TRI)
Once all of the register classes are added, this allows us to compute derived properties we expose.
void addRegisterClass(MVT VT, const TargetRegisterClass *RC)
Add the specified register class as an available regclass for the specified value type.
virtual MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
void setTruncStoreAction(MVT ValVT, MVT MemVT, LegalizeAction Action)
Indicate that the specified truncating store does not work with the specified type and indicate what ...
@ UndefinedBooleanContent
@ ZeroOrNegativeOneBooleanContent
void setStackPointerRegisterToSaveRestore(Register R)
If set to a physical register, this specifies the register that llvm.savestack/llvm....
void setCondCodeAction(ArrayRef< ISD::CondCode > CCs, MVT VT, LegalizeAction Action)
Indicate that the specified condition code is or isn't supported on the target and indicate what to d...
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT, LegalizeAction Action)
Indicate that the specified load with extension does not work with the specified type and indicate wh...
std::vector< ArgListEntry > ArgListTy
void setSchedulingPreference(Sched::Preference Pref)
Specify the target scheduling preference.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual ConstraintType getConstraintType(StringRef Constraint) const
Given a constraint, return the type of constraint it is for this target.
std::pair< SDValue, SDValue > LowerCallTo(CallLoweringInfo &CLI) const
This function lowers an abstract call to a function into an actual call.
bool isPositionIndependent() const
virtual std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const
Given a physical register constraint (e.g.
bool verifyReturnAddressArgumentIsConstant(SDValue Op, SelectionDAG &DAG) const
Primary interface to the complete machine description for the target machine.
TLSModel::Model getTLSModel(const GlobalValue *GV) const
Returns the TLS model which should be used for the given global variable.
bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetInstrInfo * getInstrInfo() const
static IntegerType * getIntNTy(LLVMContext &C, unsigned N)
static IntegerType * getInt32Ty(LLVMContext &C)
LLVM Value Representation.
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
@ BSWAP
Byte Swap and Counting operators.
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
@ ADD
Simple integer binary arithmetic operators.
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
@ ADDCARRY
Carry-using nodes for multiple precision addition and subtraction.
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ BR_CC
BR_CC - Conditional branch.
@ BR_JT
BR_JT - Jumptable branch.
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
LoadExtType
LoadExtType enum - This enum defines the three variants of LOADEXT (load with extension).
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
This struct is a compact representation of a valid (non-zero power of two) alignment.
EVT changeVectorElementTypeToInteger() const
Return a vector with the same number of elements as this vector, but with the element type converted ...
TypeSize getSizeInBits() const
Return the size of the specified value type in bits.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
bool isVector() const
Return true if this is a vector value type.
This class contains a discriminated union of information about pointers in memory operands,...
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
This structure contains all information that is necessary for lowering calls.