LLVM  14.0.0git
MipsCallLowering.cpp
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1 //===- MipsCallLowering.cpp -------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This file implements the lowering of LLVM calls to machine code calls for
11 /// GlobalISel.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "MipsCallLowering.h"
16 #include "MipsCCState.h"
17 #include "MipsMachineFunction.h"
18 #include "MipsTargetMachine.h"
19 #include "llvm/CodeGen/Analysis.h"
21 
22 using namespace llvm;
23 
25  : CallLowering(&TLI) {}
26 
28  /// This is the name of the function being called
29  /// FIXME: Relying on this is unsound
30  const char *Func = nullptr;
31 
32  /// Is this a return value, or an outgoing call operand.
33  bool IsReturn;
34 
35  MipsOutgoingValueAssigner(CCAssignFn *AssignFn_, const char *Func,
36  bool IsReturn)
37  : OutgoingValueAssigner(AssignFn_), Func(Func), IsReturn(IsReturn) {}
38 
39  bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
40  CCValAssign::LocInfo LocInfo,
42  CCState &State_) override {
43  MipsCCState &State = static_cast<MipsCCState &>(State_);
44 
45  if (IsReturn)
47  else
48  State.PreAnalyzeCallOperand(Info.Ty, Info.IsFixed, Func);
49 
51  ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State);
52  }
53 };
54 
56  /// This is the name of the function being called
57  /// FIXME: Relying on this is unsound
58  const char *Func = nullptr;
59 
60  /// Is this a call return value, or an incoming function argument.
61  bool IsReturn;
62 
63  MipsIncomingValueAssigner(CCAssignFn *AssignFn_, const char *Func,
64  bool IsReturn)
65  : IncomingValueAssigner(AssignFn_), Func(Func), IsReturn(IsReturn) {}
66 
67  bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
68  CCValAssign::LocInfo LocInfo,
70  CCState &State_) override {
71  MipsCCState &State = static_cast<MipsCCState &>(State_);
72 
73  if (IsReturn)
74  State.PreAnalyzeCallResult(Info.Ty, Func);
75  else
76  State.PreAnalyzeFormalArgument(Info.Ty, Flags);
77 
79  ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State);
80  }
81 };
82 
83 namespace {
84 class MipsIncomingValueHandler : public CallLowering::IncomingValueHandler {
85  const MipsSubtarget &STI;
86 
87 public:
88  MipsIncomingValueHandler(MachineIRBuilder &MIRBuilder,
90  : IncomingValueHandler(MIRBuilder, MRI),
91  STI(MIRBuilder.getMF().getSubtarget<MipsSubtarget>()) {}
92 
93 private:
94  void assignValueToReg(Register ValVReg, Register PhysReg,
95  CCValAssign &VA) override;
96 
97  Register getStackAddress(uint64_t Size, int64_t Offset,
98  MachinePointerInfo &MPO,
99  ISD::ArgFlagsTy Flags) override;
100  void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy,
101  MachinePointerInfo &MPO, CCValAssign &VA) override;
102 
103  unsigned assignCustomValue(CallLowering::ArgInfo &Arg,
104  ArrayRef<CCValAssign> VAs) override;
105 
106  virtual void markPhysRegUsed(unsigned PhysReg) {
107  MIRBuilder.getMRI()->addLiveIn(PhysReg);
108  MIRBuilder.getMBB().addLiveIn(PhysReg);
109  }
110 };
111 
112 class CallReturnHandler : public MipsIncomingValueHandler {
113 public:
114  CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
115  MachineInstrBuilder &MIB)
116  : MipsIncomingValueHandler(MIRBuilder, MRI), MIB(MIB) {}
117 
118 private:
119  void markPhysRegUsed(unsigned PhysReg) override {
120  MIB.addDef(PhysReg, RegState::Implicit);
121  }
122 
123  MachineInstrBuilder &MIB;
124 };
125 
126 } // end anonymous namespace
127 
128 void MipsIncomingValueHandler::assignValueToReg(Register ValVReg,
129  Register PhysReg,
130  CCValAssign &VA) {
131  markPhysRegUsed(PhysReg);
132  IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);
133 }
134 
135 Register MipsIncomingValueHandler::getStackAddress(uint64_t Size,
136  int64_t Offset,
137  MachinePointerInfo &MPO,
138  ISD::ArgFlagsTy Flags) {
139 
140  MachineFunction &MF = MIRBuilder.getMF();
141  MachineFrameInfo &MFI = MF.getFrameInfo();
142 
143  // FIXME: This should only be immutable for non-byval memory arguments.
144  int FI = MFI.CreateFixedObject(Size, Offset, true);
145  MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI);
146 
147  return MIRBuilder.buildFrameIndex(LLT::pointer(0, 32), FI).getReg(0);
148 }
149 
150 void MipsIncomingValueHandler::assignValueToAddress(Register ValVReg,
151  Register Addr, LLT MemTy,
152  MachinePointerInfo &MPO,
153  CCValAssign &VA) {
154  MachineFunction &MF = MIRBuilder.getMF();
155  auto MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, MemTy,
156  inferAlignFromPtrInfo(MF, MPO));
157  MIRBuilder.buildLoad(ValVReg, Addr, *MMO);
158 }
159 
160 /// Handle cases when f64 is split into 2 32-bit GPRs. This is a custom
161 /// assignment because generic code assumes getNumRegistersForCallingConv is
162 /// accurate. In this case it is not because the type/number are context
163 /// dependent on other arguments.
164 unsigned
165 MipsIncomingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg,
166  ArrayRef<CCValAssign> VAs) {
167  const CCValAssign &VALo = VAs[0];
168  const CCValAssign &VAHi = VAs[1];
169 
170  assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 &&
171  VALo.getValVT() == MVT::f64 && VAHi.getValVT() == MVT::f64 &&
172  "unexpected custom value");
173 
174  auto CopyLo = MIRBuilder.buildCopy(LLT::scalar(32), VALo.getLocReg());
175  auto CopyHi = MIRBuilder.buildCopy(LLT::scalar(32), VAHi.getLocReg());
176  if (!STI.isLittle())
177  std::swap(CopyLo, CopyHi);
178 
179  Arg.OrigRegs.assign(Arg.Regs.begin(), Arg.Regs.end());
180  Arg.Regs = { CopyLo.getReg(0), CopyHi.getReg(0) };
181  MIRBuilder.buildMerge(Arg.OrigRegs[0], {CopyLo, CopyHi});
182 
183  markPhysRegUsed(VALo.getLocReg());
184  markPhysRegUsed(VAHi.getLocReg());
185  return 2;
186 }
187 
188 namespace {
189 class MipsOutgoingValueHandler : public CallLowering::OutgoingValueHandler {
190  const MipsSubtarget &STI;
191 
192 public:
193  MipsOutgoingValueHandler(MachineIRBuilder &MIRBuilder,
195  : OutgoingValueHandler(MIRBuilder, MRI),
196  STI(MIRBuilder.getMF().getSubtarget<MipsSubtarget>()), MIB(MIB) {}
197 
198 private:
199  void assignValueToReg(Register ValVReg, Register PhysReg,
200  CCValAssign &VA) override;
201 
202  Register getStackAddress(uint64_t Size, int64_t Offset,
203  MachinePointerInfo &MPO,
204  ISD::ArgFlagsTy Flags) override;
205 
206  void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy,
207  MachinePointerInfo &MPO, CCValAssign &VA) override;
208  unsigned assignCustomValue(CallLowering::ArgInfo &Arg,
209  ArrayRef<CCValAssign> VAs) override;
210 
211  MachineInstrBuilder &MIB;
212 };
213 } // end anonymous namespace
214 
215 void MipsOutgoingValueHandler::assignValueToReg(Register ValVReg,
216  Register PhysReg,
217  CCValAssign &VA) {
218  Register ExtReg = extendRegister(ValVReg, VA);
219  MIRBuilder.buildCopy(PhysReg, ExtReg);
220  MIB.addUse(PhysReg, RegState::Implicit);
221 }
222 
223 Register MipsOutgoingValueHandler::getStackAddress(uint64_t Size,
224  int64_t Offset,
225  MachinePointerInfo &MPO,
226  ISD::ArgFlagsTy Flags) {
227  MachineFunction &MF = MIRBuilder.getMF();
229 
230  LLT p0 = LLT::pointer(0, 32);
231  LLT s32 = LLT::scalar(32);
232  auto SPReg = MIRBuilder.buildCopy(p0, Register(Mips::SP));
233 
234  auto OffsetReg = MIRBuilder.buildConstant(s32, Offset);
235  auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg);
236  return AddrReg.getReg(0);
237 }
238 
239 void MipsOutgoingValueHandler::assignValueToAddress(Register ValVReg,
240  Register Addr, LLT MemTy,
241  MachinePointerInfo &MPO,
242  CCValAssign &VA) {
243  MachineFunction &MF = MIRBuilder.getMF();
244  uint64_t LocMemOffset = VA.getLocMemOffset();
245 
246  auto MMO = MF.getMachineMemOperand(
247  MPO, MachineMemOperand::MOStore, MemTy,
248  commonAlignment(STI.getStackAlignment(), LocMemOffset));
249 
250  Register ExtReg = extendRegister(ValVReg, VA);
251  MIRBuilder.buildStore(ExtReg, Addr, *MMO);
252 }
253 
254 unsigned
255 MipsOutgoingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg,
256  ArrayRef<CCValAssign> VAs) {
257  const CCValAssign &VALo = VAs[0];
258  const CCValAssign &VAHi = VAs[1];
259 
260  assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 &&
261  VALo.getValVT() == MVT::f64 && VAHi.getValVT() == MVT::f64 &&
262  "unexpected custom value");
263 
264  auto Unmerge =
265  MIRBuilder.buildUnmerge({LLT::scalar(32), LLT::scalar(32)}, Arg.Regs[0]);
266  Register Lo = Unmerge.getReg(0);
267  Register Hi = Unmerge.getReg(1);
268 
269  Arg.OrigRegs.assign(Arg.Regs.begin(), Arg.Regs.end());
270  Arg.Regs = { Lo, Hi };
271  if (!STI.isLittle())
272  std::swap(Lo, Hi);
273 
274  MIRBuilder.buildCopy(VALo.getLocReg(), Lo);
275  MIRBuilder.buildCopy(VAHi.getLocReg(), Hi);
276  return 2;
277 }
278 
279 static bool isSupportedArgumentType(Type *T) {
280  if (T->isIntegerTy())
281  return true;
282  if (T->isPointerTy())
283  return true;
284  if (T->isFloatingPointTy())
285  return true;
286  return false;
287 }
288 
289 static bool isSupportedReturnType(Type *T) {
290  if (T->isIntegerTy())
291  return true;
292  if (T->isPointerTy())
293  return true;
294  if (T->isFloatingPointTy())
295  return true;
296  if (T->isAggregateType())
297  return true;
298  return false;
299 }
300 
302  const Value *Val, ArrayRef<Register> VRegs,
303  FunctionLoweringInfo &FLI) const {
304 
305  MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(Mips::RetRA);
306 
307  if (Val != nullptr && !isSupportedReturnType(Val->getType()))
308  return false;
309 
310  if (!VRegs.empty()) {
311  MachineFunction &MF = MIRBuilder.getMF();
312  const Function &F = MF.getFunction();
313  const DataLayout &DL = MF.getDataLayout();
314  const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
315 
316  SmallVector<ArgInfo, 8> RetInfos;
317 
318  ArgInfo ArgRetInfo(VRegs, *Val, 0);
320  splitToValueTypes(ArgRetInfo, RetInfos, DL, F.getCallingConv());
321 
324 
325  MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
326  F.getContext());
327 
328  MipsOutgoingValueHandler RetHandler(MIRBuilder, MF.getRegInfo(), Ret);
329  std::string FuncName = F.getName().str();
331  FuncName.c_str(), /*IsReturn*/ true);
332 
333  if (!determineAssignments(Assigner, RetInfos, CCInfo))
334  return false;
335 
336  if (!handleAssignments(RetHandler, RetInfos, CCInfo, ArgLocs, MIRBuilder))
337  return false;
338  }
339 
340  MIRBuilder.insertInstr(Ret);
341  return true;
342 }
343 
345  const Function &F,
347  FunctionLoweringInfo &FLI) const {
348 
349  // Quick exit if there aren't any args.
350  if (F.arg_empty())
351  return true;
352 
353  for (auto &Arg : F.args()) {
354  if (!isSupportedArgumentType(Arg.getType()))
355  return false;
356  }
357 
358  MachineFunction &MF = MIRBuilder.getMF();
359  const DataLayout &DL = MF.getDataLayout();
360  const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
361 
362  SmallVector<ArgInfo, 8> ArgInfos;
363  unsigned i = 0;
364  for (auto &Arg : F.args()) {
365  ArgInfo AInfo(VRegs[i], Arg, i);
367 
368  splitToValueTypes(AInfo, ArgInfos, DL, F.getCallingConv());
369  ++i;
370  }
371 
373 
375  MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
376  F.getContext());
377 
378  const MipsTargetMachine &TM =
379  static_cast<const MipsTargetMachine &>(MF.getTarget());
380  const MipsABIInfo &ABI = TM.getABI();
381  CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(F.getCallingConv()),
382  Align(1));
383 
384  const std::string FuncName = F.getName().str();
385  MipsIncomingValueAssigner Assigner(TLI.CCAssignFnForCall(), FuncName.c_str(),
386  /*IsReturn*/ false);
387  if (!determineAssignments(Assigner, ArgInfos, CCInfo))
388  return false;
389 
390  MipsIncomingValueHandler Handler(MIRBuilder, MF.getRegInfo());
391  if (!handleAssignments(Handler, ArgInfos, CCInfo, ArgLocs, MIRBuilder))
392  return false;
393 
394  if (F.isVarArg()) {
395  ArrayRef<MCPhysReg> ArgRegs = ABI.GetVarArgRegs();
396  unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs);
397 
398  int VaArgOffset;
399  unsigned RegSize = 4;
400  if (ArgRegs.size() == Idx)
401  VaArgOffset = alignTo(CCInfo.getNextStackOffset(), RegSize);
402  else {
403  VaArgOffset =
404  (int)ABI.GetCalleeAllocdArgSizeInBytes(CCInfo.getCallingConv()) -
405  (int)(RegSize * (ArgRegs.size() - Idx));
406  }
407 
408  MachineFrameInfo &MFI = MF.getFrameInfo();
409  int FI = MFI.CreateFixedObject(RegSize, VaArgOffset, true);
410  MF.getInfo<MipsFunctionInfo>()->setVarArgsFrameIndex(FI);
411 
412  for (unsigned I = Idx; I < ArgRegs.size(); ++I, VaArgOffset += RegSize) {
413  MIRBuilder.getMBB().addLiveIn(ArgRegs[I]);
414  LLT RegTy = LLT::scalar(RegSize * 8);
415  MachineInstrBuilder Copy =
416  MIRBuilder.buildCopy(RegTy, Register(ArgRegs[I]));
417  FI = MFI.CreateFixedObject(RegSize, VaArgOffset, true);
419 
420  const LLT PtrTy = LLT::pointer(MPO.getAddrSpace(), 32);
421  auto FrameIndex = MIRBuilder.buildFrameIndex(PtrTy, FI);
423  MPO, MachineMemOperand::MOStore, RegTy, Align(RegSize));
424  MIRBuilder.buildStore(Copy, FrameIndex, *MMO);
425  }
426  }
427 
428  return true;
429 }
430 
432  CallLoweringInfo &Info) const {
433 
434  if (Info.CallConv != CallingConv::C)
435  return false;
436 
437  for (auto &Arg : Info.OrigArgs) {
438  if (!isSupportedArgumentType(Arg.Ty))
439  return false;
440  if (Arg.Flags[0].isByVal())
441  return false;
442  if (Arg.Flags[0].isSRet() && !Arg.Ty->isPointerTy())
443  return false;
444  }
445 
446  if (!Info.OrigRet.Ty->isVoidTy() && !isSupportedReturnType(Info.OrigRet.Ty))
447  return false;
448 
449  MachineFunction &MF = MIRBuilder.getMF();
450  const Function &F = MF.getFunction();
451  const DataLayout &DL = MF.getDataLayout();
452  const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
453  const MipsTargetMachine &TM =
454  static_cast<const MipsTargetMachine &>(MF.getTarget());
455  const MipsABIInfo &ABI = TM.getABI();
456 
457  MachineInstrBuilder CallSeqStart =
458  MIRBuilder.buildInstr(Mips::ADJCALLSTACKDOWN);
459 
460  const bool IsCalleeGlobalPIC =
461  Info.Callee.isGlobal() && TM.isPositionIndependent();
462 
463  MachineInstrBuilder MIB = MIRBuilder.buildInstrNoInsert(
464  Info.Callee.isReg() || IsCalleeGlobalPIC ? Mips::JALRPseudo : Mips::JAL);
465  MIB.addDef(Mips::SP, RegState::Implicit);
466  if (IsCalleeGlobalPIC) {
467  Register CalleeReg =
469  MachineInstr *CalleeGlobalValue =
470  MIRBuilder.buildGlobalValue(CalleeReg, Info.Callee.getGlobal());
471  if (!Info.Callee.getGlobal()->hasLocalLinkage())
472  CalleeGlobalValue->getOperand(1).setTargetFlags(MipsII::MO_GOT_CALL);
473  MIB.addUse(CalleeReg);
474  } else
475  MIB.add(Info.Callee);
477  MIB.addRegMask(TRI->getCallPreservedMask(MF, Info.CallConv));
478 
479  TargetLowering::ArgListTy FuncOrigArgs;
480  FuncOrigArgs.reserve(Info.OrigArgs.size());
481 
482  SmallVector<ArgInfo, 8> ArgInfos;
483  for (auto &Arg : Info.OrigArgs)
484  splitToValueTypes(Arg, ArgInfos, DL, Info.CallConv);
485 
487  bool IsCalleeVarArg = false;
488  if (Info.Callee.isGlobal()) {
489  const Function *CF = static_cast<const Function *>(Info.Callee.getGlobal());
490  IsCalleeVarArg = CF->isVarArg();
491  }
492 
493  // FIXME: Should use MipsCCState::getSpecialCallingConvForCallee, but it
494  // depends on looking directly at the call target.
495  MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs,
496  F.getContext());
497 
498  CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(Info.CallConv),
499  Align(1));
500 
501  const char *Call =
502  Info.Callee.isSymbol() ? Info.Callee.getSymbolName() : nullptr;
503 
504  MipsOutgoingValueAssigner Assigner(TLI.CCAssignFnForCall(), Call,
505  /*IsReturn*/ false);
506  if (!determineAssignments(Assigner, ArgInfos, CCInfo))
507  return false;
508 
509  MipsOutgoingValueHandler ArgHandler(MIRBuilder, MF.getRegInfo(), MIB);
510  if (!handleAssignments(ArgHandler, ArgInfos, CCInfo, ArgLocs, MIRBuilder))
511  return false;
512 
513  unsigned NextStackOffset = CCInfo.getNextStackOffset();
514  unsigned StackAlignment = F.getParent()->getOverrideStackAlignment();
515  if (!StackAlignment) {
517  StackAlignment = TFL->getStackAlignment();
518  }
519  NextStackOffset = alignTo(NextStackOffset, StackAlignment);
520  CallSeqStart.addImm(NextStackOffset).addImm(0);
521 
522  if (IsCalleeGlobalPIC) {
523  MIRBuilder.buildCopy(
524  Register(Mips::GP),
526  MIB.addDef(Mips::GP, RegState::Implicit);
527  }
528  MIRBuilder.insertInstr(MIB);
529  if (MIB->getOpcode() == Mips::JALRPseudo) {
530  const MipsSubtarget &STI =
531  static_cast<const MipsSubtarget &>(MIRBuilder.getMF().getSubtarget());
532  MIB.constrainAllUses(MIRBuilder.getTII(), *STI.getRegisterInfo(),
533  *STI.getRegBankInfo());
534  }
535 
536  if (!Info.OrigRet.Ty->isVoidTy()) {
537  ArgInfos.clear();
538 
539  CallLowering::splitToValueTypes(Info.OrigRet, ArgInfos, DL,
540  F.getCallingConv());
541 
542  const std::string FuncName = F.getName().str();
546  FuncName.c_str(),
547  /*IsReturn*/ true);
548  CallReturnHandler RetHandler(MIRBuilder, MF.getRegInfo(), MIB);
549 
550  MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
551  F.getContext());
552 
553  if (!determineAssignments(Assigner, ArgInfos, CCInfo))
554  return false;
555 
556  if (!handleAssignments(RetHandler, ArgInfos, CCInfo, ArgLocs, MIRBuilder))
557  return false;
558  }
559 
560  MIRBuilder.buildInstr(Mips::ADJCALLSTACKUP).addImm(NextStackOffset).addImm(0);
561 
562  return true;
563 }
llvm::CallingConv::C
@ C
C - The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::CCValAssign::getLocVT
MVT getLocVT() const
Definition: CallingConvLower.h:153
i
i
Definition: README.txt:29
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:148
ABI
Generic address nodes are lowered to some combination of target independent and machine specific ABI
Definition: Relocation.txt:34
llvm::MipsTargetMachine
Definition: MipsTargetMachine.h:27
llvm::MipsCCState::PreAnalyzeReturnValue
void PreAnalyzeReturnValue(EVT ArgVT)
Definition: MipsCCState.cpp:129
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:131
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::MachineIRBuilder::buildGlobalValue
MachineInstrBuilder buildGlobalValue(const DstOp &Res, const GlobalValue *GV)
Build and insert Res = G_GLOBAL_VALUE GV.
Definition: MachineIRBuilder.cpp:146
MipsOutgoingValueAssigner
Definition: MipsCallLowering.cpp:27
llvm::MipsCCState::PreAnalyzeFormalArgument
void PreAnalyzeFormalArgument(const Type *ArgTy, ISD::ArgFlagsTy Flags)
Definition: MipsCCState.cpp:157
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:112
llvm::TargetFrameLowering
Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:43
llvm::CallLowering::handleAssignments
bool handleAssignments(ValueHandler &Handler, SmallVectorImpl< ArgInfo > &Args, CCState &CCState, SmallVectorImpl< CCValAssign > &ArgLocs, MachineIRBuilder &MIRBuilder, Register ThisReturnReg=Register()) const
Use Handler to insert code to handle the argument/return values represented by Args.
Definition: CallLowering.cpp:607
llvm::CCState
CCState - This class holds information needed while lowering arguments and return values.
Definition: CallingConvLower.h:191
llvm::MipsABIInfo
Definition: MipsABIInfo.h:22
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::MachineInstrBuilder::add
const MachineInstrBuilder & add(const MachineOperand &MO) const
Definition: MachineInstrBuilder.h:224
llvm::Function
Definition: Function.h:61
llvm::MipsCallLowering::lowerFormalArguments
bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< ArrayRef< Register >> VRegs, FunctionLoweringInfo &FLI) const override
This hook must be implemented to lower the incoming (formal) arguments, described by VRegs,...
Definition: MipsCallLowering.cpp:344
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::MachineFunction::getMachineMemOperand
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Definition: MachineFunction.cpp:430
llvm::MipsISD::Lo
@ Lo
Definition: MipsISelLowering.h:79
llvm::MipsCallLowering::MipsCallLowering
MipsCallLowering(const MipsTargetLowering &TLI)
Definition: MipsCallLowering.cpp:24
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
MipsOutgoingValueAssigner::IsReturn
bool IsReturn
Is this a return value, or an outgoing call operand.
Definition: MipsCallLowering.cpp:33
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
llvm::CallLowering::OutgoingValueHandler
Base class for ValueHandlers used for arguments passed to a function call, or for return values.
Definition: CallLowering.h:326
MipsIncomingValueAssigner::IsReturn
bool IsReturn
Is this a call return value, or an incoming function argument.
Definition: MipsCallLowering.cpp:61
llvm::RegState::Implicit
@ Implicit
Not emitted register (e.g. carry, or temporary result).
Definition: MachineInstrBuilder.h:46
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:128
llvm::CallLowering::splitToValueTypes
void splitToValueTypes(const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) const
Break OrigArgInfo into one or more pieces the calling convention can process, returned in SplitArgs.
Definition: CallLowering.cpp:211
T
#define T
Definition: Mips16ISelLowering.cpp:341
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::MachineIRBuilder::buildInstrNoInsert
MachineInstrBuilder buildInstrNoInsert(unsigned Opcode)
Build but don't insert <empty> = Opcode <empty>.
Definition: MachineIRBuilder.cpp:40
llvm::MipsISD::Ret
@ Ret
Definition: MipsISelLowering.h:116
MachineIRBuilder.h
llvm::MipsSubtarget::getStackAlignment
Align getStackAlignment() const
Definition: MipsSubtarget.h:360
isSupportedReturnType
static bool isSupportedReturnType(Type *T)
Definition: MipsCallLowering.cpp:289
MipsIncomingValueAssigner::assignArg
bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, CCState &State_) override
Wrap call to (typically tablegenerated CCAssignFn).
Definition: MipsCallLowering.cpp:67
MipsTargetMachine.h
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::ArrayRef::empty
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:160
llvm::MipsFunctionInfo
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
Definition: MipsMachineFunction.h:25
F
#define F(x, y, z)
Definition: MD5.cpp:56
llvm::MipsISD::Hi
@ Hi
Definition: MipsISelLowering.h:75
llvm::MipsSubtarget::getRegisterInfo
const MipsRegisterInfo * getRegisterInfo() const override
Definition: MipsSubtarget.h:386
Arg
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
Definition: AMDGPULibCalls.cpp:206
llvm::MachineInstrBuilder::addDef
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
Definition: MachineInstrBuilder.h:116
llvm::TargetFrameLowering::getStackAlignment
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:95
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:636
MipsCallLowering.h
llvm::CCValAssign
CCValAssign - Represent assignment of one arg/retval to a location.
Definition: CallingConvLower.h:33
llvm::CCValAssign::getLocReg
Register getLocReg() const
Definition: CallingConvLower.h:150
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:724
llvm::CallLowering::ArgInfo
Definition: CallLowering.h:61
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:35
llvm::MachineInstr::getOperand
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:499
llvm::MVT::f64
@ f64
Definition: MachineValueType.h:56
int
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
Definition: README.txt:536
llvm::MipsSubtarget::getRegBankInfo
const RegisterBankInfo * getRegBankInfo() const override
Definition: MipsSubtarget.cpp:289
llvm::CallLowering::OutgoingValueAssigner
Definition: CallLowering.h:219
llvm::CallLowering::determineAssignments
bool determineAssignments(ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, CCState &CCInfo) const
Analyze the argument list in Args, using Assigner to populate CCInfo.
Definition: CallLowering.cpp:546
llvm::MachineIRBuilder::getMF
MachineFunction & getMF()
Getter for the function we currently build.
Definition: MachineIRBuilder.h:262
llvm::CallLowering::IncomingValueHandler
Base class for ValueHandlers used for arguments coming into the current function, or for return value...
Definition: CallLowering.h:311
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::MachineOperand::setTargetFlags
void setTargetFlags(unsigned F)
Definition: MachineOperand.h:224
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::CCValAssign::getLocMemOffset
unsigned getLocMemOffset() const
Definition: CallingConvLower.h:151
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::MipsCCState::PreAnalyzeCallResult
void PreAnalyzeCallResult(const Type *RetTy, const char *Func)
Definition: MipsCCState.h:145
MipsOutgoingValueAssigner::assignArg
bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, CCState &State_) override
Wrap call to (typically tablegenerated CCAssignFn).
Definition: MipsCallLowering.cpp:39
llvm::CCAssignFn
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
Definition: CallingConvLower.h:177
llvm::MipsSubtarget::isLittle
bool isLittle() const
Definition: MipsSubtarget.h:281
llvm::MipsII::MO_GOT_CALL
@ MO_GOT_CALL
MO_GOT_CALL - Represents the offset into the global offset table at which the address of a call site ...
Definition: MipsBaseInfo.h:44
llvm::LLT::pointer
static LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
Definition: LowLevelTypeImpl.h:50
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:626
llvm::AttributeList::ReturnIndex
@ ReturnIndex
Definition: Attributes.h:401
llvm::CCValAssign::LocInfo
LocInfo
Definition: CallingConvLower.h:35
llvm::MachineIRBuilder
Helper class to build MachineInstr.
Definition: MachineIRBuilder.h:212
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::MachineInstrBuilder
Definition: MachineInstrBuilder.h:69
uint64_t
Addr
uint64_t Addr
Definition: ELFObjHandler.cpp:80
llvm::MipsTargetLowering::CCAssignFnForCall
CCAssignFn * CCAssignFnForCall() const
Definition: MipsISelLowering.cpp:2997
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:38
llvm::inferAlignFromPtrInfo
Align inferAlignFromPtrInfo(MachineFunction &MF, const MachinePointerInfo &MPO)
Definition: Utils.cpp:647
llvm::EVT::getEVT
static EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
Definition: ValueTypes.cpp:558
I
#define I(x, y, z)
Definition: MD5.cpp:59
Analysis.h
MipsMachineFunction.h
llvm::MipsCallLowering::lowerCall
bool lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override
This hook must be implemented to lower the given call instruction, including argument and return valu...
Definition: MipsCallLowering.cpp:431
llvm::CCState::getCallingConv
CallingConv::ID getCallingConv() const
Definition: CallingConvLower.h:259
MipsIncomingValueAssigner
Definition: MipsCallLowering.cpp:55
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineFrameInfo::CreateFixedObject
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
Definition: MachineFrameInfo.cpp:83
llvm::FunctionLoweringInfo
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
Definition: FunctionLoweringInfo.h:53
llvm::MachineIRBuilder::getMBB
const MachineBasicBlock & getMBB() const
Getter for the basic block we currently build.
Definition: MachineIRBuilder.h:287
MipsOutgoingValueAssigner::MipsOutgoingValueAssigner
MipsOutgoingValueAssigner(CCAssignFn *AssignFn_, const char *Func, bool IsReturn)
Definition: MipsCallLowering.cpp:35
std::swap
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
Definition: BitVector.h:840
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:642
llvm::MachineRegisterInfo::createGenericVirtualRegister
Register createGenericVirtualRegister(LLT Ty, StringRef Name="")
Create and return a new generic virtual register with low-level type Ty.
Definition: MachineRegisterInfo.cpp:188
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::MachineInstrBuilder::addUse
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
Definition: MachineInstrBuilder.h:123
llvm::MachineInstrBuilder::constrainAllUses
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
Definition: MachineInstrBuilder.h:320
llvm::MachineFunction
Definition: MachineFunction.h:230
llvm::MachineIRBuilder::buildInstr
MachineInstrBuilder buildInstr(unsigned Opcode)
Build and insert <empty> = Opcode <empty>.
Definition: MachineIRBuilder.h:367
llvm::MachineInstrBuilder::addRegMask
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
Definition: MachineInstrBuilder.h:197
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::MipsFunctionInfo::getGlobalBaseRegForGlobalISel
Register getGlobalBaseRegForGlobalISel(MachineFunction &MF)
Definition: MipsMachineFunction.cpp:54
llvm::MachineIRBuilder::insertInstr
MachineInstrBuilder insertInstr(MachineInstrBuilder MIB)
Insert an existing instruction at the insertion point.
Definition: MachineIRBuilder.cpp:45
llvm::MachineInstr::getOpcode
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:489
llvm::Value::getType
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:256
llvm::MachineIRBuilder::buildCopy
MachineInstrBuilder buildCopy(const DstOp &Res, const SrcOp &Op)
Build and insert Res = COPY Op.
Definition: MachineIRBuilder.cpp:238
llvm::ISD::ArgFlagsTy
Definition: TargetCallingConv.h:27
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::MipsSubtarget
Definition: MipsSubtarget.h:39
llvm::MipsTargetLowering
Definition: MipsISelLowering.h:261
llvm::MachinePointerInfo::getAddrSpace
unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
Definition: MachineOperand.cpp:978
llvm::MachineMemOperand::MOLoad
@ MOLoad
The memory access reads data.
Definition: MachineMemOperand.h:135
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::TargetLoweringBase::ArgListTy
std::vector< ArgListEntry > ArgListTy
Definition: TargetLowering.h:304
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:367
llvm::MachineIRBuilder::buildFrameIndex
MachineInstrBuilder buildFrameIndex(const DstOp &Res, int Idx)
Build and insert Res = G_FRAME_INDEX Idx.
Definition: MachineIRBuilder.cpp:137
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
llvm::CCState::getFirstUnallocated
unsigned getFirstUnallocated(ArrayRef< MCPhysReg > Regs) const
getFirstUnallocated - Return the index of the first unallocated register in the set,...
Definition: CallingConvLower.h:336
llvm::commonAlignment
Align commonAlignment(Align A, Align B)
Returns the alignment that satisfies both alignments.
Definition: Alignment.h:211
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:592
llvm::TargetSubtargetInfo::getFrameLowering
virtual const TargetFrameLowering * getFrameLowering() const
Definition: TargetSubtargetInfo.h:93
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:622
llvm::CallLowering::IncomingValueAssigner
Definition: CallLowering.h:213
llvm::CCState::AllocateStack
unsigned AllocateStack(unsigned Size, Align Alignment)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
Definition: CallingConvLower.h:425
MipsCCState.h
llvm::MVT::i32
@ i32
Definition: MachineValueType.h:46
llvm::CCState::getNextStackOffset
unsigned getNextStackOffset() const
getNextStackOffset - Return the next stack offset such that all stack slots satisfy their alignment r...
Definition: CallingConvLower.h:264
llvm::CallLowering::CallLoweringInfo
Definition: CallLowering.h:101
llvm::SmallVectorImpl::clear
void clear()
Definition: SmallVector.h:585
llvm::MachineIRBuilder::getTII
const TargetInstrInfo & getTII()
Definition: MachineIRBuilder.h:256
llvm::MachineMemOperand::MOStore
@ MOStore
The memory access writes data.
Definition: MachineMemOperand.h:137
llvm::Function::isVarArg
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:189
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:107
isSupportedArgumentType
static bool isSupportedArgumentType(Type *T)
Definition: MipsCallLowering.cpp:279
llvm::MachinePointerInfo::getFixedStack
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
Definition: MachineOperand.cpp:1003
llvm::CCValAssign::getValVT
MVT getValVT() const
Definition: CallingConvLower.h:143
llvm::ArrayRef::size
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
llvm::MachineFunction::getDataLayout
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Definition: MachineFunction.cpp:260
llvm::MipsISD::Ins
@ Ins
Definition: MipsISelLowering.h:157
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::MipsCCState
Definition: MipsCCState.h:20
llvm::CallLowering::ValueAssigner::assignArg
virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, const ArgInfo &Info, ISD::ArgFlagsTy Flags, CCState &State)
Wrap call to (typically tablegenerated CCAssignFn).
Definition: CallLowering.h:181
llvm::MachineIRBuilder::buildStore
MachineInstrBuilder buildStore(const SrcOp &Val, const SrcOp &Addr, MachineMemOperand &MMO)
Build and insert G_STORE Val, Addr, MMO.
Definition: MachineIRBuilder.cpp:387
llvm::MipsCallLowering::lowerReturn
bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const override
This hook behaves as the extended lowerReturn function, but for targets that do not support swifterro...
Definition: MipsCallLowering.cpp:301
llvm::MipsCCState::PreAnalyzeCallOperand
void PreAnalyzeCallOperand(const Type *ArgTy, bool IsFixed, const char *Func)
Definition: MipsCCState.cpp:133
llvm::LLT::scalar
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
Definition: LowLevelTypeImpl.h:43
llvm::CallLowering
Definition: CallLowering.h:43
llvm::MachinePointerInfo::getStack
static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)
Stack pointer relative access.
Definition: MachineOperand.cpp:1016
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
llvm::AttributeList::FirstArgIndex
@ FirstArgIndex
Definition: Attributes.h:403
llvm::TargetRegisterInfo::getCallPreservedMask
virtual const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const
Return a mask of call-preserved registers for the given calling convention on the current function.
Definition: TargetRegisterInfo.h:487
llvm::MipsTargetLowering::CCAssignFnForReturn
CCAssignFn * CCAssignFnForReturn() const
Definition: MipsISelLowering.cpp:3001
MipsIncomingValueAssigner::MipsIncomingValueAssigner
MipsIncomingValueAssigner(CCAssignFn *AssignFn_, const char *Func, bool IsReturn)
Definition: MipsCallLowering.cpp:63
llvm::LLT
Definition: LowLevelTypeImpl.h:40
llvm::CallLowering::setArgFlags
void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const
Definition: CallLowering.cpp:153