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32 const char *Func =
nullptr;
37 MipsOutgoingValueAssigner(
CCAssignFn *AssignFn_,
const char *Func,
39 : OutgoingValueAssigner(AssignFn_), Func(Func), IsReturn(IsReturn) {}
41 bool assignArg(
unsigned ValNo,
EVT OrigVT,
MVT ValVT,
MVT LocVT,
53 ValNo, OrigVT, ValVT, LocVT, LocInfo,
Info, Flags, State);
60 const char *
Func =
nullptr;
65 MipsIncomingValueAssigner(
CCAssignFn *AssignFn_,
const char *Func,
67 : IncomingValueAssigner(AssignFn_),
Func(
Func), IsReturn(IsReturn) {}
69 bool assignArg(
unsigned ValNo,
EVT OrigVT,
MVT ValVT,
MVT LocVT,
81 ValNo, OrigVT, ValVT, LocVT, LocInfo,
Info, Flags, State);
91 : IncomingValueHandler(MIRBuilder,
MRI),
108 virtual void markPhysRegUsed(
unsigned PhysReg) {
109 MIRBuilder.getMRI()->addLiveIn(PhysReg);
110 MIRBuilder.getMBB().addLiveIn(PhysReg);
121 void markPhysRegUsed(
unsigned PhysReg)
override {
130 void MipsIncomingValueHandler::assignValueToReg(
Register ValVReg,
133 markPhysRegUsed(PhysReg);
134 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);
149 return MIRBuilder.buildFrameIndex(
LLT::pointer(0, 32), FI).getReg(0);
152 void MipsIncomingValueHandler::assignValueToAddress(
Register ValVReg,
159 MIRBuilder.buildLoad(ValVReg,
Addr, *MMO);
175 "unexpected custom value");
182 Arg.OrigRegs.assign(
Arg.Regs.begin(),
Arg.Regs.end());
183 Arg.Regs = { CopyLo.getReg(0), CopyHi.getReg(0) };
184 MIRBuilder.buildMerge(
Arg.OrigRegs[0], {CopyLo, CopyHi});
198 : OutgoingValueHandler(MIRBuilder,
MRI),
199 STI(MIRBuilder.getMF().getSubtarget<
MipsSubtarget>()), MIB(MIB) {}
219 void MipsOutgoingValueHandler::assignValueToReg(
Register ValVReg,
222 Register ExtReg = extendRegister(ValVReg, VA);
223 MIRBuilder.buildCopy(PhysReg, ExtReg);
236 auto SPReg = MIRBuilder.buildCopy(p0,
Register(Mips::SP));
238 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset);
239 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg);
240 return AddrReg.getReg(0);
243 void MipsOutgoingValueHandler::assignValueToAddress(
Register ValVReg,
254 Register ExtReg = extendRegister(ValVReg, VA);
255 MIRBuilder.buildStore(ExtReg,
Addr, *MMO);
267 "unexpected custom value");
274 Arg.OrigRegs.assign(
Arg.Regs.begin(),
Arg.Regs.end());
294 if (
T->isIntegerTy())
296 if (
T->isPointerTy())
298 if (
T->isFloatingPointTy())
304 if (
T->isIntegerTy())
306 if (
T->isPointerTy())
308 if (
T->isFloatingPointTy())
310 if (
T->isAggregateType())
324 if (!VRegs.
empty()) {
332 ArgInfo ArgRetInfo(VRegs, *Val, 0);
339 MipsCCState CCInfo(
F.getCallingConv(),
F.isVarArg(), MF, ArgLocs,
342 MipsOutgoingValueHandler RetHandler(MIRBuilder, MF.
getRegInfo(),
Ret);
343 std::string FuncName =
F.getName().str();
345 FuncName.c_str(),
true);
367 for (
auto &
Arg :
F.args()) {
378 for (
auto &
Arg :
F.args()) {
389 MipsCCState CCInfo(
F.getCallingConv(),
F.isVarArg(), MF, ArgLocs,
398 const std::string FuncName =
F.getName().str();
404 MipsIncomingValueHandler Handler(MIRBuilder, MF.
getRegInfo());
414 if (ArgRegs.
size() == Idx)
426 for (
unsigned I = Idx;
I < ArgRegs.
size(); ++
I, VaArgOffset +=
RegSize) {
451 for (
auto &
Arg :
Info.OrigArgs) {
454 if (
Arg.Flags[0].isByVal())
456 if (
Arg.Flags[0].isSRet() && !
Arg.Ty->isPointerTy())
472 MIRBuilder.
buildInstr(Mips::ADJCALLSTACKDOWN);
474 const bool IsCalleeGlobalPIC =
475 Info.Callee.isGlobal() &&
TM.isPositionIndependent();
478 Info.Callee.isReg() || IsCalleeGlobalPIC ? Mips::JALRPseudo : Mips::JAL);
480 if (IsCalleeGlobalPIC) {
485 if (!
Info.Callee.getGlobal()->hasLocalLinkage())
494 FuncOrigArgs.reserve(
Info.OrigArgs.size());
497 for (
auto &
Arg :
Info.OrigArgs)
501 bool IsCalleeVarArg =
false;
502 if (
Info.Callee.isGlobal()) {
516 Info.Callee.isSymbol() ?
Info.Callee.getSymbolName() :
nullptr;
523 MipsOutgoingValueHandler ArgHandler(MIRBuilder, MF.
getRegInfo(), MIB);
528 unsigned StackAlignment =
F.getParent()->getOverrideStackAlignment();
529 if (!StackAlignment) {
533 NextStackOffset =
alignTo(NextStackOffset, StackAlignment);
536 if (IsCalleeGlobalPIC) {
543 if (MIB->
getOpcode() == Mips::JALRPseudo) {
550 if (!
Info.OrigRet.Ty->isVoidTy()) {
556 const std::string FuncName =
F.getName().str();
564 MipsCCState CCInfo(
F.getCallingConv(),
F.isVarArg(), MF, ArgLocs,
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Generic address nodes are lowered to some combination of target independent and machine specific ABI
void PreAnalyzeReturnValue(EVT ArgVT)
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder buildGlobalValue(const DstOp &Res, const GlobalValue *GV)
Build and insert Res = G_GLOBAL_VALUE GV.
void PreAnalyzeFormalArgument(const Type *ArgTy, ISD::ArgFlagsTy Flags)
A parsed version of the target data layout string in and methods for querying it.
Information about stack frame layout on the target.
CCState - This class holds information needed while lowering arguments and return values.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
const MachineInstrBuilder & add(const MachineOperand &MO) const
bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< ArrayRef< Register >> VRegs, FunctionLoweringInfo &FLI) const override
This hook must be implemented to lower the incoming (formal) arguments, described by VRegs,...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
MipsCallLowering(const MipsTargetLowering &TLI)
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
The instances of the Type class are immutable: once they are created, they are never changed.
Base class for ValueHandlers used for arguments passed to a function call, or for return values.
A description of a memory reference used in the backend.
void splitToValueTypes(const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) const
Break OrigArgInfo into one or more pieces the calling convention can process, returned in SplitArgs.
MachineInstrBuilder buildInstrNoInsert(unsigned Opcode)
Build but don't insert <empty> = Opcode <empty>.
Align getStackAlignment() const
static bool isSupportedReturnType(Type *T)
unsigned const TargetRegisterInfo * TRI
bool empty() const
empty - Check if the array is empty.
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
const MipsRegisterInfo * getRegisterInfo() const override
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
CCValAssign - Represent assignment of one arg/retval to a location.
Register getLocReg() const
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineOperand & getOperand(unsigned i) const
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
const RegisterBankInfo * getRegBankInfo() const override
bool determineAssignments(ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, CCState &CCInfo) const
Analyze the argument list in Args, using Assigner to populate CCInfo.
MachineFunction & getMF()
Getter for the function we currently build.
Base class for ValueHandlers used for arguments coming into the current function, or for return value...
Analysis containing CSE Info
void setTargetFlags(unsigned F)
unsigned getLocMemOffset() const
This struct is a compact representation of a valid (non-zero power of two) alignment.
void PreAnalyzeCallResult(const Type *RetTy, const char *Func)
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
@ MO_GOT_CALL
MO_GOT_CALL - Represents the offset into the global offset table at which the address of a call site ...
@ Implicit
Not emitted register (e.g. carry, or temporary result).
static LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Helper class to build MachineInstr.
Representation of each machine instruction.
CCAssignFn * CCAssignFnForCall() const
This class contains a discriminated union of information about pointers in memory operands,...
Align inferAlignFromPtrInfo(MachineFunction &MF, const MachinePointerInfo &MPO)
static EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
bool lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override
This hook must be implemented to lower the given call instruction, including argument and return valu...
CallingConv::ID getCallingConv() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
const MachineBasicBlock & getMBB() const
Getter for the basic block we currently build.
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
print Print MemDeps of function
Register createGenericVirtualRegister(LLT Ty, StringRef Name="")
Create and return a new generic virtual register with low-level type Ty.
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
MachineInstrBuilder buildInstr(unsigned Opcode)
Build and insert <empty> = Opcode <empty>.
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Register getGlobalBaseRegForGlobalISel(MachineFunction &MF)
MachineInstrBuilder insertInstr(MachineInstrBuilder MIB)
Insert an existing instruction at the insertion point.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Type * getType() const
All values are typed, get the type of this value.
MachineInstrBuilder buildCopy(const DstOp &Res, const SrcOp &Op)
Build and insert Res = COPY Op.
@ C
C - The default llvm calling convention, compatible with C.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
@ MOLoad
The memory access reads data.
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
std::vector< ArgListEntry > ArgListTy
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
MachineInstrBuilder buildFrameIndex(const DstOp &Res, int Idx)
Build and insert Res = G_FRAME_INDEX Idx.
unsigned getFirstUnallocated(ArrayRef< MCPhysReg > Regs) const
getFirstUnallocated - Return the index of the first unallocated register in the set,...
Align commonAlignment(Align A, Align B)
Returns the alignment that satisfies both alignments.
Function & getFunction()
Return the LLVM function that this machine code represents.
virtual const TargetFrameLowering * getFrameLowering() const
MachineRegisterInfo & MRI
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
bool handleAssignments(ValueHandler &Handler, SmallVectorImpl< ArgInfo > &Args, CCState &CCState, SmallVectorImpl< CCValAssign > &ArgLocs, MachineIRBuilder &MIRBuilder, ArrayRef< Register > ThisReturnRegs=None) const
Use Handler to insert code to handle the argument/return values represented by Args.
unsigned AllocateStack(unsigned Size, Align Alignment)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
unsigned getNextStackOffset() const
getNextStackOffset - Return the next stack offset such that all stack slots satisfy their alignment r...
const TargetInstrInfo & getTII()
MachineIRBuilder & MIRBuilder
@ MOStore
The memory access writes data.
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
static bool isSupportedArgumentType(Type *T)
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
size_t size() const
size - Get the array size.
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
const char LLVMTargetMachineRef TM
virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, const ArgInfo &Info, ISD::ArgFlagsTy Flags, CCState &State)
Wrap call to (typically tablegenerated CCAssignFn).
MachineInstrBuilder buildStore(const SrcOp &Val, const SrcOp &Addr, MachineMemOperand &MMO)
Build and insert G_STORE Val, Addr, MMO.
bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const override
This hook behaves as the extended lowerReturn function, but for targets that do not support swifterro...
void PreAnalyzeCallOperand(const Type *ArgTy, bool IsFixed, const char *Func)
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder &MIB)
static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)
Stack pointer relative access.
LLVM Value Representation.
virtual const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const
Return a mask of call-preserved registers for the given calling convention on the current function.
CCAssignFn * CCAssignFnForReturn() const
void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const