32 const char *Func =
nullptr;
37 MipsOutgoingValueAssigner(
CCAssignFn *AssignFn_,
const char *Func,
39 : OutgoingValueAssigner(AssignFn_), Func(Func), IsReturn(IsReturn) {}
41 bool assignArg(
unsigned ValNo,
EVT OrigVT,
MVT ValVT,
MVT LocVT,
52 return CallLowering::OutgoingValueAssigner::assignArg(
53 ValNo, OrigVT, ValVT, LocVT, LocInfo,
Info, Flags, State);
60 const char *
Func =
nullptr;
65 MipsIncomingValueAssigner(
CCAssignFn *AssignFn_,
const char *Func,
67 : IncomingValueAssigner(AssignFn_),
Func(
Func), IsReturn(IsReturn) {}
69 bool assignArg(
unsigned ValNo,
EVT OrigVT,
MVT ValVT,
MVT LocVT,
80 return CallLowering::IncomingValueAssigner::assignArg(
81 ValNo, OrigVT, ValVT, LocVT, LocInfo,
Info, Flags, State);
91 : IncomingValueHandler(MIRBuilder,
MRI),
107 std::function<
void()> *Thunk =
nullptr)
override;
109 virtual void markPhysRegUsed(
unsigned PhysReg) {
110 MIRBuilder.getMRI()->addLiveIn(PhysReg);
111 MIRBuilder.getMBB().addLiveIn(PhysReg);
115class CallReturnHandler :
public MipsIncomingValueHandler {
119 : MipsIncomingValueHandler(MIRBuilder,
MRI), MIB(MIB) {}
122 void markPhysRegUsed(
unsigned PhysReg)
override {
131void MipsIncomingValueHandler::assignValueToReg(
Register ValVReg,
134 markPhysRegUsed(PhysReg);
135 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);
150 return MIRBuilder.buildFrameIndex(
LLT::pointer(0, 32), FI).getReg(0);
153void MipsIncomingValueHandler::assignValueToAddress(
159 MIRBuilder.buildLoad(ValVReg,
Addr, *MMO);
169 std::function<
void()> *Thunk) {
175 "unexpected custom value");
183 Arg.
Regs = { CopyLo.getReg(0), CopyHi.getReg(0) };
184 MIRBuilder.buildMergeLikeInstr(Arg.
OrigRegs[0], {CopyLo, CopyHi});
198 : OutgoingValueHandler(MIRBuilder,
MRI),
199 STI(MIRBuilder.getMF().getSubtarget<
MipsSubtarget>()), MIB(MIB) {}
214 std::function<
void()> *Thunk)
override;
220void MipsOutgoingValueHandler::assignValueToReg(
Register ValVReg,
223 Register ExtReg = extendRegister(ValVReg, VA);
224 MIRBuilder.buildCopy(PhysReg, ExtReg);
237 auto SPReg = MIRBuilder.buildCopy(p0,
Register(Mips::SP));
239 auto OffsetReg = MIRBuilder.buildConstant(s32,
Offset);
240 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg);
241 return AddrReg.getReg(0);
244void MipsOutgoingValueHandler::assignValueToAddress(
254 Register ExtReg = extendRegister(ValVReg, VA);
255 MIRBuilder.buildStore(ExtReg,
Addr, *MMO);
261 std::function<
void()> *Thunk) {
267 "unexpected custom value");
294 if (
T->isIntegerTy())
296 if (
T->isPointerTy())
298 if (
T->isFloatingPointTy())
304 if (
T->isIntegerTy())
306 if (
T->isPointerTy())
308 if (
T->isFloatingPointTy())
310 if (
T->isAggregateType())
324 if (!VRegs.
empty()) {
332 ArgInfo ArgRetInfo(VRegs, *Val, 0);
339 MipsCCState CCInfo(
F.getCallingConv(),
F.isVarArg(), MF, ArgLocs,
342 MipsOutgoingValueHandler RetHandler(MIRBuilder, MF.
getRegInfo(), Ret);
343 std::string FuncName =
F.getName().str();
345 FuncName.c_str(),
true);
367 for (
auto &Arg :
F.args()) {
378 for (
auto &Arg :
F.args()) {
379 ArgInfo AInfo(VRegs[i], Arg, i);
389 MipsCCState CCInfo(
F.getCallingConv(),
F.isVarArg(), MF, ArgLocs,
395 CCInfo.
AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(
F.getCallingConv()),
398 const std::string FuncName =
F.getName().str();
404 MipsIncomingValueHandler Handler(MIRBuilder, MF.
getRegInfo());
438 MIRBuilder.
buildStore(Copy, FrameIndex, *MMO);
451 for (
auto &Arg :
Info.OrigArgs) {
454 if (Arg.
Flags[0].isByVal())
472 MIRBuilder.
buildInstr(Mips::ADJCALLSTACKDOWN);
474 const bool IsCalleeGlobalPIC =
475 Info.Callee.isGlobal() &&
TM.isPositionIndependent();
478 Info.Callee.isReg() || IsCalleeGlobalPIC ? Mips::JALRPseudo : Mips::JAL);
480 if (IsCalleeGlobalPIC) {
485 if (!
Info.Callee.getGlobal()->hasLocalLinkage())
494 FuncOrigArgs.reserve(
Info.OrigArgs.size());
497 for (
auto &Arg :
Info.OrigArgs)
501 bool IsCalleeVarArg =
false;
502 if (
Info.Callee.isGlobal()) {
516 Info.Callee.isSymbol() ?
Info.Callee.getSymbolName() :
nullptr;
523 MipsOutgoingValueHandler ArgHandler(MIRBuilder, MF.
getRegInfo(), MIB);
528 unsigned StackAlignment =
F.getParent()->getOverrideStackAlignment();
529 if (!StackAlignment) {
533 StackSize =
alignTo(StackSize, StackAlignment);
536 if (IsCalleeGlobalPIC) {
543 if (MIB->
getOpcode() == Mips::JALRPseudo) {
549 if (!
Info.OrigRet.Ty->isVoidTy()) {
555 const std::string FuncName =
F.getName().str();
561 CallReturnHandler RetHandler(MIRBuilder, MF.
getRegInfo(), MIB);
563 MipsCCState CCInfo(
F.getCallingConv(),
F.isVarArg(), MF, ArgLocs,
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Analysis containing CSE Info
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
This file declares the MachineIRBuilder class.
unsigned const TargetRegisterInfo * TRI
static bool isSupportedReturnType(Type *T)
static bool isSupportedArgumentType(Type *T)
This file describes how to lower LLVM calls to machine code calls.
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
bool empty() const
empty - Check if the array is empty.
CCState - This class holds information needed while lowering arguments and return values.
unsigned getFirstUnallocated(ArrayRef< MCPhysReg > Regs) const
getFirstUnallocated - Return the index of the first unallocated register in the set,...
CallingConv::ID getCallingConv() const
int64_t AllocateStack(unsigned Size, Align Alignment)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
uint64_t getStackSize() const
Returns the size of the currently allocated portion of the stack.
CCValAssign - Represent assignment of one arg/retval to a location.
Register getLocReg() const
int64_t getLocMemOffset() const
bool handleAssignments(ValueHandler &Handler, SmallVectorImpl< ArgInfo > &Args, CCState &CCState, SmallVectorImpl< CCValAssign > &ArgLocs, MachineIRBuilder &MIRBuilder, ArrayRef< Register > ThisReturnRegs=std::nullopt) const
Use Handler to insert code to handle the argument/return values represented by Args.
void splitToValueTypes(const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) const
Break OrigArgInfo into one or more pieces the calling convention can process, returned in SplitArgs.
bool determineAssignments(ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, CCState &CCInfo) const
Analyze the argument list in Args, using Assigner to populate CCInfo.
void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const
A parsed version of the target data layout string in and methods for querying it.
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
static constexpr LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, LLT MemTy, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Helper class to build MachineInstr.
MachineInstrBuilder insertInstr(MachineInstrBuilder MIB)
Insert an existing instruction at the insertion point.
MachineInstrBuilder buildGlobalValue(const DstOp &Res, const GlobalValue *GV)
Build and insert Res = G_GLOBAL_VALUE GV.
const TargetInstrInfo & getTII()
MachineInstrBuilder buildStore(const SrcOp &Val, const SrcOp &Addr, MachineMemOperand &MMO)
Build and insert G_STORE Val, Addr, MMO.
MachineInstrBuilder buildInstr(unsigned Opcode)
Build and insert <empty> = Opcode <empty>.
MachineInstrBuilder buildFrameIndex(const DstOp &Res, int Idx)
Build and insert Res = G_FRAME_INDEX Idx.
MachineFunction & getMF()
Getter for the function we currently build.
const MachineBasicBlock & getMBB() const
Getter for the basic block we currently build.
MachineInstrBuilder buildInstrNoInsert(unsigned Opcode)
Build but don't insert <empty> = Opcode <empty>.
MachineInstrBuilder buildCopy(const DstOp &Res, const SrcOp &Op)
Build and insert Res = COPY Op.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & add(const MachineOperand &MO) const
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
Representation of each machine instruction.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
const MachineOperand & getOperand(unsigned i) const
A description of a memory reference used in the backend.
@ MOLoad
The memory access reads data.
@ MOStore
The memory access writes data.
void setTargetFlags(unsigned F)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Register createGenericVirtualRegister(LLT Ty, StringRef Name="")
Create and return a new generic virtual register with low-level type Ty.
void PreAnalyzeReturnValue(EVT ArgVT)
void PreAnalyzeCallOperand(const Type *ArgTy, bool IsFixed, const char *Func)
void PreAnalyzeFormalArgument(const Type *ArgTy, ISD::ArgFlagsTy Flags)
void PreAnalyzeCallResult(const Type *RetTy, const char *Func)
MipsCallLowering(const MipsTargetLowering &TLI)
bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const override
This hook must be implemented to lower the incoming (formal) arguments, described by VRegs,...
bool lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override
This hook must be implemented to lower the given call instruction, including argument and return valu...
bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const override
This hook behaves as the extended lowerReturn function, but for targets that do not support swifterro...
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
Register getGlobalBaseRegForGlobalISel(MachineFunction &MF)
const MipsRegisterInfo * getRegisterInfo() const override
const RegisterBankInfo * getRegBankInfo() const override
Align getStackAlignment() const
CCAssignFn * CCAssignFnForReturn() const
CCAssignFn * CCAssignFnForCall() const
Wrapper class representing virtual and physical registers.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Information about stack frame layout on the target.
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
std::vector< ArgListEntry > ArgListTy
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetFrameLowering * getFrameLowering() const
The instances of the Type class are immutable: once they are created, they are never changed.
bool isPointerTy() const
True if this is an instance of PointerType.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
@ C
The default llvm calling convention, compatible with C.
@ MO_GOT_CALL
MO_GOT_CALL - Represents the offset into the global offset table at which the address of a call site ...
@ Implicit
Not emitted register (e.g. carry, or temporary result).
NodeAddr< FuncNode * > Func
This is an optimization pass for GlobalISel generic memory operations.
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Align commonAlignment(Align A, uint64_t Offset)
Returns the alignment that satisfies both alignments.
Align inferAlignFromPtrInfo(MachineFunction &MF, const MachinePointerInfo &MPO)
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
This struct is a compact representation of a valid (non-zero power of two) alignment.
SmallVector< Register, 4 > Regs
SmallVector< Register, 2 > OrigRegs
SmallVector< ISD::ArgFlagsTy, 4 > Flags
Base class for ValueHandlers used for arguments coming into the current function, or for return value...
Base class for ValueHandlers used for arguments passed to a function call, or for return values.
static EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
This class contains a discriminated union of information about pointers in memory operands,...
unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)
Stack pointer relative access.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.