LLVM  13.0.0git
SystemZFrameLowering.cpp
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1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "SystemZFrameLowering.h"
10 #include "SystemZCallingConv.h"
11 #include "SystemZInstrBuilder.h"
12 #include "SystemZInstrInfo.h"
14 #include "SystemZRegisterInfo.h"
15 #include "SystemZSubtarget.h"
19 #include "llvm/IR/Function.h"
21 
22 using namespace llvm;
23 
24 namespace {
25 // The ABI-defined register save slots, relative to the CFA (i.e.
26 // incoming stack pointer + SystemZMC::ELFCallFrameSize).
27 static const TargetFrameLowering::SpillSlot SpillOffsetTable[] = {
28  { SystemZ::R2D, 0x10 },
29  { SystemZ::R3D, 0x18 },
30  { SystemZ::R4D, 0x20 },
31  { SystemZ::R5D, 0x28 },
32  { SystemZ::R6D, 0x30 },
33  { SystemZ::R7D, 0x38 },
34  { SystemZ::R8D, 0x40 },
35  { SystemZ::R9D, 0x48 },
36  { SystemZ::R10D, 0x50 },
37  { SystemZ::R11D, 0x58 },
38  { SystemZ::R12D, 0x60 },
39  { SystemZ::R13D, 0x68 },
40  { SystemZ::R14D, 0x70 },
41  { SystemZ::R15D, 0x78 },
42  { SystemZ::F0D, 0x80 },
43  { SystemZ::F2D, 0x88 },
44  { SystemZ::F4D, 0x90 },
45  { SystemZ::F6D, 0x98 }
46 };
47 } // end anonymous namespace
48 
50  : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(8),
51  0, Align(8), false /* StackRealignable */),
52  RegSpillOffsets(0) {
53  // Due to the SystemZ ABI, the DWARF CFA (Canonical Frame Address) is not
54  // equal to the incoming stack pointer, but to incoming stack pointer plus
55  // 160. Instead of using a Local Area Offset, the Register save area will
56  // be occupied by fixed frame objects, and all offsets are actually
57  // relative to CFA.
58 
59  // Create a mapping from register number to save slot offset.
60  // These offsets are relative to the start of the register save area.
61  RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
62  for (unsigned I = 0, E = array_lengthof(SpillOffsetTable); I != E; ++I)
63  RegSpillOffsets[SpillOffsetTable[I].Reg] = SpillOffsetTable[I].Offset;
64 }
65 
68  const TargetRegisterInfo *TRI,
69  std::vector<CalleeSavedInfo> &CSI) const {
71  MachineFrameInfo &MFFrame = MF.getFrameInfo();
72  bool IsVarArg = MF.getFunction().isVarArg();
73  if (CSI.empty())
74  return true; // Early exit if no callee saved registers are modified!
75 
76  unsigned LowGPR = 0;
77  unsigned HighGPR = SystemZ::R15D;
78  int StartSPOffset = SystemZMC::ELFCallFrameSize;
79  for (auto &CS : CSI) {
80  unsigned Reg = CS.getReg();
81  int Offset = getRegSpillOffset(MF, Reg);
82  if (Offset) {
83  if (SystemZ::GR64BitRegClass.contains(Reg) && StartSPOffset > Offset) {
84  LowGPR = Reg;
85  StartSPOffset = Offset;
86  }
88  int FrameIdx = MFFrame.CreateFixedSpillStackObject(8, Offset);
89  CS.setFrameIdx(FrameIdx);
90  } else
91  CS.setFrameIdx(INT32_MAX);
92  }
93 
94  // Save the range of call-saved registers, for use by the
95  // prologue/epilogue inserters.
96  ZFI->setRestoreGPRRegs(LowGPR, HighGPR, StartSPOffset);
97  if (IsVarArg) {
98  // Also save the GPR varargs, if any. R6D is call-saved, so would
99  // already be included, but we also need to handle the call-clobbered
100  // argument registers.
101  unsigned FirstGPR = ZFI->getVarArgsFirstGPR();
102  if (FirstGPR < SystemZ::ELFNumArgGPRs) {
103  unsigned Reg = SystemZ::ELFArgGPRs[FirstGPR];
104  int Offset = getRegSpillOffset(MF, Reg);
105  if (StartSPOffset > Offset) {
106  LowGPR = Reg; StartSPOffset = Offset;
107  }
108  }
109  }
110  ZFI->setSpillGPRRegs(LowGPR, HighGPR, StartSPOffset);
111 
112  // Create fixed stack objects for the remaining registers.
113  int CurrOffset = -SystemZMC::ELFCallFrameSize;
114  if (usePackedStack(MF))
115  CurrOffset += StartSPOffset;
116 
117  for (auto &CS : CSI) {
118  if (CS.getFrameIdx() != INT32_MAX)
119  continue;
120  unsigned Reg = CS.getReg();
122  unsigned Size = TRI->getSpillSize(*RC);
123  CurrOffset -= Size;
124  assert(CurrOffset % 8 == 0 &&
125  "8-byte alignment required for for all register save slots");
126  int FrameIdx = MFFrame.CreateFixedSpillStackObject(Size, CurrOffset);
127  CS.setFrameIdx(FrameIdx);
128  }
129 
130  return true;
131 }
132 
134  BitVector &SavedRegs,
135  RegScavenger *RS) const {
137 
138  MachineFrameInfo &MFFrame = MF.getFrameInfo();
140  bool HasFP = hasFP(MF);
142  bool IsVarArg = MF.getFunction().isVarArg();
143 
144  // va_start stores incoming FPR varargs in the normal way, but delegates
145  // the saving of incoming GPR varargs to spillCalleeSavedRegisters().
146  // Record these pending uses, which typically include the call-saved
147  // argument register R6D.
148  if (IsVarArg)
149  for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
150  SavedRegs.set(SystemZ::ELFArgGPRs[I]);
151 
152  // If there are any landing pads, entering them will modify r6/r7.
153  if (!MF.getLandingPads().empty()) {
154  SavedRegs.set(SystemZ::R6D);
155  SavedRegs.set(SystemZ::R7D);
156  }
157 
158  // If the function requires a frame pointer, record that the hard
159  // frame pointer will be clobbered.
160  if (HasFP)
161  SavedRegs.set(SystemZ::R11D);
162 
163  // If the function calls other functions, record that the return
164  // address register will be clobbered.
165  if (MFFrame.hasCalls())
166  SavedRegs.set(SystemZ::R14D);
167 
168  // If we are saving GPRs other than the stack pointer, we might as well
169  // save and restore the stack pointer at the same time, via STMG and LMG.
170  // This allows the deallocation to be done by the LMG, rather than needing
171  // a separate %r15 addition.
172  const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF);
173  for (unsigned I = 0; CSRegs[I]; ++I) {
174  unsigned Reg = CSRegs[I];
175  if (SystemZ::GR64BitRegClass.contains(Reg) && SavedRegs.test(Reg)) {
176  SavedRegs.set(SystemZ::R15D);
177  break;
178  }
179  }
180 }
181 
182 // Add GPR64 to the save instruction being built by MIB, which is in basic
183 // block MBB. IsImplicit says whether this is an explicit operand to the
184 // instruction, or an implicit one that comes between the explicit start
185 // and end registers.
187  unsigned GPR64, bool IsImplicit) {
188  const TargetRegisterInfo *RI =
190  Register GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32);
191  bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
192  if (!IsLive || !IsImplicit) {
193  MIB.addReg(GPR64, getImplRegState(IsImplicit) | getKillRegState(!IsLive));
194  if (!IsLive)
195  MBB.addLiveIn(GPR64);
196  }
197 }
198 
202  if (CSI.empty())
203  return false;
204 
205  MachineFunction &MF = *MBB.getParent();
208  bool IsVarArg = MF.getFunction().isVarArg();
209  DebugLoc DL;
210 
211  // Save GPRs
212  SystemZ::GPRRegs SpillGPRs = ZFI->getSpillGPRRegs();
213  if (SpillGPRs.LowGPR) {
214  assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR &&
215  "Should be saving %r15 and something else");
216 
217  // Build an STMG instruction.
218  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
219 
220  // Add the explicit register operands.
221  addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false);
222  addSavedGPR(MBB, MIB, SpillGPRs.HighGPR, false);
223 
224  // Add the address.
225  MIB.addReg(SystemZ::R15D).addImm(SpillGPRs.GPROffset);
226 
227  // Make sure all call-saved GPRs are included as operands and are
228  // marked as live on entry.
229  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
230  unsigned Reg = CSI[I].getReg();
231  if (SystemZ::GR64BitRegClass.contains(Reg))
232  addSavedGPR(MBB, MIB, Reg, true);
233  }
234 
235  // ...likewise GPR varargs.
236  if (IsVarArg)
237  for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
238  addSavedGPR(MBB, MIB, SystemZ::ELFArgGPRs[I], true);
239  }
240 
241  // Save FPRs/VRs in the normal TargetInstrInfo way.
242  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
243  unsigned Reg = CSI[I].getReg();
244  if (SystemZ::FP64BitRegClass.contains(Reg)) {
245  MBB.addLiveIn(Reg);
246  TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
247  &SystemZ::FP64BitRegClass, TRI);
248  }
249  if (SystemZ::VR128BitRegClass.contains(Reg)) {
250  MBB.addLiveIn(Reg);
251  TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
252  &SystemZ::VR128BitRegClass, TRI);
253  }
254  }
255 
256  return true;
257 }
258 
262  if (CSI.empty())
263  return false;
264 
265  MachineFunction &MF = *MBB.getParent();
268  bool HasFP = hasFP(MF);
269  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
270 
271  // Restore FPRs/VRs in the normal TargetInstrInfo way.
272  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
273  unsigned Reg = CSI[I].getReg();
274  if (SystemZ::FP64BitRegClass.contains(Reg))
275  TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
276  &SystemZ::FP64BitRegClass, TRI);
277  if (SystemZ::VR128BitRegClass.contains(Reg))
278  TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
279  &SystemZ::VR128BitRegClass, TRI);
280  }
281 
282  // Restore call-saved GPRs (but not call-clobbered varargs, which at
283  // this point might hold return values).
284  SystemZ::GPRRegs RestoreGPRs = ZFI->getRestoreGPRRegs();
285  if (RestoreGPRs.LowGPR) {
286  // If we saved any of %r2-%r5 as varargs, we should also be saving
287  // and restoring %r6. If we're saving %r6 or above, we should be
288  // restoring it too.
289  assert(RestoreGPRs.LowGPR != RestoreGPRs.HighGPR &&
290  "Should be loading %r15 and something else");
291 
292  // Build an LMG instruction.
293  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG));
294 
295  // Add the explicit register operands.
296  MIB.addReg(RestoreGPRs.LowGPR, RegState::Define);
297  MIB.addReg(RestoreGPRs.HighGPR, RegState::Define);
298 
299  // Add the address.
300  MIB.addReg(HasFP ? SystemZ::R11D : SystemZ::R15D);
301  MIB.addImm(RestoreGPRs.GPROffset);
302 
303  // Do a second scan adding regs as being defined by instruction
304  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
305  unsigned Reg = CSI[I].getReg();
306  if (Reg != RestoreGPRs.LowGPR && Reg != RestoreGPRs.HighGPR &&
307  SystemZ::GR64BitRegClass.contains(Reg))
309  }
310  }
311 
312  return true;
313 }
314 
317  RegScavenger *RS) const {
318  MachineFrameInfo &MFFrame = MF.getFrameInfo();
321  bool BackChain = MF.getFunction().hasFnAttribute("backchain");
322 
323  if (!usePackedStack(MF) || BackChain)
324  // Create the incoming register save area.
326 
327  // Get the size of our stack frame to be allocated ...
328  uint64_t StackSize = (MFFrame.estimateStackSize(MF) +
330  // ... and the maximum offset we may need to reach into the
331  // caller's frame to access the save area or stack arguments.
332  int64_t MaxArgOffset = 0;
333  for (int I = MFFrame.getObjectIndexBegin(); I != 0; ++I)
334  if (MFFrame.getObjectOffset(I) >= 0) {
335  int64_t ArgOffset = MFFrame.getObjectOffset(I) +
336  MFFrame.getObjectSize(I);
337  MaxArgOffset = std::max(MaxArgOffset, ArgOffset);
338  }
339 
340  uint64_t MaxReach = StackSize + MaxArgOffset;
341  if (!isUInt<12>(MaxReach)) {
342  // We may need register scavenging slots if some parts of the frame
343  // are outside the reach of an unsigned 12-bit displacement.
344  // Create 2 for the case where both addresses in an MVC are
345  // out of range.
346  RS->addScavengingFrameIndex(MFFrame.CreateStackObject(8, Align(8), false));
347  RS->addScavengingFrameIndex(MFFrame.CreateStackObject(8, Align(8), false));
348  }
349 
350  // If R6 is used as an argument register it is still callee saved. If it in
351  // this case is not clobbered (and restored) it should never be marked as
352  // killed.
353  if (MF.front().isLiveIn(SystemZ::R6D) &&
354  ZFI->getRestoreGPRRegs().LowGPR != SystemZ::R6D)
355  for (auto &MO : MRI->use_nodbg_operands(SystemZ::R6D))
356  MO.setIsKill(false);
357 }
358 
359 // Emit instructions before MBBI (in MBB) to add NumBytes to Reg.
362  Register Reg, int64_t NumBytes,
363  const TargetInstrInfo *TII) {
364  while (NumBytes) {
365  unsigned Opcode;
366  int64_t ThisVal = NumBytes;
367  if (isInt<16>(NumBytes))
368  Opcode = SystemZ::AGHI;
369  else {
370  Opcode = SystemZ::AGFI;
371  // Make sure we maintain 8-byte stack alignment.
372  int64_t MinVal = -uint64_t(1) << 31;
373  int64_t MaxVal = (int64_t(1) << 31) - 8;
374  if (ThisVal < MinVal)
375  ThisVal = MinVal;
376  else if (ThisVal > MaxVal)
377  ThisVal = MaxVal;
378  }
379  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII->get(Opcode), Reg)
380  .addReg(Reg).addImm(ThisVal);
381  // The CC implicit def is dead.
382  MI->getOperand(3).setIsDead();
383  NumBytes -= ThisVal;
384  }
385 }
386 
387 // Add CFI for the new CFA offset.
390  const DebugLoc &DL, int Offset,
391  const SystemZInstrInfo *ZII) {
392  unsigned CFIIndex = MBB.getParent()->addFrameInst(
394  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
395  .addCFIIndex(CFIIndex);
396 }
397 
398 // Add CFI for the new frame location.
401  const DebugLoc &DL, unsigned Reg,
402  const SystemZInstrInfo *ZII) {
403  MachineFunction &MF = *MBB.getParent();
404  MachineModuleInfo &MMI = MF.getMMI();
405  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
406  unsigned RegNum = MRI->getDwarfRegNum(Reg, true);
407  unsigned CFIIndex = MF.addFrameInst(
408  MCCFIInstruction::createDefCfaRegister(nullptr, RegNum));
409  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
410  .addCFIIndex(CFIIndex);
411 }
412 
414  MachineBasicBlock &MBB) const {
415  assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
417  const SystemZTargetLowering &TLI = *STI.getTargetLowering();
418  MachineFrameInfo &MFFrame = MF.getFrameInfo();
419  auto *ZII = static_cast<const SystemZInstrInfo *>(STI.getInstrInfo());
422  MachineModuleInfo &MMI = MF.getMMI();
423  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
424  const std::vector<CalleeSavedInfo> &CSI = MFFrame.getCalleeSavedInfo();
425  bool HasFP = hasFP(MF);
426 
427  // In GHC calling convention C stack space, including the ABI-defined
428  // 160-byte base area, is (de)allocated by GHC itself. This stack space may
429  // be used by LLVM as spill slots for the tail recursive GHC functions. Thus
430  // do not allocate stack space here, too.
432  if (MFFrame.getStackSize() > 2048 * sizeof(long)) {
434  "Pre allocated stack space for GHC function is too small");
435  }
436  if (HasFP) {
438  "In GHC calling convention a frame pointer is not supported");
439  }
441  return;
442  }
443 
444  // Debug location must be unknown since the first debug location is used
445  // to determine the end of the prologue.
446  DebugLoc DL;
447 
448  // The current offset of the stack pointer from the CFA.
449  int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
450 
451  if (ZFI->getSpillGPRRegs().LowGPR) {
452  // Skip over the GPR saves.
453  if (MBBI != MBB.end() && MBBI->getOpcode() == SystemZ::STMG)
454  ++MBBI;
455  else
456  llvm_unreachable("Couldn't skip over GPR saves");
457 
458  // Add CFI for the GPR saves.
459  for (auto &Save : CSI) {
460  unsigned Reg = Save.getReg();
461  if (SystemZ::GR64BitRegClass.contains(Reg)) {
462  int FI = Save.getFrameIdx();
463  int64_t Offset = MFFrame.getObjectOffset(FI);
464  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
465  nullptr, MRI->getDwarfRegNum(Reg, true), Offset));
466  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
467  .addCFIIndex(CFIIndex);
468  }
469  }
470  }
471 
472  uint64_t StackSize = MFFrame.getStackSize();
473  // We need to allocate the ABI-defined 160-byte base area whenever
474  // we allocate stack space for our own use and whenever we call another
475  // function.
476  bool HasStackObject = false;
477  for (unsigned i = 0, e = MFFrame.getObjectIndexEnd(); i != e; ++i)
478  if (!MFFrame.isDeadObjectIndex(i)) {
479  HasStackObject = true;
480  break;
481  }
482  if (HasStackObject || MFFrame.hasCalls())
483  StackSize += SystemZMC::ELFCallFrameSize;
484  // Don't allocate the incoming reg save area.
485  StackSize = StackSize > SystemZMC::ELFCallFrameSize
486  ? StackSize - SystemZMC::ELFCallFrameSize
487  : 0;
488  MFFrame.setStackSize(StackSize);
489 
490  if (StackSize) {
491  // Allocate StackSize bytes.
492  int64_t Delta = -int64_t(StackSize);
493  const unsigned ProbeSize = TLI.getStackProbeSize(MF);
494  bool FreeProbe = (ZFI->getSpillGPRRegs().GPROffset &&
495  (ZFI->getSpillGPRRegs().GPROffset + StackSize) < ProbeSize);
496  if (!FreeProbe &&
498  // Stack probing may involve looping, but splitting the prologue block
499  // is not possible at this point since it would invalidate the
500  // SaveBlocks / RestoreBlocks sets of PEI in the single block function
501  // case. Build a pseudo to be handled later by inlineStackProbe().
502  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::PROBED_STACKALLOC))
503  .addImm(StackSize);
504  }
505  else {
506  bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain");
507  // If we need backchain, save current stack pointer. R1 is free at
508  // this point.
509  if (StoreBackchain)
510  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR))
511  .addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D);
512  emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII);
513  buildCFAOffs(MBB, MBBI, DL, SPOffsetFromCFA + Delta, ZII);
514  if (StoreBackchain)
515  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::STG))
516  .addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D)
518  }
519  SPOffsetFromCFA += Delta;
520  }
521 
522  if (HasFP) {
523  // Copy the base of the frame to R11.
524  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R11D)
525  .addReg(SystemZ::R15D);
526 
527  // Add CFI for the new frame location.
528  buildDefCFAReg(MBB, MBBI, DL, SystemZ::R11D, ZII);
529 
530  // Mark the FramePtr as live at the beginning of every block except
531  // the entry block. (We'll have marked R11 as live on entry when
532  // saving the GPRs.)
533  for (auto I = std::next(MF.begin()), E = MF.end(); I != E; ++I)
534  I->addLiveIn(SystemZ::R11D);
535  }
536 
537  // Skip over the FPR/VR saves.
538  SmallVector<unsigned, 8> CFIIndexes;
539  for (auto &Save : CSI) {
540  unsigned Reg = Save.getReg();
541  if (SystemZ::FP64BitRegClass.contains(Reg)) {
542  if (MBBI != MBB.end() &&
543  (MBBI->getOpcode() == SystemZ::STD ||
544  MBBI->getOpcode() == SystemZ::STDY))
545  ++MBBI;
546  else
547  llvm_unreachable("Couldn't skip over FPR save");
548  } else if (SystemZ::VR128BitRegClass.contains(Reg)) {
549  if (MBBI != MBB.end() &&
550  MBBI->getOpcode() == SystemZ::VST)
551  ++MBBI;
552  else
553  llvm_unreachable("Couldn't skip over VR save");
554  } else
555  continue;
556 
557  // Add CFI for the this save.
558  unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
559  Register IgnoredFrameReg;
560  int64_t Offset =
561  getFrameIndexReference(MF, Save.getFrameIdx(), IgnoredFrameReg)
562  .getFixed();
563 
564  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
565  nullptr, DwarfReg, SPOffsetFromCFA + Offset));
566  CFIIndexes.push_back(CFIIndex);
567  }
568  // Complete the CFI for the FPR/VR saves, modelling them as taking effect
569  // after the last save.
570  for (auto CFIIndex : CFIIndexes) {
571  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
572  .addCFIIndex(CFIIndex);
573  }
574 }
575 
577  MachineBasicBlock &MBB) const {
579  auto *ZII =
580  static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
582  MachineFrameInfo &MFFrame = MF.getFrameInfo();
583 
584  // See SystemZFrameLowering::emitPrologue
586  return;
587 
588  // Skip the return instruction.
589  assert(MBBI->isReturn() && "Can only insert epilogue into returning blocks");
590 
591  uint64_t StackSize = MFFrame.getStackSize();
592  if (ZFI->getRestoreGPRRegs().LowGPR) {
593  --MBBI;
594  unsigned Opcode = MBBI->getOpcode();
595  if (Opcode != SystemZ::LMG)
596  llvm_unreachable("Expected to see callee-save register restore code");
597 
598  unsigned AddrOpNo = 2;
599  DebugLoc DL = MBBI->getDebugLoc();
600  uint64_t Offset = StackSize + MBBI->getOperand(AddrOpNo + 1).getImm();
601  unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
602 
603  // If the offset is too large, use the largest stack-aligned offset
604  // and add the rest to the base register (the stack or frame pointer).
605  if (!NewOpcode) {
606  uint64_t NumBytes = Offset - 0x7fff8;
607  emitIncrement(MBB, MBBI, DL, MBBI->getOperand(AddrOpNo).getReg(),
608  NumBytes, ZII);
609  Offset -= NumBytes;
610  NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
611  assert(NewOpcode && "No restore instruction available");
612  }
613 
614  MBBI->setDesc(ZII->get(NewOpcode));
615  MBBI->getOperand(AddrOpNo + 1).ChangeToImmediate(Offset);
616  } else if (StackSize) {
617  DebugLoc DL = MBBI->getDebugLoc();
618  emitIncrement(MBB, MBBI, DL, SystemZ::R15D, StackSize, ZII);
619  }
620 }
621 
623  MachineBasicBlock &PrologMBB) const {
624  auto *ZII =
625  static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
627  const SystemZTargetLowering &TLI = *STI.getTargetLowering();
628 
629  MachineInstr *StackAllocMI = nullptr;
630  for (MachineInstr &MI : PrologMBB)
631  if (MI.getOpcode() == SystemZ::PROBED_STACKALLOC) {
632  StackAllocMI = &MI;
633  break;
634  }
635  if (StackAllocMI == nullptr)
636  return;
637  uint64_t StackSize = StackAllocMI->getOperand(0).getImm();
638  const unsigned ProbeSize = TLI.getStackProbeSize(MF);
639  uint64_t NumFullBlocks = StackSize / ProbeSize;
640  uint64_t Residual = StackSize % ProbeSize;
641  int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
642  MachineBasicBlock *MBB = &PrologMBB;
643  MachineBasicBlock::iterator MBBI = StackAllocMI;
644  const DebugLoc DL = StackAllocMI->getDebugLoc();
645 
646  // Allocate a block of Size bytes on the stack and probe it.
647  auto allocateAndProbe = [&](MachineBasicBlock &InsMBB,
648  MachineBasicBlock::iterator InsPt, unsigned Size,
649  bool EmitCFI) -> void {
650  emitIncrement(InsMBB, InsPt, DL, SystemZ::R15D, -int64_t(Size), ZII);
651  if (EmitCFI) {
652  SPOffsetFromCFA -= Size;
653  buildCFAOffs(InsMBB, InsPt, DL, SPOffsetFromCFA, ZII);
654  }
655  // Probe by means of a volatile compare.
658  BuildMI(InsMBB, InsPt, DL, ZII->get(SystemZ::CG))
659  .addReg(SystemZ::R0D, RegState::Undef)
660  .addReg(SystemZ::R15D).addImm(Size - 8).addReg(0)
661  .addMemOperand(MMO);
662  };
663 
664  bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain");
665  if (StoreBackchain)
666  BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR))
667  .addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D);
668 
669  MachineBasicBlock *DoneMBB = nullptr;
670  MachineBasicBlock *LoopMBB = nullptr;
671  if (NumFullBlocks < 3) {
672  // Emit unrolled probe statements.
673  for (unsigned int i = 0; i < NumFullBlocks; i++)
674  allocateAndProbe(*MBB, MBBI, ProbeSize, true/*EmitCFI*/);
675  } else {
676  // Emit a loop probing the pages.
677  uint64_t LoopAlloc = ProbeSize * NumFullBlocks;
678  SPOffsetFromCFA -= LoopAlloc;
679 
680  // Use R0D to hold the exit value.
681  BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R0D)
682  .addReg(SystemZ::R15D);
683  buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R0D, ZII);
684  emitIncrement(*MBB, MBBI, DL, SystemZ::R0D, -int64_t(LoopAlloc), ZII);
685  buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::ELFCallFrameSize + LoopAlloc),
686  ZII);
687 
688  DoneMBB = SystemZ::splitBlockBefore(MBBI, MBB);
689  LoopMBB = SystemZ::emitBlockAfter(MBB);
690  MBB->addSuccessor(LoopMBB);
691  LoopMBB->addSuccessor(LoopMBB);
692  LoopMBB->addSuccessor(DoneMBB);
693 
694  MBB = LoopMBB;
695  allocateAndProbe(*MBB, MBB->end(), ProbeSize, false/*EmitCFI*/);
696  BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::CLGR))
697  .addReg(SystemZ::R15D).addReg(SystemZ::R0D);
698  BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::BRC))
700 
701  MBB = DoneMBB;
702  MBBI = DoneMBB->begin();
703  buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R15D, ZII);
704  }
705 
706  if (Residual)
707  allocateAndProbe(*MBB, MBBI, Residual, true/*EmitCFI*/);
708 
709  if (StoreBackchain)
710  BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::STG))
711  .addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D)
713 
714  StackAllocMI->eraseFromParent();
715  if (DoneMBB != nullptr) {
716  // Compute the live-in lists for the new blocks.
717  recomputeLiveIns(*DoneMBB);
718  recomputeLiveIns(*LoopMBB);
719  }
720 }
721 
723  return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
726 }
727 
728 bool
730  // The ABI requires us to allocate 160 bytes of stack space for the callee,
731  // with any outgoing stack arguments being placed above that. It seems
732  // better to make that area a permanent feature of the frame even if
733  // we're using a frame pointer.
734  return true;
735 }
736 
739  Register &FrameReg) const {
740  // Our incoming SP is actually SystemZMC::ELFCallFrameSize below the CFA, so
741  // add that difference here.
745 }
746 
751  switch (MI->getOpcode()) {
752  case SystemZ::ADJCALLSTACKDOWN:
753  case SystemZ::ADJCALLSTACKUP:
755  "ADJSTACKDOWN and ADJSTACKUP should be no-ops");
756  return MBB.erase(MI);
757  break;
758 
759  default:
760  llvm_unreachable("Unexpected call frame instruction");
761  }
762 }
763 
765  Register Reg) const {
766  bool IsVarArg = MF.getFunction().isVarArg();
767  bool BackChain = MF.getFunction().hasFnAttribute("backchain");
768  bool SoftFloat = MF.getSubtarget<SystemZSubtarget>().hasSoftFloat();
769  unsigned Offset = RegSpillOffsets[Reg];
770  if (usePackedStack(MF) && !(IsVarArg && !SoftFloat)) {
771  if (SystemZ::GR64BitRegClass.contains(Reg))
772  // Put all GPRs at the top of the Register save area with packed
773  // stack. Make room for the backchain if needed.
774  Offset += BackChain ? 24 : 32;
775  else
776  Offset = 0;
777  }
778  return Offset;
779 }
780 
784  int FI = ZFI->getFramePointerSaveIndex();
785  if (!FI) {
786  MachineFrameInfo &MFFrame = MF.getFrameInfo();
788  FI = MFFrame.CreateFixedObject(8, Offset, false);
789  ZFI->setFramePointerSaveIndex(FI);
790  }
791  return FI;
792 }
793 
795  bool HasPackedStackAttr = MF.getFunction().hasFnAttribute("packed-stack");
796  bool BackChain = MF.getFunction().hasFnAttribute("backchain");
797  bool SoftFloat = MF.getSubtarget<SystemZSubtarget>().hasSoftFloat();
798  if (HasPackedStackAttr && BackChain && !SoftFloat)
799  report_fatal_error("packed-stack + backchain + hard-float is unsupported.");
800  bool CallConv = MF.getFunction().getCallingConv() != CallingConv::GHC;
801  return HasPackedStackAttr && CallConv;
802 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
i
i
Definition: README.txt:29
llvm::SystemZFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: SystemZFrameLowering.cpp:199
llvm::MachineFrameInfo::hasVarSizedObjects
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
Definition: MachineFrameInfo.h:351
SystemZInstrBuilder.h
llvm::SystemZSubtarget::getTargetLowering
const SystemZTargetLowering * getTargetLowering() const override
Definition: SystemZSubtarget.h:93
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:100
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:132
llvm::MachineFrameInfo::estimateStackSize
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
Definition: MachineFrameInfo.cpp:137
llvm
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MachineBasicBlock::isLiveIn
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
Definition: MachineBasicBlock.cpp:574
llvm::SystemZMachineFunctionInfo::getFramePointerSaveIndex
int getFramePointerSaveIndex() const
Definition: SystemZMachineFunctionInfo.h:85
llvm::TargetFrameLowering
Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:42
llvm::SystemZFrameLowering::inlineStackProbe
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe stub (if any) with the actual probe code inline.
Definition: SystemZFrameLowering.cpp:622
llvm::MachineModuleInfo::getContext
const MCContext & getContext() const
Definition: MachineModuleInfo.h:167
llvm::SystemZFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: SystemZFrameLowering.cpp:133
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::MCContext::getRegisterInfo
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:408
llvm::BitVector::set
BitVector & set()
Definition: BitVector.h:343
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::MachineInstrBuilder::addCFIIndex
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
Definition: MachineInstrBuilder.h:248
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::SystemZTargetLowering
Definition: SystemZISelLowering.h:392
emitIncrement
static void emitIncrement(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, Register Reg, int64_t NumBytes, const TargetInstrInfo *TII)
Definition: SystemZFrameLowering.cpp:360
llvm::SmallVector< unsigned, 8 >
llvm::SystemZ::emitBlockAfter
MachineBasicBlock * emitBlockAfter(MachineBasicBlock *MBB)
Definition: SystemZInstrInfo.cpp:1879
llvm::MachineFunction::end
iterator end()
Definition: MachineFunction.h:739
llvm::MachineFunction::getMachineMemOperand
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Definition: MachineFunction.cpp:430
llvm::recomputeLiveIns
static void recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in's for MBB.
Definition: LivePhysRegs.h:192
llvm::AArch64ISD::STG
@ STG
Definition: AArch64ISelLowering.h:434
llvm::SystemZFrameLowering::getBackchainOffset
unsigned getBackchainOffset(MachineFunction &MF) const
Definition: SystemZFrameLowering.h:69
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
llvm::SystemZFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: SystemZFrameLowering.cpp:729
llvm::SystemZFrameLowering::restoreCalleeSavedRegisters
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
Definition: SystemZFrameLowering.cpp:259
llvm::StackOffset::getFixed
ScalarTy getFixed() const
Definition: TypeSize.h:149
llvm::MachineFrameInfo::setStackSize
void setStackSize(uint64_t Size)
Set the size of the stack.
Definition: MachineFrameInfo.h:566
llvm::SystemZ::splitBlockBefore
MachineBasicBlock * splitBlockBefore(MachineBasicBlock::iterator MI, MachineBasicBlock *MBB)
Definition: SystemZInstrInfo.cpp:1895
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:127
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:345
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::SystemZMachineFunctionInfo::getVarArgsFirstGPR
Register getVarArgsFirstGPR() const
Definition: SystemZMachineFunctionInfo.h:68
llvm::SystemZFrameLowering::usePackedStack
bool usePackedStack(MachineFunction &MF) const
Definition: SystemZFrameLowering.cpp:794
SystemZCallingConv.h
llvm::SystemZInstrInfo
Definition: SystemZInstrInfo.h:174
llvm::MachineFrameInfo::getObjectIndexEnd
int getObjectIndexEnd() const
Return one past the maximum frame object index.
Definition: MachineFrameInfo.h:391
llvm::SystemZFrameLowering::processFunctionBeforeFrameFinalized
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Definition: SystemZFrameLowering.cpp:316
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::SystemZ::GPRRegs
Definition: SystemZMachineFunctionInfo.h:19
llvm::ArrayRef::empty
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:158
llvm::SystemZMachineFunctionInfo::setRestoreGPRRegs
void setRestoreGPRRegs(Register Low, Register High, unsigned Offs)
Definition: SystemZMachineFunctionInfo.h:60
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:502
MachineRegisterInfo.h
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1324
llvm::TargetRegisterInfo::getCalleeSavedRegs
virtual const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const =0
Return a null-terminated list of all of the callee-saved registers on this target.
llvm::MachineBasicBlock::addSuccessor
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:745
llvm::MachineFunction::front
const MachineBasicBlock & front() const
Definition: MachineFunction.h:749
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:565
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::MachineRegisterInfo::use_nodbg_operands
iterator_range< use_nodbg_iterator > use_nodbg_operands(Register Reg) const
Definition: MachineRegisterInfo.h:526
llvm::SystemZFrameLowering::getOrCreateFramePointerSaveIndex
int getOrCreateFramePointerSaveIndex(MachineFunction &MF) const
Definition: SystemZFrameLowering.cpp:782
TargetMachine.h
llvm::MachineInstrBuilder::addMBB
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:147
llvm::SystemZ::GPRRegs::GPROffset
unsigned GPROffset
Definition: SystemZMachineFunctionInfo.h:22
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:305
SystemZInstrInfo.h
llvm::CallingConv::GHC
@ GHC
Definition: CallingConv.h:51
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::getImm
int64_t getImm() const
Definition: MachineOperand.h:534
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:653
llvm::MachineInstr::getOperand
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:488
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
false
Definition: StackSlotColoring.cpp:142
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::MachineModuleInfo
This class contains meta information specific to a module.
Definition: MachineModuleInfo.h:78
llvm::report_fatal_error
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:140
llvm::MachineFunction::begin
iterator begin()
Definition: MachineFunction.h:737
llvm::RegState::Define
@ Define
Register definition.
Definition: MachineInstrBuilder.h:45
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:563
llvm::MachineFrameInfo::getObjectOffset
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Definition: MachineFrameInfo.h:504
llvm::SystemZFrameLowering::getRegSpillOffset
unsigned getRegSpillOffset(MachineFunction &MF, Register Reg) const
Definition: SystemZFrameLowering.cpp:764
llvm::BitVector
Definition: BitVector.h:74
llvm::SystemZFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: SystemZFrameLowering.cpp:748
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::SystemZMachineFunctionInfo::getRestoreGPRRegs
SystemZ::GPRRegs getRestoreGPRRegs() const
Definition: SystemZMachineFunctionInfo.h:59
llvm::SystemZMachineFunctionInfo::setSpillGPRRegs
void setSpillGPRRegs(Register Low, Register High, unsigned Offs)
Definition: SystemZMachineFunctionInfo.h:50
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::SystemZ::CCMASK_CMP_GT
const unsigned CCMASK_CMP_GT
Definition: SystemZ.h:36
llvm::MachineFrameInfo::getObjectIndexBegin
int getObjectIndexBegin() const
Return the minimum frame object index.
Definition: MachineFrameInfo.h:388
llvm::array_lengthof
constexpr size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:1348
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:49
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:495
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::MachineFrameInfo::isDeadObjectIndex
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Definition: MachineFrameInfo.h:734
llvm::SystemZ::ELFArgGPRs
const MCPhysReg ELFArgGPRs[ELFNumArgGPRs]
Definition: SystemZCallingConv.cpp:14
llvm::TargetOptions::DisableFramePointerElim
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
Definition: TargetOptionsImpl.cpp:24
llvm::MachineFunction::getMMI
MachineModuleInfo & getMMI() const
Definition: MachineFunction.h:506
buildDefCFAReg
static void buildDefCFAReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned Reg, const SystemZInstrInfo *ZII)
Definition: SystemZFrameLowering.cpp:399
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:555
llvm::SystemZFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: SystemZFrameLowering.cpp:413
llvm::MachineInstr::getDebugLoc
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:418
llvm::TargetRegisterInfo::getSpillSize
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
Definition: TargetRegisterInfo.h:280
llvm::SystemZMC::ELFCFAOffsetFromInitialSP
const int64_t ELFCFAOffsetFromInitialSP
Definition: SystemZMCTargetDesc.h:38
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::MachineInstrBuilder
Definition: MachineInstrBuilder.h:70
SystemZMachineFunctionInfo.h
llvm::SystemZFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: SystemZFrameLowering.cpp:738
llvm::MachineFrameInfo::getObjectSize
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
Definition: MachineFrameInfo.h:451
llvm::Function::getCallingConv
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:228
llvm::SystemZ::CCMASK_ICMP
const unsigned CCMASK_ICMP
Definition: SystemZ.h:46
llvm::HexagonInstrInfo::storeRegToStackSlot
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Store the specified register of the given register class to the specified stack frame index.
Definition: HexagonInstrInfo.cpp:913
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:37
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::RegScavenger
Definition: RegisterScavenging.h:34
addSavedGPR
static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, unsigned GPR64, bool IsImplicit)
Definition: SystemZFrameLowering.cpp:186
llvm::MachineBasicBlock::getLastNonDebugInstr
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:266
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:115
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineFrameInfo::CreateFixedObject
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
Definition: MachineFrameInfo.cpp:83
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:571
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:225
llvm::RegScavenger::addScavengingFrameIndex
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Definition: RegisterScavenging.h:123
llvm::MachineInstrBuilder::addMemOperand
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
Definition: MachineInstrBuilder.h:203
llvm::MachineFunction::getLandingPads
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
Definition: MachineFunction.h:976
MachineModuleInfo.h
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:98
llvm::SystemZMachineFunctionInfo::getManipulatesSP
bool getManipulatesSP() const
Definition: SystemZMachineFunctionInfo.h:90
llvm::SystemZSubtarget
Definition: SystemZSubtarget.h:33
llvm::MachineFunction
Definition: MachineFunction.h:227
SystemZSubtarget.h
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:796
llvm::IndexedMap::grow
void grow(IndexT n)
Definition: IndexedMap.h:67
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::MachineFrameInfo::CreateStackObject
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
Definition: MachineFrameInfo.cpp:51
llvm::HexagonInstrInfo::loadRegFromStackSlot
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Load the specified register of the given register class from the specified stack frame index.
Definition: HexagonInstrInfo.cpp:958
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm::SystemZ::GPRRegs::LowGPR
unsigned LowGPR
Definition: SystemZMachineFunctionInfo.h:20
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
llvm::MachineMemOperand::MOVolatile
@ MOVolatile
The memory access is volatile.
Definition: MachineMemOperand.h:138
llvm::StackOffset::getFixed
static StackOffset getFixed(ScalarTy Fixed)
Definition: TypeSize.h:143
llvm::MachineMemOperand::MOLoad
@ MOLoad
The memory access reads data.
Definition: MachineMemOperand.h:134
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:367
llvm::MachineFrameInfo::hasCalls
bool hasCalls() const
Return true if the current function has any function calls.
Definition: MachineFrameInfo.h:602
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::isInt< 16 >
constexpr bool isInt< 16 >(int64_t x)
Definition: MathExtras.h:370
llvm::SystemZMachineFunctionInfo
Definition: SystemZMachineFunctionInfo.h:27
llvm::BitVector::test
bool test(unsigned Idx) const
Definition: BitVector.h:447
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:521
uint16_t
llvm::SystemZFrameLowering::SystemZFrameLowering
SystemZFrameLowering()
Definition: SystemZFrameLowering.cpp:49
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:551
llvm::RegState::Undef
@ Undef
Value of the register doesn't matter.
Definition: MachineInstrBuilder.h:53
llvm::TargetFrameLowering::getFrameIndexReference
virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: TargetFrameLoweringImpl.cpp:45
llvm::TargetLoweringBase::hasInlineStackProbe
virtual bool hasInlineStackProbe(MachineFunction &MF) const
Definition: TargetLowering.h:1789
llvm::SystemZFrameLowering::assignCalleeSavedSpillSlots
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
assignCalleeSavedSpillSlots - Allows target to override spill slot assignment logic.
Definition: SystemZFrameLowering.cpp:67
Function.h
llvm::SystemZSubtarget::getInstrInfo
const SystemZInstrInfo * getInstrInfo() const override
Definition: SystemZSubtarget.h:89
llvm::SystemZMachineFunctionInfo::getSpillGPRRegs
SystemZ::GPRRegs getSpillGPRRegs() const
Definition: SystemZMachineFunctionInfo.h:49
SystemZFrameLowering.h
llvm::Function::isVarArg
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:178
llvm::getKillRegState
unsigned getKillRegState(bool B)
Definition: MachineInstrBuilder.h:509
llvm::MachineFunction::addFrameInst
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
Definition: MachineFunction.cpp:285
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:107
SystemZRegisterInfo.h
llvm::TargetSubtargetInfo::getTargetLowering
virtual const TargetLowering * getTargetLowering() const
Definition: TargetSubtargetInfo.h:96
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:268
buildCFAOffs
static void buildCFAOffs(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, int Offset, const SystemZInstrInfo *ZII)
Definition: SystemZFrameLowering.cpp:388
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:329
llvm::ArrayRef::size
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:163
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:350
llvm::TargetRegisterInfo::getSubReg
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
Definition: TargetRegisterInfo.h:1078
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:515
llvm::TargetFrameLowering::determineCalleeSaves
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: TargetFrameLoweringImpl.cpp:78
llvm::SystemZFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: SystemZFrameLowering.cpp:576
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::TargetRegisterInfo::getMinimalPhysRegClass
const TargetRegisterClass * getMinimalPhysRegClass(MCRegister Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
Definition: TargetRegisterInfo.cpp:211
RegisterScavenging.h
llvm::SystemZ::GPRRegs::HighGPR
unsigned HighGPR
Definition: SystemZMachineFunctionInfo.h:21
llvm::MachineInstr::eraseFromParent
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
Definition: MachineInstr.cpp:677
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::RegState::ImplicitDefine
@ ImplicitDefine
Definition: MachineInstrBuilder.h:64
llvm::getImplRegState
unsigned getImplRegState(bool B)
Definition: MachineInstrBuilder.h:506
llvm::TargetFrameLowering::SpillSlot
Definition: TargetFrameLowering.h:50
llvm::SystemZ::ELFNumArgGPRs
const unsigned ELFNumArgGPRs
Definition: SystemZCallingConv.h:18
llvm::SystemZMachineFunctionInfo::setFramePointerSaveIndex
void setFramePointerSaveIndex(int Idx)
Definition: SystemZMachineFunctionInfo.h:86
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
llvm::SystemZFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: SystemZFrameLowering.cpp:722
llvm::SystemZMC::ELFCallFrameSize
const int64_t ELFCallFrameSize
Definition: SystemZMCTargetDesc.h:35