LLVM  14.0.0git
SystemZFrameLowering.cpp
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1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "SystemZFrameLowering.h"
10 #include "SystemZCallingConv.h"
11 #include "SystemZInstrBuilder.h"
12 #include "SystemZInstrInfo.h"
14 #include "SystemZRegisterInfo.h"
15 #include "SystemZSubtarget.h"
19 #include "llvm/IR/Function.h"
21 
22 using namespace llvm;
23 
24 namespace {
25 // The ABI-defined register save slots, relative to the CFA (i.e.
26 // incoming stack pointer + SystemZMC::ELFCallFrameSize).
27 static const TargetFrameLowering::SpillSlot ELFSpillOffsetTable[] = {
28  { SystemZ::R2D, 0x10 },
29  { SystemZ::R3D, 0x18 },
30  { SystemZ::R4D, 0x20 },
31  { SystemZ::R5D, 0x28 },
32  { SystemZ::R6D, 0x30 },
33  { SystemZ::R7D, 0x38 },
34  { SystemZ::R8D, 0x40 },
35  { SystemZ::R9D, 0x48 },
36  { SystemZ::R10D, 0x50 },
37  { SystemZ::R11D, 0x58 },
38  { SystemZ::R12D, 0x60 },
39  { SystemZ::R13D, 0x68 },
40  { SystemZ::R14D, 0x70 },
41  { SystemZ::R15D, 0x78 },
42  { SystemZ::F0D, 0x80 },
43  { SystemZ::F2D, 0x88 },
44  { SystemZ::F4D, 0x90 },
45  { SystemZ::F6D, 0x98 }
46 };
47 
48 static const TargetFrameLowering::SpillSlot XPLINKSpillOffsetTable[] = {
49  {SystemZ::R4D, 0x00}, {SystemZ::R5D, 0x08}, {SystemZ::R6D, 0x10},
50  {SystemZ::R7D, 0x18}, {SystemZ::R8D, 0x20}, {SystemZ::R9D, 0x28},
51  {SystemZ::R10D, 0x30}, {SystemZ::R11D, 0x38}, {SystemZ::R12D, 0x40},
52  {SystemZ::R13D, 0x48}, {SystemZ::R14D, 0x50}, {SystemZ::R15D, 0x58}};
53 } // end anonymous namespace
54 
56  int LAO, Align TransAl,
57  bool StackReal)
58  : TargetFrameLowering(D, StackAl, LAO, TransAl, StackReal) {}
59 
60 std::unique_ptr<SystemZFrameLowering>
62  if (STI.isTargetXPLINK64())
63  return std::make_unique<SystemZXPLINKFrameLowering>();
64  return std::make_unique<SystemZELFFrameLowering>();
65 }
66 
70  switch (MI->getOpcode()) {
71  case SystemZ::ADJCALLSTACKDOWN:
72  case SystemZ::ADJCALLSTACKUP:
74  "ADJSTACKDOWN and ADJSTACKUP should be no-ops");
75  return MBB.erase(MI);
76  break;
77 
78  default:
79  llvm_unreachable("Unexpected call frame instruction");
80  }
81 }
82 
84  const MachineFunction &MF) const {
85  // The ELF ABI requires us to allocate 160 bytes of stack space for the
86  // callee, with any outgoing stack arguments being placed above that. It
87  // seems better to make that area a permanent feature of the frame even if
88  // we're using a frame pointer. Similarly, 64-bit XPLINK requires 96 bytes
89  // of stack space for the register save area.
90  return true;
91 }
92 
95  std::vector<CalleeSavedInfo> &CSI) const {
97  MachineFrameInfo &MFFrame = MF.getFrameInfo();
98  bool IsVarArg = MF.getFunction().isVarArg();
99  if (CSI.empty())
100  return true; // Early exit if no callee saved registers are modified!
101 
102  unsigned LowGPR = 0;
103  unsigned HighGPR = SystemZ::R15D;
104  int StartSPOffset = SystemZMC::ELFCallFrameSize;
105  for (auto &CS : CSI) {
106  unsigned Reg = CS.getReg();
107  int Offset = getRegSpillOffset(MF, Reg);
108  if (Offset) {
109  if (SystemZ::GR64BitRegClass.contains(Reg) && StartSPOffset > Offset) {
110  LowGPR = Reg;
111  StartSPOffset = Offset;
112  }
114  int FrameIdx = MFFrame.CreateFixedSpillStackObject(8, Offset);
115  CS.setFrameIdx(FrameIdx);
116  } else
117  CS.setFrameIdx(INT32_MAX);
118  }
119 
120  // Save the range of call-saved registers, for use by the
121  // prologue/epilogue inserters.
122  ZFI->setRestoreGPRRegs(LowGPR, HighGPR, StartSPOffset);
123  if (IsVarArg) {
124  // Also save the GPR varargs, if any. R6D is call-saved, so would
125  // already be included, but we also need to handle the call-clobbered
126  // argument registers.
127  unsigned FirstGPR = ZFI->getVarArgsFirstGPR();
128  if (FirstGPR < SystemZ::ELFNumArgGPRs) {
129  unsigned Reg = SystemZ::ELFArgGPRs[FirstGPR];
130  int Offset = getRegSpillOffset(MF, Reg);
131  if (StartSPOffset > Offset) {
132  LowGPR = Reg; StartSPOffset = Offset;
133  }
134  }
135  }
136  ZFI->setSpillGPRRegs(LowGPR, HighGPR, StartSPOffset);
137 
138  // Create fixed stack objects for the remaining registers.
139  int CurrOffset = -SystemZMC::ELFCallFrameSize;
140  if (usePackedStack(MF))
141  CurrOffset += StartSPOffset;
142 
143  for (auto &CS : CSI) {
144  if (CS.getFrameIdx() != INT32_MAX)
145  continue;
146  unsigned Reg = CS.getReg();
148  unsigned Size = TRI->getSpillSize(*RC);
149  CurrOffset -= Size;
150  assert(CurrOffset % 8 == 0 &&
151  "8-byte alignment required for for all register save slots");
152  int FrameIdx = MFFrame.CreateFixedSpillStackObject(Size, CurrOffset);
153  CS.setFrameIdx(FrameIdx);
154  }
155 
156  return true;
157 }
158 
160  BitVector &SavedRegs,
161  RegScavenger *RS) const {
163 
164  MachineFrameInfo &MFFrame = MF.getFrameInfo();
166  bool HasFP = hasFP(MF);
168  bool IsVarArg = MF.getFunction().isVarArg();
169 
170  // va_start stores incoming FPR varargs in the normal way, but delegates
171  // the saving of incoming GPR varargs to spillCalleeSavedRegisters().
172  // Record these pending uses, which typically include the call-saved
173  // argument register R6D.
174  if (IsVarArg)
175  for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
176  SavedRegs.set(SystemZ::ELFArgGPRs[I]);
177 
178  // If there are any landing pads, entering them will modify r6/r7.
179  if (!MF.getLandingPads().empty()) {
180  SavedRegs.set(SystemZ::R6D);
181  SavedRegs.set(SystemZ::R7D);
182  }
183 
184  // If the function requires a frame pointer, record that the hard
185  // frame pointer will be clobbered.
186  if (HasFP)
187  SavedRegs.set(SystemZ::R11D);
188 
189  // If the function calls other functions, record that the return
190  // address register will be clobbered.
191  if (MFFrame.hasCalls())
192  SavedRegs.set(SystemZ::R14D);
193 
194  // If we are saving GPRs other than the stack pointer, we might as well
195  // save and restore the stack pointer at the same time, via STMG and LMG.
196  // This allows the deallocation to be done by the LMG, rather than needing
197  // a separate %r15 addition.
198  const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF);
199  for (unsigned I = 0; CSRegs[I]; ++I) {
200  unsigned Reg = CSRegs[I];
201  if (SystemZ::GR64BitRegClass.contains(Reg) && SavedRegs.test(Reg)) {
202  SavedRegs.set(SystemZ::R15D);
203  break;
204  }
205  }
206 }
207 
209  : SystemZFrameLowering(TargetFrameLowering::StackGrowsDown, Align(8), 0,
210  Align(8), /* StackRealignable */ false),
211  RegSpillOffsets(0) {
212 
213  // Due to the SystemZ ABI, the DWARF CFA (Canonical Frame Address) is not
214  // equal to the incoming stack pointer, but to incoming stack pointer plus
215  // 160. Instead of using a Local Area Offset, the Register save area will
216  // be occupied by fixed frame objects, and all offsets are actually
217  // relative to CFA.
218 
219  // Create a mapping from register number to save slot offset.
220  // These offsets are relative to the start of the register save area.
221  RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
222  for (unsigned I = 0, E = array_lengthof(ELFSpillOffsetTable); I != E; ++I)
223  RegSpillOffsets[ELFSpillOffsetTable[I].Reg] = ELFSpillOffsetTable[I].Offset;
224 }
225 
226 // Add GPR64 to the save instruction being built by MIB, which is in basic
227 // block MBB. IsImplicit says whether this is an explicit operand to the
228 // instruction, or an implicit one that comes between the explicit start
229 // and end registers.
231  unsigned GPR64, bool IsImplicit) {
232  const TargetRegisterInfo *RI =
234  Register GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32);
235  bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
236  if (!IsLive || !IsImplicit) {
237  MIB.addReg(GPR64, getImplRegState(IsImplicit) | getKillRegState(!IsLive));
238  if (!IsLive)
239  MBB.addLiveIn(GPR64);
240  }
241 }
242 
246  if (CSI.empty())
247  return false;
248 
249  MachineFunction &MF = *MBB.getParent();
252  bool IsVarArg = MF.getFunction().isVarArg();
253  DebugLoc DL;
254 
255  // Save GPRs
256  SystemZ::GPRRegs SpillGPRs = ZFI->getSpillGPRRegs();
257  if (SpillGPRs.LowGPR) {
258  assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR &&
259  "Should be saving %r15 and something else");
260 
261  // Build an STMG instruction.
262  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
263 
264  // Add the explicit register operands.
265  addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false);
266  addSavedGPR(MBB, MIB, SpillGPRs.HighGPR, false);
267 
268  // Add the address.
269  MIB.addReg(SystemZ::R15D).addImm(SpillGPRs.GPROffset);
270 
271  // Make sure all call-saved GPRs are included as operands and are
272  // marked as live on entry.
273  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
274  unsigned Reg = CSI[I].getReg();
275  if (SystemZ::GR64BitRegClass.contains(Reg))
276  addSavedGPR(MBB, MIB, Reg, true);
277  }
278 
279  // ...likewise GPR varargs.
280  if (IsVarArg)
281  for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
282  addSavedGPR(MBB, MIB, SystemZ::ELFArgGPRs[I], true);
283  }
284 
285  // Save FPRs/VRs in the normal TargetInstrInfo way.
286  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
287  unsigned Reg = CSI[I].getReg();
288  if (SystemZ::FP64BitRegClass.contains(Reg)) {
289  MBB.addLiveIn(Reg);
290  TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
291  &SystemZ::FP64BitRegClass, TRI);
292  }
293  if (SystemZ::VR128BitRegClass.contains(Reg)) {
294  MBB.addLiveIn(Reg);
295  TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
296  &SystemZ::VR128BitRegClass, TRI);
297  }
298  }
299 
300  return true;
301 }
302 
306  if (CSI.empty())
307  return false;
308 
309  MachineFunction &MF = *MBB.getParent();
312  bool HasFP = hasFP(MF);
313  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
314 
315  // Restore FPRs/VRs in the normal TargetInstrInfo way.
316  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
317  unsigned Reg = CSI[I].getReg();
318  if (SystemZ::FP64BitRegClass.contains(Reg))
319  TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
320  &SystemZ::FP64BitRegClass, TRI);
321  if (SystemZ::VR128BitRegClass.contains(Reg))
322  TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
323  &SystemZ::VR128BitRegClass, TRI);
324  }
325 
326  // Restore call-saved GPRs (but not call-clobbered varargs, which at
327  // this point might hold return values).
328  SystemZ::GPRRegs RestoreGPRs = ZFI->getRestoreGPRRegs();
329  if (RestoreGPRs.LowGPR) {
330  // If we saved any of %r2-%r5 as varargs, we should also be saving
331  // and restoring %r6. If we're saving %r6 or above, we should be
332  // restoring it too.
333  assert(RestoreGPRs.LowGPR != RestoreGPRs.HighGPR &&
334  "Should be loading %r15 and something else");
335 
336  // Build an LMG instruction.
337  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG));
338 
339  // Add the explicit register operands.
340  MIB.addReg(RestoreGPRs.LowGPR, RegState::Define);
341  MIB.addReg(RestoreGPRs.HighGPR, RegState::Define);
342 
343  // Add the address.
344  MIB.addReg(HasFP ? SystemZ::R11D : SystemZ::R15D);
345  MIB.addImm(RestoreGPRs.GPROffset);
346 
347  // Do a second scan adding regs as being defined by instruction
348  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
349  unsigned Reg = CSI[I].getReg();
350  if (Reg != RestoreGPRs.LowGPR && Reg != RestoreGPRs.HighGPR &&
351  SystemZ::GR64BitRegClass.contains(Reg))
353  }
354  }
355 
356  return true;
357 }
358 
360  MachineFunction &MF, RegScavenger *RS) const {
361  MachineFrameInfo &MFFrame = MF.getFrameInfo();
364  bool BackChain = MF.getFunction().hasFnAttribute("backchain");
365 
366  if (!usePackedStack(MF) || BackChain)
367  // Create the incoming register save area.
369 
370  // Get the size of our stack frame to be allocated ...
371  uint64_t StackSize = (MFFrame.estimateStackSize(MF) +
373  // ... and the maximum offset we may need to reach into the
374  // caller's frame to access the save area or stack arguments.
375  int64_t MaxArgOffset = 0;
376  for (int I = MFFrame.getObjectIndexBegin(); I != 0; ++I)
377  if (MFFrame.getObjectOffset(I) >= 0) {
378  int64_t ArgOffset = MFFrame.getObjectOffset(I) +
379  MFFrame.getObjectSize(I);
380  MaxArgOffset = std::max(MaxArgOffset, ArgOffset);
381  }
382 
383  uint64_t MaxReach = StackSize + MaxArgOffset;
384  if (!isUInt<12>(MaxReach)) {
385  // We may need register scavenging slots if some parts of the frame
386  // are outside the reach of an unsigned 12-bit displacement.
387  // Create 2 for the case where both addresses in an MVC are
388  // out of range.
389  RS->addScavengingFrameIndex(MFFrame.CreateStackObject(8, Align(8), false));
390  RS->addScavengingFrameIndex(MFFrame.CreateStackObject(8, Align(8), false));
391  }
392 
393  // If R6 is used as an argument register it is still callee saved. If it in
394  // this case is not clobbered (and restored) it should never be marked as
395  // killed.
396  if (MF.front().isLiveIn(SystemZ::R6D) &&
397  ZFI->getRestoreGPRRegs().LowGPR != SystemZ::R6D)
398  for (auto &MO : MRI->use_nodbg_operands(SystemZ::R6D))
399  MO.setIsKill(false);
400 }
401 
402 // Emit instructions before MBBI (in MBB) to add NumBytes to Reg.
405  Register Reg, int64_t NumBytes,
406  const TargetInstrInfo *TII) {
407  while (NumBytes) {
408  unsigned Opcode;
409  int64_t ThisVal = NumBytes;
410  if (isInt<16>(NumBytes))
411  Opcode = SystemZ::AGHI;
412  else {
413  Opcode = SystemZ::AGFI;
414  // Make sure we maintain 8-byte stack alignment.
415  int64_t MinVal = -uint64_t(1) << 31;
416  int64_t MaxVal = (int64_t(1) << 31) - 8;
417  if (ThisVal < MinVal)
418  ThisVal = MinVal;
419  else if (ThisVal > MaxVal)
420  ThisVal = MaxVal;
421  }
422  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII->get(Opcode), Reg)
423  .addReg(Reg).addImm(ThisVal);
424  // The CC implicit def is dead.
425  MI->getOperand(3).setIsDead();
426  NumBytes -= ThisVal;
427  }
428 }
429 
430 // Add CFI for the new CFA offset.
433  const DebugLoc &DL, int Offset,
434  const SystemZInstrInfo *ZII) {
435  unsigned CFIIndex = MBB.getParent()->addFrameInst(
437  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
438  .addCFIIndex(CFIIndex);
439 }
440 
441 // Add CFI for the new frame location.
444  const DebugLoc &DL, unsigned Reg,
445  const SystemZInstrInfo *ZII) {
446  MachineFunction &MF = *MBB.getParent();
447  MachineModuleInfo &MMI = MF.getMMI();
448  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
449  unsigned RegNum = MRI->getDwarfRegNum(Reg, true);
450  unsigned CFIIndex = MF.addFrameInst(
451  MCCFIInstruction::createDefCfaRegister(nullptr, RegNum));
452  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
453  .addCFIIndex(CFIIndex);
454 }
455 
457  MachineBasicBlock &MBB) const {
458  assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
460  const SystemZTargetLowering &TLI = *STI.getTargetLowering();
461  MachineFrameInfo &MFFrame = MF.getFrameInfo();
462  auto *ZII = static_cast<const SystemZInstrInfo *>(STI.getInstrInfo());
465  MachineModuleInfo &MMI = MF.getMMI();
466  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
467  const std::vector<CalleeSavedInfo> &CSI = MFFrame.getCalleeSavedInfo();
468  bool HasFP = hasFP(MF);
469 
470  // In GHC calling convention C stack space, including the ABI-defined
471  // 160-byte base area, is (de)allocated by GHC itself. This stack space may
472  // be used by LLVM as spill slots for the tail recursive GHC functions. Thus
473  // do not allocate stack space here, too.
475  if (MFFrame.getStackSize() > 2048 * sizeof(long)) {
477  "Pre allocated stack space for GHC function is too small");
478  }
479  if (HasFP) {
481  "In GHC calling convention a frame pointer is not supported");
482  }
484  return;
485  }
486 
487  // Debug location must be unknown since the first debug location is used
488  // to determine the end of the prologue.
489  DebugLoc DL;
490 
491  // The current offset of the stack pointer from the CFA.
492  int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
493 
494  if (ZFI->getSpillGPRRegs().LowGPR) {
495  // Skip over the GPR saves.
496  if (MBBI != MBB.end() && MBBI->getOpcode() == SystemZ::STMG)
497  ++MBBI;
498  else
499  llvm_unreachable("Couldn't skip over GPR saves");
500 
501  // Add CFI for the GPR saves.
502  for (auto &Save : CSI) {
503  unsigned Reg = Save.getReg();
504  if (SystemZ::GR64BitRegClass.contains(Reg)) {
505  int FI = Save.getFrameIdx();
506  int64_t Offset = MFFrame.getObjectOffset(FI);
507  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
508  nullptr, MRI->getDwarfRegNum(Reg, true), Offset));
509  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
510  .addCFIIndex(CFIIndex);
511  }
512  }
513  }
514 
515  uint64_t StackSize = MFFrame.getStackSize();
516  // We need to allocate the ABI-defined 160-byte base area whenever
517  // we allocate stack space for our own use and whenever we call another
518  // function.
519  bool HasStackObject = false;
520  for (unsigned i = 0, e = MFFrame.getObjectIndexEnd(); i != e; ++i)
521  if (!MFFrame.isDeadObjectIndex(i)) {
522  HasStackObject = true;
523  break;
524  }
525  if (HasStackObject || MFFrame.hasCalls())
526  StackSize += SystemZMC::ELFCallFrameSize;
527  // Don't allocate the incoming reg save area.
528  StackSize = StackSize > SystemZMC::ELFCallFrameSize
529  ? StackSize - SystemZMC::ELFCallFrameSize
530  : 0;
531  MFFrame.setStackSize(StackSize);
532 
533  if (StackSize) {
534  // Allocate StackSize bytes.
535  int64_t Delta = -int64_t(StackSize);
536  const unsigned ProbeSize = TLI.getStackProbeSize(MF);
537  bool FreeProbe = (ZFI->getSpillGPRRegs().GPROffset &&
538  (ZFI->getSpillGPRRegs().GPROffset + StackSize) < ProbeSize);
539  if (!FreeProbe &&
541  // Stack probing may involve looping, but splitting the prologue block
542  // is not possible at this point since it would invalidate the
543  // SaveBlocks / RestoreBlocks sets of PEI in the single block function
544  // case. Build a pseudo to be handled later by inlineStackProbe().
545  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::PROBED_STACKALLOC))
546  .addImm(StackSize);
547  }
548  else {
549  bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain");
550  // If we need backchain, save current stack pointer. R1 is free at
551  // this point.
552  if (StoreBackchain)
553  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR))
554  .addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D);
555  emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII);
556  buildCFAOffs(MBB, MBBI, DL, SPOffsetFromCFA + Delta, ZII);
557  if (StoreBackchain)
558  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::STG))
559  .addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D)
561  }
562  SPOffsetFromCFA += Delta;
563  }
564 
565  if (HasFP) {
566  // Copy the base of the frame to R11.
567  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R11D)
568  .addReg(SystemZ::R15D);
569 
570  // Add CFI for the new frame location.
571  buildDefCFAReg(MBB, MBBI, DL, SystemZ::R11D, ZII);
572 
573  // Mark the FramePtr as live at the beginning of every block except
574  // the entry block. (We'll have marked R11 as live on entry when
575  // saving the GPRs.)
576  for (MachineBasicBlock &MBBJ : llvm::drop_begin(MF))
577  MBBJ.addLiveIn(SystemZ::R11D);
578  }
579 
580  // Skip over the FPR/VR saves.
581  SmallVector<unsigned, 8> CFIIndexes;
582  for (auto &Save : CSI) {
583  unsigned Reg = Save.getReg();
584  if (SystemZ::FP64BitRegClass.contains(Reg)) {
585  if (MBBI != MBB.end() &&
586  (MBBI->getOpcode() == SystemZ::STD ||
587  MBBI->getOpcode() == SystemZ::STDY))
588  ++MBBI;
589  else
590  llvm_unreachable("Couldn't skip over FPR save");
591  } else if (SystemZ::VR128BitRegClass.contains(Reg)) {
592  if (MBBI != MBB.end() &&
593  MBBI->getOpcode() == SystemZ::VST)
594  ++MBBI;
595  else
596  llvm_unreachable("Couldn't skip over VR save");
597  } else
598  continue;
599 
600  // Add CFI for the this save.
601  unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
602  Register IgnoredFrameReg;
603  int64_t Offset =
604  getFrameIndexReference(MF, Save.getFrameIdx(), IgnoredFrameReg)
605  .getFixed();
606 
607  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
608  nullptr, DwarfReg, SPOffsetFromCFA + Offset));
609  CFIIndexes.push_back(CFIIndex);
610  }
611  // Complete the CFI for the FPR/VR saves, modelling them as taking effect
612  // after the last save.
613  for (auto CFIIndex : CFIIndexes) {
614  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
615  .addCFIIndex(CFIIndex);
616  }
617 }
618 
620  MachineBasicBlock &MBB) const {
622  auto *ZII =
623  static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
625  MachineFrameInfo &MFFrame = MF.getFrameInfo();
626 
627  // See SystemZELFFrameLowering::emitPrologue
629  return;
630 
631  // Skip the return instruction.
632  assert(MBBI->isReturn() && "Can only insert epilogue into returning blocks");
633 
634  uint64_t StackSize = MFFrame.getStackSize();
635  if (ZFI->getRestoreGPRRegs().LowGPR) {
636  --MBBI;
637  unsigned Opcode = MBBI->getOpcode();
638  if (Opcode != SystemZ::LMG)
639  llvm_unreachable("Expected to see callee-save register restore code");
640 
641  unsigned AddrOpNo = 2;
642  DebugLoc DL = MBBI->getDebugLoc();
643  uint64_t Offset = StackSize + MBBI->getOperand(AddrOpNo + 1).getImm();
644  unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
645 
646  // If the offset is too large, use the largest stack-aligned offset
647  // and add the rest to the base register (the stack or frame pointer).
648  if (!NewOpcode) {
649  uint64_t NumBytes = Offset - 0x7fff8;
650  emitIncrement(MBB, MBBI, DL, MBBI->getOperand(AddrOpNo).getReg(),
651  NumBytes, ZII);
652  Offset -= NumBytes;
653  NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
654  assert(NewOpcode && "No restore instruction available");
655  }
656 
657  MBBI->setDesc(ZII->get(NewOpcode));
658  MBBI->getOperand(AddrOpNo + 1).ChangeToImmediate(Offset);
659  } else if (StackSize) {
660  DebugLoc DL = MBBI->getDebugLoc();
661  emitIncrement(MBB, MBBI, DL, SystemZ::R15D, StackSize, ZII);
662  }
663 }
664 
666  MachineFunction &MF, MachineBasicBlock &PrologMBB) const {
667  auto *ZII =
668  static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
670  const SystemZTargetLowering &TLI = *STI.getTargetLowering();
671 
672  MachineInstr *StackAllocMI = nullptr;
673  for (MachineInstr &MI : PrologMBB)
674  if (MI.getOpcode() == SystemZ::PROBED_STACKALLOC) {
675  StackAllocMI = &MI;
676  break;
677  }
678  if (StackAllocMI == nullptr)
679  return;
680  uint64_t StackSize = StackAllocMI->getOperand(0).getImm();
681  const unsigned ProbeSize = TLI.getStackProbeSize(MF);
682  uint64_t NumFullBlocks = StackSize / ProbeSize;
683  uint64_t Residual = StackSize % ProbeSize;
684  int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
685  MachineBasicBlock *MBB = &PrologMBB;
686  MachineBasicBlock::iterator MBBI = StackAllocMI;
687  const DebugLoc DL = StackAllocMI->getDebugLoc();
688 
689  // Allocate a block of Size bytes on the stack and probe it.
690  auto allocateAndProbe = [&](MachineBasicBlock &InsMBB,
691  MachineBasicBlock::iterator InsPt, unsigned Size,
692  bool EmitCFI) -> void {
693  emitIncrement(InsMBB, InsPt, DL, SystemZ::R15D, -int64_t(Size), ZII);
694  if (EmitCFI) {
695  SPOffsetFromCFA -= Size;
696  buildCFAOffs(InsMBB, InsPt, DL, SPOffsetFromCFA, ZII);
697  }
698  // Probe by means of a volatile compare.
701  BuildMI(InsMBB, InsPt, DL, ZII->get(SystemZ::CG))
702  .addReg(SystemZ::R0D, RegState::Undef)
703  .addReg(SystemZ::R15D).addImm(Size - 8).addReg(0)
704  .addMemOperand(MMO);
705  };
706 
707  bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain");
708  if (StoreBackchain)
709  BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR))
710  .addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D);
711 
712  MachineBasicBlock *DoneMBB = nullptr;
713  MachineBasicBlock *LoopMBB = nullptr;
714  if (NumFullBlocks < 3) {
715  // Emit unrolled probe statements.
716  for (unsigned int i = 0; i < NumFullBlocks; i++)
717  allocateAndProbe(*MBB, MBBI, ProbeSize, true/*EmitCFI*/);
718  } else {
719  // Emit a loop probing the pages.
720  uint64_t LoopAlloc = ProbeSize * NumFullBlocks;
721  SPOffsetFromCFA -= LoopAlloc;
722 
723  // Use R0D to hold the exit value.
724  BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R0D)
725  .addReg(SystemZ::R15D);
726  buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R0D, ZII);
727  emitIncrement(*MBB, MBBI, DL, SystemZ::R0D, -int64_t(LoopAlloc), ZII);
728  buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::ELFCallFrameSize + LoopAlloc),
729  ZII);
730 
731  DoneMBB = SystemZ::splitBlockBefore(MBBI, MBB);
732  LoopMBB = SystemZ::emitBlockAfter(MBB);
733  MBB->addSuccessor(LoopMBB);
734  LoopMBB->addSuccessor(LoopMBB);
735  LoopMBB->addSuccessor(DoneMBB);
736 
737  MBB = LoopMBB;
738  allocateAndProbe(*MBB, MBB->end(), ProbeSize, false/*EmitCFI*/);
739  BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::CLGR))
740  .addReg(SystemZ::R15D).addReg(SystemZ::R0D);
741  BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::BRC))
743 
744  MBB = DoneMBB;
745  MBBI = DoneMBB->begin();
746  buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R15D, ZII);
747  }
748 
749  if (Residual)
750  allocateAndProbe(*MBB, MBBI, Residual, true/*EmitCFI*/);
751 
752  if (StoreBackchain)
753  BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::STG))
754  .addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D)
756 
757  StackAllocMI->eraseFromParent();
758  if (DoneMBB != nullptr) {
759  // Compute the live-in lists for the new blocks.
760  recomputeLiveIns(*DoneMBB);
761  recomputeLiveIns(*LoopMBB);
762  }
763 }
764 
766  return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
769 }
770 
772  const MachineFunction &MF, int FI, Register &FrameReg) const {
773  // Our incoming SP is actually SystemZMC::ELFCallFrameSize below the CFA, so
774  // add that difference here.
778 }
779 
781  Register Reg) const {
782  bool IsVarArg = MF.getFunction().isVarArg();
783  bool BackChain = MF.getFunction().hasFnAttribute("backchain");
784  bool SoftFloat = MF.getSubtarget<SystemZSubtarget>().hasSoftFloat();
785  unsigned Offset = RegSpillOffsets[Reg];
786  if (usePackedStack(MF) && !(IsVarArg && !SoftFloat)) {
787  if (SystemZ::GR64BitRegClass.contains(Reg))
788  // Put all GPRs at the top of the Register save area with packed
789  // stack. Make room for the backchain if needed.
790  Offset += BackChain ? 24 : 32;
791  else
792  Offset = 0;
793  }
794  return Offset;
795 }
796 
798  MachineFunction &MF) const {
800  int FI = ZFI->getFramePointerSaveIndex();
801  if (!FI) {
802  MachineFrameInfo &MFFrame = MF.getFrameInfo();
804  FI = MFFrame.CreateFixedObject(8, Offset, false);
805  ZFI->setFramePointerSaveIndex(FI);
806  }
807  return FI;
808 }
809 
811  bool HasPackedStackAttr = MF.getFunction().hasFnAttribute("packed-stack");
812  bool BackChain = MF.getFunction().hasFnAttribute("backchain");
813  bool SoftFloat = MF.getSubtarget<SystemZSubtarget>().hasSoftFloat();
814  if (HasPackedStackAttr && BackChain && !SoftFloat)
815  report_fatal_error("packed-stack + backchain + hard-float is unsupported.");
816  bool CallConv = MF.getFunction().getCallingConv() != CallingConv::GHC;
817  return HasPackedStackAttr && CallConv;
818 }
819 
821  : SystemZFrameLowering(TargetFrameLowering::StackGrowsUp, Align(32), 128,
822  Align(32), /* StackRealignable */ false),
823  RegSpillOffsets(-1) {
824 
825  // Create a mapping from register number to save slot offset.
826  // These offsets are relative to the start of the local are area.
827  RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
828  for (unsigned I = 0, E = array_lengthof(XPLINKSpillOffsetTable); I != E; ++I)
829  RegSpillOffsets[XPLINKSpillOffsetTable[I].Reg] =
830  XPLINKSpillOffsetTable[I].Offset;
831 }
832 
835  std::vector<CalleeSavedInfo> &CSI) const {
836  MachineFrameInfo &MFFrame = MF.getFrameInfo();
838  const SystemZSubtarget &Subtarget = MF.getSubtarget<SystemZSubtarget>();
839  auto &Regs = Subtarget.getSpecialRegisters<SystemZXPLINK64Registers>();
840 
841  // Scan the call-saved GPRs and find the bounds of the register spill area.
842  unsigned LowGPR = 0;
843  int LowOffset = INT32_MAX;
844  unsigned HighGPR = LowGPR;
845  int HighOffset = -1;
846 
847  unsigned RegSP = Regs.getStackPointerRegister();
848  auto &GRRegClass = SystemZ::GR64BitRegClass;
849  const unsigned RegSize = 8;
850 
851  auto ProcessCSI = [&](std::vector<CalleeSavedInfo> &CSIList) {
852  for (auto &CS : CSIList) {
853  unsigned Reg = CS.getReg();
854  int Offset = RegSpillOffsets[Reg];
855  if (Offset >= 0) {
856  if (GRRegClass.contains(Reg)) {
857  if (LowOffset > Offset) {
858  LowOffset = Offset;
859  LowGPR = Reg;
860  }
861 
862  if (Offset > HighOffset) {
863  HighOffset = Offset;
864  HighGPR = Reg;
865  }
866  }
867  int FrameIdx = MFFrame.CreateFixedSpillStackObject(RegSize, Offset);
868  CS.setFrameIdx(FrameIdx);
869  } else
870  CS.setFrameIdx(INT32_MAX);
871  }
872  };
873 
874  std::vector<CalleeSavedInfo> Spills;
875 
876  // For non-leaf functions:
877  // - the address of callee (entry point) register R6 must be saved
878  Spills.push_back(CalleeSavedInfo(Regs.getAddressOfCalleeRegister()));
879 
880  // If the function needs a frame pointer, or if the backchain pointer should
881  // be stored, then save the stack pointer register R4.
882  if (hasFP(MF) || MF.getFunction().hasFnAttribute("backchain"))
883  Spills.push_back(CalleeSavedInfo(RegSP));
884 
885  // Save the range of call-saved registers, for use by the
886  // prologue/epilogue inserters.
887  ProcessCSI(CSI);
888  MFI->setRestoreGPRRegs(LowGPR, HighGPR, LowOffset);
889 
890  // Save the range of call-saved registers, for use by the epilogue inserter.
891  ProcessCSI(Spills);
892  MFI->setSpillGPRRegs(LowGPR, HighGPR, LowOffset);
893 
894  // Create spill slots for the remaining registers.
895  for (auto &CS : CSI) {
896  if (CS.getFrameIdx() != INT32_MAX)
897  continue;
898  unsigned Reg = CS.getReg();
900  Align Alignment = TRI->getSpillAlign(*RC);
901  unsigned Size = TRI->getSpillSize(*RC);
902  Alignment = std::min(Alignment, getStackAlign());
903  int FrameIdx = MFFrame.CreateStackObject(Size, Alignment, true);
904  CS.setFrameIdx(FrameIdx);
905  }
906 
907  return true;
908 }
909 
911  BitVector &SavedRegs,
912  RegScavenger *RS) const {
914 
915  bool HasFP = hasFP(MF);
916  const SystemZSubtarget &Subtarget = MF.getSubtarget<SystemZSubtarget>();
917  auto &Regs = Subtarget.getSpecialRegisters<SystemZXPLINK64Registers>();
918 
919  // If the function requires a frame pointer, record that the hard
920  // frame pointer will be clobbered.
921  if (HasFP)
922  SavedRegs.set(Regs.getFramePointerRegister());
923 
924  // If the function is not an XPLeaf function, we need to save the
925  // return address register. We also always use that register for
926  // the return instruction, so it needs to be restored in the
927  // epilogue even though that register is considered to be volatile.
928  // #TODO: Implement leaf detection.
929  SavedRegs.set(Regs.getReturnFunctionAddressRegister());
930 }
931 
935  if (CSI.empty())
936  return true;
937 
938  MachineFunction &MF = *MBB.getParent();
940  const SystemZSubtarget &Subtarget = MF.getSubtarget<SystemZSubtarget>();
941  const TargetInstrInfo *TII = Subtarget.getInstrInfo();
942  auto &Regs = Subtarget.getSpecialRegisters<SystemZXPLINK64Registers>();
943  SystemZ::GPRRegs SpillGPRs = ZFI->getSpillGPRRegs();
944  DebugLoc DL;
945 
946  // Save GPRs
947  if (SpillGPRs.LowGPR) {
948  assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR &&
949  "Should be saving multiple registers");
950 
951  // Build an STM/STMG instruction.
952  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
953 
954  // Add the explicit register operands.
955  addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false);
956  addSavedGPR(MBB, MIB, SpillGPRs.HighGPR, false);
957 
958  // Add the address r4
959  MIB.addReg(Regs.getStackPointerRegister());
960 
961  // Add the partial offset
962  // We cannot add the actual offset as, at the stack is not finalized
963  MIB.addImm(SpillGPRs.GPROffset);
964 
965  // Make sure all call-saved GPRs are included as operands and are
966  // marked as live on entry.
967  auto &GRRegClass = SystemZ::GR64BitRegClass;
968  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
969  unsigned Reg = CSI[I].getReg();
970  if (GRRegClass.contains(Reg))
971  addSavedGPR(MBB, MIB, Reg, true);
972  }
973  }
974 
975  // Spill FPRs to the stack in the normal TargetInstrInfo way
976  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
977  unsigned Reg = CSI[I].getReg();
978  if (SystemZ::FP64BitRegClass.contains(Reg)) {
979  MBB.addLiveIn(Reg);
980  TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
981  &SystemZ::FP64BitRegClass, TRI);
982  }
983  if (SystemZ::VR128BitRegClass.contains(Reg)) {
984  MBB.addLiveIn(Reg);
985  TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
986  &SystemZ::VR128BitRegClass, TRI);
987  }
988  }
989 
990  return true;
991 }
992 
994  MachineBasicBlock &MBB) const {}
995 
997  MachineBasicBlock &MBB) const {}
998 
1000  return false;
1001 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
i
i
Definition: README.txt:29
llvm::MachineFrameInfo::hasVarSizedObjects
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
Definition: MachineFrameInfo.h:353
SystemZInstrBuilder.h
llvm::SystemZSubtarget::getTargetLowering
const SystemZTargetLowering * getTargetLowering() const override
Definition: SystemZSubtarget.h:115
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:131
llvm::MachineFrameInfo::estimateStackSize
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
Definition: MachineFrameInfo.cpp:137
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::drop_begin
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
Definition: STLExtras.h:266
llvm::MachineBasicBlock::isLiveIn
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
Definition: MachineBasicBlock.cpp:580
llvm::SystemZMachineFunctionInfo::getFramePointerSaveIndex
int getFramePointerSaveIndex() const
Definition: SystemZMachineFunctionInfo.h:85
llvm::SystemZXPLINKFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: SystemZFrameLowering.cpp:910
llvm::TargetFrameLowering
Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:43
llvm::MachineModuleInfo::getContext
const MCContext & getContext() const
Definition: MachineModuleInfo.h:167
llvm::SystemZXPLINKFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: SystemZFrameLowering.cpp:932
llvm::SystemZELFFrameLowering::inlineStackProbe
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe stub (if any) with the actual probe code inline.
Definition: SystemZFrameLowering.cpp:665
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
RegSize
unsigned RegSize
Definition: AArch64MIPeepholeOpt.cpp:68
llvm::MCContext::getRegisterInfo
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:425
llvm::BitVector::set
BitVector & set()
Definition: BitVector.h:343
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::MachineInstrBuilder::addCFIIndex
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
Definition: MachineInstrBuilder.h:247
llvm::SystemZELFFrameLowering::processFunctionBeforeFrameFinalized
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Definition: SystemZFrameLowering.cpp:359
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::SystemZTargetLowering
Definition: SystemZISelLowering.h:383
emitIncrement
static void emitIncrement(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, Register Reg, int64_t NumBytes, const TargetInstrInfo *TII)
Definition: SystemZFrameLowering.cpp:403
llvm::SmallVector< unsigned, 8 >
llvm::SystemZ::emitBlockAfter
MachineBasicBlock * emitBlockAfter(MachineBasicBlock *MBB)
Definition: SystemZInstrInfo.cpp:1879
llvm::SystemZFrameLowering::create
static std::unique_ptr< SystemZFrameLowering > create(const SystemZSubtarget &STI)
Definition: SystemZFrameLowering.cpp:61
llvm::MachineFunction::getMachineMemOperand
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Definition: MachineFunction.cpp:431
llvm::recomputeLiveIns
static void recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in's for MBB.
Definition: LivePhysRegs.h:196
llvm::AArch64ISD::STG
@ STG
Definition: AArch64ISelLowering.h:441
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::SystemZFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: SystemZFrameLowering.cpp:83
llvm::StackOffset::getFixed
ScalarTy getFixed() const
Definition: TypeSize.h:149
llvm::MachineFrameInfo::setStackSize
void setStackSize(uint64_t Size)
Set the size of the stack.
Definition: MachineFrameInfo.h:556
llvm::SystemZ::splitBlockBefore
MachineBasicBlock * splitBlockBefore(MachineBasicBlock::iterator MI, MachineBasicBlock *MBB)
Definition: SystemZInstrInfo.cpp:1895
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:128
llvm::CallingConv::GHC
@ GHC
Definition: CallingConv.h:51
llvm::SystemZELFFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: SystemZFrameLowering.cpp:159
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::SystemZMachineFunctionInfo::getVarArgsFirstGPR
Register getVarArgsFirstGPR() const
Definition: SystemZMachineFunctionInfo.h:68
llvm::SystemZELFFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: SystemZFrameLowering.cpp:456
SystemZCallingConv.h
llvm::SystemZELFFrameLowering::usePackedStack
bool usePackedStack(MachineFunction &MF) const
Definition: SystemZFrameLowering.cpp:810
llvm::SystemZInstrInfo
Definition: SystemZInstrInfo.h:174
llvm::SystemZSubtarget::isTargetXPLINK64
bool isTargetXPLINK64() const
Definition: SystemZSubtarget.h:299
llvm::MachineFrameInfo::getObjectIndexEnd
int getObjectIndexEnd() const
Return one past the maximum frame object index.
Definition: MachineFrameInfo.h:393
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::SystemZXPLINK64Registers
XPLINK64 calling convention specific use registers Particular to z/OS when in 64 bit mode.
Definition: SystemZRegisterInfo.h:82
llvm::SystemZ::GPRRegs
Definition: SystemZMachineFunctionInfo.h:19
llvm::ArrayRef::empty
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:160
llvm::SystemZMachineFunctionInfo::setRestoreGPRRegs
void setRestoreGPRRegs(Register Low, Register High, unsigned Offs)
Definition: SystemZMachineFunctionInfo.h:60
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:525
MachineRegisterInfo.h
llvm::TargetFrameLowering::StackDirection
StackDirection
Definition: TargetFrameLowering.h:45
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1304
llvm::RegState::Define
@ Define
Register definition.
Definition: MachineInstrBuilder.h:44
llvm::TargetRegisterInfo::getCalleeSavedRegs
virtual const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const =0
Return a null-terminated list of all of the callee-saved registers on this target.
llvm::MachineBasicBlock::addSuccessor
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:751
llvm::SystemZFrameLowering::SystemZFrameLowering
SystemZFrameLowering(StackDirection D, Align StackAl, int LAO, Align TransAl, bool StackReal)
Definition: SystemZFrameLowering.cpp:55
llvm::MachineFunction::front
const MachineBasicBlock & front() const
Definition: MachineFunction.h:824
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:640
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::MachineRegisterInfo::use_nodbg_operands
iterator_range< use_nodbg_iterator > use_nodbg_operands(Register Reg) const
Definition: MachineRegisterInfo.h:526
TargetMachine.h
llvm::MachineInstrBuilder::addMBB
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:146
llvm::SystemZ::GPRRegs::GPROffset
unsigned GPROffset
Definition: SystemZMachineFunctionInfo.h:22
llvm::SystemZELFFrameLowering::getBackchainOffset
unsigned getBackchainOffset(MachineFunction &MF) const
Definition: SystemZFrameLowering.h:80
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
llvm::RegState::Undef
@ Undef
Value of the register doesn't matter.
Definition: MachineInstrBuilder.h:52
SystemZInstrInfo.h
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::getImm
int64_t getImm() const
Definition: MachineOperand.h:537
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:728
llvm::TargetFrameLowering::getStackAlign
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:100
llvm::MachineInstr::getOperand
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:499
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
false
Definition: StackSlotColoring.cpp:142
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::MachineModuleInfo
This class contains meta information specific to a module.
Definition: MachineModuleInfo.h:78
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:140
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:553
llvm::MachineFrameInfo::getObjectOffset
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Definition: MachineFrameInfo.h:494
llvm::BitVector
Definition: BitVector.h:74
llvm::SystemZFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: SystemZFrameLowering.cpp:67
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::SystemZMachineFunctionInfo::getRestoreGPRRegs
SystemZ::GPRRegs getRestoreGPRRegs() const
Definition: SystemZMachineFunctionInfo.h:59
llvm::SystemZMachineFunctionInfo::setSpillGPRRegs
void setSpillGPRRegs(Register Low, Register High, unsigned Offs)
Definition: SystemZMachineFunctionInfo.h:50
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::SystemZ::CCMASK_CMP_GT
const unsigned CCMASK_CMP_GT
Definition: SystemZ.h:36
llvm::MachineFrameInfo::getObjectIndexBegin
int getObjectIndexBegin() const
Return the minimum frame object index.
Definition: MachineFrameInfo.h:390
llvm::array_lengthof
constexpr size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:1394
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:518
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::MachineFrameInfo::isDeadObjectIndex
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Definition: MachineFrameInfo.h:713
llvm::SystemZ::ELFArgGPRs
const MCPhysReg ELFArgGPRs[ELFNumArgGPRs]
Definition: SystemZCallingConv.cpp:14
llvm::SystemZELFFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: SystemZFrameLowering.cpp:765
llvm::TargetOptions::DisableFramePointerElim
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
Definition: TargetOptionsImpl.cpp:24
llvm::MachineFunction::getMMI
MachineModuleInfo & getMMI() const
Definition: MachineFunction.h:581
buildDefCFAReg
static void buildDefCFAReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned Reg, const SystemZInstrInfo *ZII)
Definition: SystemZFrameLowering.cpp:442
llvm::TargetRegisterInfo::getSpillAlign
Align getSpillAlign(const TargetRegisterClass &RC) const
Return the minimum required alignment in bytes for a spill slot for a register of this class.
Definition: TargetRegisterInfo.h:288
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:630
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:626
llvm::MachineInstr::getDebugLoc
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:418
llvm::TargetRegisterInfo::getSpillSize
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
Definition: TargetRegisterInfo.h:282
llvm::MachineFrameInfo::CreateFixedSpillStackObject
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
Definition: MachineFrameInfo.cpp:102
llvm::SystemZMC::ELFCFAOffsetFromInitialSP
const int64_t ELFCFAOffsetFromInitialSP
Definition: SystemZMCTargetDesc.h:38
llvm::RegState::ImplicitDefine
@ ImplicitDefine
Definition: MachineInstrBuilder.h:63
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::MachineInstrBuilder
Definition: MachineInstrBuilder.h:69
SystemZMachineFunctionInfo.h
uint64_t
llvm::MachineFrameInfo::getObjectSize
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
Definition: MachineFrameInfo.h:453
D
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
llvm::SystemZXPLINKFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: SystemZFrameLowering.cpp:996
llvm::Function::getCallingConv
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:240
llvm::SystemZELFFrameLowering::assignCalleeSavedSpillSlots
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
Definition: SystemZFrameLowering.cpp:93
llvm::SystemZ::CCMASK_ICMP
const unsigned CCMASK_ICMP
Definition: SystemZ.h:46
llvm::HexagonInstrInfo::storeRegToStackSlot
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Store the specified register of the given register class to the specified stack frame index.
Definition: HexagonInstrInfo.cpp:913
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:38
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::RegScavenger
Definition: RegisterScavenging.h:34
addSavedGPR
static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, unsigned GPR64, bool IsImplicit)
Definition: SystemZFrameLowering.cpp:230
llvm::MachineBasicBlock::getLastNonDebugInstr
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:267
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:120
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineFrameInfo::CreateFixedObject
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
Definition: MachineFrameInfo.cpp:83
llvm::SystemZELFFrameLowering::getRegSpillOffset
unsigned getRegSpillOffset(MachineFunction &MF, Register Reg) const
Definition: SystemZFrameLowering.cpp:780
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:646
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:225
llvm::RegScavenger::addScavengingFrameIndex
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Definition: RegisterScavenging.h:123
llvm::MachineInstrBuilder::addMemOperand
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
Definition: MachineInstrBuilder.h:202
llvm::MachineFunction::getLandingPads
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
Definition: MachineFunction.h:1065
MachineModuleInfo.h
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::SystemZMachineFunctionInfo::getManipulatesSP
bool getManipulatesSP() const
Definition: SystemZMachineFunctionInfo.h:90
llvm::SystemZSubtarget
Definition: SystemZSubtarget.h:33
llvm::MachineFunction
Definition: MachineFunction.h:234
SystemZSubtarget.h
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:755
llvm::IndexedMap::grow
void grow(IndexT n)
Definition: IndexedMap.h:67
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::min
Expected< ExpressionValue > min(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:357
llvm::MachineFrameInfo::CreateStackObject
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
Definition: MachineFrameInfo.cpp:51
llvm::HexagonInstrInfo::loadRegFromStackSlot
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Load the specified register of the given register class from the specified stack frame index.
Definition: HexagonInstrInfo.cpp:958
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm::SystemZ::GPRRegs::LowGPR
unsigned LowGPR
Definition: SystemZMachineFunctionInfo.h:20
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:134
llvm::SystemZELFFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: SystemZFrameLowering.cpp:771
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::SystemZXPLINKFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: SystemZFrameLowering.cpp:993
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
llvm::MachineMemOperand::MOVolatile
@ MOVolatile
The memory access is volatile.
Definition: MachineMemOperand.h:139
llvm::StackOffset::getFixed
static StackOffset getFixed(ScalarTy Fixed)
Definition: TypeSize.h:143
llvm::MachineMemOperand::MOLoad
@ MOLoad
The memory access reads data.
Definition: MachineMemOperand.h:135
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::SystemZELFFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: SystemZFrameLowering.cpp:619
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:367
llvm::MachineFrameInfo::hasCalls
bool hasCalls() const
Return true if the current function has any function calls.
Definition: MachineFrameInfo.h:581
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::isInt< 16 >
constexpr bool isInt< 16 >(int64_t x)
Definition: MathExtras.h:370
llvm::SystemZMachineFunctionInfo
Definition: SystemZMachineFunctionInfo.h:27
llvm::BitVector::test
bool test(unsigned Idx) const
Definition: BitVector.h:447
llvm::SystemZELFFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: SystemZFrameLowering.cpp:243
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:596
llvm::CalleeSavedInfo
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
Definition: MachineFrameInfo.h:34
uint16_t
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:626
llvm::TargetFrameLowering::getFrameIndexReference
virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: TargetFrameLoweringImpl.cpp:45
llvm::TargetLoweringBase::hasInlineStackProbe
virtual bool hasInlineStackProbe(MachineFunction &MF) const
Definition: TargetLowering.h:1825
llvm::SystemZXPLINKFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: SystemZFrameLowering.cpp:999
Function.h
llvm::SystemZELFFrameLowering::restoreCalleeSavedRegisters
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
Definition: SystemZFrameLowering.cpp:303
llvm::SystemZSubtarget::getInstrInfo
const SystemZInstrInfo * getInstrInfo() const override
Definition: SystemZSubtarget.h:111
llvm::SystemZXPLINKFrameLowering::assignCalleeSavedSpillSlots
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
Definition: SystemZFrameLowering.cpp:833
llvm::SystemZMachineFunctionInfo::getSpillGPRRegs
SystemZ::GPRRegs getSpillGPRRegs() const
Definition: SystemZMachineFunctionInfo.h:49
SystemZFrameLowering.h
llvm::SystemZFrameLowering
Definition: SystemZFrameLowering.h:23
llvm::SystemZELFFrameLowering::getOrCreateFramePointerSaveIndex
int getOrCreateFramePointerSaveIndex(MachineFunction &MF) const
Definition: SystemZFrameLowering.cpp:797
llvm::Function::isVarArg
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:190
llvm::getKillRegState
unsigned getKillRegState(bool B)
Definition: MachineInstrBuilder.h:508
llvm::MachineFunction::addFrameInst
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
Definition: MachineFunction.cpp:286
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:107
SystemZRegisterInfo.h
llvm::TargetSubtargetInfo::getTargetLowering
virtual const TargetLowering * getTargetLowering() const
Definition: TargetSubtargetInfo.h:96
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:268
buildCFAOffs
static void buildCFAOffs(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, int Offset, const SystemZInstrInfo *ZII)
Definition: SystemZFrameLowering.cpp:431
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
llvm::ArrayRef::size
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:340
llvm::SystemZELFFrameLowering::SystemZELFFrameLowering
SystemZELFFrameLowering()
Definition: SystemZFrameLowering.cpp:208
llvm::TargetRegisterInfo::getSubReg
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
Definition: TargetRegisterInfo.h:1094
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:549
llvm::TargetFrameLowering::determineCalleeSaves
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: TargetFrameLoweringImpl.cpp:78
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::TargetRegisterInfo::getMinimalPhysRegClass
const TargetRegisterClass * getMinimalPhysRegClass(MCRegister Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
Definition: TargetRegisterInfo.cpp:211
RegisterScavenging.h
llvm::SystemZXPLINKFrameLowering::SystemZXPLINKFrameLowering
SystemZXPLINKFrameLowering()
Definition: SystemZFrameLowering.cpp:820
llvm::SystemZ::GPRRegs::HighGPR
unsigned HighGPR
Definition: SystemZMachineFunctionInfo.h:21
llvm::SystemZSubtarget::getSpecialRegisters
SystemZCallingConventionRegisters * getSpecialRegisters() const
Definition: SystemZSubtarget.h:94
llvm::MachineInstr::eraseFromParent
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
Definition: MachineInstr.cpp:680
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::getImplRegState
unsigned getImplRegState(bool B)
Definition: MachineInstrBuilder.h:505
llvm::TargetFrameLowering::SpillSlot
Definition: TargetFrameLowering.h:51
llvm::SystemZ::ELFNumArgGPRs
const unsigned ELFNumArgGPRs
Definition: SystemZCallingConv.h:19
llvm::SystemZMachineFunctionInfo::setFramePointerSaveIndex
void setFramePointerSaveIndex(int Idx)
Definition: SystemZMachineFunctionInfo.h:86
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
llvm::SystemZMC::ELFCallFrameSize
const int64_t ELFCallFrameSize
Definition: SystemZMCTargetDesc.h:35