30 { SystemZ::R2D, 0x10 },
31 { SystemZ::R3D, 0x18 },
32 { SystemZ::R4D, 0x20 },
33 { SystemZ::R5D, 0x28 },
34 { SystemZ::R6D, 0x30 },
35 { SystemZ::R7D, 0x38 },
36 { SystemZ::R8D, 0x40 },
37 { SystemZ::R9D, 0x48 },
38 { SystemZ::R10D, 0x50 },
39 { SystemZ::R11D, 0x58 },
40 { SystemZ::R12D, 0x60 },
41 { SystemZ::R13D, 0x68 },
42 { SystemZ::R14D, 0x70 },
43 { SystemZ::R15D, 0x78 },
44 { SystemZ::F0D, 0x80 },
45 { SystemZ::F2D, 0x88 },
46 { SystemZ::F4D, 0x90 },
47 { SystemZ::F6D, 0x98 }
51 {SystemZ::R4D, 0x00}, {SystemZ::R5D, 0x08}, {SystemZ::R6D, 0x10},
52 {SystemZ::R7D, 0x18}, {SystemZ::R8D, 0x20}, {SystemZ::R9D, 0x28},
53 {SystemZ::R10D, 0x30}, {SystemZ::R11D, 0x38}, {SystemZ::R12D, 0x40},
54 {SystemZ::R13D, 0x48}, {SystemZ::R14D, 0x50}, {SystemZ::R15D, 0x58}};
58 int LAO,
Align TransAl,
59 bool StackReal,
unsigned PointerSize)
61 PointerSize(PointerSize) {}
63std::unique_ptr<SystemZFrameLowering>
68 return std::make_unique<SystemZXPLINKFrameLowering>(PtrSz);
69 return std::make_unique<SystemZELFFrameLowering>(PtrSz);
73struct SZFrameSortingObj {
80typedef std::vector<SZFrameSortingObj> SZFrameObjVec;
91 if (ObjectsToAllocate.
size() <= 1)
94 for (
auto &Obj : ObjectsToAllocate) {
95 SortingObjects[Obj].IsValid =
true;
96 SortingObjects[Obj].ObjectIndex = Obj;
103 for (
auto &
MI :
MBB) {
104 if (
MI.isDebugInstr())
106 for (
unsigned I = 0, E =
MI.getNumOperands();
I != E; ++
I) {
112 SortingObjects[
Index].IsValid) {
113 if (
TII->hasDisplacementPairInsn(
MI.getOpcode()))
114 SortingObjects[
Index].DPairCount++;
116 SortingObjects[
Index].D12Count++;
128 auto CmpD12 = [](
const SZFrameSortingObj &
A,
const SZFrameSortingObj &
B) {
130 if (!
A.IsValid || !
B.IsValid)
132 if (!
A.ObjectSize || !
B.ObjectSize)
133 return A.ObjectSize > 0;
134 uint64_t ADensityCmp =
A.D12Count *
B.ObjectSize;
135 uint64_t BDensityCmp =
B.D12Count *
A.ObjectSize;
136 if (ADensityCmp != BDensityCmp)
137 return ADensityCmp < BDensityCmp;
138 return A.DPairCount *
B.ObjectSize <
B.DPairCount *
A.ObjectSize;
140 std::stable_sort(SortingObjects.begin(), SortingObjects.end(), CmpD12);
145 for (
auto &Obj : SortingObjects) {
149 ObjectsToAllocate[
Idx++] = Obj.ObjectIndex;
165 std::vector<CalleeSavedInfo> &CSI)
const {
173 unsigned HighGPR = SystemZ::R15D;
175 for (
auto &CS : CSI) {
179 if (SystemZ::GR64BitRegClass.
contains(Reg) && StartSPOffset >
Offset) {
186 CS.setFrameIdx(FrameIdx);
188 CS.setFrameIdx(INT32_MAX);
202 if (StartSPOffset >
Offset) {
203 LowGPR = Reg; StartSPOffset =
Offset;
212 CurrOffset += StartSPOffset;
214 for (
auto &CS : CSI) {
215 if (CS.getFrameIdx() != INT32_MAX)
219 unsigned Size =
TRI->getSpillSize(*RC);
221 assert(CurrOffset % 8 == 0 &&
222 "8-byte alignment required for for all register save slots");
223 int FrameIdx = MFFrame.CreateFixedSpillStackObject(
Size, CurrOffset);
224 CS.setFrameIdx(FrameIdx);
237 bool HasFP =
hasFP(MF);
251 SavedRegs.
set(SystemZ::R6D);
252 SavedRegs.
set(SystemZ::R7D);
258 SavedRegs.
set(SystemZ::R11D);
263 SavedRegs.
set(SystemZ::R14D);
270 for (
unsigned I = 0; CSRegs[
I]; ++
I) {
271 unsigned Reg = CSRegs[
I];
272 if (SystemZ::GR64BitRegClass.
contains(Reg) && SavedRegs.
test(Reg)) {
273 SavedRegs.
set(SystemZ::R15D);
292 RegSpillOffsets.
grow(SystemZ::NUM_TARGET_REGS);
293 for (
const auto &Entry : ELFSpillOffsetTable)
294 RegSpillOffsets[Entry.Reg] = Entry.Offset;
302 unsigned GPR64,
bool IsImplicit) {
307 if (!IsLive || !IsImplicit) {
330 "Should be saving %r15 and something else");
346 if (SystemZ::GR64BitRegClass.
contains(Reg))
359 if (SystemZ::FP64BitRegClass.
contains(Reg)) {
364 if (SystemZ::VR128BitRegClass.
contains(Reg)) {
383 bool HasFP =
hasFP(MF);
389 if (SystemZ::FP64BitRegClass.
contains(Reg))
392 if (SystemZ::VR128BitRegClass.
contains(Reg))
405 "Should be loading %r15 and something else");
415 MIB.
addReg(HasFP ? SystemZ::R11D : SystemZ::R15D);
421 if (Reg != RestoreGPRs.
LowGPR && Reg != RestoreGPRs.
HighGPR &&
422 SystemZ::GR64BitRegClass.contains(Reg))
446 int64_t MaxArgOffset = 0;
451 MaxArgOffset = std::max(MaxArgOffset, ArgOffset);
454 uint64_t MaxReach = StackSize + MaxArgOffset;
455 if (!isUInt<12>(MaxReach)) {
471 for (
auto &MO :
MRI->use_nodbg_operands(SystemZ::R6D))
482 int64_t ThisVal = NumBytes;
483 if (isInt<16>(NumBytes))
484 Opcode = SystemZ::AGHI;
486 Opcode = SystemZ::AGFI;
488 int64_t MinVal = -
uint64_t(1) << 31;
489 int64_t MaxVal = (int64_t(1) << 31) - 8;
490 if (ThisVal < MinVal)
492 else if (ThisVal > MaxVal)
498 MI->getOperand(3).setIsDead();
522 unsigned RegNum =
MRI->getDwarfRegNum(Reg,
true);
531 assert(&MF.
front() == &
MBB &&
"Shrink-wrapping not yet supported");
541 bool HasFP =
hasFP(MF);
550 "Pre allocated stack space for GHC function is too small");
554 "In GHC calling convention a frame pointer is not supported");
575 for (
auto &Save : CSI) {
577 if (SystemZ::GR64BitRegClass.
contains(Reg)) {
578 int FI = Save.getFrameIdx();
581 nullptr,
MRI->getDwarfRegNum(Reg,
true),
Offset));
592 bool HasStackObject =
false;
595 HasStackObject =
true;
598 if (HasStackObject || MFFrame.
hasCalls())
608 int64_t Delta = -int64_t(StackSize);
609 const unsigned ProbeSize = TLI.getStackProbeSize(MF);
635 SPOffsetFromCFA += Delta;
650 MBBJ.addLiveIn(SystemZ::R11D);
655 for (
auto &Save : CSI) {
657 if (SystemZ::FP64BitRegClass.
contains(Reg)) {
659 (
MBBI->getOpcode() == SystemZ::STD ||
660 MBBI->getOpcode() == SystemZ::STDY))
664 }
else if (SystemZ::VR128BitRegClass.
contains(Reg)) {
666 MBBI->getOpcode() == SystemZ::VST)
674 unsigned DwarfReg =
MRI->getDwarfRegNum(Reg,
true);
681 nullptr, DwarfReg, SPOffsetFromCFA +
Offset));
686 for (
auto CFIIndex : CFIIndexes) {
705 assert(
MBBI->isReturn() &&
"Can only insert epilogue into returning blocks");
707 uint64_t StackSize = MFFrame.getStackSize();
710 unsigned Opcode =
MBBI->getOpcode();
711 if (Opcode != SystemZ::LMG)
714 unsigned AddrOpNo = 2;
717 unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode,
Offset);
726 NewOpcode = ZII->getOpcodeForOffset(Opcode,
Offset);
727 assert(NewOpcode &&
"No restore instruction available");
730 MBBI->setDesc(ZII->get(NewOpcode));
731 MBBI->getOperand(AddrOpNo + 1).ChangeToImmediate(
Offset);
732 }
else if (StackSize) {
747 if (
MI.getOpcode() == SystemZ::PROBED_STACKALLOC) {
751 if (StackAllocMI ==
nullptr)
754 const unsigned ProbeSize = TLI.getStackProbeSize(MF);
755 uint64_t NumFullBlocks = StackSize / ProbeSize;
756 uint64_t Residual = StackSize % ProbeSize;
765 bool EmitCFI) ->
void {
768 SPOffsetFromCFA -=
Size;
774 BuildMI(InsMBB, InsPt,
DL, ZII->get(SystemZ::CG))
787 if (NumFullBlocks < 3) {
789 for (
unsigned int i = 0; i < NumFullBlocks; i++)
790 allocateAndProbe(*
MBB,
MBBI, ProbeSize,
true);
793 uint64_t LoopAlloc = ProbeSize * NumFullBlocks;
794 SPOffsetFromCFA -= LoopAlloc;
811 allocateAndProbe(*
MBB,
MBB->
end(), ProbeSize,
false);
823 allocateAndProbe(*
MBB,
MBBI, Residual,
true);
831 if (DoneMBB !=
nullptr) {
855 bool BackChain = Subtarget.hasBackChain();
856 bool SoftFloat = Subtarget.hasSoftFloat();
857 unsigned Offset = RegSpillOffsets[Reg];
859 if (SystemZ::GR64BitRegClass.
contains(Reg))
862 Offset += BackChain ? 24 : 32;
885 bool BackChain = Subtarget.hasBackChain();
886 bool SoftFloat = Subtarget.hasSoftFloat();
887 if (HasPackedStackAttr && BackChain && !SoftFloat)
890 return HasPackedStackAttr && CallConv;
897 RegSpillOffsets(-1) {
901 RegSpillOffsets.
grow(SystemZ::NUM_TARGET_REGS);
902 for (
const auto &Entry : XPLINKSpillOffsetTable)
903 RegSpillOffsets[Entry.Reg] = Entry.Offset;
942 if (
MRI.isPhysRegModified(Regs->getStackPointerRegister()))
946 if (
MRI.isPhysRegModified(Regs->getAddressOfCalleeRegister()))
951 if (
MRI.isPhysRegModified(Regs->getReturnFunctionAddressRegister()))
969 std::vector<CalleeSavedInfo> &CSI)
const {
974 auto &GRRegClass = SystemZ::GR64BitRegClass;
991 CSI.back().setRestored(
false);
994 CSI.push_back(
CalleeSavedInfo(Regs.getReturnFunctionAddressRegister()));
998 if (
hasFP(MF) || Subtarget.hasBackChain())
1008 int LowRestoreOffset = INT32_MAX;
1010 int LowSpillOffset = INT32_MAX;
1012 int HighOffset = -1;
1017 for (
auto &CS : CSI) {
1019 int Offset = RegSpillOffsets[Reg];
1021 if (GRRegClass.contains(Reg)) {
1022 if (LowSpillOffset >
Offset) {
1026 if (CS.isRestored() && LowRestoreOffset >
Offset) {
1027 LowRestoreOffset =
Offset;
1028 LowRestoreGPR = Reg;
1031 if (
Offset > HighOffset) {
1043 CS.setFrameIdx(FrameIdx);
1049 Align Alignment =
TRI->getSpillAlign(*RC);
1050 unsigned Size =
TRI->getSpillSize(*RC);
1053 CS.setFrameIdx(FrameIdx);
1063 assert(LowSpillGPR &&
"Expected registers to spill");
1074 bool HasFP =
hasFP(MF);
1081 SavedRegs.
set(Regs.getFramePointerRegister());
1099 if (SpillGPRs.LowGPR) {
1100 assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR &&
1101 "Should be saving multiple registers");
1111 MIB.
addReg(Regs.getStackPointerRegister());
1115 MIB.
addImm(SpillGPRs.GPROffset);
1119 auto &GRRegClass = SystemZ::GR64BitRegClass;
1122 if (GRRegClass.contains(Reg))
1130 if (SystemZ::FP64BitRegClass.
contains(Reg)) {
1135 if (SystemZ::VR128BitRegClass.
contains(Reg)) {
1163 if (SystemZ::FP64BitRegClass.
contains(Reg))
1166 if (SystemZ::VR128BitRegClass.
contains(Reg))
1174 if (RestoreGPRs.
LowGPR) {
1175 assert(isInt<20>(Regs.getStackPointerBias() + RestoreGPRs.
GPROffset));
1179 .
addReg(Regs.getStackPointerRegister())
1191 MIB.
addReg(Regs.getStackPointerRegister());
1208 assert(&MF.
front() == &
MBB &&
"Shrink-wrapping not yet supported");
1219 bool HasFP =
hasFP(MF);
1225 const uint64_t StackSize = MFFrame.getStackSize();
1227 if (ZFI->getSpillGPRRegs().LowGPR) {
1229 if ((
MBBI !=
MBB.
end()) && ((
MBBI->getOpcode() == SystemZ::STMG))) {
1230 const int Operand = 3;
1233 Offset = Regs.getStackPointerBias() +
MBBI->getOperand(Operand).getImm();
1235 if (isInt<20>(
Offset - StackSize))
1238 StoreInstr = &*
MBBI;
1248 int64_t Delta = -int64_t(StackSize);
1254 if (StoreInstr && HasFP) {
1276 const uint64_t GuardPageSize = 1024 * 1024;
1277 if (StackSize > GuardPageSize) {
1278 assert(StoreInstr &&
"Wrong insertion point");
1279 BuildMI(
MBB, InsertPt,
DL, ZII->get(SystemZ::XPLINK_STACKALLOC));
1286 Regs.getFramePointerRegister())
1287 .
addReg(Regs.getStackPointerRegister());
1293 B.addLiveIn(Regs.getFramePointerRegister());
1303 unsigned FixedRegs = ZFI->getVarArgsFirstGPR() + ZFI->getVarArgsFirstFPR();
1306 uint64_t StartOffset = MFFrame.getOffsetAdjustment() +
1307 MFFrame.getStackSize() + Regs.getCallFrameSize() +
1309 unsigned Reg = GPRs[
I];
1312 .
addReg(Regs.getStackPointerRegister())
1331 assert(
MBBI->isReturn() &&
"Can only insert epilogue into returning blocks");
1333 uint64_t StackSize = MFFrame.getStackSize();
1335 unsigned SPReg = Regs.getStackPointerRegister();
1352 if (
MI.getOpcode() == SystemZ::XPLINK_STACKALLOC) {
1356 if (StackAllocMI ==
nullptr)
1359 bool NeedSaveSP =
hasFP(MF);
1360 bool NeedSaveArg = PrologMBB.
isLiveIn(SystemZ::R3D);
1361 const int64_t SaveSlotR3 = 2192;
1375 BuildMI(StackExtMBB,
DL, ZII->get(SystemZ::LG), SystemZ::R3D)
1380 BuildMI(StackExtMBB,
DL, ZII->get(SystemZ::CallBASR_STACKEXT))
1402 BuildMI(
MBB, StackAllocMI,
DL, ZII->get(SystemZ::LLGT), SystemZ::R3D)
1424 BuildMI(*NextMBB, StackAllocMI,
DL, ZII->get(SystemZ::LGR))
1432 BuildMI(*NextMBB, StackAllocMI,
DL, ZII->get(SystemZ::LGR))
1436 BuildMI(*NextMBB, StackAllocMI,
DL, ZII->get(SystemZ::LG))
1493 StackSize += Regs->getCallFrameSize();
1504 SPOffset -= StackSize;
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
const HexagonInstrInfo * TII
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
unsigned const TargetRegisterInfo * TRI
This file declares the machine register scavenger class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static void emitIncrement(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, Register Reg, int64_t NumBytes, const TargetInstrInfo *TII)
static void buildDefCFAReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned Reg, const SystemZInstrInfo *ZII)
static void buildCFAOffs(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, int Offset, const SystemZInstrInfo *ZII)
static bool isXPLeafCandidate(const MachineFunction &MF)
static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, unsigned GPR64, bool IsImplicit)
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
bool empty() const
empty - Check if the array is empty.
bool test(unsigned Idx) const
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
Store the specified register of the given register class to the specified stack frame index.
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
Load the specified register of the given register class from the specified stack frame index.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
const MCRegisterInfo * getRegisterInfo() const
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
bool hasCalls() const
Return true if the current function has any function calls.
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
void setStackID(int ObjectIdx, uint8_t ID)
void setOffsetAdjustment(int Adj)
Set the correction for frame offsets.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
void setMaxCallFrameSize(unsigned S)
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
uint8_t getStackID(int ObjectIdx) const
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
void setStackSize(uint64_t Size)
Set the size of the stack.
int getObjectIndexBegin() const
Return the minimum frame object index.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
unsigned addFrameInst(const MCCFIInstruction &Inst)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, LLT MemTy, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
void push_back(MachineBasicBlock *MBB)
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
MachineModuleInfo & getMMI() const
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineBasicBlock & front() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
Representation of each machine instruction.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const MachineOperand & getOperand(unsigned i) const
A description of a memory reference used in the backend.
@ MOVolatile
The memory access is volatile.
@ MOLoad
The memory access reads data.
This class contains meta information specific to a module.
const MCContext & getContext() const
MachineOperand class - Representation of each machine instruction operand.
bool isFI() const
isFI - Tests if this is a MO_FrameIndex operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Wrapper class representing virtual and physical registers.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
int64_t getFixed() const
Returns the fixed component of the stack.
static StackOffset getFixed(int64_t Fixed)
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
int getOrCreateFramePointerSaveIndex(MachineFunction &MF) const override
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack frame.
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
unsigned getBackchainOffset(MachineFunction &MF) const override
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe stub (if any) with the actual probe code inline.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
bool usePackedStack(MachineFunction &MF) const
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
SystemZELFFrameLowering(unsigned PointerSize)
unsigned getRegSpillOffset(MachineFunction &MF, Register Reg) const
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
static std::unique_ptr< SystemZFrameLowering > create(const SystemZSubtarget &STI)
unsigned getPointerSize() const
SystemZFrameLowering(StackDirection D, Align StackAl, int LAO, Align TransAl, bool StackReal, unsigned PointerSize)
Register getVarArgsFirstGPR() const
int getFramePointerSaveIndex() const
SystemZ::GPRRegs getRestoreGPRRegs() const
void setRestoreGPRRegs(Register Low, Register High, unsigned Offs)
void setFramePointerSaveIndex(int Idx)
SystemZ::GPRRegs getSpillGPRRegs() const
void setSpillGPRRegs(Register Low, Register High, unsigned Offs)
const SystemZInstrInfo * getInstrInfo() const override
const SystemZTargetLowering * getTargetLowering() const override
bool isTargetXPLINK64() const
SystemZCallingConventionRegisters * getSpecialRegisters() const
XPLINK64 calling convention specific use registers Particular to z/OS when in 64 bit mode.
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe stub (if any) with the actual probe code inline.
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
int getOrCreateFramePointerSaveIndex(MachineFunction &MF) const override
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
void determineFrameLayout(MachineFunction &MF) const
SystemZXPLINKFrameLowering(unsigned PointerSize)
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
Information about stack frame layout on the target.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const
getFrameIndexReference - This method should return the base register and offset used to reference a f...
TargetInstrInfo - Interface to description of machine instruction set.
const TargetMachine & getTargetMachine() const
virtual bool hasInlineStackProbe(const MachineFunction &MF) const
unsigned getPointerSize(unsigned AS) const
Get the pointer size for this target.
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetLowering * getTargetLowering() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ GHC
Used by the Glasgow Haskell Compiler (GHC).
@ Define
Register definition.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
const int64_t ELFCallFrameSize
const int64_t ELFCFAOffsetFromInitialSP
MachineBasicBlock * splitBlockBefore(MachineBasicBlock::iterator MI, MachineBasicBlock *MBB)
const unsigned CCMASK_CMP_GT
MachineBasicBlock * emitBlockAfter(MachineBasicBlock *MBB)
const unsigned CCMASK_ICMP
const unsigned XPLINK64NumArgGPRs
const MCPhysReg ELFArgGPRs[ELFNumArgGPRs]
const unsigned CCMASK_CMP_LT
const unsigned ELFNumArgGPRs
const MCPhysReg XPLINK64ArgGPRs[XPLINK64NumArgGPRs]
This is an optimization pass for GlobalISel generic memory operations.
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned getImplRegState(bool B)
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
unsigned getKillRegState(bool B)
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
void fullyRecomputeLiveIns(ArrayRef< MachineBasicBlock * > MBBs)
Convenience function for recomputing live-in's for a set of MBBs until the computation converges.
This struct is a compact representation of a valid (non-zero power of two) alignment.
This class contains a discriminated union of information about pointers in memory operands,...