29 { SystemZ::R2D, 0x10 },
30 { SystemZ::R3D, 0x18 },
31 { SystemZ::R4D, 0x20 },
32 { SystemZ::R5D, 0x28 },
33 { SystemZ::R6D, 0x30 },
34 { SystemZ::R7D, 0x38 },
35 { SystemZ::R8D, 0x40 },
36 { SystemZ::R9D, 0x48 },
37 { SystemZ::R10D, 0x50 },
38 { SystemZ::R11D, 0x58 },
39 { SystemZ::R12D, 0x60 },
40 { SystemZ::R13D, 0x68 },
41 { SystemZ::R14D, 0x70 },
42 { SystemZ::R15D, 0x78 },
43 { SystemZ::F0D, 0x80 },
44 { SystemZ::F2D, 0x88 },
45 { SystemZ::F4D, 0x90 },
46 { SystemZ::F6D, 0x98 }
50 {SystemZ::R4D, 0x00}, {SystemZ::R5D, 0x08}, {SystemZ::R6D, 0x10},
51 {SystemZ::R7D, 0x18}, {SystemZ::R8D, 0x20}, {SystemZ::R9D, 0x28},
52 {SystemZ::R10D, 0x30}, {SystemZ::R11D, 0x38}, {SystemZ::R12D, 0x40},
53 {SystemZ::R13D, 0x48}, {SystemZ::R14D, 0x50}, {SystemZ::R15D, 0x58}};
57 int LAO,
Align TransAl,
61std::unique_ptr<SystemZFrameLowering>
64 return std::make_unique<SystemZXPLINKFrameLowering>();
65 return std::make_unique<SystemZELFFrameLowering>();
71 switch (
MI->getOpcode()) {
72 case SystemZ::ADJCALLSTACKDOWN:
73 case SystemZ::ADJCALLSTACKUP:
75 "ADJSTACKDOWN and ADJSTACKUP should be no-ops");
85struct SZFrameSortingObj {
92typedef std::vector<SZFrameSortingObj> SZFrameObjVec;
103 if (ObjectsToAllocate.
size() <= 1)
106 for (
auto &Obj : ObjectsToAllocate) {
107 SortingObjects[Obj].IsValid =
true;
108 SortingObjects[Obj].ObjectIndex = Obj;
115 for (
auto &
MI :
MBB) {
116 if (
MI.isDebugInstr())
118 for (
unsigned I = 0,
E =
MI.getNumOperands();
I !=
E; ++
I) {
124 SortingObjects[
Index].IsValid) {
125 if (
TII->hasDisplacementPairInsn(
MI.getOpcode()))
126 SortingObjects[
Index].DPairCount++;
128 SortingObjects[
Index].D12Count++;
140 auto CmpD12 = [](
const SZFrameSortingObj &
A,
const SZFrameSortingObj &
B) {
142 if (!
A.IsValid || !
B.IsValid)
144 if (!
A.ObjectSize || !
B.ObjectSize)
145 return A.ObjectSize > 0;
146 uint64_t ADensityCmp =
A.D12Count *
B.ObjectSize;
147 uint64_t BDensityCmp =
B.D12Count *
A.ObjectSize;
148 if (ADensityCmp != BDensityCmp)
149 return ADensityCmp < BDensityCmp;
150 return A.DPairCount *
B.ObjectSize <
B.DPairCount *
A.ObjectSize;
152 std::stable_sort(SortingObjects.begin(), SortingObjects.end(), CmpD12);
157 for (
auto &Obj : SortingObjects) {
161 ObjectsToAllocate[
Idx++] = Obj.ObjectIndex;
177 std::vector<CalleeSavedInfo> &CSI)
const {
185 unsigned HighGPR = SystemZ::R15D;
187 for (
auto &CS : CSI) {
191 if (SystemZ::GR64BitRegClass.
contains(Reg) && StartSPOffset >
Offset) {
196 int FrameIdx = MFFrame.CreateFixedSpillStackObject(8,
Offset);
197 CS.setFrameIdx(FrameIdx);
199 CS.setFrameIdx(INT32_MAX);
213 if (StartSPOffset >
Offset) {
214 LowGPR = Reg; StartSPOffset =
Offset;
223 CurrOffset += StartSPOffset;
225 for (
auto &CS : CSI) {
226 if (CS.getFrameIdx() != INT32_MAX)
230 unsigned Size =
TRI->getSpillSize(*RC);
232 assert(CurrOffset % 8 == 0 &&
233 "8-byte alignment required for for all register save slots");
234 int FrameIdx = MFFrame.CreateFixedSpillStackObject(
Size, CurrOffset);
235 CS.setFrameIdx(FrameIdx);
248 bool HasFP =
hasFP(MF);
262 SavedRegs.
set(SystemZ::R6D);
263 SavedRegs.
set(SystemZ::R7D);
269 SavedRegs.
set(SystemZ::R11D);
274 SavedRegs.
set(SystemZ::R14D);
281 for (
unsigned I = 0; CSRegs[
I]; ++
I) {
282 unsigned Reg = CSRegs[
I];
283 if (SystemZ::GR64BitRegClass.
contains(Reg) && SavedRegs.
test(Reg)) {
284 SavedRegs.
set(SystemZ::R15D);
303 RegSpillOffsets.
grow(SystemZ::NUM_TARGET_REGS);
304 for (
const auto &Entry : ELFSpillOffsetTable)
305 RegSpillOffsets[Entry.Reg] = Entry.Offset;
313 unsigned GPR64,
bool IsImplicit) {
318 if (!IsLive || !IsImplicit) {
341 "Should be saving %r15 and something else");
357 if (SystemZ::GR64BitRegClass.
contains(Reg))
370 if (SystemZ::FP64BitRegClass.
contains(Reg)) {
375 if (SystemZ::VR128BitRegClass.
contains(Reg)) {
394 bool HasFP =
hasFP(MF);
400 if (SystemZ::FP64BitRegClass.
contains(Reg))
403 if (SystemZ::VR128BitRegClass.
contains(Reg))
416 "Should be loading %r15 and something else");
426 MIB.
addReg(HasFP ? SystemZ::R11D : SystemZ::R15D);
432 if (Reg != RestoreGPRs.
LowGPR && Reg != RestoreGPRs.
HighGPR &&
433 SystemZ::GR64BitRegClass.contains(Reg))
457 int64_t MaxArgOffset = 0;
462 MaxArgOffset = std::max(MaxArgOffset, ArgOffset);
465 uint64_t MaxReach = StackSize + MaxArgOffset;
466 if (!isUInt<12>(MaxReach)) {
480 for (
auto &MO :
MRI->use_nodbg_operands(SystemZ::R6D))
491 int64_t ThisVal = NumBytes;
492 if (isInt<16>(NumBytes))
493 Opcode = SystemZ::AGHI;
495 Opcode = SystemZ::AGFI;
497 int64_t MinVal = -
uint64_t(1) << 31;
498 int64_t MaxVal = (int64_t(1) << 31) - 8;
499 if (ThisVal < MinVal)
501 else if (ThisVal > MaxVal)
507 MI->getOperand(3).setIsDead();
531 unsigned RegNum =
MRI->getDwarfRegNum(Reg,
true);
540 assert(&MF.
front() == &
MBB &&
"Shrink-wrapping not yet supported");
550 bool HasFP =
hasFP(MF);
559 "Pre allocated stack space for GHC function is too small");
563 "In GHC calling convention a frame pointer is not supported");
584 for (
auto &Save : CSI) {
586 if (SystemZ::GR64BitRegClass.
contains(Reg)) {
587 int FI = Save.getFrameIdx();
590 nullptr,
MRI->getDwarfRegNum(Reg,
true),
Offset));
601 bool HasStackObject =
false;
604 HasStackObject =
true;
607 if (HasStackObject || MFFrame.
hasCalls())
617 int64_t Delta = -int64_t(StackSize);
618 const unsigned ProbeSize = TLI.getStackProbeSize(MF);
644 SPOffsetFromCFA += Delta;
659 MBBJ.addLiveIn(SystemZ::R11D);
664 for (
auto &Save : CSI) {
666 if (SystemZ::FP64BitRegClass.
contains(Reg)) {
668 (
MBBI->getOpcode() == SystemZ::STD ||
669 MBBI->getOpcode() == SystemZ::STDY))
673 }
else if (SystemZ::VR128BitRegClass.
contains(Reg)) {
675 MBBI->getOpcode() == SystemZ::VST)
683 unsigned DwarfReg =
MRI->getDwarfRegNum(Reg,
true);
690 nullptr, DwarfReg, SPOffsetFromCFA +
Offset));
695 for (
auto CFIIndex : CFIIndexes) {
714 assert(
MBBI->isReturn() &&
"Can only insert epilogue into returning blocks");
716 uint64_t StackSize = MFFrame.getStackSize();
719 unsigned Opcode =
MBBI->getOpcode();
720 if (Opcode != SystemZ::LMG)
723 unsigned AddrOpNo = 2;
726 unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode,
Offset);
735 NewOpcode = ZII->getOpcodeForOffset(Opcode,
Offset);
736 assert(NewOpcode &&
"No restore instruction available");
739 MBBI->setDesc(ZII->get(NewOpcode));
740 MBBI->getOperand(AddrOpNo + 1).ChangeToImmediate(
Offset);
741 }
else if (StackSize) {
756 if (
MI.getOpcode() == SystemZ::PROBED_STACKALLOC) {
760 if (StackAllocMI ==
nullptr)
763 const unsigned ProbeSize = TLI.getStackProbeSize(MF);
764 uint64_t NumFullBlocks = StackSize / ProbeSize;
765 uint64_t Residual = StackSize % ProbeSize;
774 bool EmitCFI) ->
void {
777 SPOffsetFromCFA -=
Size;
783 BuildMI(InsMBB, InsPt,
DL, ZII->get(SystemZ::CG))
796 if (NumFullBlocks < 3) {
798 for (
unsigned int i = 0; i < NumFullBlocks; i++)
799 allocateAndProbe(*
MBB,
MBBI, ProbeSize,
true);
802 uint64_t LoopAlloc = ProbeSize * NumFullBlocks;
803 SPOffsetFromCFA -= LoopAlloc;
820 allocateAndProbe(*
MBB,
MBB->
end(), ProbeSize,
false);
832 allocateAndProbe(*
MBB,
MBBI, Residual,
true);
840 if (DoneMBB !=
nullptr) {
866 unsigned Offset = RegSpillOffsets[Reg];
868 if (SystemZ::GR64BitRegClass.
contains(Reg))
871 Offset += BackChain ? 24 : 32;
895 if (HasPackedStackAttr && BackChain && !SoftFloat)
898 return HasPackedStackAttr && CallConv;
904 RegSpillOffsets(-1) {
908 RegSpillOffsets.
grow(SystemZ::NUM_TARGET_REGS);
909 for (
const auto &Entry : XPLINKSpillOffsetTable)
910 RegSpillOffsets[Entry.Reg] = Entry.Offset;
936 if (
MRI.isPhysRegModified(Regs->getStackPointerRegister()))
940 if (
MRI.isPhysRegModified(Regs->getAddressOfCalleeRegister()))
945 if (
MRI.isPhysRegModified(Regs->getReturnFunctionAddressRegister()))
963 std::vector<CalleeSavedInfo> &CSI)
const {
968 auto &GRRegClass = SystemZ::GR64BitRegClass;
985 CSI.back().setRestored(
false);
988 CSI.push_back(
CalleeSavedInfo(Regs.getReturnFunctionAddressRegister()));
997 int LowRestoreOffset = INT32_MAX;
999 int LowSpillOffset = INT32_MAX;
1001 int HighOffset = -1;
1003 for (
auto &CS : CSI) {
1005 int Offset = RegSpillOffsets[Reg];
1007 if (GRRegClass.contains(Reg)) {
1008 if (LowSpillOffset >
Offset) {
1012 if (CS.isRestored() && LowRestoreOffset >
Offset) {
1013 LowRestoreOffset =
Offset;
1014 LowRestoreGPR = Reg;
1017 if (
Offset > HighOffset) {
1026 CS.setFrameIdx(FrameIdx);
1032 Align Alignment =
TRI->getSpillAlign(*RC);
1033 unsigned Size =
TRI->getSpillSize(*RC);
1036 CS.setFrameIdx(FrameIdx);
1046 assert(LowSpillGPR &&
"Expected registers to spill");
1057 bool HasFP =
hasFP(MF);
1064 SavedRegs.
set(Regs.getFramePointerRegister());
1082 if (SpillGPRs.LowGPR) {
1083 assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR &&
1084 "Should be saving multiple registers");
1094 MIB.
addReg(Regs.getStackPointerRegister());
1098 MIB.
addImm(SpillGPRs.GPROffset);
1102 auto &GRRegClass = SystemZ::GR64BitRegClass;
1105 if (GRRegClass.contains(Reg))
1113 if (SystemZ::FP64BitRegClass.
contains(Reg)) {
1118 if (SystemZ::VR128BitRegClass.
contains(Reg)) {
1146 if (SystemZ::FP64BitRegClass.
contains(Reg))
1149 if (SystemZ::VR128BitRegClass.
contains(Reg))
1157 if (RestoreGPRs.
LowGPR) {
1158 assert(isInt<20>(Regs.getStackPointerBias() + RestoreGPRs.
GPROffset));
1162 .
addReg(Regs.getStackPointerRegister())
1174 MIB.
addReg(Regs.getStackPointerRegister());
1191 assert(&MF.
front() == &
MBB &&
"Shrink-wrapping not yet supported");
1202 bool HasFP =
hasFP(MF);
1208 const uint64_t StackSize = MFFrame.getStackSize();
1210 if (ZFI->getSpillGPRRegs().LowGPR) {
1212 if ((
MBBI !=
MBB.
end()) && ((
MBBI->getOpcode() == SystemZ::STMG))) {
1213 const int Operand = 3;
1216 Offset = Regs.getStackPointerBias() +
MBBI->getOperand(Operand).getImm();
1218 if (isInt<20>(
Offset - StackSize))
1221 StoreInstr = &*
MBBI;
1231 int64_t Delta = -int64_t(StackSize);
1237 if (StoreInstr && HasFP) {
1259 const uint64_t GuardPageSize = 1024 * 1024;
1260 if (StackSize > GuardPageSize) {
1261 assert(StoreInstr &&
"Wrong insertion point");
1262 BuildMI(
MBB, InsertPt,
DL, ZII->get(SystemZ::XPLINK_STACKALLOC));
1269 Regs.getFramePointerRegister())
1270 .
addReg(Regs.getStackPointerRegister());
1276 B.addLiveIn(Regs.getFramePointerRegister());
1290 assert(
MBBI->isReturn() &&
"Can only insert epilogue into returning blocks");
1292 uint64_t StackSize = MFFrame.getStackSize();
1294 unsigned SPReg = Regs.getStackPointerRegister();
1311 if (
MI.getOpcode() == SystemZ::XPLINK_STACKALLOC) {
1315 if (StackAllocMI ==
nullptr)
1318 bool NeedSaveSP =
hasFP(MF);
1319 bool NeedSaveArg = PrologMBB.
isLiveIn(SystemZ::R3D);
1320 const int64_t SaveSlotR3 = 2192;
1334 BuildMI(StackExtMBB,
DL, ZII->get(SystemZ::LG), SystemZ::R3D)
1339 BuildMI(StackExtMBB,
DL, ZII->get(SystemZ::CallBASR_STACKEXT))
1361 BuildMI(
MBB, StackAllocMI,
DL, ZII->get(SystemZ::LLGT), SystemZ::R3D)
1383 BuildMI(*NextMBB, StackAllocMI,
DL, ZII->get(SystemZ::LGR))
1391 BuildMI(*NextMBB, StackAllocMI,
DL, ZII->get(SystemZ::LGR))
1395 BuildMI(*NextMBB, StackAllocMI,
DL, ZII->get(SystemZ::LG))
1441 StackSize += Regs->getCallFrameSize();
1450 int Offset = RegSpillOffsets[CS.getReg()];
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
const HexagonInstrInfo * TII
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
unsigned const TargetRegisterInfo * TRI
This file declares the machine register scavenger class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static void emitIncrement(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, Register Reg, int64_t NumBytes, const TargetInstrInfo *TII)
static void buildDefCFAReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned Reg, const SystemZInstrInfo *ZII)
static void buildCFAOffs(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, int Offset, const SystemZInstrInfo *ZII)
static bool isXPLeafCandidate(const MachineFunction &MF)
static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, unsigned GPR64, bool IsImplicit)
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
bool empty() const
empty - Check if the array is empty.
bool test(unsigned Idx) const
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
unsigned getPointerSize(unsigned AS=0) const
Layout pointer size in bytes, rounded up to a whole number of bytes.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
Store the specified register of the given register class to the specified stack frame index.
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
Load the specified register of the given register class from the specified stack frame index.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
const MCRegisterInfo * getRegisterInfo() const
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
bool hasCalls() const
Return true if the current function has any function calls.
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
void setStackID(int ObjectIdx, uint8_t ID)
void setOffsetAdjustment(int Adj)
Set the correction for frame offsets.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
void setStackSize(uint64_t Size)
Set the size of the stack.
int getObjectIndexBegin() const
Return the minimum frame object index.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
unsigned addFrameInst(const MCCFIInstruction &Inst)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
void push_back(MachineBasicBlock *MBB)
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
MachineModuleInfo & getMMI() const
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineBasicBlock & front() const
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
Representation of each machine instruction.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const MachineOperand & getOperand(unsigned i) const
A description of a memory reference used in the backend.
@ MOVolatile
The memory access is volatile.
@ MOLoad
The memory access reads data.
This class contains meta information specific to a module.
const MCContext & getContext() const
MachineOperand class - Representation of each machine instruction operand.
bool isFI() const
isFI - Tests if this is a MO_FrameIndex operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Wrapper class representing virtual and physical registers.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
int64_t getFixed() const
Returns the fixed component of the stack.
static StackOffset getFixed(int64_t Fixed)
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack frame.
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe stub (if any) with the actual probe code inline.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
unsigned getBackchainOffset(MachineFunction &MF) const
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
bool usePackedStack(MachineFunction &MF) const
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
unsigned getRegSpillOffset(MachineFunction &MF, Register Reg) const
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
int getOrCreateFramePointerSaveIndex(MachineFunction &MF) const
SystemZELFFrameLowering()
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
static std::unique_ptr< SystemZFrameLowering > create(const SystemZSubtarget &STI)
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
SystemZFrameLowering(StackDirection D, Align StackAl, int LAO, Align TransAl, bool StackReal)
Register getVarArgsFirstGPR() const
int getFramePointerSaveIndex() const
SystemZ::GPRRegs getRestoreGPRRegs() const
void setRestoreGPRRegs(Register Low, Register High, unsigned Offs)
void setFramePointerSaveIndex(int Idx)
SystemZ::GPRRegs getSpillGPRRegs() const
void setSpillGPRRegs(Register Low, Register High, unsigned Offs)
const SystemZInstrInfo * getInstrInfo() const override
const SystemZTargetLowering * getTargetLowering() const override
bool isTargetXPLINK64() const
SystemZCallingConventionRegisters * getSpecialRegisters() const
XPLINK64 calling convention specific use registers Particular to z/OS when in 64 bit mode.
SystemZXPLINKFrameLowering()
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe stub (if any) with the actual probe code inline.
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
void determineFrameLayout(MachineFunction &MF) const
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
Information about stack frame layout on the target.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const
getFrameIndexReference - This method should return the base register and offset used to reference a f...
TargetInstrInfo - Interface to description of machine instruction set.
virtual bool hasInlineStackProbe(const MachineFunction &MF) const
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetLowering * getTargetLowering() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ GHC
Used by the Glasgow Haskell Compiler (GHC).
@ Define
Register definition.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
const int64_t ELFCallFrameSize
const int64_t ELFCFAOffsetFromInitialSP
MachineBasicBlock * splitBlockBefore(MachineBasicBlock::iterator MI, MachineBasicBlock *MBB)
const unsigned CCMASK_CMP_GT
MachineBasicBlock * emitBlockAfter(MachineBasicBlock *MBB)
const unsigned CCMASK_ICMP
const MCPhysReg ELFArgGPRs[ELFNumArgGPRs]
const unsigned CCMASK_CMP_LT
const unsigned ELFNumArgGPRs
This is an optimization pass for GlobalISel generic memory operations.
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
static void recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in's for MBB.
unsigned getImplRegState(bool B)
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
unsigned getKillRegState(bool B)
This struct is a compact representation of a valid (non-zero power of two) alignment.
This class contains a discriminated union of information about pointers in memory operands,...