35#define DEBUG_TYPE "machine-trace-metrics"
42 "Machine Trace Metrics",
false,
true)
49 std::fill(std::begin(Ensembles), std::end(Ensembles),
nullptr);
62 TII = ST.getInstrInfo();
63 TRI = ST.getRegisterInfo();
65 Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
105 for (
const auto &
MI : *
MBB) {
106 if (
MI.isTransient())
122 assert(PI->ProcResourceIdx < PRKinds &&
"Bad processor resource kind");
123 PRCycles[PI->ProcResourceIdx] += PI->ReleaseAtCycle;
130 for (
unsigned K = 0; K < PRKinds; ++K)
131 ProcReleaseAtCycles[PROffset + K] =
139 assert(BlockInfo[MBBNum].hasResources() &&
140 "getResources() must be called before getProcReleaseAtCycles()");
142 assert((MBBNum+1) * PRKinds <= ProcReleaseAtCycles.
size());
143 return ArrayRef{ProcReleaseAtCycles.
data() + MBBNum * PRKinds, PRKinds};
151 BlockInfo.resize(
MTM.BlockInfo.size());
153 ProcResourceDepths.
resize(
MTM.BlockInfo.size() * PRKinds);
154 ProcResourceHeights.
resize(
MTM.BlockInfo.size() * PRKinds);
162 return MTM.Loops->getLoopFor(
MBB);
167void MachineTraceMetrics::Ensemble::
170 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
177 std::fill(ProcResourceDepths.begin() + PROffset,
178 ProcResourceDepths.begin() + PROffset + PRKinds, 0);
185 TraceBlockInfo *PredTBI = &BlockInfo[PredNum];
186 assert(PredTBI->hasValidDepth() &&
"Trace above has not been computed yet");
187 const FixedBlockInfo *PredFBI = MTM.getResources(TBI->
Pred);
188 TBI->
InstrDepth = PredTBI->InstrDepth + PredFBI->InstrCount;
189 TBI->
Head = PredTBI->Head;
194 for (
unsigned K = 0; K < PRKinds; ++K)
195 ProcResourceDepths[PROffset + K] = PredPRDepths[K] + PredPRCycles[K];
200void MachineTraceMetrics::Ensemble::
203 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
207 TBI->InstrHeight = MTM.getResources(
MBB)->InstrCount;
213 llvm::copy(PRCycles, ProcResourceHeights.begin() + PROffset);
219 unsigned SuccNum = TBI->Succ->getNumber();
220 TraceBlockInfo *SuccTBI = &BlockInfo[SuccNum];
221 assert(SuccTBI->hasValidHeight() &&
"Trace below has not been computed yet");
222 TBI->InstrHeight += SuccTBI->InstrHeight;
223 TBI->Tail = SuccTBI->Tail;
227 for (
unsigned K = 0;
K < PRKinds; ++
K)
228 ProcResourceHeights[PROffset + K] = SuccPRHeights[K] + PRCycles[K];
258 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
259 assert((MBBNum+1) * PRKinds <= ProcResourceDepths.size());
260 return ArrayRef{ProcResourceDepths.
data() + MBBNum * PRKinds, PRKinds};
271 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
272 assert((MBBNum+1) * PRKinds <= ProcResourceHeights.size());
273 return ArrayRef{ProcResourceHeights.
data() + MBBNum * PRKinds, PRKinds};
305 const char *
getName()
const override {
return "MinInstr"; }
317 const char *
getName()
const override {
return "Local"; }
340 unsigned CurCount = MTM.getResources(
MBB)->InstrCount;
342 unsigned BestDepth = 0;
345 getDepthResources(Pred);
351 if (!Best ||
Depth < BestDepth) {
366 unsigned BestHeight = 0;
369 if (CurLoop && Succ == CurLoop->
getHeader())
375 getHeightResources(Succ);
381 if (!Best || Height < BestHeight) {
393 "Invalid trace strategy enum");
394 Ensemble *&E = Ensembles[
static_cast<size_t>(Strategy)];
401 return (E =
new MinInstrCountEnsemble(
this));
403 return (E =
new LocalEnsemble(
this));
442 bool Downward =
false;
474 if ((LB.Downward ? To : *
From) == FromLoop->getHeader())
483 return LB.Visited.insert(To).second;
494 LoopBounds Bounds(BlockInfo, MTM.Loops);
497 Bounds.Downward =
false;
498 Bounds.Visited.clear();
501 TraceBlockInfo &TBI = BlockInfo[
I->getNumber()];
503 TBI.Pred = pickTracePred(
I);
511 computeDepthResources(
I);
515 Bounds.Downward =
true;
516 Bounds.Visited.clear();
519 TraceBlockInfo &TBI = BlockInfo[
I->getNumber()];
521 TBI.Succ = pickTraceSucc(
I);
529 computeHeightResources(
I);
543 while (!WorkList.
empty()) {
568 while (!WorkList.
empty()) {
594 for (
const auto &
I : *BadMBB)
600 assert(BlockInfo.size() == MTM.MF->getNumBlockIDs() &&
601 "Outdated BlockInfo size");
602 for (
unsigned Num = 0; Num < BlockInfo.size(); ++Num) {
608 "Trace is broken, depth should have been invalidated.");
616 "Trace is broken, height should have been invalidated.");
620 "Trace contains backedge");
655 assert((++DefI).atEnd() &&
"Register has multiple defs");
667 if (
UseMI.isDebugInstr())
670 bool HasPhysRegs =
false;
677 if (Reg.isPhysical()) {
700 if (
UseMI.getOperand(
Idx + 1).getMBB() == Pred) {
718 if (!MO.isReg() || !MO.getReg().isPhysical())
727 }
else if (MO.isKill())
734 if (
I == RegUnits.
end())
745 RegUnits.
erase(Unit);
748 for (
unsigned DefOp : LiveDefOps) {
769unsigned MachineTraceMetrics::Ensemble::
770computeCrossBlockCriticalPath(
const TraceBlockInfo &TBI) {
771 assert(TBI.HasValidInstrDepths &&
"Missing depth info");
772 assert(TBI.HasValidInstrHeights &&
"Missing height info");
774 for (
const LiveInReg &LIR : TBI.LiveIns) {
775 if (!LIR.Reg.isVirtual())
780 if (!DefTBI.isUsefulDominator(TBI))
782 unsigned Len = LIR.Height + Cycles[
DefMI].Depth;
783 MaxLen = std::max(MaxLen, Len);
800 for (
const DataDep &Dep : Deps) {
802 BlockInfo[Dep.DefMI->getParent()->getNumber()];
807 unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth;
809 if (!Dep.DefMI->isTransient())
810 DepCycle += MTM.SchedModel
811 .computeOperandLatency(Dep.DefMI, Dep.DefOp, &
UseMI, Dep.UseOp);
837 for (; Start !=
End; Start++)
838 updateDepth(Start->getParent(), *Start, RegUnits);
843void MachineTraceMetrics::Ensemble::
854 Stack.push_back(
MBB);
866 while (!Stack.empty()) {
867 MBB = Stack.pop_back_val();
870 TBI.HasValidInstrDepths =
true;
871 TBI.CriticalPath = 0;
875 dbgs() <<
format(
"%7u Instructions\n", TBI.InstrDepth);
877 for (
unsigned K = 0; K < PRDepths.
size(); ++K)
879 unsigned Factor = MTM.SchedModel.getResourceFactor(K);
880 dbgs() <<
format(
"%6uc @ ", MTM.getCycles(PRDepths[K]))
881 << MTM.SchedModel.getProcResource(K)->Name <<
" ("
882 << PRDepths[K]/Factor <<
" ops x" << Factor <<
")\n";
887 if (TBI.HasValidInstrHeights)
888 TBI.CriticalPath = computeCrossBlockCriticalPath(TBI);
891 updateDepth(TBI,
UseMI, RegUnits);
910 if (!Reg.isPhysical())
920 if (
I == RegUnits.
end())
922 unsigned DepHeight =
I->Cycle;
923 if (!
MI.isTransient()) {
929 Height = std::max(Height, DepHeight);
936 for (
unsigned Op : ReadOps) {
941 if (LRU.
Cycle <= Height && LRU.
MI != &
MI) {
961 if (!Dep.DefMI->isTransient())
966 const auto &[
I, Inserted] = Heights.
insert({Dep.DefMI, UseHeight});
971 if (
I->second < UseHeight)
972 I->second = UseHeight;
979void MachineTraceMetrics::Ensemble::
993 TBI.LiveIns.push_back(Reg);
1000void MachineTraceMetrics::Ensemble::
1007 assert(TBI.hasValidHeight() &&
"Incomplete trace");
1008 if (TBI.HasValidInstrHeights)
1011 TBI.LiveIns.clear();
1029 for (LiveInReg &LI : TBI.LiveIns) {
1030 if (LI.Reg.isVirtual()) {
1032 unsigned &Height = Heights[MTM.MRI->getVRegDef(LI.Reg)];
1033 if (Height < LI.Height)
1038 RegUnits[LI.Reg].Cycle = LI.Height;
1049 TBI.HasValidInstrHeights =
true;
1050 TBI.CriticalPath = 0;
1053 dbgs() <<
format(
"%7u Instructions\n", TBI.InstrHeight);
1055 for (
unsigned K = 0;
K < PRHeights.
size(); ++
K)
1057 unsigned Factor = MTM.SchedModel.getResourceFactor(K);
1058 dbgs() <<
format(
"%6uc @ ", MTM.getCycles(PRHeights[K]))
1059 << MTM.SchedModel.getProcResource(K)->Name <<
" ("
1060 << PRHeights[
K]/Factor <<
" ops x" << Factor <<
")\n";
1075 for (
const auto &
PHI : *Succ) {
1080 if (!Deps.
empty()) {
1082 unsigned Height = TBI.Succ ? Cycles.lookup(&
PHI).Height : 0;
1097 if (HeightI != Heights.
end()) {
1098 Cycle = HeightI->second;
1100 Heights.
erase(HeightI);
1114 for (
const DataDep &Dep : Deps)
1118 InstrCycles &MICycles = Cycles[&
MI];
1119 MICycles.Height =
Cycle;
1120 if (!TBI.HasValidInstrDepths) {
1125 TBI.CriticalPath = std::max(TBI.CriticalPath,
Cycle + MICycles.Depth);
1132 for (LiveInReg &LIR : TBI.LiveIns) {
1140 TBI.LiveIns.emplace_back(RU.RegUnit, RU.Cycle);
1146 if (!TBI.HasValidInstrDepths)
1149 TBI.CriticalPath = std::max(TBI.CriticalPath,
1150 computeCrossBlockCriticalPath(TBI));
1151 LLVM_DEBUG(
dbgs() <<
"Critical path: " << TBI.CriticalPath <<
'\n');
1162 computeInstrDepths(
MBB);
1164 computeInstrHeights(
MBB);
1166 return Trace(*
this, TBI);
1171 assert(getBlockNum() ==
unsigned(
MI.getParent()->getNumber()) &&
1172 "MI must be in the trace center block");
1174 return getCriticalPath() - (Cyc.
Depth + Cyc.
Height);
1182 assert(Deps.
size() == 1 &&
"PHI doesn't have MBB as a predecessor");
1183 DataDep &Dep = Deps.
front();
1184 unsigned DepCycle = getInstrCycles(*Dep.DefMI).Depth;
1186 if (!Dep.DefMI->isTransient())
1187 DepCycle += TE.MTM.SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp,
1200 for (
unsigned K = 0; K < PRDepths.
size(); ++K)
1201 PRMax = std::max(PRMax, PRDepths[K] + PRCycles[K]);
1203 for (
unsigned PRD : PRDepths)
1204 PRMax = std::max(PRMax, PRD);
1207 PRMax = TE.MTM.getCycles(PRMax);
1210 unsigned Instrs = TBI.InstrDepth;
1213 Instrs += TE.MTM.BlockInfo[getBlockNum()].InstrCount;
1214 if (
unsigned IW = TE.MTM.SchedModel.getIssueWidth())
1217 return std::max(Instrs, PRMax);
1231 unsigned ResourceIdx) ->
unsigned {
1232 unsigned Cycles = 0;
1237 PI = TE.MTM.SchedModel.getWriteProcResBegin(SC),
1238 PE = TE.MTM.SchedModel.getWriteProcResEnd(SC);
1240 if (PI->ProcResourceIdx != ResourceIdx)
1242 Cycles += (PI->ReleaseAtCycle *
1243 TE.MTM.SchedModel.getResourceFactor(ResourceIdx));
1249 for (
unsigned K = 0; K < PRDepths.
size(); ++K) {
1250 unsigned PRCycles = PRDepths[K] + PRHeights[K];
1252 PRCycles += TE.MTM.getProcReleaseAtCycles(
MBB->
getNumber())[K];
1253 PRCycles += ExtraCycles(ExtraInstrs, K);
1254 PRCycles -= ExtraCycles(RemoveInstrs, K);
1255 PRMax = std::max(PRMax, PRCycles);
1258 PRMax = TE.MTM.getCycles(PRMax);
1261 unsigned Instrs = TBI.InstrDepth + TBI.InstrHeight;
1264 Instrs += TE.MTM.getResources(
MBB)->InstrCount;
1265 Instrs += ExtraInstrs.
size();
1266 Instrs -= RemoveInstrs.
size();
1267 if (
unsigned IW = TE.MTM.SchedModel.getIssueWidth())
1270 return std::max(Instrs, PRMax);
1286 for (
unsigned Idx = 0;
Idx < BlockInfo.size(); ++
Idx) {
1287 OS <<
" %bb." <<
Idx <<
'\t';
1288 BlockInfo[
Idx].print(
OS);
1294 if (hasValidDepth()) {
1295 OS <<
"depth=" << InstrDepth;
1300 OS <<
" head=%bb." << Head;
1301 if (HasValidInstrDepths)
1304 OS <<
"depth invalid";
1306 if (hasValidHeight()) {
1307 OS <<
"height=" << InstrHeight;
1312 OS <<
" tail=%bb." <<
Tail;
1313 if (HasValidInstrHeights)
1316 OS <<
"height invalid";
1317 if (HasValidInstrDepths && HasValidInstrHeights)
1318 OS <<
", crit=" << CriticalPath;
1322 unsigned MBBNum = &TBI - &TE.BlockInfo[0];
1324 OS << TE.getName() <<
" trace %bb." << TBI.Head <<
" --> %bb." << MBBNum
1325 <<
" --> %bb." << TBI.Tail <<
':';
1326 if (TBI.hasValidHeight() && TBI.hasValidDepth())
1327 OS <<
' ' << getInstrCount() <<
" instrs.";
1328 if (TBI.HasValidInstrDepths && TBI.HasValidInstrHeights)
1329 OS <<
' ' << TBI.CriticalPath <<
" cycles.";
1332 OS <<
"\n%bb." << MBBNum;
1333 while (
Block->hasValidDepth() &&
Block->Pred) {
1334 unsigned Num =
Block->Pred->getNumber();
1336 Block = &TE.BlockInfo[Num];
1341 while (
Block->hasValidHeight() &&
Block->Succ) {
1342 unsigned Num =
Block->Succ->getNumber();
1344 Block = &TE.BlockInfo[Num];
unsigned const MachineRegisterInfo * MRI
MachineInstrBuilder & UseMI
MachineInstrBuilder MachineInstrBuilder & DefMI
BlockVerifier::State From
COFF::MachineTypes Machine
static unsigned InstrCount
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
This file defines the DenseMap class.
DenseMap< Block *, BlockRelaxAux > Blocks
unsigned const TargetRegisterInfo * TRI
static bool pushDepHeight(const DataDep &Dep, const MachineInstr &UseMI, unsigned UseHeight, MIHeightMap &Heights, const TargetSchedModel &SchedModel, const TargetInstrInfo *TII)
static void getPHIDeps(const MachineInstr &UseMI, SmallVectorImpl< DataDep > &Deps, const MachineBasicBlock *Pred, const MachineRegisterInfo *MRI)
static bool getDataDeps(const MachineInstr &UseMI, SmallVectorImpl< DataDep > &Deps, const MachineRegisterInfo *MRI)
static void updatePhysDepsDownwards(const MachineInstr *UseMI, SmallVectorImpl< DataDep > &Deps, SparseSet< LiveRegUnit > &RegUnits, const TargetRegisterInfo *TRI)
static unsigned updatePhysDepsUpwards(const MachineInstr &MI, unsigned Height, SparseSet< LiveRegUnit > &RegUnits, const TargetSchedModel &SchedModel, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI)
static bool isExitingLoop(const MachineLoop *From, const MachineLoop *To)
#define INITIALIZE_PASS_DEPENDENCY(depName)
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.
static StringRef getName(Value *V)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
This file defines the SparseSet class derived from the version described in Briggs,...
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
void setPreservesAll()
Set by analyses that do not transform their input at all.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
This class represents an Operation in the Expression.
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
iterator find(const_arg_type_t< KeyT > Val)
bool erase(const KeyT &Val)
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
A possibly irreducible generalization of a Loop.
BlockT * getHeader() const
Represents a single loop in the control flow graph.
Wrapper class representing physical registers. Should be passed by value.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
bool isPredecessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a predecessor of this block.
iterator_range< succ_iterator > successors()
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
iterator_range< pred_iterator > predecessors()
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
Register getReg(unsigned Idx) const
Get the register for the operand index.
Representation of each machine instruction.
const MachineBasicBlock * getParent() const
iterator_range< mop_iterator > operands()
const MachineOperand & getOperand(unsigned i) const
MachineOperand class - Representation of each machine instruction operand.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
Register getReg() const
getReg - Returns the register number.
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register wit...
unsigned getOperandNo() const
getOperandNo - Return the operand # of this MachineOperand in its MachineInstr.
bool atEnd() const
atEnd - return true if this iterator is equal to reg_end() on the value.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
A trace ensemble is a collection of traces selected using the same strategy, for example 'minimum res...
void invalidate(const MachineBasicBlock *MBB)
Invalidate traces through BadMBB.
ArrayRef< unsigned > getProcResourceHeights(unsigned MBBNum) const
Get an array of processor resource heights for MBB.
void updateDepth(TraceBlockInfo &TBI, const MachineInstr &, SparseSet< LiveRegUnit > &RegUnits)
Updates the depth of an machine instruction, given RegUnits.
const MachineLoop * getLoopFor(const MachineBasicBlock *) const
const TraceBlockInfo * getHeightResources(const MachineBasicBlock *) const
void updateDepths(MachineBasicBlock::iterator Start, MachineBasicBlock::iterator End, SparseSet< LiveRegUnit > &RegUnits)
Updates the depth of the instructions from Start to End.
const TraceBlockInfo * getDepthResources(const MachineBasicBlock *) const
ArrayRef< unsigned > getProcResourceDepths(unsigned MBBNum) const
Get an array of processor resource depths for MBB.
Ensemble(MachineTraceMetrics *)
MachineTraceMetrics & MTM
void print(raw_ostream &) const
Trace getTrace(const MachineBasicBlock *MBB)
Get the trace that passes through MBB.
A trace represents a plausible sequence of executed basic blocks that passes through the current basi...
unsigned getInstrSlack(const MachineInstr &MI) const
Return the slack of MI.
bool isDepInTrace(const MachineInstr &DefMI, const MachineInstr &UseMI) const
A dependence is useful if the basic block of the defining instruction is part of the trace of the use...
unsigned getResourceLength(ArrayRef< const MachineBasicBlock * > Extrablocks=std::nullopt, ArrayRef< const MCSchedClassDesc * > ExtraInstrs=std::nullopt, ArrayRef< const MCSchedClassDesc * > RemoveInstrs=std::nullopt) const
Return the resource length of the trace.
unsigned getPHIDepth(const MachineInstr &PHI) const
Return the Depth of a PHI instruction in a trace center block successor.
void print(raw_ostream &) const
unsigned getResourceDepth(bool Bottom) const
Return the resource depth of the top/bottom of the trace center block.
Ensemble * getEnsemble(MachineTraceStrategy)
Get the trace ensemble representing the given trace selection strategy.
bool runOnMachineFunction(MachineFunction &) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
void invalidate(const MachineBasicBlock *MBB)
Invalidate cached information about MBB.
void getAnalysisUsage(AnalysisUsage &) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
void verifyAnalysis() const override
verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis infor...
const FixedBlockInfo * getResources(const MachineBasicBlock *)
Get the fixed resource information about MBB. Compute it on demand.
ArrayRef< unsigned > getProcReleaseAtCycles(unsigned MBBNum) const
Get the scaled number of cycles used per processor resource in MBB.
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Wrapper class representing virtual and physical registers.
MCRegister asMCReg() const
Utility to check-convert this value to a MCRegister.
static constexpr bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
reference emplace_back(ArgTypes &&... Args)
void push_back(const T &Elt)
pointer data()
Return a pointer to the vector's buffer, even if empty().
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
SparseSet - Fast set implementation for objects that can be identified by small unsigned keys.
iterator erase(iterator I)
erase - Erases an existing element identified by a valid iterator.
typename DenseT::iterator iterator
const_iterator end() const
void setUniverse(unsigned U)
setUniverse - Set the universe size which determines the largest key the set can hold.
iterator find(const KeyT &Key)
find - Find an element by its key.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Provide an instruction scheduling machine model to CodeGen passes.
ProcResIter getWriteProcResEnd(const MCSchedClassDesc *SC) const
bool hasInstrSchedModel() const
Return true if this machine model includes an instruction-level scheduling model.
unsigned getResourceFactor(unsigned ResIdx) const
Multiply the number of units consumed for a resource by this factor to normalize it relative to other...
const MCSchedClassDesc * resolveSchedClass(const MachineInstr *MI) const
Return the MCSchedClassDesc for this instruction.
void init(const TargetSubtargetInfo *TSInfo)
Initialize the machine model for instruction scheduling.
unsigned computeOperandLatency(const MachineInstr *DefMI, unsigned DefOperIdx, const MachineInstr *UseMI, unsigned UseOperIdx) const
Compute operand latency based on the available machine model.
unsigned getNumProcResourceKinds() const
Get the number of kinds of resources for this target.
ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const
TargetSubtargetInfo - Generic base class for all target subtargets.
bool insertEdge(std::optional< const MachineBasicBlock * > From, const MachineBasicBlock *To)
void finishPostorder(const MachineBasicBlock *)
po_iterator_storage(LoopBounds &LB)
Default po_iterator_storage implementation with an internal set object.
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ Tail
Attemps to make calls as fast as possible while guaranteeing that tail call optimization can always b...
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
MachineTraceStrategy
Strategies for selecting traces.
@ TS_MinInstrCount
Select the trace through a block that has the fewest instructions.
@ TS_Local
Select the trace that contains only the current basic block.
iterator_range< po_ext_iterator< T, SetType > > post_order_ext(const T &G, SetType &S)
iterator_range< ipo_ext_iterator< T, SetType > > inverse_post_order_ext(const T &G, SetType &S)
Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI)
Create Printable object to print register units on a raw_ostream.
auto reverse(ContainerTy &&C)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
DWARFExpression::Operation Op
OutputIt copy(R &&Range, OutputIt Out)
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
Summarize the scheduling resources required for an instruction of a particular scheduling class.
Identify one of the processor resource kinds consumed by a particular scheduling class for the specif...
Per-basic block information that doesn't depend on the trace through the block.
bool hasResources() const
Returns true when resource information for this block has been computed.
unsigned InstrCount
The number of non-trivial instructions in the block.
bool HasCalls
True when the block contains calls.
InstrCycles represents the cycle height and depth of an instruction in a trace.
unsigned Height
Minimum number of cycles from this instruction is issued to the of the trace, as determined by data d...
unsigned Depth
Earliest issue cycle as determined by data dependencies and instruction latencies from the beginning ...
Per-basic block information that relates to a specific trace through the block.
unsigned InstrDepth
Accumulated number of instructions in the trace above this block.
void invalidateDepth()
Invalidate depth resources when some block above this one has changed.
const MachineBasicBlock * Pred
Trace predecessor, or NULL for the first block in the trace.
unsigned InstrHeight
Accumulated number of instructions in the trace below this block.
const MachineBasicBlock * Succ
Trace successor, or NULL for the last block in the trace.
bool hasValidDepth() const
Returns true if the depth resources have been computed from the trace above this block.
bool isUsefulDominator(const TraceBlockInfo &TBI) const
Assuming that this is a dominator of TBI, determine if it contains useful instruction depths.
void invalidateHeight()
Invalidate height resources when a block below this one has changed.
unsigned CriticalPath
Critical path length.
void print(raw_ostream &) const
unsigned Head
The block number of the head of the trace. (When hasValidDepth()).
bool HasValidInstrDepths
Instruction depths have been computed. This implies hasValidDepth().
bool hasValidHeight() const
Returns true if the height resources have been computed from the trace below this block.
bool HasValidInstrHeights
Instruction heights have been computed. This implies hasValidHeight().