LLVM  15.0.0git
PrologEpilogInserter.cpp
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1 //===- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function ---===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass is responsible for finalizing the functions frame layout, saving
10 // callee saved registers, and for emitting prolog & epilog code for the
11 // function.
12 //
13 // This pass must be run after register allocation. After this pass is
14 // executed, it is illegal to construct MO_FrameIndex operands.
15 //
16 //===----------------------------------------------------------------------===//
17 
18 #include "llvm/ADT/ArrayRef.h"
19 #include "llvm/ADT/BitVector.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/ADT/SetVector.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/ADT/SmallSet.h"
25 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/ADT/Statistic.h"
47 #include "llvm/IR/Attributes.h"
48 #include "llvm/IR/CallingConv.h"
50 #include "llvm/IR/DiagnosticInfo.h"
51 #include "llvm/IR/Function.h"
52 #include "llvm/IR/InlineAsm.h"
53 #include "llvm/IR/LLVMContext.h"
54 #include "llvm/InitializePasses.h"
55 #include "llvm/MC/MCRegisterInfo.h"
56 #include "llvm/Pass.h"
57 #include "llvm/Support/CodeGen.h"
58 #include "llvm/Support/Debug.h"
63 #include <algorithm>
64 #include <cassert>
65 #include <cstdint>
66 #include <functional>
67 #include <limits>
68 #include <utility>
69 #include <vector>
70 
71 using namespace llvm;
72 
73 #define DEBUG_TYPE "prologepilog"
74 
76 
77 STATISTIC(NumLeafFuncWithSpills, "Number of leaf functions with CSRs");
78 STATISTIC(NumFuncSeen, "Number of functions seen in PEI");
79 
80 
81 namespace {
82 
83 class PEI : public MachineFunctionPass {
84 public:
85  static char ID;
86 
87  PEI() : MachineFunctionPass(ID) {
89  }
90 
91  void getAnalysisUsage(AnalysisUsage &AU) const override;
92 
93  /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
94  /// frame indexes with appropriate references.
95  bool runOnMachineFunction(MachineFunction &MF) override;
96 
97 private:
98  RegScavenger *RS;
99 
100  // MinCSFrameIndex, MaxCSFrameIndex - Keeps the range of callee saved
101  // stack frame indexes.
102  unsigned MinCSFrameIndex = std::numeric_limits<unsigned>::max();
103  unsigned MaxCSFrameIndex = 0;
104 
105  // Save and Restore blocks of the current function. Typically there is a
106  // single save block, unless Windows EH funclets are involved.
107  MBBVector SaveBlocks;
108  MBBVector RestoreBlocks;
109 
110  // Flag to control whether to use the register scavenger to resolve
111  // frame index materialization registers. Set according to
112  // TRI->requiresFrameIndexScavenging() for the current function.
113  bool FrameIndexVirtualScavenging;
114 
115  // Flag to control whether the scavenger should be passed even though
116  // FrameIndexVirtualScavenging is used.
117  bool FrameIndexEliminationScavenging;
118 
119  // Emit remarks.
120  MachineOptimizationRemarkEmitter *ORE = nullptr;
121 
122  void calculateCallFrameInfo(MachineFunction &MF);
123  void calculateSaveRestoreBlocks(MachineFunction &MF);
124  void spillCalleeSavedRegs(MachineFunction &MF);
125 
126  void calculateFrameObjectOffsets(MachineFunction &MF);
127  void replaceFrameIndices(MachineFunction &MF);
128  void replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
129  int &SPAdj);
130  void insertPrologEpilogCode(MachineFunction &MF);
131  void insertZeroCallUsedRegs(MachineFunction &MF);
132 };
133 
134 } // end anonymous namespace
135 
136 char PEI::ID = 0;
137 
139 
140 INITIALIZE_PASS_BEGIN(PEI, DEBUG_TYPE, "Prologue/Epilogue Insertion", false,
141  false)
146  "Prologue/Epilogue Insertion & Frame Finalization", false,
147  false)
148 
150  return new PEI();
151 }
152 
153 STATISTIC(NumBytesStackSpace,
154  "Number of bytes used for stack in all functions");
155 
156 void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
157  AU.setPreservesCFG();
162 }
163 
164 /// StackObjSet - A set of stack object indexes
166 
167 using SavedDbgValuesMap =
169 
170 /// Stash DBG_VALUEs that describe parameters and which are placed at the start
171 /// of the block. Later on, after the prologue code has been emitted, the
172 /// stashed DBG_VALUEs will be reinserted at the start of the block.
174  SavedDbgValuesMap &EntryDbgValues) {
175  SmallVector<const MachineInstr *, 4> FrameIndexValues;
176 
177  for (auto &MI : MBB) {
178  if (!MI.isDebugInstr())
179  break;
180  if (!MI.isDebugValue() || !MI.getDebugVariable()->isParameter())
181  continue;
182  if (any_of(MI.debug_operands(),
183  [](const MachineOperand &MO) { return MO.isFI(); })) {
184  // We can only emit valid locations for frame indices after the frame
185  // setup, so do not stash away them.
186  FrameIndexValues.push_back(&MI);
187  continue;
188  }
189  const DILocalVariable *Var = MI.getDebugVariable();
190  const DIExpression *Expr = MI.getDebugExpression();
191  auto Overlaps = [Var, Expr](const MachineInstr *DV) {
192  return Var == DV->getDebugVariable() &&
193  Expr->fragmentsOverlap(DV->getDebugExpression());
194  };
195  // See if the debug value overlaps with any preceding debug value that will
196  // not be stashed. If that is the case, then we can't stash this value, as
197  // we would then reorder the values at reinsertion.
198  if (llvm::none_of(FrameIndexValues, Overlaps))
199  EntryDbgValues[&MBB].push_back(&MI);
200  }
201 
202  // Remove stashed debug values from the block.
203  if (EntryDbgValues.count(&MBB))
204  for (auto *MI : EntryDbgValues[&MBB])
205  MI->removeFromParent();
206 }
207 
208 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
209 /// frame indexes with appropriate references.
210 bool PEI::runOnMachineFunction(MachineFunction &MF) {
211  NumFuncSeen++;
212  const Function &F = MF.getFunction();
215 
216  RS = TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr;
217  FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(MF);
218  ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
219 
220  // Calculate the MaxCallFrameSize and AdjustsStack variables for the
221  // function's frame information. Also eliminates call frame pseudo
222  // instructions.
223  calculateCallFrameInfo(MF);
224 
225  // Determine placement of CSR spill/restore code and prolog/epilog code:
226  // place all spills in the entry block, all restores in return blocks.
227  calculateSaveRestoreBlocks(MF);
228 
229  // Stash away DBG_VALUEs that should not be moved by insertion of prolog code.
230  SavedDbgValuesMap EntryDbgValues;
231  for (MachineBasicBlock *SaveBlock : SaveBlocks)
232  stashEntryDbgValues(*SaveBlock, EntryDbgValues);
233 
234  // Handle CSR spilling and restoring, for targets that need it.
235  if (MF.getTarget().usesPhysRegsForValues())
236  spillCalleeSavedRegs(MF);
237 
238  // Allow the target machine to make final modifications to the function
239  // before the frame layout is finalized.
241 
242  // Calculate actual frame offsets for all abstract stack objects...
243  calculateFrameObjectOffsets(MF);
244 
245  // Add prolog and epilog code to the function. This function is required
246  // to align the stack frame as necessary for any stack variables or
247  // called functions. Because of this, calculateCalleeSavedRegisters()
248  // must be called before this function in order to set the AdjustsStack
249  // and MaxCallFrameSize variables.
250  if (!F.hasFnAttribute(Attribute::Naked))
251  insertPrologEpilogCode(MF);
252 
253  // Reinsert stashed debug values at the start of the entry blocks.
254  for (auto &I : EntryDbgValues)
255  I.first->insert(I.first->begin(), I.second.begin(), I.second.end());
256 
257  // Allow the target machine to make final modifications to the function
258  // before the frame layout is finalized.
260 
261  // Replace all MO_FrameIndex operands with physical register references
262  // and actual offsets.
263  //
264  replaceFrameIndices(MF);
265 
266  // If register scavenging is needed, as we've enabled doing it as a
267  // post-pass, scavenge the virtual registers that frame index elimination
268  // inserted.
269  if (TRI->requiresRegisterScavenging(MF) && FrameIndexVirtualScavenging)
270  scavengeFrameVirtualRegs(MF, *RS);
271 
272  // Warn on stack size when we exceeds the given limit.
273  MachineFrameInfo &MFI = MF.getFrameInfo();
274  uint64_t StackSize = MFI.getStackSize();
275 
276  unsigned Threshold = UINT_MAX;
277  if (MF.getFunction().hasFnAttribute("warn-stack-size")) {
278  bool Failed = MF.getFunction()
279  .getFnAttribute("warn-stack-size")
281  .getAsInteger(10, Threshold);
282  // Verifier should have caught this.
283  assert(!Failed && "Invalid warn-stack-size fn attr value");
284  (void)Failed;
285  }
286  if (MF.getFunction().hasFnAttribute(Attribute::SafeStack)) {
287  StackSize += MFI.getUnsafeStackSize();
288  }
289  if (StackSize > Threshold) {
290  DiagnosticInfoStackSize DiagStackSize(F, StackSize, Threshold, DS_Warning);
291  F.getContext().diagnose(DiagStackSize);
292  }
293  ORE->emit([&]() {
294  return MachineOptimizationRemarkAnalysis(DEBUG_TYPE, "StackSize",
295  MF.getFunction().getSubprogram(),
296  &MF.front())
297  << ore::NV("NumStackBytes", StackSize) << " stack bytes in function";
298  });
299 
300  delete RS;
301  SaveBlocks.clear();
302  RestoreBlocks.clear();
303  MFI.setSavePoint(nullptr);
304  MFI.setRestorePoint(nullptr);
305  return true;
306 }
307 
308 /// Calculate the MaxCallFrameSize and AdjustsStack
309 /// variables for the function's frame information and eliminate call frame
310 /// pseudo instructions.
311 void PEI::calculateCallFrameInfo(MachineFunction &MF) {
312  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
314  MachineFrameInfo &MFI = MF.getFrameInfo();
315 
316  unsigned MaxCallFrameSize = 0;
317  bool AdjustsStack = MFI.adjustsStack();
318 
319  // Get the function call frame set-up and tear-down instruction opcode
320  unsigned FrameSetupOpcode = TII.getCallFrameSetupOpcode();
321  unsigned FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
322 
323  // Early exit for targets which have no call frame setup/destroy pseudo
324  // instructions.
325  if (FrameSetupOpcode == ~0u && FrameDestroyOpcode == ~0u)
326  return;
327 
328  std::vector<MachineBasicBlock::iterator> FrameSDOps;
329  for (MachineBasicBlock &BB : MF)
330  for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I)
331  if (TII.isFrameInstr(*I)) {
332  unsigned Size = TII.getFrameSize(*I);
333  if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
334  AdjustsStack = true;
335  FrameSDOps.push_back(I);
336  } else if (I->isInlineAsm()) {
337  // Some inline asm's need a stack frame, as indicated by operand 1.
338  unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
339  if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
340  AdjustsStack = true;
341  }
342 
344  (MFI.getMaxCallFrameSize() == MaxCallFrameSize &&
345  MFI.adjustsStack() == AdjustsStack));
346  MFI.setAdjustsStack(AdjustsStack);
347  MFI.setMaxCallFrameSize(MaxCallFrameSize);
348 
349  for (MachineBasicBlock::iterator I : FrameSDOps) {
350  // If call frames are not being included as part of the stack frame, and
351  // the target doesn't indicate otherwise, remove the call frame pseudos
352  // here. The sub/add sp instruction pairs are still inserted, but we don't
353  // need to track the SP adjustment for frame index elimination.
354  if (TFI->canSimplifyCallFramePseudos(MF))
355  TFI->eliminateCallFramePseudoInstr(MF, *I->getParent(), I);
356  }
357 }
358 
359 /// Compute the sets of entry and return blocks for saving and restoring
360 /// callee-saved registers, and placing prolog and epilog code.
361 void PEI::calculateSaveRestoreBlocks(MachineFunction &MF) {
362  const MachineFrameInfo &MFI = MF.getFrameInfo();
363 
364  // Even when we do not change any CSR, we still want to insert the
365  // prologue and epilogue of the function.
366  // So set the save points for those.
367 
368  // Use the points found by shrink-wrapping, if any.
369  if (MFI.getSavePoint()) {
370  SaveBlocks.push_back(MFI.getSavePoint());
371  assert(MFI.getRestorePoint() && "Both restore and save must be set");
372  MachineBasicBlock *RestoreBlock = MFI.getRestorePoint();
373  // If RestoreBlock does not have any successor and is not a return block
374  // then the end point is unreachable and we do not need to insert any
375  // epilogue.
376  if (!RestoreBlock->succ_empty() || RestoreBlock->isReturnBlock())
377  RestoreBlocks.push_back(RestoreBlock);
378  return;
379  }
380 
381  // Save refs to entry and return blocks.
382  SaveBlocks.push_back(&MF.front());
383  for (MachineBasicBlock &MBB : MF) {
384  if (MBB.isEHFuncletEntry())
385  SaveBlocks.push_back(&MBB);
386  if (MBB.isReturnBlock())
387  RestoreBlocks.push_back(&MBB);
388  }
389 }
390 
392  const BitVector &SavedRegs,
393  unsigned &MinCSFrameIndex,
394  unsigned &MaxCSFrameIndex) {
395  if (SavedRegs.empty())
396  return;
397 
398  const TargetRegisterInfo *RegInfo = F.getSubtarget().getRegisterInfo();
399  const MCPhysReg *CSRegs = F.getRegInfo().getCalleeSavedRegs();
400  BitVector CSMask(SavedRegs.size());
401 
402  for (unsigned i = 0; CSRegs[i]; ++i)
403  CSMask.set(CSRegs[i]);
404 
405  std::vector<CalleeSavedInfo> CSI;
406  for (unsigned i = 0; CSRegs[i]; ++i) {
407  unsigned Reg = CSRegs[i];
408  if (SavedRegs.test(Reg)) {
409  bool SavedSuper = false;
410  for (const MCPhysReg &SuperReg : RegInfo->superregs(Reg)) {
411  // Some backends set all aliases for some registers as saved, such as
412  // Mips's $fp, so they appear in SavedRegs but not CSRegs.
413  if (SavedRegs.test(SuperReg) && CSMask.test(SuperReg)) {
414  SavedSuper = true;
415  break;
416  }
417  }
418 
419  if (!SavedSuper)
420  CSI.push_back(CalleeSavedInfo(Reg));
421  }
422  }
423 
424  const TargetFrameLowering *TFI = F.getSubtarget().getFrameLowering();
425  MachineFrameInfo &MFI = F.getFrameInfo();
426  if (!TFI->assignCalleeSavedSpillSlots(F, RegInfo, CSI, MinCSFrameIndex,
427  MaxCSFrameIndex)) {
428  // If target doesn't implement this, use generic code.
429 
430  if (CSI.empty())
431  return; // Early exit if no callee saved registers are modified!
432 
433  unsigned NumFixedSpillSlots;
434  const TargetFrameLowering::SpillSlot *FixedSpillSlots =
435  TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
436 
437  // Now that we know which registers need to be saved and restored, allocate
438  // stack slots for them.
439  for (auto &CS : CSI) {
440  // If the target has spilled this register to another register, we don't
441  // need to allocate a stack slot.
442  if (CS.isSpilledToReg())
443  continue;
444 
445  unsigned Reg = CS.getReg();
446  const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
447 
448  int FrameIdx;
449  if (RegInfo->hasReservedSpillSlot(F, Reg, FrameIdx)) {
450  CS.setFrameIdx(FrameIdx);
451  continue;
452  }
453 
454  // Check to see if this physreg must be spilled to a particular stack slot
455  // on this target.
456  const TargetFrameLowering::SpillSlot *FixedSlot = FixedSpillSlots;
457  while (FixedSlot != FixedSpillSlots + NumFixedSpillSlots &&
458  FixedSlot->Reg != Reg)
459  ++FixedSlot;
460 
461  unsigned Size = RegInfo->getSpillSize(*RC);
462  if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
463  // Nope, just spill it anywhere convenient.
464  Align Alignment = RegInfo->getSpillAlign(*RC);
465  // We may not be able to satisfy the desired alignment specification of
466  // the TargetRegisterClass if the stack alignment is smaller. Use the
467  // min.
468  Alignment = std::min(Alignment, TFI->getStackAlign());
469  FrameIdx = MFI.CreateStackObject(Size, Alignment, true);
470  if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
471  if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
472  } else {
473  // Spill it to the stack where we must.
474  FrameIdx = MFI.CreateFixedSpillStackObject(Size, FixedSlot->Offset);
475  }
476 
477  CS.setFrameIdx(FrameIdx);
478  }
479  }
480 
481  MFI.setCalleeSavedInfo(CSI);
482 }
483 
484 /// Helper function to update the liveness information for the callee-saved
485 /// registers.
486 static void updateLiveness(MachineFunction &MF) {
487  MachineFrameInfo &MFI = MF.getFrameInfo();
488  // Visited will contain all the basic blocks that are in the region
489  // where the callee saved registers are alive:
490  // - Anything that is not Save or Restore -> LiveThrough.
491  // - Save -> LiveIn.
492  // - Restore -> LiveOut.
493  // The live-out is not attached to the block, so no need to keep
494  // Restore in this set.
497  MachineBasicBlock *Entry = &MF.front();
498  MachineBasicBlock *Save = MFI.getSavePoint();
499 
500  if (!Save)
501  Save = Entry;
502 
503  if (Entry != Save) {
504  WorkList.push_back(Entry);
505  Visited.insert(Entry);
506  }
507  Visited.insert(Save);
508 
509  MachineBasicBlock *Restore = MFI.getRestorePoint();
510  if (Restore)
511  // By construction Restore cannot be visited, otherwise it
512  // means there exists a path to Restore that does not go
513  // through Save.
514  WorkList.push_back(Restore);
515 
516  while (!WorkList.empty()) {
517  const MachineBasicBlock *CurBB = WorkList.pop_back_val();
518  // By construction, the region that is after the save point is
519  // dominated by the Save and post-dominated by the Restore.
520  if (CurBB == Save && Save != Restore)
521  continue;
522  // Enqueue all the successors not already visited.
523  // Those are by construction either before Save or after Restore.
524  for (MachineBasicBlock *SuccBB : CurBB->successors())
525  if (Visited.insert(SuccBB).second)
526  WorkList.push_back(SuccBB);
527  }
528 
529  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
530 
532  for (const CalleeSavedInfo &I : CSI) {
533  for (MachineBasicBlock *MBB : Visited) {
534  MCPhysReg Reg = I.getReg();
535  // Add the callee-saved register as live-in.
536  // It's killed at the spill.
537  if (!MRI.isReserved(Reg) && !MBB->isLiveIn(Reg))
538  MBB->addLiveIn(Reg);
539  }
540  // If callee-saved register is spilled to another register rather than
541  // spilling to stack, the destination register has to be marked as live for
542  // each MBB between the prologue and epilogue so that it is not clobbered
543  // before it is reloaded in the epilogue. The Visited set contains all
544  // blocks outside of the region delimited by prologue/epilogue.
545  if (I.isSpilledToReg()) {
546  for (MachineBasicBlock &MBB : MF) {
547  if (Visited.count(&MBB))
548  continue;
549  MCPhysReg DstReg = I.getDstReg();
550  if (!MBB.isLiveIn(DstReg))
551  MBB.addLiveIn(DstReg);
552  }
553  }
554  }
555 }
556 
557 /// Insert restore code for the callee-saved registers used in the function.
558 static void insertCSRSaves(MachineBasicBlock &SaveBlock,
560  MachineFunction &MF = *SaveBlock.getParent();
561  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
564 
565  MachineBasicBlock::iterator I = SaveBlock.begin();
566  if (!TFI->spillCalleeSavedRegisters(SaveBlock, I, CSI, TRI)) {
567  for (const CalleeSavedInfo &CS : CSI) {
568  // Insert the spill to the stack frame.
569  unsigned Reg = CS.getReg();
570 
571  if (CS.isSpilledToReg()) {
572  BuildMI(SaveBlock, I, DebugLoc(),
573  TII.get(TargetOpcode::COPY), CS.getDstReg())
574  .addReg(Reg, getKillRegState(true));
575  } else {
577  TII.storeRegToStackSlot(SaveBlock, I, Reg, true, CS.getFrameIdx(), RC,
578  TRI);
579  }
580  }
581  }
582 }
583 
584 /// Insert restore code for the callee-saved registers used in the function.
585 static void insertCSRRestores(MachineBasicBlock &RestoreBlock,
586  std::vector<CalleeSavedInfo> &CSI) {
587  MachineFunction &MF = *RestoreBlock.getParent();
588  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
591 
592  // Restore all registers immediately before the return and any
593  // terminators that precede it.
595 
596  if (!TFI->restoreCalleeSavedRegisters(RestoreBlock, I, CSI, TRI)) {
597  for (const CalleeSavedInfo &CI : reverse(CSI)) {
598  unsigned Reg = CI.getReg();
599  if (CI.isSpilledToReg()) {
600  BuildMI(RestoreBlock, I, DebugLoc(), TII.get(TargetOpcode::COPY), Reg)
601  .addReg(CI.getDstReg(), getKillRegState(true));
602  } else {
604  TII.loadRegFromStackSlot(RestoreBlock, I, Reg, CI.getFrameIdx(), RC, TRI);
605  assert(I != RestoreBlock.begin() &&
606  "loadRegFromStackSlot didn't insert any code!");
607  // Insert in reverse order. loadRegFromStackSlot can insert
608  // multiple instructions.
609  }
610  }
611  }
612 }
613 
614 void PEI::spillCalleeSavedRegs(MachineFunction &MF) {
615  // We can't list this requirement in getRequiredProperties because some
616  // targets (WebAssembly) use virtual registers past this point, and the pass
617  // pipeline is set up without giving the passes a chance to look at the
618  // TargetMachine.
619  // FIXME: Find a way to express this in getRequiredProperties.
622 
623  const Function &F = MF.getFunction();
625  MachineFrameInfo &MFI = MF.getFrameInfo();
626  MinCSFrameIndex = std::numeric_limits<unsigned>::max();
627  MaxCSFrameIndex = 0;
628 
629  // Determine which of the registers in the callee save list should be saved.
630  BitVector SavedRegs;
631  TFI->determineCalleeSaves(MF, SavedRegs, RS);
632 
633  // Assign stack slots for any callee-saved registers that must be spilled.
634  assignCalleeSavedSpillSlots(MF, SavedRegs, MinCSFrameIndex, MaxCSFrameIndex);
635 
636  // Add the code to save and restore the callee saved registers.
637  if (!F.hasFnAttribute(Attribute::Naked)) {
638  MFI.setCalleeSavedInfoValid(true);
639 
640  std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
641  if (!CSI.empty()) {
642  if (!MFI.hasCalls())
643  NumLeafFuncWithSpills++;
644 
645  for (MachineBasicBlock *SaveBlock : SaveBlocks)
646  insertCSRSaves(*SaveBlock, CSI);
647 
648  // Update the live-in information of all the blocks up to the save point.
649  updateLiveness(MF);
650 
651  for (MachineBasicBlock *RestoreBlock : RestoreBlocks)
652  insertCSRRestores(*RestoreBlock, CSI);
653  }
654  }
655 }
656 
657 /// AdjustStackOffset - Helper function used to adjust the stack frame offset.
658 static inline void AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx,
659  bool StackGrowsDown, int64_t &Offset,
660  Align &MaxAlign, unsigned Skew) {
661  // If the stack grows down, add the object size to find the lowest address.
662  if (StackGrowsDown)
663  Offset += MFI.getObjectSize(FrameIdx);
664 
665  Align Alignment = MFI.getObjectAlign(FrameIdx);
666 
667  // If the alignment of this object is greater than that of the stack, then
668  // increase the stack alignment to match.
669  MaxAlign = std::max(MaxAlign, Alignment);
670 
671  // Adjust to alignment boundary.
672  Offset = alignTo(Offset, Alignment, Skew);
673 
674  if (StackGrowsDown) {
675  LLVM_DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset
676  << "]\n");
677  MFI.setObjectOffset(FrameIdx, -Offset); // Set the computed offset
678  } else {
679  LLVM_DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset
680  << "]\n");
681  MFI.setObjectOffset(FrameIdx, Offset);
682  Offset += MFI.getObjectSize(FrameIdx);
683  }
684 }
685 
686 /// Compute which bytes of fixed and callee-save stack area are unused and keep
687 /// track of them in StackBytesFree.
688 static inline void
689 computeFreeStackSlots(MachineFrameInfo &MFI, bool StackGrowsDown,
690  unsigned MinCSFrameIndex, unsigned MaxCSFrameIndex,
691  int64_t FixedCSEnd, BitVector &StackBytesFree) {
692  // Avoid undefined int64_t -> int conversion below in extreme case.
693  if (FixedCSEnd > std::numeric_limits<int>::max())
694  return;
695 
696  StackBytesFree.resize(FixedCSEnd, true);
697 
698  SmallVector<int, 16> AllocatedFrameSlots;
699  // Add fixed objects.
700  for (int i = MFI.getObjectIndexBegin(); i != 0; ++i)
701  // StackSlot scavenging is only implemented for the default stack.
702  if (MFI.getStackID(i) == TargetStackID::Default)
703  AllocatedFrameSlots.push_back(i);
704  // Add callee-save objects if there are any.
705  if (MinCSFrameIndex <= MaxCSFrameIndex) {
706  for (int i = MinCSFrameIndex; i <= (int)MaxCSFrameIndex; ++i)
707  if (MFI.getStackID(i) == TargetStackID::Default)
708  AllocatedFrameSlots.push_back(i);
709  }
710 
711  for (int i : AllocatedFrameSlots) {
712  // These are converted from int64_t, but they should always fit in int
713  // because of the FixedCSEnd check above.
714  int ObjOffset = MFI.getObjectOffset(i);
715  int ObjSize = MFI.getObjectSize(i);
716  int ObjStart, ObjEnd;
717  if (StackGrowsDown) {
718  // ObjOffset is negative when StackGrowsDown is true.
719  ObjStart = -ObjOffset - ObjSize;
720  ObjEnd = -ObjOffset;
721  } else {
722  ObjStart = ObjOffset;
723  ObjEnd = ObjOffset + ObjSize;
724  }
725  // Ignore fixed holes that are in the previous stack frame.
726  if (ObjEnd > 0)
727  StackBytesFree.reset(ObjStart, ObjEnd);
728  }
729 }
730 
731 /// Assign frame object to an unused portion of the stack in the fixed stack
732 /// object range. Return true if the allocation was successful.
733 static inline bool scavengeStackSlot(MachineFrameInfo &MFI, int FrameIdx,
734  bool StackGrowsDown, Align MaxAlign,
735  BitVector &StackBytesFree) {
736  if (MFI.isVariableSizedObjectIndex(FrameIdx))
737  return false;
738 
739  if (StackBytesFree.none()) {
740  // clear it to speed up later scavengeStackSlot calls to
741  // StackBytesFree.none()
742  StackBytesFree.clear();
743  return false;
744  }
745 
746  Align ObjAlign = MFI.getObjectAlign(FrameIdx);
747  if (ObjAlign > MaxAlign)
748  return false;
749 
750  int64_t ObjSize = MFI.getObjectSize(FrameIdx);
751  int FreeStart;
752  for (FreeStart = StackBytesFree.find_first(); FreeStart != -1;
753  FreeStart = StackBytesFree.find_next(FreeStart)) {
754 
755  // Check that free space has suitable alignment.
756  unsigned ObjStart = StackGrowsDown ? FreeStart + ObjSize : FreeStart;
757  if (alignTo(ObjStart, ObjAlign) != ObjStart)
758  continue;
759 
760  if (FreeStart + ObjSize > StackBytesFree.size())
761  return false;
762 
763  bool AllBytesFree = true;
764  for (unsigned Byte = 0; Byte < ObjSize; ++Byte)
765  if (!StackBytesFree.test(FreeStart + Byte)) {
766  AllBytesFree = false;
767  break;
768  }
769  if (AllBytesFree)
770  break;
771  }
772 
773  if (FreeStart == -1)
774  return false;
775 
776  if (StackGrowsDown) {
777  int ObjStart = -(FreeStart + ObjSize);
778  LLVM_DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") scavenged at SP["
779  << ObjStart << "]\n");
780  MFI.setObjectOffset(FrameIdx, ObjStart);
781  } else {
782  LLVM_DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") scavenged at SP["
783  << FreeStart << "]\n");
784  MFI.setObjectOffset(FrameIdx, FreeStart);
785  }
786 
787  StackBytesFree.reset(FreeStart, FreeStart + ObjSize);
788  return true;
789 }
790 
791 /// AssignProtectedObjSet - Helper function to assign large stack objects (i.e.,
792 /// those required to be close to the Stack Protector) to stack offsets.
793 static void AssignProtectedObjSet(const StackObjSet &UnassignedObjs,
794  SmallSet<int, 16> &ProtectedObjs,
795  MachineFrameInfo &MFI, bool StackGrowsDown,
796  int64_t &Offset, Align &MaxAlign,
797  unsigned Skew) {
798 
799  for (int i : UnassignedObjs) {
800  AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign, Skew);
801  ProtectedObjs.insert(i);
802  }
803 }
804 
805 /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
806 /// abstract stack objects.
807 void PEI::calculateFrameObjectOffsets(MachineFunction &MF) {
809 
810  bool StackGrowsDown =
812 
813  // Loop over all of the stack objects, assigning sequential addresses...
814  MachineFrameInfo &MFI = MF.getFrameInfo();
815 
816  // Start at the beginning of the local area.
817  // The Offset is the distance from the stack top in the direction
818  // of stack growth -- so it's always nonnegative.
819  int LocalAreaOffset = TFI.getOffsetOfLocalArea();
820  if (StackGrowsDown)
821  LocalAreaOffset = -LocalAreaOffset;
822  assert(LocalAreaOffset >= 0
823  && "Local area offset should be in direction of stack growth");
824  int64_t Offset = LocalAreaOffset;
825 
826  // Skew to be applied to alignment.
827  unsigned Skew = TFI.getStackAlignmentSkew(MF);
828 
829 #ifdef EXPENSIVE_CHECKS
830  for (unsigned i = 0, e = MFI.getObjectIndexEnd(); i != e; ++i)
831  if (!MFI.isDeadObjectIndex(i) &&
833  assert(MFI.getObjectAlign(i) <= MFI.getMaxAlign() &&
834  "MaxAlignment is invalid");
835 #endif
836 
837  // If there are fixed sized objects that are preallocated in the local area,
838  // non-fixed objects can't be allocated right at the start of local area.
839  // Adjust 'Offset' to point to the end of last fixed sized preallocated
840  // object.
841  for (int i = MFI.getObjectIndexBegin(); i != 0; ++i) {
842  // Only allocate objects on the default stack.
843  if (MFI.getStackID(i) != TargetStackID::Default)
844  continue;
845 
846  int64_t FixedOff;
847  if (StackGrowsDown) {
848  // The maximum distance from the stack pointer is at lower address of
849  // the object -- which is given by offset. For down growing stack
850  // the offset is negative, so we negate the offset to get the distance.
851  FixedOff = -MFI.getObjectOffset(i);
852  } else {
853  // The maximum distance from the start pointer is at the upper
854  // address of the object.
855  FixedOff = MFI.getObjectOffset(i) + MFI.getObjectSize(i);
856  }
857  if (FixedOff > Offset) Offset = FixedOff;
858  }
859 
860  Align MaxAlign = MFI.getMaxAlign();
861  // First assign frame offsets to stack objects that are used to spill
862  // callee saved registers.
863  if (MaxCSFrameIndex >= MinCSFrameIndex) {
864  for (unsigned i = 0; i <= MaxCSFrameIndex - MinCSFrameIndex; ++i) {
865  unsigned FrameIndex =
866  StackGrowsDown ? MinCSFrameIndex + i : MaxCSFrameIndex - i;
867 
868  // Only allocate objects on the default stack.
870  continue;
871 
872  // TODO: should this just be if (MFI.isDeadObjectIndex(FrameIndex))
873  if (!StackGrowsDown && MFI.isDeadObjectIndex(FrameIndex))
874  continue;
875 
876  AdjustStackOffset(MFI, FrameIndex, StackGrowsDown, Offset, MaxAlign,
877  Skew);
878  }
879  }
880 
881  assert(MaxAlign == MFI.getMaxAlign() &&
882  "MFI.getMaxAlign should already account for all callee-saved "
883  "registers without a fixed stack slot");
884 
885  // FixedCSEnd is the stack offset to the end of the fixed and callee-save
886  // stack area.
887  int64_t FixedCSEnd = Offset;
888 
889  // Make sure the special register scavenging spill slot is closest to the
890  // incoming stack pointer if a frame pointer is required and is closer
891  // to the incoming rather than the final stack pointer.
892  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
893  bool EarlyScavengingSlots = TFI.allocateScavengingFrameIndexesNearIncomingSP(MF);
894  if (RS && EarlyScavengingSlots) {
895  SmallVector<int, 2> SFIs;
896  RS->getScavengingFrameIndices(SFIs);
897  for (int SFI : SFIs)
898  AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign, Skew);
899  }
900 
901  // FIXME: Once this is working, then enable flag will change to a target
902  // check for whether the frame is large enough to want to use virtual
903  // frame index registers. Functions which don't want/need this optimization
904  // will continue to use the existing code path.
907 
908  // Adjust to alignment boundary.
909  Offset = alignTo(Offset, Alignment, Skew);
910 
911  LLVM_DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n");
912 
913  // Resolve offsets for objects in the local block.
914  for (unsigned i = 0, e = MFI.getLocalFrameObjectCount(); i != e; ++i) {
915  std::pair<int, int64_t> Entry = MFI.getLocalFrameObjectMap(i);
916  int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second;
917  LLVM_DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" << FIOffset
918  << "]\n");
919  MFI.setObjectOffset(Entry.first, FIOffset);
920  }
921  // Allocate the local block
922  Offset += MFI.getLocalFrameSize();
923 
924  MaxAlign = std::max(Alignment, MaxAlign);
925  }
926 
927  // Retrieve the Exception Handler registration node.
928  int EHRegNodeFrameIndex = std::numeric_limits<int>::max();
929  if (const WinEHFuncInfo *FuncInfo = MF.getWinEHFuncInfo())
930  EHRegNodeFrameIndex = FuncInfo->EHRegNodeFrameIndex;
931 
932  // Make sure that the stack protector comes before the local variables on the
933  // stack.
934  SmallSet<int, 16> ProtectedObjs;
935  if (MFI.hasStackProtectorIndex()) {
936  int StackProtectorFI = MFI.getStackProtectorIndex();
937  StackObjSet LargeArrayObjs;
938  StackObjSet SmallArrayObjs;
939  StackObjSet AddrOfObjs;
940 
941  // If we need a stack protector, we need to make sure that
942  // LocalStackSlotPass didn't already allocate a slot for it.
943  // If we are told to use the LocalStackAllocationBlock, the stack protector
944  // is expected to be already pre-allocated.
945  if (MFI.getStackID(StackProtectorFI) != TargetStackID::Default) {
946  // If the stack protector isn't on the default stack then it's up to the
947  // target to set the stack offset.
948  assert(MFI.getObjectOffset(StackProtectorFI) != 0 &&
949  "Offset of stack protector on non-default stack expected to be "
950  "already set.");
952  "Stack protector on non-default stack expected to not be "
953  "pre-allocated by LocalStackSlotPass.");
954  } else if (!MFI.getUseLocalStackAllocationBlock()) {
955  AdjustStackOffset(MFI, StackProtectorFI, StackGrowsDown, Offset, MaxAlign,
956  Skew);
957  } else if (!MFI.isObjectPreAllocated(MFI.getStackProtectorIndex())) {
959  "Stack protector not pre-allocated by LocalStackSlotPass.");
960  }
961 
962  // Assign large stack objects first.
963  for (unsigned i = 0, e = MFI.getObjectIndexEnd(); i != e; ++i) {
965  continue;
966  if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
967  continue;
968  if (RS && RS->isScavengingFrameIndex((int)i))
969  continue;
970  if (MFI.isDeadObjectIndex(i))
971  continue;
972  if (StackProtectorFI == (int)i || EHRegNodeFrameIndex == (int)i)
973  continue;
974  // Only allocate objects on the default stack.
975  if (MFI.getStackID(i) != TargetStackID::Default)
976  continue;
977 
978  switch (MFI.getObjectSSPLayout(i)) {
980  continue;
982  SmallArrayObjs.insert(i);
983  continue;
985  AddrOfObjs.insert(i);
986  continue;
988  LargeArrayObjs.insert(i);
989  continue;
990  }
991  llvm_unreachable("Unexpected SSPLayoutKind.");
992  }
993 
994  // We expect **all** the protected stack objects to be pre-allocated by
995  // LocalStackSlotPass. If it turns out that PEI still has to allocate some
996  // of them, we may end up messing up the expected order of the objects.
998  !(LargeArrayObjs.empty() && SmallArrayObjs.empty() &&
999  AddrOfObjs.empty()))
1000  llvm_unreachable("Found protected stack objects not pre-allocated by "
1001  "LocalStackSlotPass.");
1002 
1003  AssignProtectedObjSet(LargeArrayObjs, ProtectedObjs, MFI, StackGrowsDown,
1004  Offset, MaxAlign, Skew);
1005  AssignProtectedObjSet(SmallArrayObjs, ProtectedObjs, MFI, StackGrowsDown,
1006  Offset, MaxAlign, Skew);
1007  AssignProtectedObjSet(AddrOfObjs, ProtectedObjs, MFI, StackGrowsDown,
1008  Offset, MaxAlign, Skew);
1009  }
1010 
1011  SmallVector<int, 8> ObjectsToAllocate;
1012 
1013  // Then prepare to assign frame offsets to stack objects that are not used to
1014  // spill callee saved registers.
1015  for (unsigned i = 0, e = MFI.getObjectIndexEnd(); i != e; ++i) {
1017  continue;
1018  if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
1019  continue;
1020  if (RS && RS->isScavengingFrameIndex((int)i))
1021  continue;
1022  if (MFI.isDeadObjectIndex(i))
1023  continue;
1024  if (MFI.getStackProtectorIndex() == (int)i || EHRegNodeFrameIndex == (int)i)
1025  continue;
1026  if (ProtectedObjs.count(i))
1027  continue;
1028  // Only allocate objects on the default stack.
1029  if (MFI.getStackID(i) != TargetStackID::Default)
1030  continue;
1031 
1032  // Add the objects that we need to allocate to our working set.
1033  ObjectsToAllocate.push_back(i);
1034  }
1035 
1036  // Allocate the EH registration node first if one is present.
1037  if (EHRegNodeFrameIndex != std::numeric_limits<int>::max())
1038  AdjustStackOffset(MFI, EHRegNodeFrameIndex, StackGrowsDown, Offset,
1039  MaxAlign, Skew);
1040 
1041  // Give the targets a chance to order the objects the way they like it.
1042  if (MF.getTarget().getOptLevel() != CodeGenOpt::None &&
1044  TFI.orderFrameObjects(MF, ObjectsToAllocate);
1045 
1046  // Keep track of which bytes in the fixed and callee-save range are used so we
1047  // can use the holes when allocating later stack objects. Only do this if
1048  // stack protector isn't being used and the target requests it and we're
1049  // optimizing.
1050  BitVector StackBytesFree;
1051  if (!ObjectsToAllocate.empty() &&
1054  computeFreeStackSlots(MFI, StackGrowsDown, MinCSFrameIndex, MaxCSFrameIndex,
1055  FixedCSEnd, StackBytesFree);
1056 
1057  // Now walk the objects and actually assign base offsets to them.
1058  for (auto &Object : ObjectsToAllocate)
1059  if (!scavengeStackSlot(MFI, Object, StackGrowsDown, MaxAlign,
1060  StackBytesFree))
1061  AdjustStackOffset(MFI, Object, StackGrowsDown, Offset, MaxAlign, Skew);
1062 
1063  // Make sure the special register scavenging spill slot is closest to the
1064  // stack pointer.
1065  if (RS && !EarlyScavengingSlots) {
1066  SmallVector<int, 2> SFIs;
1067  RS->getScavengingFrameIndices(SFIs);
1068  for (int SFI : SFIs)
1069  AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign, Skew);
1070  }
1071 
1072  if (!TFI.targetHandlesStackFrameRounding()) {
1073  // If we have reserved argument space for call sites in the function
1074  // immediately on entry to the current function, count it as part of the
1075  // overall stack size.
1076  if (MFI.adjustsStack() && TFI.hasReservedCallFrame(MF))
1077  Offset += MFI.getMaxCallFrameSize();
1078 
1079  // Round up the size to a multiple of the alignment. If the function has
1080  // any calls or alloca's, align to the target's StackAlignment value to
1081  // ensure that the callee's frame or the alloca data is suitably aligned;
1082  // otherwise, for leaf functions, align to the TransientStackAlignment
1083  // value.
1084  Align StackAlign;
1085  if (MFI.adjustsStack() || MFI.hasVarSizedObjects() ||
1086  (RegInfo->hasStackRealignment(MF) && MFI.getObjectIndexEnd() != 0))
1087  StackAlign = TFI.getStackAlign();
1088  else
1090 
1091  // If the frame pointer is eliminated, all frame offsets will be relative to
1092  // SP not FP. Align to MaxAlign so this works.
1093  StackAlign = std::max(StackAlign, MaxAlign);
1094  int64_t OffsetBeforeAlignment = Offset;
1095  Offset = alignTo(Offset, StackAlign, Skew);
1096 
1097  // If we have increased the offset to fulfill the alignment constrants,
1098  // then the scavenging spill slots may become harder to reach from the
1099  // stack pointer, float them so they stay close.
1100  if (StackGrowsDown && OffsetBeforeAlignment != Offset && RS &&
1101  !EarlyScavengingSlots) {
1102  SmallVector<int, 2> SFIs;
1103  RS->getScavengingFrameIndices(SFIs);
1104  LLVM_DEBUG(if (!SFIs.empty()) llvm::dbgs()
1105  << "Adjusting emergency spill slots!\n";);
1106  int64_t Delta = Offset - OffsetBeforeAlignment;
1107  for (int SFI : SFIs) {
1109  << "Adjusting offset of emergency spill slot #" << SFI
1110  << " from " << MFI.getObjectOffset(SFI););
1111  MFI.setObjectOffset(SFI, MFI.getObjectOffset(SFI) - Delta);
1112  LLVM_DEBUG(llvm::dbgs() << " to " << MFI.getObjectOffset(SFI) << "\n";);
1113  }
1114  }
1115  }
1116 
1117  // Update frame info to pretend that this is part of the stack...
1118  int64_t StackSize = Offset - LocalAreaOffset;
1119  MFI.setStackSize(StackSize);
1120  NumBytesStackSpace += StackSize;
1121 }
1122 
1123 /// insertPrologEpilogCode - Scan the function for modified callee saved
1124 /// registers, insert spill code for these callee saved registers, then add
1125 /// prolog and epilog code to the function.
1126 void PEI::insertPrologEpilogCode(MachineFunction &MF) {
1127  const TargetFrameLowering &TFI = *MF.getSubtarget().getFrameLowering();
1128 
1129  // Add prologue to the function...
1130  for (MachineBasicBlock *SaveBlock : SaveBlocks)
1131  TFI.emitPrologue(MF, *SaveBlock);
1132 
1133  // Add epilogue to restore the callee-save registers in each exiting block.
1134  for (MachineBasicBlock *RestoreBlock : RestoreBlocks)
1135  TFI.emitEpilogue(MF, *RestoreBlock);
1136 
1137  // Zero call used registers before restoring callee-saved registers.
1138  insertZeroCallUsedRegs(MF);
1139 
1140  for (MachineBasicBlock *SaveBlock : SaveBlocks)
1141  TFI.inlineStackProbe(MF, *SaveBlock);
1142 
1143  // Emit additional code that is required to support segmented stacks, if
1144  // we've been asked for it. This, when linked with a runtime with support
1145  // for segmented stacks (libgcc is one), will result in allocating stack
1146  // space in small chunks instead of one large contiguous block.
1147  if (MF.shouldSplitStack()) {
1148  for (MachineBasicBlock *SaveBlock : SaveBlocks)
1149  TFI.adjustForSegmentedStacks(MF, *SaveBlock);
1150  }
1151 
1152  // Emit additional code that is required to explicitly handle the stack in
1153  // HiPE native code (if needed) when loaded in the Erlang/OTP runtime. The
1154  // approach is rather similar to that of Segmented Stacks, but it uses a
1155  // different conditional check and another BIF for allocating more stack
1156  // space.
1158  for (MachineBasicBlock *SaveBlock : SaveBlocks)
1159  TFI.adjustForHiPEPrologue(MF, *SaveBlock);
1160 }
1161 
1162 /// insertZeroCallUsedRegs - Zero out call used registers.
1163 void PEI::insertZeroCallUsedRegs(MachineFunction &MF) {
1164  const Function &F = MF.getFunction();
1165 
1166  if (!F.hasFnAttribute("zero-call-used-regs"))
1167  return;
1168 
1169  using namespace ZeroCallUsedRegs;
1170 
1171  ZeroCallUsedRegsKind ZeroRegsKind =
1173  F.getFnAttribute("zero-call-used-regs").getValueAsString())
1175  .Case("used-gpr-arg", ZeroCallUsedRegsKind::UsedGPRArg)
1176  .Case("used-gpr", ZeroCallUsedRegsKind::UsedGPR)
1177  .Case("used-arg", ZeroCallUsedRegsKind::UsedArg)
1179  .Case("all-gpr-arg", ZeroCallUsedRegsKind::AllGPRArg)
1180  .Case("all-gpr", ZeroCallUsedRegsKind::AllGPR)
1181  .Case("all-arg", ZeroCallUsedRegsKind::AllArg)
1183 
1184  if (ZeroRegsKind == ZeroCallUsedRegsKind::Skip)
1185  return;
1186 
1187  const bool OnlyGPR = static_cast<unsigned>(ZeroRegsKind) & ONLY_GPR;
1188  const bool OnlyUsed = static_cast<unsigned>(ZeroRegsKind) & ONLY_USED;
1189  const bool OnlyArg = static_cast<unsigned>(ZeroRegsKind) & ONLY_ARG;
1190 
1192  const BitVector AllocatableSet(TRI.getAllocatableSet(MF));
1193 
1194  // Mark all used registers.
1195  BitVector UsedRegs(TRI.getNumRegs());
1196  if (OnlyUsed)
1197  for (const MachineBasicBlock &MBB : MF)
1198  for (const MachineInstr &MI : MBB)
1199  for (const MachineOperand &MO : MI.operands()) {
1200  if (!MO.isReg())
1201  continue;
1202 
1203  MCRegister Reg = MO.getReg();
1204  if (AllocatableSet[Reg] && !MO.isImplicit() &&
1205  (MO.isDef() || MO.isUse()))
1206  UsedRegs.set(Reg);
1207  }
1208 
1209  BitVector RegsToZero(TRI.getNumRegs());
1210  for (MCRegister Reg : AllocatableSet.set_bits()) {
1211  // Skip over fixed registers.
1212  if (TRI.isFixedRegister(MF, Reg))
1213  continue;
1214 
1215  // Want only general purpose registers.
1216  if (OnlyGPR && !TRI.isGeneralPurposeRegister(MF, Reg))
1217  continue;
1218 
1219  // Want only used registers.
1220  if (OnlyUsed && !UsedRegs[Reg])
1221  continue;
1222 
1223  // Want only registers used for arguments.
1224  if (OnlyArg && !TRI.isArgumentRegister(MF, Reg))
1225  continue;
1226 
1227  RegsToZero.set(Reg);
1228  }
1229 
1230  // Don't clear registers that are live when leaving the function.
1231  for (const MachineBasicBlock &MBB : MF)
1232  for (const MachineInstr &MI : MBB.terminators()) {
1233  if (!MI.isReturn())
1234  continue;
1235 
1236  for (const auto &MO : MI.operands()) {
1237  if (!MO.isReg())
1238  continue;
1239 
1240  for (MCPhysReg SReg : TRI.sub_and_superregs_inclusive(MO.getReg()))
1241  RegsToZero.reset(SReg);
1242  }
1243  }
1244 
1245  // Don't need to clear registers that are used/clobbered by terminating
1246  // instructions.
1247  for (const MachineBasicBlock &MBB : MF) {
1248  if (!MBB.isReturnBlock())
1249  continue;
1250 
1252  for (MachineBasicBlock::const_iterator I = MBBI, E = MBB.end(); I != E;
1253  ++I) {
1254  for (const MachineOperand &MO : I->operands()) {
1255  if (!MO.isReg())
1256  continue;
1257 
1258  for (const MCPhysReg &Reg :
1259  TRI.sub_and_superregs_inclusive(MO.getReg()))
1260  RegsToZero.reset(Reg);
1261  }
1262  }
1263  }
1264 
1265  // Don't clear registers that are reset before exiting.
1266  for (const CalleeSavedInfo &CSI : MF.getFrameInfo().getCalleeSavedInfo())
1267  for (MCRegister Reg : TRI.sub_and_superregs_inclusive(CSI.getReg()))
1268  RegsToZero.reset(Reg);
1269 
1270  const TargetFrameLowering &TFI = *MF.getSubtarget().getFrameLowering();
1271  for (MachineBasicBlock &MBB : MF)
1272  if (MBB.isReturnBlock())
1273  TFI.emitZeroCallUsedRegs(RegsToZero, MBB);
1274 }
1275 
1276 /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
1277 /// register references and actual offsets.
1278 void PEI::replaceFrameIndices(MachineFunction &MF) {
1279  const auto &ST = MF.getSubtarget();
1280  const TargetFrameLowering &TFI = *ST.getFrameLowering();
1281  if (!TFI.needsFrameIndexResolution(MF))
1282  return;
1283 
1284  const TargetRegisterInfo *TRI = ST.getRegisterInfo();
1285 
1286  // Allow the target to determine this after knowing the frame size.
1287  FrameIndexEliminationScavenging = (RS && !FrameIndexVirtualScavenging) ||
1289 
1290  // Store SPAdj at exit of a basic block.
1291  SmallVector<int, 8> SPState;
1292  SPState.resize(MF.getNumBlockIDs());
1294 
1295  // Iterate over the reachable blocks in DFS order.
1296  for (auto DFI = df_ext_begin(&MF, Reachable), DFE = df_ext_end(&MF, Reachable);
1297  DFI != DFE; ++DFI) {
1298  int SPAdj = 0;
1299  // Check the exit state of the DFS stack predecessor.
1300  if (DFI.getPathLength() >= 2) {
1301  MachineBasicBlock *StackPred = DFI.getPath(DFI.getPathLength() - 2);
1302  assert(Reachable.count(StackPred) &&
1303  "DFS stack predecessor is already visited.\n");
1304  SPAdj = SPState[StackPred->getNumber()];
1305  }
1306  MachineBasicBlock *BB = *DFI;
1307  replaceFrameIndices(BB, MF, SPAdj);
1308  SPState[BB->getNumber()] = SPAdj;
1309  }
1310 
1311  // Handle the unreachable blocks.
1312  for (auto &BB : MF) {
1313  if (Reachable.count(&BB))
1314  // Already handled in DFS traversal.
1315  continue;
1316  int SPAdj = 0;
1317  replaceFrameIndices(&BB, MF, SPAdj);
1318  }
1319 }
1320 
1321 void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
1322  int &SPAdj) {
1324  "getRegisterInfo() must be implemented!");
1325  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
1328 
1329  if (RS && FrameIndexEliminationScavenging)
1330  RS->enterBasicBlock(*BB);
1331 
1332  bool InsideCallSequence = false;
1333 
1334  for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
1335  if (TII.isFrameInstr(*I)) {
1336  InsideCallSequence = TII.isFrameSetup(*I);
1337  SPAdj += TII.getSPAdjust(*I);
1338  I = TFI->eliminateCallFramePseudoInstr(MF, *BB, I);
1339  continue;
1340  }
1341 
1342  MachineInstr &MI = *I;
1343  bool DoIncr = true;
1344  bool DidFinishLoop = true;
1345  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1346  if (!MI.getOperand(i).isFI())
1347  continue;
1348 
1349  // Frame indices in debug values are encoded in a target independent
1350  // way with simply the frame index and offset rather than any
1351  // target-specific addressing mode.
1352  if (MI.isDebugValue()) {
1353  MachineOperand &Op = MI.getOperand(i);
1354  assert(
1355  MI.isDebugOperand(&Op) &&
1356  "Frame indices can only appear as a debug operand in a DBG_VALUE*"
1357  " machine instruction");
1358  Register Reg;
1359  unsigned FrameIdx = Op.getIndex();
1360  unsigned Size = MF.getFrameInfo().getObjectSize(FrameIdx);
1361 
1363  TFI->getFrameIndexReference(MF, FrameIdx, Reg);
1364  Op.ChangeToRegister(Reg, false /*isDef*/);
1365 
1366  const DIExpression *DIExpr = MI.getDebugExpression();
1367 
1368  // If we have a direct DBG_VALUE, and its location expression isn't
1369  // currently complex, then adding an offset will morph it into a
1370  // complex location that is interpreted as being a memory address.
1371  // This changes a pointer-valued variable to dereference that pointer,
1372  // which is incorrect. Fix by adding DW_OP_stack_value.
1373 
1374  if (MI.isNonListDebugValue()) {
1375  unsigned PrependFlags = DIExpression::ApplyOffset;
1376  if (!MI.isIndirectDebugValue() && !DIExpr->isComplex())
1377  PrependFlags |= DIExpression::StackValue;
1378 
1379  // If we have DBG_VALUE that is indirect and has a Implicit location
1380  // expression need to insert a deref before prepending a Memory
1381  // location expression. Also after doing this we change the DBG_VALUE
1382  // to be direct.
1383  if (MI.isIndirectDebugValue() && DIExpr->isImplicit()) {
1384  SmallVector<uint64_t, 2> Ops = {dwarf::DW_OP_deref_size, Size};
1385  bool WithStackValue = true;
1386  DIExpr = DIExpression::prependOpcodes(DIExpr, Ops, WithStackValue);
1387  // Make the DBG_VALUE direct.
1388  MI.getDebugOffset().ChangeToRegister(0, false);
1389  }
1390  DIExpr = TRI.prependOffsetExpression(DIExpr, PrependFlags, Offset);
1391  } else {
1392  // The debug operand at DebugOpIndex was a frame index at offset
1393  // `Offset`; now the operand has been replaced with the frame
1394  // register, we must add Offset with `register x, plus Offset`.
1395  unsigned DebugOpIndex = MI.getDebugOperandIndex(&Op);
1397  TRI.getOffsetOpcodes(Offset, Ops);
1398  DIExpr = DIExpression::appendOpsToArg(DIExpr, Ops, DebugOpIndex);
1399  }
1400  MI.getDebugExpressionOp().setMetadata(DIExpr);
1401  continue;
1402  } else if (MI.isDebugPHI()) {
1403  // Allow stack ref to continue onwards.
1404  continue;
1405  }
1406 
1407  // TODO: This code should be commoned with the code for
1408  // PATCHPOINT. There's no good reason for the difference in
1409  // implementation other than historical accident. The only
1410  // remaining difference is the unconditional use of the stack
1411  // pointer as the base register.
1412  if (MI.getOpcode() == TargetOpcode::STATEPOINT) {
1413  assert((!MI.isDebugValue() || i == 0) &&
1414  "Frame indicies can only appear as the first operand of a "
1415  "DBG_VALUE machine instruction");
1416  Register Reg;
1417  MachineOperand &Offset = MI.getOperand(i + 1);
1419  MF, MI.getOperand(i).getIndex(), Reg, /*IgnoreSPUpdates*/ false);
1420  assert(!refOffset.getScalable() &&
1421  "Frame offsets with a scalable component are not supported");
1422  Offset.setImm(Offset.getImm() + refOffset.getFixed() + SPAdj);
1423  MI.getOperand(i).ChangeToRegister(Reg, false /*isDef*/);
1424  continue;
1425  }
1426 
1427  // Some instructions (e.g. inline asm instructions) can have
1428  // multiple frame indices and/or cause eliminateFrameIndex
1429  // to insert more than one instruction. We need the register
1430  // scavenger to go through all of these instructions so that
1431  // it can update its register information. We keep the
1432  // iterator at the point before insertion so that we can
1433  // revisit them in full.
1434  bool AtBeginning = (I == BB->begin());
1435  if (!AtBeginning) --I;
1436 
1437  // If this instruction has a FrameIndex operand, we need to
1438  // use that target machine register info object to eliminate
1439  // it.
1440  TRI.eliminateFrameIndex(MI, SPAdj, i,
1441  FrameIndexEliminationScavenging ? RS : nullptr);
1442 
1443  // Reset the iterator if we were at the beginning of the BB.
1444  if (AtBeginning) {
1445  I = BB->begin();
1446  DoIncr = false;
1447  }
1448 
1449  DidFinishLoop = false;
1450  break;
1451  }
1452 
1453  // If we are looking at a call sequence, we need to keep track of
1454  // the SP adjustment made by each instruction in the sequence.
1455  // This includes both the frame setup/destroy pseudos (handled above),
1456  // as well as other instructions that have side effects w.r.t the SP.
1457  // Note that this must come after eliminateFrameIndex, because
1458  // if I itself referred to a frame index, we shouldn't count its own
1459  // adjustment.
1460  if (DidFinishLoop && InsideCallSequence)
1461  SPAdj += TII.getSPAdjust(MI);
1462 
1463  if (DoIncr && I != BB->end()) ++I;
1464 
1465  // Update register states.
1466  if (RS && FrameIndexEliminationScavenging && DidFinishLoop)
1467  RS->forward(MI);
1468  }
1469 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:77
llvm::StringSwitch::Case
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:69
i
i
Definition: README.txt:29
llvm::TargetFrameLowering::orderFrameObjects
virtual void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &objectsToAllocate) const
Order the symbols in the local stack frame.
Definition: TargetFrameLowering.h:403
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:156
llvm::TargetMachine::getOptLevel
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
Definition: TargetMachine.cpp:186
llvm::MachineFrameInfo::isMaxCallFrameSizeComputed
bool isMaxCallFrameSizeComputed() const
Definition: MachineFrameInfo.h:653
llvm::MachineFrameInfo::hasVarSizedObjects
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
Definition: MachineFrameInfo.h:354
llvm::RISCVAttrs::StackAlign
StackAlign
Definition: RISCVAttributes.h:37
llvm::MachineFunctionProperties::hasProperty
bool hasProperty(Property P) const
Definition: MachineFunction.h:192
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:104
MachineInstr.h
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::TargetRegisterInfo::isFixedRegister
virtual bool isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const
Returns true if PhysReg is a fixed register.
Definition: TargetRegisterInfo.h:570
llvm::none_of
bool none_of(R &&Range, UnaryPredicate P)
Provide wrappers to std::none_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1631
llvm::MachineBasicBlock::isLiveIn
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
Definition: MachineBasicBlock.cpp:576
llvm::TargetFrameLowering::needsFrameIndexResolution
virtual bool needsFrameIndexResolution(const MachineFunction &MF) const
Definition: TargetFrameLoweringImpl.cpp:65
TargetFrameLowering.h
llvm::TargetFrameLowering
Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:43
llvm::TargetRegisterInfo::isGeneralPurposeRegister
virtual bool isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const
Returns true if PhysReg is a general purpose register.
Definition: TargetRegisterInfo.h:576
DebugInfoMetadata.h
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::TargetRegisterInfo::isArgumentRegister
virtual bool isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const
Returns true if PhysReg can be used as an argument to a function.
Definition: TargetRegisterInfo.h:564
llvm::Function
Definition: Function.h:60
computeFreeStackSlots
static void computeFreeStackSlots(MachineFrameInfo &MFI, bool StackGrowsDown, unsigned MinCSFrameIndex, unsigned MaxCSFrameIndex, int64_t FixedCSEnd, BitVector &StackBytesFree)
Compute which bytes of fixed and callee-save stack area are unused and keep track of them in StackByt...
Definition: PrologEpilogInserter.cpp:689
Pass.h
llvm::BitVector::set
BitVector & set()
Definition: BitVector.h:344
llvm::LLVMTargetMachine::usesPhysRegsForValues
virtual bool usesPhysRegsForValues() const
True if the target uses physical regs (as nearly all targets do).
Definition: TargetMachine.h:486
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:93
llvm::BitVector::clear
void clear()
clear - Removes all bits from the bitvector.
Definition: BitVector.h:328
llvm::BitVector::none
bool none() const
none - Returns true if none of the bits are set.
Definition: BitVector.h:181
llvm::MachineBasicBlock::isEHFuncletEntry
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
Definition: MachineBasicBlock.h:575
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
Statistic.h
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::Skip
@ Skip
InlineAsm.h
llvm::Function::getSubprogram
DISubprogram * getSubprogram() const
Get the attached subprogram.
Definition: Metadata.cpp:1571
llvm::MachineFrameInfo::getUseLocalStackAllocationBlock
bool getUseLocalStackAllocationBlock() const
Get whether the local allocation blob should be allocated together or let PEI allocate the locals in ...
Definition: MachineFrameInfo.h:450
ErrorHandling.h
stashEntryDbgValues
static void stashEntryDbgValues(MachineBasicBlock &MBB, SavedDbgValuesMap &EntryDbgValues)
Stash DBG_VALUEs that describe parameters and which are placed at the start of the block.
Definition: PrologEpilogInserter.cpp:173
llvm::MCRegisterInfo::getNumRegs
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Definition: MCRegisterInfo.h:491
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::TargetRegisterInfo::getAllocatableSet
BitVector getAllocatableSet(const MachineFunction &MF, const TargetRegisterClass *RC=nullptr) const
Returns a bitset indexed by register number indicating if a register is allocatable or not.
Definition: TargetRegisterInfo.cpp:256
llvm::MachineOptimizationRemarkEmitter
The optimization diagnostic interface.
Definition: MachineOptimizationRemarkEmitter.h:151
llvm::SmallDenseMap
Definition: DenseMap.h:882
llvm::TargetRegisterInfo::getOffsetOpcodes
virtual void getOffsetOpcodes(const StackOffset &Offset, SmallVectorImpl< uint64_t > &Ops) const
Gets the DWARF expression opcodes for Offset.
Definition: TargetRegisterInfo.cpp:643
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
OptimizationRemarkEmitter.h
MachineBasicBlock.h
llvm::MachineBasicBlock::isReturnBlock
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
Definition: MachineBasicBlock.h:837
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:125
llvm::MachineFunction::getNumBlockIDs
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
Definition: MachineFunction.h:798
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:234
llvm::createPrologEpilogInserterPass
MachineFunctionPass * createPrologEpilogInserterPass()
Definition: PrologEpilogInserter.cpp:149
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::Used
@ Used
llvm::MCRegisterInfo::sub_and_superregs_inclusive
detail::concat_range< const MCPhysReg, iterator_range< mc_subreg_iterator >, iterator_range< mc_superreg_iterator > > sub_and_superregs_inclusive(MCRegister Reg) const
Return an iterator range over all sub- and super-registers of Reg, including Reg.
Definition: MCRegisterInfo.h:338
llvm::MachineFrameInfo::setStackSize
void setStackSize(uint64_t Size)
Set the size of the stack.
Definition: MachineFrameInfo.h:580
llvm::BitVector::resize
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
Definition: BitVector.h:334
llvm::MachineFrameInfo::isObjectPreAllocated
bool isObjectPreAllocated(int ObjectIdx) const
Return true if the object was pre-allocated into the local block.
Definition: MachineFrameInfo.h:462
llvm::reverse
auto reverse(ContainerTy &&C, std::enable_if_t< has_rbegin< ContainerTy >::value > *=nullptr)
Definition: STLExtras.h:380
llvm::TargetRegisterInfo::requiresFrameIndexScavenging
virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const
Returns true if the target requires post PEI scavenging of registers for materializing frame index co...
Definition: TargetRegisterInfo.h:906
TargetInstrInfo.h
llvm::MachineFrameInfo::SSPLK_LargeArray
@ SSPLK_LargeArray
Array or nested array >= SSP-buffer-size.
Definition: MachineFrameInfo.h:112
llvm::SmallSet
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:136
llvm::DenseMapBase::count
size_type count(const_arg_type_t< KeyT > Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: DenseMap.h:147
llvm::MachineFrameInfo::setMaxCallFrameSize
void setMaxCallFrameSize(unsigned S)
Definition: MachineFrameInfo.h:656
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:450
llvm::ore::NV
DiagnosticInfoOptimizationBase::Argument NV
Definition: OptimizationRemarkEmitter.h:136
llvm::MachineFrameInfo::setAdjustsStack
void setAdjustsStack(bool V)
Definition: MachineFrameInfo.h:602
llvm::max
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:337
llvm::TargetFrameLowering::processFunctionBeforeFrameIndicesReplaced
virtual void processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF, RegScavenger *RS=nullptr) const
processFunctionBeforeFrameIndicesReplaced - This method is called immediately before MO_FrameIndex op...
Definition: TargetFrameLowering.h:374
STLExtras.h
llvm::SmallVectorImpl::pop_back_val
LLVM_NODISCARD T pop_back_val()
Definition: SmallVector.h:654
llvm::DIExpression
DWARF expression.
Definition: DebugInfoMetadata.h:2558
llvm::MachineFrameInfo::getObjectIndexEnd
int getObjectIndexEnd() const
Return one past the maximum frame object index.
Definition: MachineFrameInfo.h:409
llvm::MachineBasicBlock::terminators
iterator_range< iterator > terminators()
Definition: MachineBasicBlock.h:298
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::MachineFrameInfo::getMaxCallFrameSize
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
Definition: MachineFrameInfo.h:646
llvm::MachineFunctionPass::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: MachineFunctionPass.cpp:103
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
DepthFirstIterator.h
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::MachineLoopInfo
Definition: MachineLoopInfo.h:89
MachineRegisterInfo.h
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind
ZeroCallUsedRegsKind
Definition: CodeGen.h:78
llvm::TargetFrameLowering::getTransientStackAlign
Align getTransientStackAlign() const
getTransientStackAlignment - This method returns the number of bytes to which the stack pointer must ...
Definition: TargetFrameLowering.h:118
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::df_ext_begin
df_ext_iterator< T, SetTy > df_ext_begin(const T &G, SetTy &S)
Definition: DepthFirstIterator.h:242
llvm::TargetFrameLowering::eliminateCallFramePseudoInstr
virtual MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: TargetFrameLowering.h:388
llvm::MachineBasicBlock::push_back
void push_back(MachineInstr *MI)
Definition: MachineBasicBlock.h:875
llvm::TargetFrameLowering::processFunctionBeforeFrameFinalized
virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=nullptr) const
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Definition: TargetFrameLowering.h:366
llvm::InlineAsm::Extra_IsAlignStack
@ Extra_IsAlignStack
Definition: InlineAsm.h:229
llvm::MachineFunction::front
const MachineBasicBlock & front() const
Definition: MachineFunction.h:865
llvm::DIExpression::appendOpsToArg
static DIExpression * appendOpsToArg(const DIExpression *Expr, ArrayRef< uint64_t > Ops, unsigned ArgNo, bool StackValue=false)
Create a copy of Expr by appending the given list of Ops to each instance of the operand DW_OP_LLVM_a...
Definition: DebugInfoMetadata.cpp:1467
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:666
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
MachineLoopInfo.h
llvm::TargetFrameLowering::getOffsetOfLocalArea
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
Definition: TargetFrameLowering.h:140
TargetMachine.h
llvm::PassRegistry::getPassRegistry
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Definition: PassRegistry.cpp:31
llvm::Failed
testing::Matcher< const detail::ErrorHolder & > Failed()
Definition: Error.h:198
llvm::PrologEpilogCodeInserterID
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
Definition: PrologEpilogInserter.cpp:138
llvm::DILocalVariable
Local variable.
Definition: DebugInfoMetadata.h:3058
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::DS_Warning
@ DS_Warning
Definition: DiagnosticInfo.h:51
llvm::DIExpression::ApplyOffset
@ ApplyOffset
Definition: DebugInfoMetadata.h:2763
llvm::ZeroCallUsedRegs::ONLY_USED
const unsigned ONLY_USED
Definition: CodeGen.h:74
llvm::TargetFrameLowering::getStackAlign
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:100
llvm::MachineFrameInfo::setCalleeSavedInfoValid
void setCalleeSavedInfoValid(bool v)
Definition: MachineFrameInfo.h:794
llvm::TargetFrameLowering::hasReservedCallFrame
virtual bool hasReservedCallFrame(const MachineFunction &MF) const
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: TargetFrameLowering.h:292
llvm::MachineRegisterInfo::isReserved
bool isReserved(MCRegister PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
Definition: MachineRegisterInfo.h:925
llvm::TargetFrameLowering::inlineStackProbe
virtual void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const
Replace a StackProbe stub (if any) with the actual probe code inline.
Definition: TargetFrameLowering.h:235
int
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
Definition: README.txt:536
llvm::BitVector::size
size_type size() const
size - Returns the number of bits in this bitvector.
Definition: BitVector.h:152
updateLiveness
static void updateLiveness(MachineFunction &MF)
Helper function to update the liveness information for the callee-saved registers.
Definition: PrologEpilogInserter.cpp:486
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:45
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
llvm::MachineFunction::getProperties
const MachineFunctionProperties & getProperties() const
Get the function properties.
Definition: MachineFunction.h:747
false
Definition: StackSlotColoring.cpp:141
TargetOpcodes.h
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::InlineAsm::MIOp_ExtraInfo
@ MIOp_ExtraInfo
Definition: InlineAsm.h:224
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
llvm::Function::getFnAttribute
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
Definition: Function.cpp:651
INITIALIZE_PASS_BEGIN
INITIALIZE_PASS_BEGIN(PEI, DEBUG_TYPE, "Prologue/Epilogue Insertion", false, false) INITIALIZE_PASS_END(PEI
llvm::MachineOptimizationRemarkAnalysis
Diagnostic information for optimization analysis remarks.
Definition: MachineOptimizationRemarkEmitter.h:109
scavengeStackSlot
static bool scavengeStackSlot(MachineFrameInfo &MFI, int FrameIdx, bool StackGrowsDown, Align MaxAlign, BitVector &StackBytesFree)
Assign frame object to an unused portion of the stack in the fixed stack object range.
Definition: PrologEpilogInserter.cpp:733
llvm::TargetFrameLowering::spillCalleeSavedRegisters
virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: TargetFrameLowering.h:255
llvm::MachineFrameInfo::getRestorePoint
MachineBasicBlock * getRestorePoint() const
Definition: MachineFrameInfo.h:798
llvm::STATISTIC
STATISTIC(NumFunctions, "Total number of functions")
llvm::MachineFrameInfo::getStackID
uint8_t getStackID(int ObjectIdx) const
Definition: MachineFrameInfo.h:723
llvm::MachineFunction::shouldSplitStack
bool shouldSplitStack() const
Should we be emitting segmented stack stuff for the function.
Definition: MachineFunction.cpp:305
llvm::MachineFrameInfo::SSPLK_None
@ SSPLK_None
Did not trigger a stack protector.
Definition: MachineFrameInfo.h:110
llvm::SmallVectorImpl::resize
void resize(size_type N)
Definition: SmallVector.h:619
BitVector.h
llvm::MachineFrameInfo::getLocalFrameMaxAlign
Align getLocalFrameMaxAlign() const
Return the required alignment of the local object blob.
Definition: MachineFrameInfo.h:446
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:577
SmallPtrSet.h
llvm::MachineFrameInfo::getObjectOffset
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Definition: MachineFrameInfo.h:518
llvm::BitVector
Definition: BitVector.h:75
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::MachineFrameInfo::getObjectIndexBegin
int getObjectIndexBegin() const
Return the minimum frame object index.
Definition: MachineFrameInfo.h:406
llvm::SetVector::empty
bool empty() const
Determine if the SetVector is empty or not.
Definition: SetVector.h:72
llvm::Attribute::getValueAsString
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:304
llvm::StringRef::getAsInteger
std::enable_if_t< std::numeric_limits< T >::is_signed, bool > getAsInteger(unsigned Radix, T &Result) const
Parse the current string as an integer of the specified radix.
Definition: StringRef.h:514
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::MachineFrameInfo::isDeadObjectIndex
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Definition: MachineFrameInfo.h:737
INITIALIZE_PASS_END
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:58
llvm::BitVector::empty
bool empty() const
empty - Tests whether there are no bits in this bitvector.
Definition: BitVector.h:149
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::AllArg
@ AllArg
MachineOptimizationRemarkEmitter.h
===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*-—===//
llvm::MachineFunctionProperties::Property::NoVRegs
@ NoVRegs
llvm::DIExpression::isImplicit
bool isImplicit() const
Return whether this is an implicit location description.
Definition: DebugInfoMetadata.cpp:1331
llvm::TargetRegisterInfo::getSpillAlign
Align getSpillAlign(const TargetRegisterClass &RC) const
Return the minimum required alignment in bytes for a spill slot for a register of this class.
Definition: TargetRegisterInfo.h:289
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:656
llvm::MachineFrameInfo::getLocalFrameObjectMap
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
Definition: MachineFrameInfo.h:424
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:625
llvm::SPIRV::Decoration::Alignment
@ Alignment
llvm::MachineFrameInfo::setCalleeSavedInfo
void setCalleeSavedInfo(std::vector< CalleeSavedInfo > CSI)
Used by prolog/epilog inserter to set the function's callee saved information.
Definition: MachineFrameInfo.h:787
AdjustStackOffset
static void AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx, bool StackGrowsDown, int64_t &Offset, Align &MaxAlign, unsigned Skew)
AdjustStackOffset - Helper function used to adjust the stack frame offset.
Definition: PrologEpilogInserter.cpp:658
llvm::TargetRegisterInfo::getSpillSize
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
Definition: TargetRegisterInfo.h:283
llvm::MachineFrameInfo::CreateFixedSpillStackObject
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
Definition: MachineFrameInfo.cpp:102
llvm::SmallSet::count
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:166
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::UsedArg
@ UsedArg
llvm::WinEHFuncInfo
Definition: WinEHFuncInfo.h:90
llvm::AMDGPU::Hwreg::Offset
Offset
Definition: SIDefines.h:413
llvm::MachineFrameInfo::getLocalFrameSize
int64_t getLocalFrameSize() const
Get the size of the local object blob.
Definition: MachineFrameInfo.h:437
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
uint64_t
llvm::MachineFrameInfo::getObjectSize
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
Definition: MachineFrameInfo.h:469
llvm::TargetFrameLowering::getCalleeSavedSpillSlots
virtual const SpillSlot * getCalleeSavedSpillSlots(unsigned &NumEntries) const
getCalleeSavedSpillSlots - This method returns a pointer to an array of pairs, that contains an entry...
Definition: TargetFrameLowering.h:181
llvm::Function::getCallingConv
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:238
llvm::DIExpression::StackValue
@ StackValue
Definition: DebugInfoMetadata.h:2766
llvm::MachineFrameInfo::hasStackProtectorIndex
bool hasStackProtectorIndex() const
Definition: MachineFrameInfo.h:359
llvm::ARM_MB::ST
@ ST
Definition: ARMBaseInfo.h:73
INITIALIZE_PASS_DEPENDENCY
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
llvm::HexagonInstrInfo::storeRegToStackSlot
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Store the specified register of the given register class to the specified stack frame index.
Definition: HexagonInstrInfo.cpp:955
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
llvm::TargetFrameLowering::adjustForSegmentedStacks
virtual void adjustForSegmentedStacks(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const
Adjust the prologue to have the function use segmented stacks.
Definition: TargetFrameLowering.h:243
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::AllGPR
@ AllGPR
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::MCPhysReg
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:21
llvm::scavengeFrameVirtualRegs
void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS)
Replaces all frame index virtual registers with physical registers.
Definition: RegisterScavenging.cpp:757
llvm::RegScavenger
Definition: RegisterScavenging.h:34
llvm::MachineFrameInfo::getObjectAlign
Align getObjectAlign(int ObjectIdx) const
Return the alignment of the specified stack object.
Definition: MachineFrameInfo.h:483
llvm::TargetRegisterInfo::eliminateFrameIndex
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const =0
This method must be overriden to eliminate abstract frame indices from instructions which may use the...
llvm::TargetFrameLowering::restoreCalleeSavedRegisters
virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
Definition: TargetFrameLowering.h:269
MCRegisterInfo.h
llvm::MachineFrameInfo::setObjectOffset
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
Definition: MachineFrameInfo.h:552
llvm::StackOffset::getScalable
static StackOffset getScalable(ScalarTy Scalable)
Definition: TypeSize.h:144
ArrayRef.h
MachineFunctionPass.h
llvm::MachineFrameInfo::setRestorePoint
void setRestorePoint(MachineBasicBlock *NewRestore)
Definition: MachineFrameInfo.h:799
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:118
llvm::TargetFrameLowering::adjustForHiPEPrologue
virtual void adjustForHiPEPrologue(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const
Adjust the prologue to add Erlang Run-Time System (ERTS) specific code in the assembly prologue to ex...
Definition: TargetFrameLowering.h:248
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:672
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:234
llvm::TargetFrameLowering::getStackGrowthDirection
StackDirection getStackGrowthDirection() const
getStackGrowthDirection - Return the direction the stack grows
Definition: TargetFrameLowering.h:89
MachineModuleInfo.h
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::TargetFrameLowering::assignCalleeSavedSpillSlots
virtual bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI, unsigned &MinCSFrameIndex, unsigned &MaxCSFrameIndex) const
assignCalleeSavedSpillSlots - Allows target to override spill slot assignment logic.
Definition: TargetFrameLowering.h:156
llvm::MachineFrameInfo::setSavePoint
void setSavePoint(MachineBasicBlock *NewSave)
Definition: MachineFrameInfo.h:797
llvm::SmallPtrSetImpl< NodeRef >::count
size_type count(ConstPtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
Definition: SmallPtrSet.h:383
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::SetVector::insert
bool insert(const value_type &X)
Insert a new element into the SetVector.
Definition: SetVector.h:141
llvm::df_iterator_default_set
Definition: DepthFirstIterator.h:70
llvm::CodeGenOpt::None
@ None
Definition: CodeGen.h:53
llvm::MachineBasicBlock::succ_empty
bool succ_empty() const
Definition: MachineBasicBlock.h:357
TargetOptions.h
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:779
llvm::MachineBasicBlock::getFirstTerminator
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
Definition: MachineBasicBlock.cpp:238
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::MachineBasicBlock::getNumber
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
Definition: MachineBasicBlock.h:1088
llvm::min
Expected< ExpressionValue > min(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:357
llvm::any_of
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1624
llvm::MachineFrameInfo::CreateStackObject
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
Definition: MachineFrameInfo.cpp:51
llvm::MachineBasicBlock::successors
iterator_range< succ_iterator > successors()
Definition: MachineBasicBlock.h:365
llvm::AnalysisUsage::setPreservesCFG
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:263
llvm::HexagonInstrInfo::loadRegFromStackSlot
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Load the specified register of the given register class from the specified stack frame index.
Definition: HexagonInstrInfo.cpp:1000
llvm::TargetFrameLowering::enableStackSlotScavenging
virtual bool enableStackSlotScavenging(const MachineFunction &MF) const
Returns true if the stack slot holes in the fixed and callee-save stack area should be used when allo...
Definition: TargetFrameLowering.h:201
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::MachineOptimizationRemarkEmitterPass
The analysis pass.
Definition: MachineOptimizationRemarkEmitter.h:219
llvm::AnalysisUsage::addPreserved
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
Definition: PassAnalysisSupport.h:98
llvm::TargetFrameLowering::emitZeroCallUsedRegs
virtual void emitZeroCallUsedRegs(BitVector RegsToZero, MachineBasicBlock &MBB) const
emitZeroCallUsedRegs - Zeros out call used registers.
Definition: TargetFrameLowering.h:217
AssignProtectedObjSet
static void AssignProtectedObjSet(const StackObjSet &UnassignedObjs, SmallSet< int, 16 > &ProtectedObjs, MachineFrameInfo &MFI, bool StackGrowsDown, int64_t &Offset, Align &MaxAlign, unsigned Skew)
AssignProtectedObjSet - Helper function to assign large stack objects (i.e., those required to be clo...
Definition: PrologEpilogInserter.cpp:793
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
TargetSubtargetInfo.h
llvm::ZeroCallUsedRegs::ONLY_ARG
const unsigned ONLY_ARG
Definition: CodeGen.h:76
Finalization
Prologue Epilogue Insertion &Frame Finalization
Definition: PrologEpilogInserter.cpp:146
llvm::DiagnosticInfoStackSize
Definition: DiagnosticInfo.h:223
llvm::SmallSet::insert
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
Definition: SmallSet.h:182
llvm::MachineFrameInfo::getUnsafeStackSize
uint64_t getUnsafeStackSize() const
Definition: MachineFrameInfo.h:801
llvm::ZeroCallUsedRegs::ONLY_GPR
const unsigned ONLY_GPR
Definition: CodeGen.h:75
llvm::StackOffset::getFixed
static StackOffset getFixed(ScalarTy Fixed)
Definition: TypeSize.h:143
llvm::df_ext_end
df_ext_iterator< T, SetTy > df_ext_end(const T &G, SetTy &S)
Definition: DepthFirstIterator.h:247
llvm::MachineFrameInfo::getLocalFrameObjectCount
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
Definition: MachineFrameInfo.h:431
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::MachineFrameInfo::getMaxAlign
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Definition: MachineFrameInfo.h:593
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:377
llvm::MachineFrameInfo::hasCalls
bool hasCalls() const
Return true if the current function has any function calls.
Definition: MachineFrameInfo.h:605
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::All
@ All
CallingConv.h
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
Attributes.h
llvm::MachineFrameInfo::getSavePoint
MachineBasicBlock * getSavePoint() const
Definition: MachineFrameInfo.h:796
llvm::BitVector::test
bool test(unsigned Idx) const
Definition: BitVector.h:454
llvm::DIExpression::prependOpcodes
static DIExpression * prependOpcodes(const DIExpression *Expr, SmallVectorImpl< uint64_t > &Ops, bool StackValue=false, bool EntryValue=false)
Prepend DIExpr with the given opcodes and optionally turn it into a stack value.
Definition: DebugInfoMetadata.cpp:1513
llvm::MachineFrameInfo::getObjectSSPLayout
SSPLayoutKind getObjectSSPLayout(int ObjectIdx) const
Definition: MachineFrameInfo.h:560
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::AllGPRArg
@ AllGPRArg
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:622
llvm::TargetSubtargetInfo::getFrameLowering
virtual const TargetFrameLowering * getFrameLowering() const
Definition: TargetSubtargetInfo.h:94
llvm::CalleeSavedInfo
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
Definition: MachineFrameInfo.h:33
llvm::TargetFrameLowering::allocateScavengingFrameIndexesNearIncomingSP
virtual bool allocateScavengingFrameIndexesNearIncomingSP(const MachineFunction &MF) const
Control the placement of special register scavenging spill slots when allocating a stack frame.
Definition: TargetFrameLoweringImpl.cpp:144
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:652
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:345
llvm::MachineFrameInfo::isVariableSizedObjectIndex
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
Definition: MachineFrameInfo.h:745
MachineFrameInfo.h
llvm::MachineFunction::getWinEHFuncInfo
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling.
Definition: MachineFunction.h:700
llvm::TargetFrameLowering::getFrameIndexReference
virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: TargetFrameLoweringImpl.cpp:50
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::UsedGPR
@ UsedGPR
DiagnosticInfo.h
llvm::TargetFrameLowering::SpillSlot::Offset
int Offset
Definition: TargetFrameLowering.h:53
llvm::DIExpression::isComplex
bool isComplex() const
Return whether the location is computed on the expression stack, meaning it cannot be a simple regist...
Definition: DebugInfoMetadata.cpp:1351
Function.h
llvm::CallingConv::HiPE
@ HiPE
Definition: CallingConv.h:55
llvm::initializePEIPass
void initializePEIPass(PassRegistry &)
llvm::TargetStackID::Default
@ Default
Definition: TargetFrameLowering.h:28
assignCalleeSavedSpillSlots
static void assignCalleeSavedSpillSlots(MachineFunction &F, const BitVector &SavedRegs, unsigned &MinCSFrameIndex, unsigned &MaxCSFrameIndex)
Definition: PrologEpilogInserter.cpp:391
llvm::TargetFrameLowering::canSimplifyCallFramePseudos
virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const
canSimplifyCallFramePseudos - When possible, it's best to simplify the call frame pseudo ops before d...
Definition: TargetFrameLowering.h:303
llvm::TargetFrameLowering::SpillSlot::Reg
unsigned Reg
Definition: TargetFrameLowering.h:52
llvm::TargetFrameLowering::targetHandlesStackFrameRounding
virtual bool targetHandlesStackFrameRounding() const
targetHandlesStackFrameRounding - Returns true if the target is responsible for rounding up the stack...
Definition: TargetFrameLowering.h:189
llvm::BitVector::find_next
int find_next(unsigned Prev) const
find_next - Returns the index of the next set bit following the "Prev" bit.
Definition: BitVector.h:301
llvm::BitVector::reset
BitVector & reset()
Definition: BitVector.h:385
WinEHFuncInfo.h
llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind::UsedGPRArg
@ UsedGPRArg
CodeGen.h
llvm::TargetRegisterInfo::hasStackRealignment
bool hasStackRealignment(const MachineFunction &MF) const
True if stack realignment is required and still possible.
Definition: TargetRegisterInfo.h:947
llvm::MCRegisterInfo::superregs
iterator_range< mc_superreg_iterator > superregs(MCRegister Reg) const
Return an iterator range over all super-registers of Reg, excluding Reg.
Definition: MCRegisterInfo.h:322
llvm::getKillRegState
unsigned getKillRegState(bool B)
Definition: MachineInstrBuilder.h:508
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:105
insertCSRRestores
static void insertCSRRestores(MachineBasicBlock &RestoreBlock, std::vector< CalleeSavedInfo > &CSI)
Insert restore code for the callee-saved registers used in the function.
Definition: PrologEpilogInserter.cpp:585
llvm::TargetRegisterInfo::requiresRegisterScavenging
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
Returns true if the target requires (and can make use of) the register scavenger.
Definition: TargetRegisterInfo.h:894
insertCSRSaves
static void insertCSRSaves(MachineBasicBlock &SaveBlock, ArrayRef< CalleeSavedInfo > CSI)
Insert restore code for the callee-saved registers used in the function.
Definition: PrologEpilogInserter.cpp:558
SmallVector.h
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:278
MachineInstrBuilder.h
llvm::MachineFrameInfo::SSPLK_AddrOf
@ SSPLK_AddrOf
The address of this allocation is exposed and triggered protection.
Definition: MachineFrameInfo.h:116
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
llvm::BitVector::find_first
int find_first() const
find_first - Returns the index of the first set bit, -1 if none of the bits are set.
Definition: BitVector.h:293
DEBUG_TYPE
#define DEBUG_TYPE
Definition: PrologEpilogInserter.cpp:73
llvm::MachineFrameInfo::SSPLK_SmallArray
@ SSPLK_SmallArray
Array or nested array < SSP-buffer-size.
Definition: MachineFrameInfo.h:114
llvm::TargetOptions::StackSymbolOrdering
unsigned StackSymbolOrdering
StackSymbolOrdering - When true, this will allow CodeGen to order the local stack symbols (for code s...
Definition: TargetOptions.h:227
MachineOperand.h
llvm::TargetFrameLowering::StackGrowsDown
@ StackGrowsDown
Definition: TargetFrameLowering.h:47
llvm::StringSwitch
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:44
llvm::SmallSetVector
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:307
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::MachineFrameInfo::getStackProtectorIndex
int getStackProtectorIndex() const
Return the index for the stack protector object.
Definition: MachineFrameInfo.h:357
llvm::TargetFrameLowering::emitPrologue
virtual void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const =0
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
llvm::TargetFrameLowering::determineCalleeSaves
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: TargetFrameLoweringImpl.cpp:83
llvm::AnalysisUsage::addRequired
AnalysisUsage & addRequired()
Definition: PassAnalysisSupport.h:75
LLVMContext.h
llvm::TargetFrameLowering::getFrameIndexReferencePreferSP
virtual StackOffset getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, Register &FrameReg, bool IgnoreSPUpdates) const
Same as getFrameIndexReference, except that the stack pointer (as opposed to the frame pointer) will ...
Definition: TargetFrameLowering.h:325
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MachineFrameInfo::adjustsStack
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Definition: MachineFrameInfo.h:601
llvm::TargetRegisterInfo::getMinimalPhysRegClass
const TargetRegisterClass * getMinimalPhysRegClass(MCRegister Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
Definition: TargetRegisterInfo.cpp:212
RegisterScavenging.h
raw_ostream.h
llvm::MachineDominatorTree
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
Definition: MachineDominators.h:51
MachineFunction.h
llvm::TargetFrameLowering::emitEpilogue
virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const =0
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::TargetFrameLowering::SpillSlot
Definition: TargetFrameLowering.h:51
llvm::TargetRegisterInfo::hasReservedSpillSlot
virtual bool hasReservedSpillSlot(const MachineFunction &MF, Register Reg, int &FrameIdx) const
Return true if target has reserved a spill slot in the stack frame of the given function for the spec...
Definition: TargetRegisterInfo.h:929
InitializePasses.h
TargetRegisterInfo.h
Debug.h
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:280
llvm::TargetRegisterInfo::prependOffsetExpression
DIExpression * prependOffsetExpression(const DIExpression *Expr, unsigned PrependFlags, const StackOffset &Offset) const
Prepends a DWARF expression for Offset to DIExpression Expr.
Definition: TargetRegisterInfo.cpp:650
SetVector.h
MachineDominators.h
llvm::TargetFrameLowering::getStackAlignmentSkew
virtual unsigned getStackAlignmentSkew(const MachineFunction &MF) const
Return the skew that has to be applied to stack alignment under certain conditions (e....
Definition: TargetFrameLoweringImpl.cpp:134
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24
SmallSet.h
llvm::SmallPtrSetImpl::insert
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:365
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:38
llvm::TargetRegisterInfo::requiresFrameIndexReplacementScavenging
virtual bool requiresFrameIndexReplacementScavenging(const MachineFunction &MF) const
Returns true if the target requires using the RegScavenger directly for frame elimination despite usi...
Definition: TargetRegisterInfo.h:912
llvm::DIExpression::fragmentsOverlap
static bool fragmentsOverlap(const FragmentInfo &A, const FragmentInfo &B)
Check if fragments overlap between a pair of FragmentInfos.
Definition: DebugInfoMetadata.h:2854