LLVM  15.0.0git
FastISel.h
Go to the documentation of this file.
1 //===- FastISel.h - Definition of the FastISel class ------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the FastISel class.
11 ///
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_FASTISEL_H
15 #define LLVM_CODEGEN_FASTISEL_H
16 
17 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/ADT/StringRef.h"
22 #include "llvm/IR/Attributes.h"
23 #include "llvm/IR/CallingConv.h"
24 #include "llvm/IR/DebugLoc.h"
25 #include "llvm/IR/DerivedTypes.h"
26 #include "llvm/IR/InstrTypes.h"
28 #include <cstdint>
29 #include <utility>
30 
31 namespace llvm {
32 
33 class AllocaInst;
34 class Instruction;
35 class IntrinsicInst;
36 class BasicBlock;
37 class CallInst;
38 class Constant;
39 class ConstantFP;
40 class DataLayout;
41 class FunctionLoweringInfo;
42 class LoadInst;
43 class MachineConstantPool;
44 class MachineFrameInfo;
45 class MachineFunction;
46 class MachineInstr;
47 class MachineMemOperand;
48 class MachineOperand;
49 class MachineRegisterInfo;
50 class MCContext;
51 class MCInstrDesc;
52 class MCSymbol;
53 class TargetInstrInfo;
54 class TargetLibraryInfo;
55 class TargetMachine;
56 class TargetRegisterClass;
57 class TargetRegisterInfo;
58 class Type;
59 class User;
60 class Value;
61 
62 /// This is a fast-path instruction selection class that generates poor
63 /// code and doesn't support illegal types or non-trivial lowering, but runs
64 /// quickly.
65 class FastISel {
66 public:
70  Type *RetTy = nullptr;
71  bool RetSExt : 1;
72  bool RetZExt : 1;
73  bool IsVarArg : 1;
74  bool IsInReg : 1;
75  bool DoesNotReturn : 1;
77  bool IsPatchPoint : 1;
78 
79  // IsTailCall Should be modified by implementations of FastLowerCall
80  // that perform tail call conversions.
81  bool IsTailCall = false;
82 
83  unsigned NumFixedArgs = -1;
85  const Value *Callee = nullptr;
86  MCSymbol *Symbol = nullptr;
88  const CallBase *CB = nullptr;
89  MachineInstr *Call = nullptr;
91  unsigned NumResultRegs = 0;
92 
98 
102 
104  const Value *Target, ArgListTy &&ArgsList,
105  const CallBase &Call) {
106  RetTy = ResultTy;
107  Callee = Target;
108 
109  IsInReg = Call.hasRetAttr(Attribute::InReg);
110  DoesNotReturn = Call.doesNotReturn();
111  IsVarArg = FuncTy->isVarArg();
112  IsReturnValueUsed = !Call.use_empty();
113  RetSExt = Call.hasRetAttr(Attribute::SExt);
114  RetZExt = Call.hasRetAttr(Attribute::ZExt);
115 
116  CallConv = Call.getCallingConv();
117  Args = std::move(ArgsList);
118  NumFixedArgs = FuncTy->getNumParams();
119 
120  CB = &Call;
121 
122  return *this;
123  }
124 
126  MCSymbol *Target, ArgListTy &&ArgsList,
127  const CallBase &Call,
128  unsigned FixedArgs = ~0U) {
129  RetTy = ResultTy;
130  Callee = Call.getCalledOperand();
131  Symbol = Target;
132 
133  IsInReg = Call.hasRetAttr(Attribute::InReg);
134  DoesNotReturn = Call.doesNotReturn();
135  IsVarArg = FuncTy->isVarArg();
136  IsReturnValueUsed = !Call.use_empty();
137  RetSExt = Call.hasRetAttr(Attribute::SExt);
138  RetZExt = Call.hasRetAttr(Attribute::ZExt);
139 
140  CallConv = Call.getCallingConv();
141  Args = std::move(ArgsList);
142  NumFixedArgs = (FixedArgs == ~0U) ? FuncTy->getNumParams() : FixedArgs;
143 
144  CB = &Call;
145 
146  return *this;
147  }
148 
150  const Value *Target, ArgListTy &&ArgsList,
151  unsigned FixedArgs = ~0U) {
152  RetTy = ResultTy;
153  Callee = Target;
154  CallConv = CC;
155  Args = std::move(ArgsList);
156  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
157  return *this;
158  }
159 
161  CallingConv::ID CC, Type *ResultTy,
162  StringRef Target, ArgListTy &&ArgsList,
163  unsigned FixedArgs = ~0U);
164 
166  MCSymbol *Target, ArgListTy &&ArgsList,
167  unsigned FixedArgs = ~0U) {
168  RetTy = ResultTy;
169  Symbol = Target;
170  CallConv = CC;
171  Args = std::move(ArgsList);
172  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
173  return *this;
174  }
175 
177  IsTailCall = Value;
178  return *this;
179  }
180 
183  return *this;
184  }
185 
186  ArgListTy &getArgs() { return Args; }
187 
188  void clearOuts() {
189  OutVals.clear();
190  OutFlags.clear();
191  OutRegs.clear();
192  }
193 
194  void clearIns() {
195  Ins.clear();
196  InRegs.clear();
197  }
198  };
199 
200 protected:
209  const DataLayout &DL;
215  bool UseInstrRefDebugInfo = false;
216 
217  /// The position of the last instruction for materializing constants
218  /// for use in the current block. It resets to EmitStartPt when it makes sense
219  /// (for example, it's usually profitable to avoid function calls between the
220  /// definition and the use)
222 
223  /// The top most instruction in the current block that is allowed for
224  /// emitting local variables. LastLocalValue resets to EmitStartPt when it
225  /// makes sense (for example, on function calls)
227 
228 public:
229  virtual ~FastISel();
230 
231  /// Return the position of the last instruction emitted for
232  /// materializing constants for use in the current block.
234 
235  /// Update the position of the last instruction emitted for
236  /// materializing constants for use in the current block.
238  EmitStartPt = I;
239  LastLocalValue = I;
240  }
241 
242  /// Set the current block to which generated machine instructions will
243  /// be appended.
244  void startNewBlock();
245 
246  /// Flush the local value map.
247  void finishBasicBlock();
248 
249  /// Return current debug location information.
250  DebugLoc getCurDebugLoc() const { return DbgLoc; }
251 
252  /// Do "fast" instruction selection for function arguments and append
253  /// the machine instructions to the current block. Returns true when
254  /// successful.
255  bool lowerArguments();
256 
257  /// Do "fast" instruction selection for the given LLVM IR instruction
258  /// and append the generated machine instructions to the current block.
259  /// Returns true if selection was successful.
260  bool selectInstruction(const Instruction *I);
261 
262  /// Do "fast" instruction selection for the given LLVM IR operator
263  /// (Instruction or ConstantExpr), and append generated machine instructions
264  /// to the current block. Return true if selection was successful.
265  bool selectOperator(const User *I, unsigned Opcode);
266 
267  /// Create a virtual register and arrange for it to be assigned the
268  /// value for the given LLVM value.
269  Register getRegForValue(const Value *V);
270 
271  /// Look up the value to see if its value is already cached in a
272  /// register. It may be defined by instructions across blocks or defined
273  /// locally.
274  Register lookUpRegForValue(const Value *V);
275 
276  /// This is a wrapper around getRegForValue that also takes care of
277  /// truncating or sign-extending the given getelementptr index value.
278  Register getRegForGEPIndex(const Value *Idx);
279 
280  /// We're checking to see if we can fold \p LI into \p FoldInst. Note
281  /// that we could have a sequence where multiple LLVM IR instructions are
282  /// folded into the same machineinstr. For example we could have:
283  ///
284  /// A: x = load i32 *P
285  /// B: y = icmp A, 42
286  /// C: br y, ...
287  ///
288  /// In this scenario, \p LI is "A", and \p FoldInst is "C". We know about "B"
289  /// (and any other folded instructions) because it is between A and C.
290  ///
291  /// If we succeed folding, return true.
292  bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
293 
294  /// The specified machine instr operand is a vreg, and that vreg is
295  /// being provided by the specified load instruction. If possible, try to
296  /// fold the load as an operand to the instruction, returning true if
297  /// possible.
298  ///
299  /// This method should be implemented by targets.
300  virtual bool tryToFoldLoadIntoMI(MachineInstr * /*MI*/, unsigned /*OpNo*/,
301  const LoadInst * /*LI*/) {
302  return false;
303  }
304 
305  /// Reset InsertPt to prepare for inserting instructions into the
306  /// current block.
307  void recomputeInsertPt();
308 
309  /// Remove all dead instructions between the I and E.
312 
314 
315  /// Prepare InsertPt to begin inserting instructions into the local
316  /// value area and return the old insert position.
318 
319  /// Reset InsertPt to the given old insert position.
320  void leaveLocalValueArea(SavePoint Old);
321 
322  /// Signal whether instruction referencing variable locations are desired for
323  /// this function's debug-info.
326  }
327 
328 protected:
330  const TargetLibraryInfo *LibInfo,
331  bool SkipTargetIndependentISel = false);
332 
333  /// This method is called by target-independent code when the normal
334  /// FastISel process fails to select an instruction. This gives targets a
335  /// chance to emit code for anything that doesn't fit into FastISel's
336  /// framework. It returns true if it was successful.
337  virtual bool fastSelectInstruction(const Instruction *I) = 0;
338 
339  /// This method is called by target-independent code to do target-
340  /// specific argument lowering. It returns true if it was successful.
341  virtual bool fastLowerArguments();
342 
343  /// This method is called by target-independent code to do target-
344  /// specific call lowering. It returns true if it was successful.
345  virtual bool fastLowerCall(CallLoweringInfo &CLI);
346 
347  /// This method is called by target-independent code to do target-
348  /// specific intrinsic lowering. It returns true if it was successful.
349  virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II);
350 
351  /// This method is called by target-independent code to request that an
352  /// instruction with the given type and opcode be emitted.
353  virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
354 
355  /// This method is called by target-independent code to request that an
356  /// instruction with the given type, opcode, and register operand be emitted.
357  virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0);
358 
359  /// This method is called by target-independent code to request that an
360  /// instruction with the given type, opcode, and register operands be emitted.
361  virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
362  unsigned Op1);
363 
364  /// This method is called by target-independent code to request that an
365  /// instruction with the given type, opcode, and register and immediate
366  /// operands be emitted.
367  virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
368  uint64_t Imm);
369 
370  /// This method is a wrapper of fastEmit_ri.
371  ///
372  /// It first tries to emit an instruction with an immediate operand using
373  /// fastEmit_ri. If that fails, it materializes the immediate into a register
374  /// and try fastEmit_rr instead.
375  Register fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, uint64_t Imm,
376  MVT ImmType);
377 
378  /// This method is called by target-independent code to request that an
379  /// instruction with the given type, opcode, and immediate operand be emitted.
380  virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
381 
382  /// This method is called by target-independent code to request that an
383  /// instruction with the given type, opcode, and floating-point immediate
384  /// operand be emitted.
385  virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
386  const ConstantFP *FPImm);
387 
388  /// Emit a MachineInstr with no operands and a result register in the
389  /// given register class.
390  Register fastEmitInst_(unsigned MachineInstOpcode,
391  const TargetRegisterClass *RC);
392 
393  /// Emit a MachineInstr with one register operand and a result register
394  /// in the given register class.
395  Register fastEmitInst_r(unsigned MachineInstOpcode,
396  const TargetRegisterClass *RC, unsigned Op0);
397 
398  /// Emit a MachineInstr with two register operands and a result
399  /// register in the given register class.
400  Register fastEmitInst_rr(unsigned MachineInstOpcode,
401  const TargetRegisterClass *RC, unsigned Op0,
402  unsigned Op1);
403 
404  /// Emit a MachineInstr with three register operands and a result
405  /// register in the given register class.
406  Register fastEmitInst_rrr(unsigned MachineInstOpcode,
407  const TargetRegisterClass *RC, unsigned Op0,
408  unsigned Op1, unsigned Op2);
409 
410  /// Emit a MachineInstr with a register operand, an immediate, and a
411  /// result register in the given register class.
412  Register fastEmitInst_ri(unsigned MachineInstOpcode,
413  const TargetRegisterClass *RC, unsigned Op0,
414  uint64_t Imm);
415 
416  /// Emit a MachineInstr with one register operand and two immediate
417  /// operands.
418  Register fastEmitInst_rii(unsigned MachineInstOpcode,
419  const TargetRegisterClass *RC, unsigned Op0,
420  uint64_t Imm1, uint64_t Imm2);
421 
422  /// Emit a MachineInstr with a floating point immediate, and a result
423  /// register in the given register class.
424  Register fastEmitInst_f(unsigned MachineInstOpcode,
425  const TargetRegisterClass *RC,
426  const ConstantFP *FPImm);
427 
428  /// Emit a MachineInstr with two register operands, an immediate, and a
429  /// result register in the given register class.
430  Register fastEmitInst_rri(unsigned MachineInstOpcode,
431  const TargetRegisterClass *RC, unsigned Op0,
432  unsigned Op1, uint64_t Imm);
433 
434  /// Emit a MachineInstr with a single immediate operand, and a result
435  /// register in the given register class.
436  Register fastEmitInst_i(unsigned MachineInstOpcode,
437  const TargetRegisterClass *RC, uint64_t Imm);
438 
439  /// Emit a MachineInstr for an extract_subreg from a specified index of
440  /// a superregister to a specified type.
441  Register fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, uint32_t Idx);
442 
443  /// Emit MachineInstrs to compute the value of Op with all but the
444  /// least significant bit set to zero.
445  Register fastEmitZExtFromI1(MVT VT, unsigned Op0);
446 
447  /// Emit an unconditional branch to the given block, unless it is the
448  /// immediate (fall-through) successor, and update the CFG.
449  void fastEmitBranch(MachineBasicBlock *MSucc, const DebugLoc &DbgLoc);
450 
451  /// Emit an unconditional branch to \p FalseMBB, obtains the branch weight
452  /// and adds TrueMBB and FalseMBB to the successor list.
453  void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB,
454  MachineBasicBlock *FalseMBB);
455 
456  /// Update the value map to include the new mapping for this
457  /// instruction, or insert an extra copy to get the result in a previous
458  /// determined register.
459  ///
460  /// NOTE: This is only necessary because we might select a block that uses a
461  /// value before we select the block that defines the value. It might be
462  /// possible to fix this by selecting blocks in reverse postorder.
463  void updateValueMap(const Value *I, Register Reg, unsigned NumRegs = 1);
464 
466 
467  /// Try to constrain Op so that it is usable by argument OpNum of the
468  /// provided MCInstrDesc. If this fails, create a new virtual register in the
469  /// correct class and COPY the value there.
471  unsigned OpNum);
472 
473  /// Emit a constant in a register using target-specific logic, such as
474  /// constant pool loads.
475  virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
476 
477  /// Emit an alloca address in a register using target-specific logic.
478  virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
479 
480  /// Emit the floating-point constant +0.0 in a register using target-
481  /// specific logic.
482  virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
483  return 0;
484  }
485 
486  /// Check if \c Add is an add that can be safely folded into \c GEP.
487  ///
488  /// \c Add can be folded into \c GEP if:
489  /// - \c Add is an add,
490  /// - \c Add's size matches \c GEP's,
491  /// - \c Add is in the same basic block as \c GEP, and
492  /// - \c Add has a constant operand.
493  bool canFoldAddIntoGEP(const User *GEP, const Value *Add);
494 
495  /// Create a machine mem operand from the given instruction.
497 
499 
500  bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs);
501  bool lowerCallTo(const CallInst *CI, const char *SymName,
502  unsigned NumArgs);
503  bool lowerCallTo(CallLoweringInfo &CLI);
504 
505  bool lowerCall(const CallInst *I);
506  /// Select and emit code for a binary operator instruction, which has
507  /// an opcode which directly corresponds to the given ISD opcode.
508  bool selectBinaryOp(const User *I, unsigned ISDOpcode);
509  bool selectFNeg(const User *I, const Value *In);
510  bool selectGetElementPtr(const User *I);
511  bool selectStackmap(const CallInst *I);
512  bool selectPatchpoint(const CallInst *I);
513  bool selectCall(const User *I);
514  bool selectIntrinsicCall(const IntrinsicInst *II);
515  bool selectBitCast(const User *I);
516  bool selectFreeze(const User *I);
517  bool selectCast(const User *I, unsigned Opcode);
518  bool selectExtractValue(const User *U);
519  bool selectXRayCustomEvent(const CallInst *II);
520  bool selectXRayTypedEvent(const CallInst *II);
521 
522  bool shouldOptForSize(const MachineFunction *MF) const {
523  // TODO: Implement PGSO.
524  return MF->getFunction().hasOptSize();
525  }
526 
527 private:
528  /// Handle PHI nodes in successor blocks.
529  ///
530  /// Emit code to ensure constants are copied into registers when needed.
531  /// Remember the virtual registers that need to be added to the Machine PHI
532  /// nodes as input. We cannot just directly add them, because expansion might
533  /// result in multiple MBB's for one BB. As such, the start of the BB might
534  /// correspond to a different MBB than the end.
535  bool handlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
536 
537  /// Helper for materializeRegForValue to materialize a constant in a
538  /// target-independent way.
539  Register materializeConstant(const Value *V, MVT VT);
540 
541  /// Helper for getRegForVale. This function is called when the value
542  /// isn't already available in a register and must be materialized with new
543  /// instructions.
544  Register materializeRegForValue(const Value *V, MVT VT);
545 
546  /// Clears LocalValueMap and moves the area for the new local variables
547  /// to the beginning of the block. It helps to avoid spilling cached variables
548  /// across heavy instructions like calls.
549  void flushLocalValueMap();
550 
551  /// Removes dead local value instructions after SavedLastLocalvalue.
552  void removeDeadLocalValueCode(MachineInstr *SavedLastLocalValue);
553 
554  /// Insertion point before trying to select the current instruction.
555  MachineBasicBlock::iterator SavedInsertPt;
556 
557  /// Add a stackmap or patchpoint intrinsic call's live variable
558  /// operands to a stackmap or patchpoint machine instruction.
559  bool addStackMapLiveVars(SmallVectorImpl<MachineOperand> &Ops,
560  const CallInst *CI, unsigned StartIdx);
561  bool lowerCallOperands(const CallInst *CI, unsigned ArgIdx, unsigned NumArgs,
562  const Value *Callee, bool ForceRetVoidTy,
563  CallLoweringInfo &CLI);
564 };
565 
566 } // end namespace llvm
567 
568 #endif // LLVM_CODEGEN_FASTISEL_H
llvm::FastISel::LibInfo
const TargetLibraryInfo * LibInfo
Definition: FastISel.h:213
llvm::objcarc::ARCInstKind::User
@ User
could "use" a pointer
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::FastISel::CallLoweringInfo::CallConv
CallingConv::ID CallConv
Definition: FastISel.h:84
llvm::FastISel::lowerCallTo
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
Definition: FastISel.cpp:964
llvm::FastISel::selectPatchpoint
bool selectPatchpoint(const CallInst *I)
Definition: FastISel.cpp:762
llvm::FastISel::CallLoweringInfo::OutFlags
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
Definition: FastISel.h:94
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::FastISel::getRegForValue
Register getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value.
Definition: FastISel.cpp:238
llvm::FastISel::~FastISel
virtual ~FastISel()
llvm::FastISel::fastEmit_f
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1847
llvm::CmpInst::Predicate
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:719
llvm::FastISel::CallLoweringInfo::CallLoweringInfo
CallLoweringInfo()
Definition: FastISel.h:99
llvm::FastISel::selectCast
bool selectCast(const User *I, unsigned Opcode)
Definition: FastISel.cpp:1377
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:76
llvm::ISD::ConstantFP
@ ConstantFP
Definition: ISDOpcodes.h:77
StringRef.h
llvm::FastISel::CallLoweringInfo::Callee
const Value * Callee
Definition: FastISel.h:85
llvm::FastISel::updateValueMap
void updateValueMap(const Value *I, Register Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
Definition: FastISel.cpp:362
llvm::FastISel::CallLoweringInfo::setCallee
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, MCSymbol *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:165
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:145
llvm::FastISel::fastEmit_ri_
Register fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
Definition: FastISel.cpp:1861
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
llvm::FastISel::fastEmitInst_f
Register fastEmitInst_f(unsigned MachineInstOpcode, const TargetRegisterClass *RC, const ConstantFP *FPImm)
Emit a MachineInstr with a floating point immediate, and a result register in the given register clas...
Definition: FastISel.cpp:2041
llvm::FastISel::CallLoweringInfo::setIsPatchPoint
CallLoweringInfo & setIsPatchPoint(bool Value=true)
Definition: FastISel.h:181
llvm::FastISel::FastISel
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
Definition: FastISel.cpp:1811
llvm::FastISel::CallLoweringInfo::ResultReg
Register ResultReg
Definition: FastISel.h:90
llvm::FastISel::CallLoweringInfo::InRegs
SmallVector< Register, 4 > InRegs
Definition: FastISel.h:97
llvm::FastISel::finishBasicBlock
void finishBasicBlock()
Flush the local value map.
Definition: FastISel.cpp:136
llvm::FastISel::CallLoweringInfo::setCallee
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, MCSymbol *Target, ArgListTy &&ArgsList, const CallBase &Call, unsigned FixedArgs=~0U)
Definition: FastISel.h:125
llvm::FastISel::lowerArguments
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Definition: FastISel.cpp:138
llvm::FastISel::fastEmitZExtFromI1
Register fastEmitZExtFromI1(MVT VT, unsigned Op0)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero.
Definition: FastISel.cpp:2115
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::FastISel::selectFreeze
bool selectFreeze(const User *I)
Definition: FastISel.cpp:1437
llvm::FastISel::enterLocalValueArea
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
Definition: FastISel.cpp:435
MachineBasicBlock.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:234
true
basic Basic Alias true
Definition: BasicAliasAnalysis.cpp:1886
llvm::FastISel::CallLoweringInfo::OutVals
SmallVector< Value *, 16 > OutVals
Definition: FastISel.h:93
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
DenseMap.h
llvm::FastISel::fastEmitInst_rii
Register fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
Definition: FastISel.cpp:2017
llvm::FastISel::fastEmit_rr
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, unsigned Op1)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1838
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:127
llvm::FastISel::CallLoweringInfo::RetSExt
bool RetSExt
Definition: FastISel.h:71
llvm::FastISel::getLastLocalValue
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:233
llvm::FastISel::TLI
const TargetLowering & TLI
Definition: FastISel.h:211
llvm::FunctionType::getNumParams
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Definition: DerivedTypes.h:139
llvm::FastISel::getRegForGEPIndex
Register getRegForGEPIndex(const Value *Idx)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...
Definition: FastISel.cpp:383
llvm::FastISel::fastSelectInstruction
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
llvm::FastISel::MFI
MachineFrameInfo & MFI
Definition: FastISel.h:205
llvm::FunctionType::isVarArg
bool isVarArg() const
Definition: DerivedTypes.h:123
llvm::FastISel::CallLoweringInfo::RetZExt
bool RetZExt
Definition: FastISel.h:72
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
MachineValueType.h
TargetLowering.h
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::FastISel::FuncInfo
FunctionLoweringInfo & FuncInfo
Definition: FastISel.h:202
llvm::FastISel::fastMaterializeConstant
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
Definition: FastISel.h:475
llvm::ISD::Constant
@ Constant
Definition: ISDOpcodes.h:76
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::FastISel::createResultReg
Register createResultReg(const TargetRegisterClass *RC)
Definition: FastISel.cpp:1896
llvm::User
Definition: User.h:44
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::FastISel::CallLoweringInfo::clearIns
void clearIns()
Definition: FastISel.h:194
InstrTypes.h
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3412
llvm::FastISel::CallLoweringInfo::CB
const CallBase * CB
Definition: FastISel.h:88
llvm::FastISel::LastLocalValue
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block.
Definition: FastISel.h:221
llvm::FastISel::leaveLocalValueArea
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
Definition: FastISel.cpp:441
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:45
llvm::FastISel::selectXRayTypedEvent
bool selectXRayTypedEvent(const CallInst *II)
Definition: FastISel.cpp:919
false
Definition: StackSlotColoring.cpp:141
llvm::MCInstrDesc
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:197
llvm::FastISel::fastEmit_
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
Definition: FastISel.cpp:1832
llvm::FastISel::MCP
MachineConstantPool & MCP
Definition: FastISel.h:206
llvm::Instruction
Definition: Instruction.h:42
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
llvm::FastISel::selectStackmap
bool selectStackmap(const CallInst *I)
Definition: FastISel.cpp:650
llvm::ConstantFP
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:257
llvm::FastISel::fastEmit_ri
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1852
llvm::FastISel::CallLoweringInfo::IsInReg
bool IsInReg
Definition: FastISel.h:74
llvm::FastISel::CallLoweringInfo::clearOuts
void clearOuts()
Definition: FastISel.h:188
DebugLoc.h
llvm::FastISel::MRI
MachineRegisterInfo & MRI
Definition: FastISel.h:204
llvm::FastISel::CallLoweringInfo::Call
MachineInstr * Call
Definition: FastISel.h:89
llvm::FastISel::createMachineMemOperandFor
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
Definition: FastISel.cpp:2268
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::CmpInst
This class is the base class for the comparison instructions.
Definition: InstrTypes.h:709
llvm::FastISel::fastLowerIntrinsicCall
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering.
Definition: FastISel.cpp:1828
llvm::FastISel::fastMaterializeAlloca
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
Definition: FastISel.h:478
llvm::tgtok::In
@ In
Definition: TGLexer.h:51
llvm::FastISel::CallLoweringInfo::NumResultRegs
unsigned NumResultRegs
Definition: FastISel.h:91
llvm::FastISel::selectInstruction
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
Definition: FastISel.cpp:1477
llvm::FastISel::DbgLoc
DebugLoc DbgLoc
Definition: FastISel.h:207
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
uint64_t
llvm::FastISel::tryToFoldLoadIntoMI
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
Definition: FastISel.h:300
llvm::FastISel::fastLowerCall
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
Definition: FastISel.cpp:1826
llvm::FastISel::fastEmit_i
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1843
llvm::FastISel::fastEmitBranch
void fastEmitBranch(MachineBasicBlock *MSucc, const DebugLoc &DbgLoc)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor,...
Definition: FastISel.cpp:1561
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::FastISel::CallLoweringInfo::getArgs
ArgListTy & getArgs()
Definition: FastISel.h:186
llvm::FastISel::selectIntrinsicCall
bool selectIntrinsicCall(const IntrinsicInst *II)
Definition: FastISel.cpp:1193
llvm::DenseMap
Definition: DenseMap.h:716
llvm::MachineConstantPool
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
Definition: MachineConstantPool.h:117
llvm::FastISel::fastEmitInst_rri
Register fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, unsigned Op1, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
Definition: FastISel.cpp:2060
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::FastISel::CallLoweringInfo::Args
ArgListTy Args
Definition: FastISel.h:87
llvm::FastISel::CallLoweringInfo::IsReturnValueUsed
bool IsReturnValueUsed
Definition: FastISel.h:76
llvm::FastISel::CallLoweringInfo
Definition: FastISel.h:69
TemplateParamKind::Type
@ Type
llvm::FastISel::fastEmit_r
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1834
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
llvm::FunctionLoweringInfo
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
Definition: FunctionLoweringInfo.h:52
llvm::TargetLoweringBase::ArgListEntry
Definition: TargetLowering.h:282
llvm::FastISel::fastEmitInst_
Register fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
Definition: FastISel.cpp:1917
llvm::FastISel::fastLowerArguments
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
Definition: FastISel.cpp:1824
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
llvm::FastISel::CallLoweringInfo::IsTailCall
bool IsTailCall
Definition: FastISel.h:81
llvm::FastISel::ArgListTy
TargetLoweringBase::ArgListTy ArgListTy
Definition: FastISel.h:68
llvm::FastISel::CallLoweringInfo::NumFixedArgs
unsigned NumFixedArgs
Definition: FastISel.h:83
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::FastISel
This is a fast-path instruction selection class that generates poor code and doesn't support illegal ...
Definition: FastISel.h:65
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::CallingConv::C
@ C
C - The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
llvm::FastISel::selectOperator
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr),...
Definition: FastISel.cpp:1682
llvm::FastISel::CallLoweringInfo::IsVarArg
bool IsVarArg
Definition: FastISel.h:73
llvm::FastISel::LocalValueMap
DenseMap< const Value *, Register > LocalValueMap
Definition: FastISel.h:201
llvm::MachineBasicBlock::iterator
MachineInstrBundleIterator< MachineInstr > iterator
Definition: MachineBasicBlock.h:242
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::FastISel::canFoldAddIntoGEP
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
Definition: FastISel.cpp:2251
uint32_t
llvm::FastISel::shouldOptForSize
bool shouldOptForSize(const MachineFunction *MF) const
Definition: FastISel.h:522
llvm::FastISel::useInstrRefDebugInfo
void useInstrRefDebugInfo(bool Flag)
Signal whether instruction referencing variable locations are desired for this function's debug-info.
Definition: FastISel.h:324
llvm::FastISel::CallLoweringInfo::Symbol
MCSymbol * Symbol
Definition: FastISel.h:86
llvm::LoadInst
An instruction for reading from memory.
Definition: Instructions.h:173
llvm::FastISel::fastEmitInst_ri
Register fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
Definition: FastISel.cpp:1995
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::TargetLoweringBase::ArgListTy
std::vector< ArgListEntry > ArgListTy
Definition: TargetLowering.h:312
llvm::Function::hasOptSize
bool hasOptSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
Definition: Function.h:664
llvm::FastISel::CallLoweringInfo::setCallee
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, const Value *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:149
CallingConv.h
Attributes.h
llvm::FastISel::tryToFoldLoad
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We're checking to see if we can fold LI into FoldInst.
Definition: FastISel.cpp:2190
llvm::FastISel::getCurDebugLoc
DebugLoc getCurDebugLoc() const
Return current debug location information.
Definition: FastISel.h:250
llvm::FastISel::lowerCall
bool lowerCall(const CallInst *I)
Definition: FastISel.cpp:1114
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:622
llvm::FastISel::selectExtractValue
bool selectExtractValue(const User *U)
Definition: FastISel.cpp:1642
llvm::FastISel::CallLoweringInfo::OutRegs
SmallVector< Register, 16 > OutRegs
Definition: FastISel.h:95
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:345
llvm::FastISel::selectFNeg
bool selectFNeg(const User *I, const Value *In)
Emit an FNeg operation.
Definition: FastISel.cpp:1600
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::TargetLibraryInfo
Provides information about what library functions are available for the current target.
Definition: TargetLibraryInfo.h:222
llvm::FastISel::CallLoweringInfo::RetTy
Type * RetTy
Definition: FastISel.h:70
llvm::FastISel::selectXRayCustomEvent
bool selectXRayCustomEvent(const CallInst *II)
Definition: FastISel.cpp:900
llvm::FastISel::SkipTargetIndependentISel
bool SkipTargetIndependentISel
Definition: FastISel.h:214
llvm::IntrinsicInst
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:46
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:83
llvm::RISCVMatInt::Imm
@ Imm
Definition: RISCVMatInt.h:23
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:105
llvm::FastISel::CallLoweringInfo::Ins
SmallVector< ISD::InputArg, 4 > Ins
Definition: FastISel.h:96
llvm::FastISel::selectGetElementPtr
bool selectGetElementPtr(const User *I)
Definition: FastISel.cpp:537
llvm::FastISel::setLastLocalValue
void setLastLocalValue(MachineInstr *I)
Update the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:237
llvm::FastISel::UseInstrRefDebugInfo
bool UseInstrRefDebugInfo
Definition: FastISel.h:215
SmallVector.h
llvm::FastISel::MF
MachineFunction * MF
Definition: FastISel.h:203
llvm::FastISel::fastEmitInst_rrr
Register fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, unsigned Op1, unsigned Op2)
Emit a MachineInstr with three register operands and a result register in the given register class.
Definition: FastISel.cpp:1969
llvm::FastISel::removeDeadCode
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
Definition: FastISel.cpp:415
llvm::FastISel::CallLoweringInfo::IsPatchPoint
bool IsPatchPoint
Definition: FastISel.h:77
llvm::FastISel::CallLoweringInfo::setTailCall
CallLoweringInfo & setTailCall(bool Value=true)
Definition: FastISel.h:176
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::CallBase
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Definition: InstrTypes.h:1174
DerivedTypes.h
llvm::FastISel::CallLoweringInfo::DoesNotReturn
bool DoesNotReturn
Definition: FastISel.h:75
llvm::CallInst
This class represents a function call, abstracting a target machine's calling convention.
Definition: Instructions.h:1461
llvm::FastISel::TRI
const TargetRegisterInfo & TRI
Definition: FastISel.h:212
llvm::FastISel::selectCall
bool selectCall(const User *I)
Definition: FastISel.cpp:1156
GEP
Hexagon Common GEP
Definition: HexagonCommonGEP.cpp:171
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::AllocaInst
an instruction to allocate memory on the stack
Definition: Instructions.h:58
llvm::FastISel::optimizeCmpPredicate
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
Definition: FastISel.cpp:2315
llvm::FastISel::CallLoweringInfo::setCallee
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, const CallBase &Call)
Definition: FastISel.h:103
llvm::FastISel::selectBitCast
bool selectBitCast(const User *I)
Definition: FastISel.cpp:1408
llvm::FastISel::TII
const TargetInstrInfo & TII
Definition: FastISel.h:210
llvm::FastISel::fastEmitInst_extractsubreg
Register fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
Definition: FastISel.cpp:2101
llvm::FastISel::fastMaterializeFloatZero
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic.
Definition: FastISel.h:482
llvm::FastISel::EmitStartPt
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
Definition: FastISel.h:226
llvm::FastISel::lookUpRegForValue
Register lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
Definition: FastISel.cpp:351
llvm::FastISel::finishCondBranch
void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB)
Emit an unconditional branch to FalseMBB, obtains the branch weight and adds TrueMBB and FalseMBB to ...
Definition: FastISel.cpp:1581
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::FastISel::fastEmitInst_rr
Register fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, unsigned Op1)
Emit a MachineInstr with two register operands and a result register in the given register class.
Definition: FastISel.cpp:1946
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::FastISel::DL
const DataLayout & DL
Definition: FastISel.h:209
llvm::FastISel::selectBinaryOp
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
Definition: FastISel.cpp:449
llvm::FastISel::recomputeInsertPt
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
Definition: FastISel.cpp:401
llvm::FastISel::startNewBlock
void startNewBlock()
Set the current block to which generated machine instructions will be appended.
Definition: FastISel.cpp:123
llvm::FastISel::TM
const TargetMachine & TM
Definition: FastISel.h:208
llvm::ISD::MCSymbol
@ MCSymbol
Definition: ISDOpcodes.h:172
llvm::FastISel::constrainOperandRegClass
Register constrainOperandRegClass(const MCInstrDesc &II, Register Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
Definition: FastISel.cpp:1900
llvm::FastISel::fastEmitInst_r
Register fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0)
Emit a MachineInstr with one register operand and a result register in the given register class.
Definition: FastISel.cpp:1926
llvm::FastISel::fastEmitInst_i
Register fastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
Definition: FastISel.cpp:2085
llvm::FunctionType
Class to represent function types.
Definition: DerivedTypes.h:103