#include "MCTargetDesc/MipsMCTargetDesc.h"#include "Mips.h"#include "TargetInfo/MipsTargetInfo.h"#include "llvm/ADT/ArrayRef.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCDisassembler/MCDisassembler.h"#include "llvm/MC/MCFixedLenDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCRegisterInfo.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/TargetRegistry.h"#include "llvm/Support/raw_ostream.h"#include <cassert>#include <cstdint>#include "MipsGenDisassemblerTables.inc"
Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "mips-disassembler" |
Typedefs | |
| using | DecodeStatus = MCDisassembler::DecodeStatus |
Functions | |
| static DecodeStatus | DecodeGPR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCPU16RegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRMM16RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRMM16ZeroRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRMM16MovePRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePtrRegisterClass (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDSPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCCRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFCCRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGRCCRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeHWRegsRegisterClass (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAFGR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeACC64DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeHI32DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLO32DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128BRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128HRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128WRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128DRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSACtrlRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCOP0RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCOP2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget1SImm16 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeJumpTarget (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget21 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget21MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget26 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget7MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget10MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTargetMM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget26MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeJumpTargetMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeJumpTargetXMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemEVA (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLoadByte15 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCacheOp (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCacheeOp_CacheOpR6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCacheOpMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePrefeOpMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSyncI (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSyncI_MM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSynciR6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128Mem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm4 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMSPImm5Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMGPImm7Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMReglistImm4Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm9 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm12 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm16 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMemMMR2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem3 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMemCop2R6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMemCop2MMR6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSpecial3LlSc (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAddiur2Simm7 (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLi16Imm (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePOOL16BEncodedField (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| template<unsigned Bits, int Offset, int Scale> | |
| static DecodeStatus | DecodeUImmWithOffsetAndScale (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| template<unsigned Bits, int Offset> | |
| static DecodeStatus | DecodeUImmWithOffset (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| template<unsigned Bits, int Offset = 0, int ScaleBy = 1> | |
| static DecodeStatus | DecodeSImmWithOffsetAndScale (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeInsSize (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm19Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm18Lsl3 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm9SP (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeANDI16Imm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm23Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeINSVE_DF (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| INSVE_[BHWD] have an implicit operand that the generated decoder doesn't handle. More... | |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDAHIDATIMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDAHIDATI (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeAddiGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodePOP35GroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDaddiGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodePOP37GroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodePOP65GroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodePOP75GroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezlGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzlGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzGroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezGroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDINS (MCInst &MI, InsnType Insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDEXT (MCInst &MI, InsnType Insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeCRC (MCInst &MI, InsnType Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeRegListOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeRegListOperand16 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMovePRegPair (MCInst &Inst, unsigned RegPair, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMovePOperands (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static MCDisassembler * | createMipsDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| static MCDisassembler * | createMipselDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| LLVM_EXTERNAL_VISIBILITY void | LLVMInitializeMipsDisassembler () |
| static unsigned | getReg (const void *D, unsigned RC, unsigned RegNo) |
| static DecodeStatus | readInstruction16 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsBigEndian) |
| Read two bytes from the ArrayRef and return 16 bit halfword sorted according to the given endianness. More... | |
| static DecodeStatus | readInstruction32 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsBigEndian, bool IsMicroMips) |
| Read four bytes from the ArrayRef and return 32 bit word sorted according to the given endianness. More... | |
Macro Definition Documentation
◆ DEBUG_TYPE
| #define DEBUG_TYPE "mips-disassembler" |
Definition at line 34 of file MipsDisassembler.cpp.
Typedef Documentation
◆ DecodeStatus
Definition at line 36 of file MipsDisassembler.cpp.
Function Documentation
◆ createMipsDisassembler()
|
static |
Definition at line 552 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
◆ createMipselDisassembler()
|
static |
Definition at line 559 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
◆ DecodeACC64DSPRegisterClass()
|
static |
Definition at line 2090 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeAddiGroupBranch()
|
static |
Definition at line 662 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodeAddiur2Simm7()
|
static |
Definition at line 2322 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeAFGR64RegisterClass()
|
static |
Definition at line 2078 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeANDI16Imm()
|
static |
Definition at line 2412 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeBgtzGroupBranch()
|
static |
Definition at line 973 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodeBgtzGroupBranchMMR6()
|
static |
Definition at line 2550 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodeBgtzlGroupBranch()
|
static |
Definition at line 929 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodeBlezGroupBranch()
|
static |
Definition at line 1022 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodeBlezGroupBranchMMR6()
|
static |
Definition at line 2599 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodeBlezlGroupBranch()
|
static |
Definition at line 886 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget()
|
static |
Definition at line 2210 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget10MM()
|
static |
Definition at line 2276 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget1SImm16()
|
static |
Definition at line 2219 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget21()
|
static |
Definition at line 2237 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget21MM()
|
static |
Definition at line 2247 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget26()
|
static |
Definition at line 2257 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget26MM()
|
static |
Definition at line 2294 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget7MM()
|
static |
Definition at line 2267 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeBranchTargetMM()
|
static |
Definition at line 2285 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeCacheeOp_CacheOpR6()
|
static |
Definition at line 1644 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeCacheOp()
|
static |
Definition at line 1593 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeCacheOpMM()
|
static |
Definition at line 1610 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeCCRRegisterClass()
|
static |
Definition at line 1499 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeCOP0RegisterClass()
|
static |
Definition at line 2186 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeCOP2RegisterClass()
|
static |
Definition at line 2198 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeCPU16RegsRegisterClass()
|
static |
Definition at line 1395 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail.
◆ DecodeCRC()
|
static |
Definition at line 1150 of file MipsDisassembler.cpp.
References llvm::MCOperand::createReg(), getReg(), MI, and llvm::MCDisassembler::Success.
◆ DecodeDaddiGroupBranch()
|
static |
Definition at line 735 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodeDAHIDATI()
|
static |
Definition at line 648 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), MI, and llvm::MCDisassembler::Success.
◆ DecodeDAHIDATIMMR6()
|
static |
Definition at line 634 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), MI, and llvm::MCDisassembler::Success.
◆ DecodeDEXT()
|
static |
Definition at line 1066 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm_unreachable, MI, llvm::Check::Size, and llvm::MCDisassembler::Success.
◆ DecodeDINS()
|
static |
Definition at line 1108 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm_unreachable, MI, llvm::Check::Size, and llvm::MCDisassembler::Success.
◆ DecodeDSPRRegisterClass()
|
static |
Definition at line 1468 of file MipsDisassembler.cpp.
References llvm::Address, and DecodeGPR32RegisterClass().
◆ DecodeFCCRegisterClass()
|
static |
Definition at line 1510 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFGR32RegisterClass()
|
static |
Definition at line 1487 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFGR64RegisterClass()
|
static |
Definition at line 1475 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFGRCCRegisterClass()
|
static |
Definition at line 1521 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMem()
|
static |
Definition at line 1939 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMem2()
|
static |
Definition at line 1975 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMem3()
|
static |
Definition at line 1993 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMemCop2MMR6()
|
static |
Definition at line 2029 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMemCop2R6()
|
static |
Definition at line 2011 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMemMMR2()
|
static |
Definition at line 1957 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeGPR32RegisterClass()
|
static |
Definition at line 1447 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeDSPRRegisterClass(), and DecodePtrRegisterClass().
◆ DecodeGPR64RegisterClass()
|
static |
Definition at line 1402 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodePtrRegisterClass().
◆ DecodeGPRMM16MovePRegisterClass()
|
static |
Definition at line 1436 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeMovePOperands().
◆ DecodeGPRMM16RegisterClass()
|
static |
Definition at line 1414 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMImm4().
◆ DecodeGPRMM16ZeroRegisterClass()
|
static |
Definition at line 1425 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMImm4().
◆ DecodeHI32DSPRegisterClass()
|
static |
Definition at line 2102 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeHWRegsRegisterClass()
|
static |
Definition at line 2067 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
◆ DecodeInsSize()
|
static |
Definition at line 2373 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), int, llvm::Check::Size, and llvm::MCDisassembler::Success.
◆ DecodeINSVE_DF()
|
static |
INSVE_[BHWD] have an implicit operand that the generated decoder doesn't handle.
Definition at line 587 of file MipsDisassembler.cpp.
References llvm::Address, assert(), llvm::MCOperand::createImm(), DecodeMSA128BRegisterClass(), DecodeMSA128DRegisterClass(), DecodeMSA128HRegisterClass(), DecodeMSA128WRegisterClass(), llvm::MCDisassembler::Fail, llvm_unreachable, MI, and llvm::MCDisassembler::Success.
◆ DecodeJumpTarget()
|
static |
Definition at line 2228 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeJumpTargetMM()
|
static |
Definition at line 2304 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeJumpTargetXMM()
|
static |
Definition at line 2313 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeLi16Imm()
|
static |
Definition at line 2335 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeLO32DSPRegisterClass()
|
static |
Definition at line 2114 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeLoadByte15()
|
static |
Definition at line 1575 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMem()
|
static |
Definition at line 1532 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), Offset, Reg, llvm::PPCISD::SC, and llvm::MCDisassembler::Success.
◆ DecodeMemEVA()
|
static |
Definition at line 1554 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMGPImm7Lsl2()
|
static |
Definition at line 1824 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMImm12()
|
static |
Definition at line 1886 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeRegListOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), getReg(), LLVM_FALLTHROUGH, Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMImm16()
|
static |
Definition at line 1921 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMImm4()
|
static |
Definition at line 1750 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), DecodeGPRMM16RegisterClass(), DecodeGPRMM16ZeroRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMImm9()
|
static |
Definition at line 1865 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMReglistImm4Lsl2()
|
static |
Definition at line 1840 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeRegListOperand16(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeMemMMSPImm5Lsl2()
|
static |
Definition at line 1808 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMovePOperands()
|
static |
Definition at line 2475 of file MipsDisassembler.cpp.
References llvm::Address, DecodeGPRMM16MovePRegisterClass(), DecodeMovePRegPair(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
◆ DecodeMovePRegPair()
|
static |
Definition at line 2501 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeMovePOperands().
◆ DecodeMSA128BRegisterClass()
|
static |
Definition at line 2126 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
◆ DecodeMSA128DRegisterClass()
|
static |
Definition at line 2162 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
◆ DecodeMSA128HRegisterClass()
|
static |
Definition at line 2138 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
◆ DecodeMSA128Mem()
|
static |
Definition at line 1704 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), getReg(), Offset, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMSA128WRegisterClass()
|
static |
Definition at line 2150 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
◆ DecodeMSACtrlRegisterClass()
|
static |
Definition at line 2174 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodePOOL16BEncodedField()
|
static |
Definition at line 2346 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodePOP35GroupBranchMMR6()
|
static |
Definition at line 701 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodePOP37GroupBranchMMR6()
|
static |
Definition at line 774 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodePOP65GroupBranchMMR6()
|
static |
Definition at line 808 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodePOP75GroupBranchMMR6()
|
static |
Definition at line 847 of file MipsDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
◆ DecodePrefeOpMM()
|
static |
Definition at line 1627 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, and llvm::MCDisassembler::Success.
◆ DecodePtrRegisterClass()
|
static |
Definition at line 1458 of file MipsDisassembler.cpp.
References llvm::Address, DecodeGPR32RegisterClass(), and DecodeGPR64RegisterClass().
◆ DecodeRegListOperand()
|
static |
Definition at line 2422 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, i, RA, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMImm12().
◆ DecodeRegListOperand16()
|
static |
Definition at line 2451 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), i, RA, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMReglistImm4Lsl2().
◆ DecodeSimm18Lsl3()
|
static |
Definition at line 2392 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeSimm19Lsl2()
|
static |
Definition at line 2386 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeSimm23Lsl2()
|
static |
Definition at line 2543 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeSimm9SP()
|
static |
Definition at line 2398 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeSImmWithOffsetAndScale()
|
static |
Definition at line 2365 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeSpecial3LlSc()
|
static |
Definition at line 2045 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeSyncI()
|
static |
Definition at line 1661 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeSyncI_MM()
|
static |
Definition at line 1676 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Offset, and llvm::MCDisassembler::Success.
◆ DecodeSynciR6()
|
static |
Definition at line 1689 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
◆ DecodeUImmWithOffset()
|
static |
Definition at line 411 of file MipsDisassembler.cpp.
References llvm::Address.
◆ DecodeUImmWithOffsetAndScale()
|
static |
Definition at line 2355 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::tgtok::Bits, llvm::MCOperand::createImm(), Offset, and llvm::MCDisassembler::Success.
◆ getReg()
|
static |
Definition at line 580 of file MipsDisassembler.cpp.
References llvm::MCRegisterClass::begin(), D, and llvm::MCRegisterInfo::getRegClass().
Referenced by AddNodeIDCustom(), applyBuildVectorToDup(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineInsertVecElts(), applyExtractVecEltPairwiseAdd(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::HexagonFrameLowering::assignCalleeSavedSpillSlots(), llvm::CSEMIRBuilder::buildInstr(), llvm::PPCInstrInfo::canInsertSelect(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), canRenameUpToDef(), llvm::GISelKnownBits::computeKnownBitsImpl(), conversionLibcall(), DecodeACC64DSPRegisterClass(), DecodeAddiGroupBranch(), DecodeAFGR64RegisterClass(), DecodeBgtzGroupBranch(), DecodeBgtzGroupBranchMMR6(), DecodeBgtzlGroupBranch(), DecodeBlezGroupBranch(), DecodeBlezGroupBranchMMR6(), DecodeBlezlGroupBranch(), DecodeCacheeOp_CacheOpR6(), DecodeCacheOp(), DecodeCacheOpMM(), DecodeCCRRegisterClass(), DecodeCOP0RegisterClass(), DecodeCOP2RegisterClass(), DecodeCRC(), DecodeDaddiGroupBranch(), DecodeDAHIDATI(), DecodeDAHIDATIMMR6(), DecodeDEXT(), DecodeDINS(), DecodeFCCRegisterClass(), DecodeFGR32RegisterClass(), DecodeFGR64RegisterClass(), DecodeFGRCCRegisterClass(), DecodeFMem(), DecodeFMem2(), DecodeFMem3(), DecodeFMemCop2MMR6(), DecodeFMemCop2R6(), DecodeFMemMMR2(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPRMM16MovePRegisterClass(), DecodeGPRMM16RegisterClass(), DecodeGPRMM16ZeroRegisterClass(), DecodeHI32DSPRegisterClass(), DecodeLO32DSPRegisterClass(), DecodeLoadByte15(), DecodeMem(), DecodeMemEVA(), DecodeMemMMGPImm7Lsl2(), DecodeMemMMImm12(), DecodeMemMMImm16(), DecodeMemMMImm9(), DecodeMemMMSPImm5Lsl2(), DecodeMSA128BRegisterClass(), DecodeMSA128DRegisterClass(), DecodeMSA128HRegisterClass(), DecodeMSA128Mem(), DecodeMSA128WRegisterClass(), DecodeMSACtrlRegisterClass(), DecodePOP35GroupBranchMMR6(), DecodePOP37GroupBranchMMR6(), DecodePOP65GroupBranchMMR6(), DecodePOP75GroupBranchMMR6(), DecodePrefeOpMM(), DecodeSpecial3LlSc(), DecodeSyncI(), DecodeSyncI_MM(), DecodeSynciR6(), emitAlignedDPRCS2Restores(), llvm::AMDGPURegisterBankInfo::executeInWaterfallLoop(), llvm::SIInstrInfo::expandMovDPP64(), llvm::LegalizerHelper::fewerElementsVectorReductions(), getMaxCalleeSavedReg(), getUnderlyingArgRegs(), getVectorFCMP(), llvm::XCoreInstrInfo::insertBranch(), llvm::NVPTXInstrInfo::insertBranch(), llvm::HexagonInstrInfo::insertBranch(), llvm::PPCInstrInfo::insertBranch(), llvm::AArch64InstrInfo::insertSelect(), llvm::PPCInstrInfo::insertSelect(), llvm::MachineInstr::isConstantValuePHI(), llvm::AMDGPULegalizerInfo::legalizeAtomicCmpXChg(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerDIVREM(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::AArch64CallLowering::lowerReturn(), mayCombineMisaligned(), llvm::LegalizerHelper::narrowScalar(), llvm::ARMBaseInstrInfo::PredicateInstruction(), llvm::R600InstrInfo::PredicateInstruction(), llvm::PPCInstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::RegisterBankInfo::OperandsMapper::print(), llvm::PPCInstrInfo::reverseBranchCondition(), llvm::SystemZRegisterInfo::shouldCoalesce(), simpleLibcall(), and llvm::PPCInstrInfo::SubsumesPredicate().
◆ LLVMInitializeMipsDisassembler()
| LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsDisassembler | ( | ) |
Definition at line 566 of file MipsDisassembler.cpp.
References createMipsDisassembler(), createMipselDisassembler(), llvm::getTheMips64elTarget(), llvm::getTheMips64Target(), llvm::getTheMipselTarget(), llvm::getTheMipsTarget(), and llvm::TargetRegistry::RegisterMCDisassembler().
◆ readInstruction16()
|
static |
Read two bytes from the ArrayRef and return 16 bit halfword sorted according to the given endianness.
Definition at line 1165 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::Check::Size, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.
◆ readInstruction32()
|
static |
Read four bytes from the ArrayRef and return 32 bit word sorted according to the given endianness.
Definition at line 1185 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::Check::Size, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.
