LLVM 17.0.0git
MIRPrinter.cpp
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1//===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the class that prints out the LLVM IR and machine
10// functions using the MIR serialization format.
11//
12//===----------------------------------------------------------------------===//
13
15#include "llvm/ADT/DenseMap.h"
16#include "llvm/ADT/STLExtras.h"
20#include "llvm/ADT/StringRef.h"
37#include "llvm/IR/DebugLoc.h"
38#include "llvm/IR/Function.h"
41#include "llvm/IR/Module.h"
43#include "llvm/IR/Value.h"
44#include "llvm/MC/LaneBitmask.h"
49#include "llvm/Support/Format.h"
54#include <algorithm>
55#include <cassert>
56#include <cinttypes>
57#include <cstdint>
58#include <iterator>
59#include <string>
60#include <utility>
61#include <vector>
62
63using namespace llvm;
64
66 "simplify-mir", cl::Hidden,
67 cl::desc("Leave out unnecessary information when printing MIR"));
68
69static cl::opt<bool> PrintLocations("mir-debug-loc", cl::Hidden, cl::init(true),
70 cl::desc("Print MIR debug-locations"));
71
72namespace {
73
74/// This structure describes how to print out stack object references.
75struct FrameIndexOperand {
76 std::string Name;
77 unsigned ID;
78 bool IsFixed;
79
80 FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
81 : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
82
83 /// Return an ordinary stack object reference.
84 static FrameIndexOperand create(StringRef Name, unsigned ID) {
85 return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
86 }
87
88 /// Return a fixed stack object reference.
89 static FrameIndexOperand createFixed(unsigned ID) {
90 return FrameIndexOperand("", ID, /*IsFixed=*/true);
91 }
92};
93
94} // end anonymous namespace
95
96namespace llvm {
97
98/// This class prints out the machine functions using the MIR serialization
99/// format.
101 raw_ostream &OS;
103 /// Maps from stack object indices to operand indices which will be used when
104 /// printing frame index machine operands.
105 DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
106
107public:
108 MIRPrinter(raw_ostream &OS) : OS(OS) {}
109
110 void print(const MachineFunction &MF);
111
112 void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
113 const TargetRegisterInfo *TRI);
115 const MachineFrameInfo &MFI);
119 const MachineJumpTableInfo &JTI);
121 const MachineFunction &MF, ModuleSlotTracker &MST);
123 const MachineFunction &MF,
124 ModuleSlotTracker &MST);
126 const MachineFunction &MF,
128
129private:
130 void initRegisterMaskIds(const MachineFunction &MF);
131};
132
133/// This class prints out the machine instructions using the MIR serialization
134/// format.
136 raw_ostream &OS;
138 const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
139 const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
140 /// Synchronization scope names registered with LLVMContext.
142
143 bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
144 bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
145
146public:
148 const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
149 const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
150 : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
151 StackObjectOperandMapping(StackObjectOperandMapping) {}
152
153 void print(const MachineBasicBlock &MBB);
154
155 void print(const MachineInstr &MI);
156 void printStackObjectReference(int FrameIndex);
157 void print(const MachineInstr &MI, unsigned OpIdx,
159 bool ShouldPrintRegisterTies, LLT TypeToPrint,
160 bool PrintDef = true);
161};
162
163} // end namespace llvm
164
165namespace llvm {
166namespace yaml {
167
168/// This struct serializes the LLVM IR module.
169template <> struct BlockScalarTraits<Module> {
170 static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
171 Mod.print(OS, nullptr);
172 }
173
174 static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
175 llvm_unreachable("LLVM Module is supposed to be parsed separately");
176 return "";
177 }
178};
179
180} // end namespace yaml
181} // end namespace llvm
182
183static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
184 const TargetRegisterInfo *TRI) {
185 raw_string_ostream OS(Dest.Value);
186 OS << printReg(Reg, TRI);
187}
188
190 initRegisterMaskIds(MF);
191
193 YamlMF.Name = MF.getName();
194 YamlMF.Alignment = MF.getAlignment();
196 YamlMF.HasWinCFI = MF.hasWinCFI();
197
198 YamlMF.CallsEHReturn = MF.callsEHReturn();
199 YamlMF.CallsUnwindInit = MF.callsUnwindInit();
200 YamlMF.HasEHCatchret = MF.hasEHCatchret();
201 YamlMF.HasEHScopes = MF.hasEHScopes();
202 YamlMF.HasEHFunclets = MF.hasEHFunclets();
204
205 YamlMF.Legalized = MF.getProperties().hasProperty(
209 YamlMF.Selected = MF.getProperties().hasProperty(
217
218 convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
221 convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
222 convertStackObjects(YamlMF, MF, MST);
223 convertCallSiteObjects(YamlMF, MF, MST);
224 for (const auto &Sub : MF.DebugValueSubstitutions) {
225 const auto &SubSrc = Sub.Src;
226 const auto &SubDest = Sub.Dest;
227 YamlMF.DebugValueSubstitutions.push_back({SubSrc.first, SubSrc.second,
228 SubDest.first,
229 SubDest.second,
230 Sub.Subreg});
231 }
232 if (const auto *ConstantPool = MF.getConstantPool())
233 convert(YamlMF, *ConstantPool);
234 if (const auto *JumpTableInfo = MF.getJumpTableInfo())
235 convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
236
237 const TargetMachine &TM = MF.getTarget();
238 YamlMF.MachineFuncInfo =
239 std::unique_ptr<yaml::MachineFunctionInfo>(TM.convertFuncInfoToYAML(MF));
240
241 raw_string_ostream StrOS(YamlMF.Body.Value.Value);
242 bool IsNewlineNeeded = false;
243 for (const auto &MBB : MF) {
244 if (IsNewlineNeeded)
245 StrOS << "\n";
246 MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
247 .print(MBB);
248 IsNewlineNeeded = true;
249 }
250 StrOS.flush();
251 // Convert machine metadata collected during the print of the machine
252 // function.
253 convertMachineMetadataNodes(YamlMF, MF, MST);
254
255 yaml::Output Out(OS);
256 if (!SimplifyMIR)
257 Out.setWriteDefaultValues(true);
258 Out << YamlMF;
259}
260
261static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
262 const TargetRegisterInfo *TRI) {
263 assert(RegMask && "Can't print an empty register mask");
264 OS << StringRef("CustomRegMask(");
265
266 bool IsRegInRegMaskFound = false;
267 for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
268 // Check whether the register is asserted in regmask.
269 if (RegMask[I / 32] & (1u << (I % 32))) {
270 if (IsRegInRegMaskFound)
271 OS << ',';
272 OS << printReg(I, TRI);
273 IsRegInRegMaskFound = true;
274 }
275 }
276
277 OS << ')';
278}
279
280static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
282 const TargetRegisterInfo *TRI) {
283 raw_string_ostream OS(Dest.Value);
284 OS << printRegClassOrBank(Reg, RegInfo, TRI);
285}
286
287template <typename T>
288static void
290 T &Object, ModuleSlotTracker &MST) {
291 std::array<std::string *, 3> Outputs{{&Object.DebugVar.Value,
292 &Object.DebugExpr.Value,
293 &Object.DebugLoc.Value}};
294 std::array<const Metadata *, 3> Metas{{DebugVar.Var,
295 DebugVar.Expr,
296 DebugVar.Loc}};
297 for (unsigned i = 0; i < 3; ++i) {
298 raw_string_ostream StrOS(*Outputs[i]);
299 Metas[i]->printAsOperand(StrOS, MST);
300 }
301}
302
304 const MachineRegisterInfo &RegInfo,
305 const TargetRegisterInfo *TRI) {
306 MF.TracksRegLiveness = RegInfo.tracksLiveness();
307
308 // Print the virtual register definitions.
309 for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
312 VReg.ID = I;
313 if (RegInfo.getVRegName(Reg) != "")
314 continue;
315 ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
316 Register PreferredReg = RegInfo.getSimpleHint(Reg);
317 if (PreferredReg)
318 printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
319 MF.VirtualRegisters.push_back(VReg);
320 }
321
322 // Print the live ins.
323 for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
325 printRegMIR(LI.first, LiveIn.Register, TRI);
326 if (LI.second)
327 printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
328 MF.LiveIns.push_back(LiveIn);
329 }
330
331 // Prints the callee saved registers.
332 if (RegInfo.isUpdatedCSRsInitialized()) {
333 const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
334 std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
335 for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
337 printRegMIR(*I, Reg, TRI);
338 CalleeSavedRegisters.push_back(Reg);
339 }
340 MF.CalleeSavedRegisters = CalleeSavedRegisters;
341 }
342}
343
345 yaml::MachineFrameInfo &YamlMFI,
346 const MachineFrameInfo &MFI) {
349 YamlMFI.HasStackMap = MFI.hasStackMap();
350 YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
351 YamlMFI.StackSize = MFI.getStackSize();
353 YamlMFI.MaxAlignment = MFI.getMaxAlign().value();
354 YamlMFI.AdjustsStack = MFI.adjustsStack();
355 YamlMFI.HasCalls = MFI.hasCalls();
357 ? MFI.getMaxCallFrameSize() : ~0u;
361 YamlMFI.HasVAStart = MFI.hasVAStart();
363 YamlMFI.HasTailCall = MFI.hasTailCall();
364 YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
365 if (MFI.getSavePoint()) {
366 raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
367 StrOS << printMBBReference(*MFI.getSavePoint());
368 }
369 if (MFI.getRestorePoint()) {
371 StrOS << printMBBReference(*MFI.getRestorePoint());
372 }
373}
374
376 const MachineFunction &MF,
377 ModuleSlotTracker &MST) {
378 const MachineFrameInfo &MFI = MF.getFrameInfo();
380
381 // Process fixed stack objects.
382 assert(YMF.FixedStackObjects.empty());
383 SmallVector<int, 32> FixedStackObjectsIdx;
384 const int BeginIdx = MFI.getObjectIndexBegin();
385 if (BeginIdx < 0)
386 FixedStackObjectsIdx.reserve(-BeginIdx);
387
388 unsigned ID = 0;
389 for (int I = BeginIdx; I < 0; ++I, ++ID) {
390 FixedStackObjectsIdx.push_back(-1); // Fill index for possible dead.
391 if (MFI.isDeadObjectIndex(I))
392 continue;
393
395 YamlObject.ID = ID;
396 YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
399 YamlObject.Offset = MFI.getObjectOffset(I);
400 YamlObject.Size = MFI.getObjectSize(I);
401 YamlObject.Alignment = MFI.getObjectAlign(I);
402 YamlObject.StackID = (TargetStackID::Value)MFI.getStackID(I);
403 YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
404 YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
405 // Save the ID' position in FixedStackObjects storage vector.
406 FixedStackObjectsIdx[ID] = YMF.FixedStackObjects.size();
407 YMF.FixedStackObjects.push_back(YamlObject);
408 StackObjectOperandMapping.insert(
409 std::make_pair(I, FrameIndexOperand::createFixed(ID)));
410 }
411
412 // Process ordinary stack objects.
413 assert(YMF.StackObjects.empty());
414 SmallVector<unsigned, 32> StackObjectsIdx;
415 const int EndIdx = MFI.getObjectIndexEnd();
416 if (EndIdx > 0)
417 StackObjectsIdx.reserve(EndIdx);
418 ID = 0;
419 for (int I = 0; I < EndIdx; ++I, ++ID) {
420 StackObjectsIdx.push_back(-1); // Fill index for possible dead.
421 if (MFI.isDeadObjectIndex(I))
422 continue;
423
424 yaml::MachineStackObject YamlObject;
425 YamlObject.ID = ID;
426 if (const auto *Alloca = MFI.getObjectAllocation(I))
427 YamlObject.Name.Value = std::string(
428 Alloca->hasName() ? Alloca->getName() : "");
429 YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
434 YamlObject.Offset = MFI.getObjectOffset(I);
435 YamlObject.Size = MFI.getObjectSize(I);
436 YamlObject.Alignment = MFI.getObjectAlign(I);
437 YamlObject.StackID = (TargetStackID::Value)MFI.getStackID(I);
438
439 // Save the ID' position in StackObjects storage vector.
440 StackObjectsIdx[ID] = YMF.StackObjects.size();
441 YMF.StackObjects.push_back(YamlObject);
442 StackObjectOperandMapping.insert(std::make_pair(
443 I, FrameIndexOperand::create(YamlObject.Name.Value, ID)));
444 }
445
446 for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
447 const int FrameIdx = CSInfo.getFrameIdx();
448 if (!CSInfo.isSpilledToReg() && MFI.isDeadObjectIndex(FrameIdx))
449 continue;
450
452 printRegMIR(CSInfo.getReg(), Reg, TRI);
453 if (!CSInfo.isSpilledToReg()) {
454 assert(FrameIdx >= MFI.getObjectIndexBegin() &&
455 FrameIdx < MFI.getObjectIndexEnd() &&
456 "Invalid stack object index");
457 if (FrameIdx < 0) { // Negative index means fixed objects.
458 auto &Object =
460 [FixedStackObjectsIdx[FrameIdx + MFI.getNumFixedObjects()]];
461 Object.CalleeSavedRegister = Reg;
462 Object.CalleeSavedRestored = CSInfo.isRestored();
463 } else {
464 auto &Object = YMF.StackObjects[StackObjectsIdx[FrameIdx]];
465 Object.CalleeSavedRegister = Reg;
466 Object.CalleeSavedRestored = CSInfo.isRestored();
467 }
468 }
469 }
470 for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
471 auto LocalObject = MFI.getLocalFrameObjectMap(I);
472 assert(LocalObject.first >= 0 && "Expected a locally mapped stack object");
473 YMF.StackObjects[StackObjectsIdx[LocalObject.first]].LocalOffset =
474 LocalObject.second;
475 }
476
477 // Print the stack object references in the frame information class after
478 // converting the stack objects.
479 if (MFI.hasStackProtectorIndex()) {
481 MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
483 }
484
485 if (MFI.hasFunctionContextIndex()) {
487 MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
489 }
490
491 // Print the debug variable information.
492 for (const MachineFunction::VariableDbgInfo &DebugVar :
493 MF.getVariableDbgInfo()) {
494 assert(DebugVar.Slot >= MFI.getObjectIndexBegin() &&
495 DebugVar.Slot < MFI.getObjectIndexEnd() &&
496 "Invalid stack object index");
497 if (DebugVar.Slot < 0) { // Negative index means fixed objects.
498 auto &Object =
499 YMF.FixedStackObjects[FixedStackObjectsIdx[DebugVar.Slot +
500 MFI.getNumFixedObjects()]];
501 printStackObjectDbgInfo(DebugVar, Object, MST);
502 } else {
503 auto &Object = YMF.StackObjects[StackObjectsIdx[DebugVar.Slot]];
504 printStackObjectDbgInfo(DebugVar, Object, MST);
505 }
506 }
507}
508
510 const MachineFunction &MF,
511 ModuleSlotTracker &MST) {
512 const auto *TRI = MF.getSubtarget().getRegisterInfo();
513 for (auto CSInfo : MF.getCallSitesInfo()) {
514 yaml::CallSiteInfo YmlCS;
516
517 // Prepare instruction position.
518 MachineBasicBlock::const_instr_iterator CallI = CSInfo.first->getIterator();
519 CallLocation.BlockNum = CallI->getParent()->getNumber();
520 // Get call instruction offset from the beginning of block.
521 CallLocation.Offset =
522 std::distance(CallI->getParent()->instr_begin(), CallI);
523 YmlCS.CallLocation = CallLocation;
524 // Construct call arguments and theirs forwarding register info.
525 for (auto ArgReg : CSInfo.second) {
527 YmlArgReg.ArgNo = ArgReg.ArgNo;
528 printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI);
529 YmlCS.ArgForwardingRegs.emplace_back(YmlArgReg);
530 }
531 YMF.CallSitesInfo.push_back(YmlCS);
532 }
533
534 // Sort call info by position of call instructions.
535 llvm::sort(YMF.CallSitesInfo.begin(), YMF.CallSitesInfo.end(),
537 if (A.CallLocation.BlockNum == B.CallLocation.BlockNum)
538 return A.CallLocation.Offset < B.CallLocation.Offset;
539 return A.CallLocation.BlockNum < B.CallLocation.BlockNum;
540 });
541}
542
544 const MachineFunction &MF,
547 MST.collectMachineMDNodes(MDList);
548 for (auto &MD : MDList) {
549 std::string NS;
550 raw_string_ostream StrOS(NS);
551 MD.second->print(StrOS, MST, MF.getFunction().getParent());
552 YMF.MachineMetadataNodes.push_back(StrOS.str());
553 }
554}
555
558 unsigned ID = 0;
559 for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
560 std::string Str;
561 raw_string_ostream StrOS(Str);
562 if (Constant.isMachineConstantPoolEntry()) {
563 Constant.Val.MachineCPVal->print(StrOS);
564 } else {
565 Constant.Val.ConstVal->printAsOperand(StrOS);
566 }
567
569 YamlConstant.ID = ID++;
570 YamlConstant.Value = StrOS.str();
571 YamlConstant.Alignment = Constant.getAlign();
572 YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
573
574 MF.Constants.push_back(YamlConstant);
575 }
576}
577
579 yaml::MachineJumpTable &YamlJTI,
580 const MachineJumpTableInfo &JTI) {
581 YamlJTI.Kind = JTI.getEntryKind();
582 unsigned ID = 0;
583 for (const auto &Table : JTI.getJumpTables()) {
584 std::string Str;
586 Entry.ID = ID++;
587 for (const auto *MBB : Table.MBBs) {
588 raw_string_ostream StrOS(Str);
589 StrOS << printMBBReference(*MBB);
590 Entry.Blocks.push_back(StrOS.str());
591 Str.clear();
592 }
593 YamlJTI.Entries.push_back(Entry);
594 }
595}
596
597void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
598 const auto *TRI = MF.getSubtarget().getRegisterInfo();
599 unsigned I = 0;
600 for (const uint32_t *Mask : TRI->getRegMasks())
601 RegisterMaskIds.insert(std::make_pair(Mask, I++));
602}
603
606 bool &IsFallthrough) {
608
609 for (const MachineInstr &MI : MBB) {
610 if (MI.isPHI())
611 continue;
612 for (const MachineOperand &MO : MI.operands()) {
613 if (!MO.isMBB())
614 continue;
615 MachineBasicBlock *Succ = MO.getMBB();
616 auto RP = Seen.insert(Succ);
617 if (RP.second)
618 Result.push_back(Succ);
619 }
620 }
622 IsFallthrough = I == MBB.end() || !I->isBarrier();
623}
624
625bool
626MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
627 if (MBB.succ_size() <= 1)
628 return true;
630 return true;
631
632 SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
633 MBB.Probs.end());
635 Normalized.end());
636 SmallVector<BranchProbability,8> Equal(Normalized.size());
637 BranchProbability::normalizeProbabilities(Equal.begin(), Equal.end());
638
639 return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
640}
641
642bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
644 bool GuessedFallthrough;
645 guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
646 if (GuessedFallthrough) {
647 const MachineFunction &MF = *MBB.getParent();
649 if (NextI != MF.end()) {
650 MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
651 if (!is_contained(GuessedSuccs, Next))
652 GuessedSuccs.push_back(Next);
653 }
654 }
655 if (GuessedSuccs.size() != MBB.succ_size())
656 return false;
657 return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
658}
659
661 assert(MBB.getNumber() >= 0 && "Invalid MBB number");
662 MBB.printName(OS,
665 &MST);
666 OS << ":\n";
667
668 bool HasLineAttributes = false;
669 // Print the successors
670 bool canPredictProbs = canPredictBranchProbabilities(MBB);
671 // Even if the list of successors is empty, if we cannot guess it,
672 // we need to print it to tell the parser that the list is empty.
673 // This is needed, because MI model unreachable as empty blocks
674 // with an empty successor list. If the parser would see that
675 // without the successor list, it would guess the code would
676 // fallthrough.
677 if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
678 !canPredictSuccessors(MBB)) {
679 OS.indent(2) << "successors: ";
680 for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
681 if (I != MBB.succ_begin())
682 OS << ", ";
683 OS << printMBBReference(**I);
684 if (!SimplifyMIR || !canPredictProbs)
685 OS << '('
686 << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
687 << ')';
688 }
689 OS << "\n";
690 HasLineAttributes = true;
691 }
692
693 // Print the live in registers.
695 if (!MBB.livein_empty()) {
696 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
697 OS.indent(2) << "liveins: ";
698 bool First = true;
699 for (const auto &LI : MBB.liveins_dbg()) {
700 if (!First)
701 OS << ", ";
702 First = false;
703 OS << printReg(LI.PhysReg, &TRI);
704 if (!LI.LaneMask.all())
705 OS << ":0x" << PrintLaneMask(LI.LaneMask);
706 }
707 OS << "\n";
708 HasLineAttributes = true;
709 }
710
711 if (HasLineAttributes)
712 OS << "\n";
713 bool IsInBundle = false;
714 for (auto I = MBB.instr_begin(), E = MBB.instr_end(); I != E; ++I) {
715 const MachineInstr &MI = *I;
716 if (IsInBundle && !MI.isInsideBundle()) {
717 OS.indent(2) << "}\n";
718 IsInBundle = false;
719 }
720 OS.indent(IsInBundle ? 4 : 2);
721 print(MI);
722 if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
723 OS << " {";
724 IsInBundle = true;
725 }
726 OS << "\n";
727 }
728 if (IsInBundle)
729 OS.indent(2) << "}\n";
730}
731
733 const auto *MF = MI.getMF();
734 const auto &MRI = MF->getRegInfo();
735 const auto &SubTarget = MF->getSubtarget();
736 const auto *TRI = SubTarget.getRegisterInfo();
737 assert(TRI && "Expected target register info");
738 const auto *TII = SubTarget.getInstrInfo();
739 assert(TII && "Expected target instruction info");
740 if (MI.isCFIInstruction())
741 assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
742
743 SmallBitVector PrintedTypes(8);
744 bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
745 unsigned I = 0, E = MI.getNumOperands();
746 for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
747 !MI.getOperand(I).isImplicit();
748 ++I) {
749 if (I)
750 OS << ", ";
751 print(MI, I, TRI, TII, ShouldPrintRegisterTies,
752 MI.getTypeToPrint(I, PrintedTypes, MRI),
753 /*PrintDef=*/false);
754 }
755
756 if (I)
757 OS << " = ";
758 if (MI.getFlag(MachineInstr::FrameSetup))
759 OS << "frame-setup ";
760 if (MI.getFlag(MachineInstr::FrameDestroy))
761 OS << "frame-destroy ";
762 if (MI.getFlag(MachineInstr::FmNoNans))
763 OS << "nnan ";
764 if (MI.getFlag(MachineInstr::FmNoInfs))
765 OS << "ninf ";
766 if (MI.getFlag(MachineInstr::FmNsz))
767 OS << "nsz ";
768 if (MI.getFlag(MachineInstr::FmArcp))
769 OS << "arcp ";
770 if (MI.getFlag(MachineInstr::FmContract))
771 OS << "contract ";
772 if (MI.getFlag(MachineInstr::FmAfn))
773 OS << "afn ";
774 if (MI.getFlag(MachineInstr::FmReassoc))
775 OS << "reassoc ";
776 if (MI.getFlag(MachineInstr::NoUWrap))
777 OS << "nuw ";
778 if (MI.getFlag(MachineInstr::NoSWrap))
779 OS << "nsw ";
780 if (MI.getFlag(MachineInstr::IsExact))
781 OS << "exact ";
782 if (MI.getFlag(MachineInstr::NoFPExcept))
783 OS << "nofpexcept ";
784 if (MI.getFlag(MachineInstr::NoMerge))
785 OS << "nomerge ";
786
787 OS << TII->getName(MI.getOpcode());
788 if (I < E)
789 OS << ' ';
790
791 bool NeedComma = false;
792 for (; I < E; ++I) {
793 if (NeedComma)
794 OS << ", ";
795 print(MI, I, TRI, TII, ShouldPrintRegisterTies,
796 MI.getTypeToPrint(I, PrintedTypes, MRI));
797 NeedComma = true;
798 }
799
800 // Print any optional symbols attached to this instruction as-if they were
801 // operands.
802 if (MCSymbol *PreInstrSymbol = MI.getPreInstrSymbol()) {
803 if (NeedComma)
804 OS << ',';
805 OS << " pre-instr-symbol ";
806 MachineOperand::printSymbol(OS, *PreInstrSymbol);
807 NeedComma = true;
808 }
809 if (MCSymbol *PostInstrSymbol = MI.getPostInstrSymbol()) {
810 if (NeedComma)
811 OS << ',';
812 OS << " post-instr-symbol ";
813 MachineOperand::printSymbol(OS, *PostInstrSymbol);
814 NeedComma = true;
815 }
816 if (MDNode *HeapAllocMarker = MI.getHeapAllocMarker()) {
817 if (NeedComma)
818 OS << ',';
819 OS << " heap-alloc-marker ";
820 HeapAllocMarker->printAsOperand(OS, MST);
821 NeedComma = true;
822 }
823 if (MDNode *PCSections = MI.getPCSections()) {
824 if (NeedComma)
825 OS << ',';
826 OS << " pcsections ";
827 PCSections->printAsOperand(OS, MST);
828 NeedComma = true;
829 }
830 if (uint32_t CFIType = MI.getCFIType()) {
831 if (NeedComma)
832 OS << ',';
833 OS << " cfi-type " << CFIType;
834 NeedComma = true;
835 }
836
837 if (auto Num = MI.peekDebugInstrNum()) {
838 if (NeedComma)
839 OS << ',';
840 OS << " debug-instr-number " << Num;
841 NeedComma = true;
842 }
843
844 if (PrintLocations) {
845 if (const DebugLoc &DL = MI.getDebugLoc()) {
846 if (NeedComma)
847 OS << ',';
848 OS << " debug-location ";
849 DL->printAsOperand(OS, MST);
850 }
851 }
852
853 if (!MI.memoperands_empty()) {
854 OS << " :: ";
855 const LLVMContext &Context = MF->getFunction().getContext();
856 const MachineFrameInfo &MFI = MF->getFrameInfo();
857 bool NeedComma = false;
858 for (const auto *Op : MI.memoperands()) {
859 if (NeedComma)
860 OS << ", ";
861 Op->print(OS, MST, SSNs, Context, &MFI, TII);
862 NeedComma = true;
863 }
864 }
865}
866
868 auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
869 assert(ObjectInfo != StackObjectOperandMapping.end() &&
870 "Invalid frame index");
871 const FrameIndexOperand &Operand = ObjectInfo->second;
872 MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
873 Operand.Name);
874}
875
876static std::string formatOperandComment(std::string Comment) {
877 if (Comment.empty())
878 return Comment;
879 return std::string(" /* " + Comment + " */");
880}
881
882void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
883 const TargetRegisterInfo *TRI,
884 const TargetInstrInfo *TII,
885 bool ShouldPrintRegisterTies, LLT TypeToPrint,
886 bool PrintDef) {
887 const MachineOperand &Op = MI.getOperand(OpIdx);
888 std::string MOComment = TII->createMIROperandComment(MI, Op, OpIdx, TRI);
889
890 switch (Op.getType()) {
892 if (MI.isOperandSubregIdx(OpIdx)) {
894 MachineOperand::printSubRegIdx(OS, Op.getImm(), TRI);
895 break;
896 }
897 [[fallthrough]];
916 unsigned TiedOperandIdx = 0;
917 if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
918 TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
919 const TargetIntrinsicInfo *TII = MI.getMF()->getTarget().getIntrinsicInfo();
920 Op.print(OS, MST, TypeToPrint, OpIdx, PrintDef, /*IsStandalone=*/false,
921 ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
922 OS << formatOperandComment(MOComment);
923 break;
924 }
926 printStackObjectReference(Op.getIndex());
927 break;
929 auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
930 if (RegMaskInfo != RegisterMaskIds.end())
931 OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
932 else
933 printCustomRegMask(Op.getRegMask(), OS, TRI);
934 break;
935 }
936 }
937}
938
940 ModuleSlotTracker &MST) {
941 if (isa<GlobalValue>(V)) {
942 V.printAsOperand(OS, /*PrintType=*/false, MST);
943 return;
944 }
945 if (isa<Constant>(V)) {
946 // Machine memory operands can load/store to/from constant value pointers.
947 OS << '`';
948 V.printAsOperand(OS, /*PrintType=*/true, MST);
949 OS << '`';
950 return;
951 }
952 OS << "%ir.";
953 if (V.hasName()) {
955 return;
956 }
957 int Slot = MST.getCurrentFunction() ? MST.getLocalSlot(&V) : -1;
959}
960
961void llvm::printMIR(raw_ostream &OS, const Module &M) {
962 yaml::Output Out(OS);
963 Out << const_cast<Module &>(M);
964}
965
968 Printer.print(MF);
969}
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This file defines the DenseMap class.
expand large fp convert
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
This file contains an interface for creating legacy passes to print out IR in various granularities.
A common definition of LaneBitmask for use in TableGen and CodeGen.
Implement a low-level type suitable for MachineInstr level instruction selection.
#define I(x, y, z)
Definition: MD5.cpp:58
static std::string formatOperandComment(std::string Comment)
Definition: MIRPrinter.cpp:876
static void printRegMIR(unsigned Reg, yaml::StringValue &Dest, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:183
static cl::opt< bool > PrintLocations("mir-debug-loc", cl::Hidden, cl::init(true), cl::desc("Print MIR debug-locations"))
static void printStackObjectDbgInfo(const MachineFunction::VariableDbgInfo &DebugVar, T &Object, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:289
static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:261
static cl::opt< bool > SimplifyMIR("simplify-mir", cl::Hidden, cl::desc("Leave out unnecessary information when printing MIR"))
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
unsigned const TargetRegisterInfo * TRI
Memory true print Memory SSA Printer
Definition: MemorySSA.cpp:78
static bool isReg(const MCInst &MI, unsigned OpNo)
Module.h This file contains the declarations for the Module class.
LLVMContext & Context
Module * Mod
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file contains some templates that are useful if you are working with the STL at all.
This file implements the SmallBitVector class.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
uint32_t getNumerator() const
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
This is an important base class in LLVM.
Definition: Constant.h:41
A debug info location.
Definition: DebugLoc.h:33
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:150
iterator end()
Definition: DenseMap.h:84
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:207
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function.
Definition: Function.cpp:315
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:652
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
Metadata node.
Definition: Metadata.h:943
This class prints out the machine instructions using the MIR serialization format.
Definition: MIRPrinter.cpp:135
void print(const MachineBasicBlock &MBB)
Definition: MIRPrinter.cpp:660
MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST, const DenseMap< const uint32_t *, unsigned > &RegisterMaskIds, const DenseMap< int, FrameIndexOperand > &StackObjectOperandMapping)
Definition: MIRPrinter.cpp:147
void printStackObjectReference(int FrameIndex)
Definition: MIRPrinter.cpp:867
static void printIRValue(raw_ostream &OS, const Value &V, ModuleSlotTracker &MST)
Helper functions to print IR value as MIR serialization format which will be useful for target specif...
Definition: MIRPrinter.cpp:939
This class prints out the machine functions using the MIR serialization format.
Definition: MIRPrinter.cpp:100
void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:303
void convertCallSiteObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:509
void print(const MachineFunction &MF)
Definition: MIRPrinter.cpp:189
void convertMachineMetadataNodes(yaml::MachineFunction &YMF, const MachineFunction &MF, MachineModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:543
MIRPrinter(raw_ostream &OS)
Definition: MIRPrinter.cpp:108
void convertStackObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:375
instr_iterator instr_begin()
BranchProbability getSuccProbability(const_succ_iterator Succ) const
Return probability of the edge from this block to MBB.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
@ PrintNameIr
Add IR name where available.
@ PrintNameAttributes
Print attributes.
void printAsOperand(raw_ostream &OS, bool PrintType=true) const
unsigned succ_size() const
iterator_range< livein_iterator > liveins_dbg() const
bool hasSuccessorProbabilities() const
Return true if any of the successors have probabilities attached to them.
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
instr_iterator instr_end()
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
void printName(raw_ostream &os, unsigned printNameFlags=PrintNameIr, ModuleSlotTracker *moduleSlotTracker=nullptr) const
Print the basic block's name as:
This class is a data container for one entry in a MachineConstantPool.
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
bool hasCalls() const
Return true if the current function has any function calls.
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
MachineBasicBlock * getRestorePoint() const
bool isImmutableObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an immutable object.
int getStackProtectorIndex() const
Return the index for the stack protector object.
bool hasTailCall() const
Returns true if the function contains a tail call.
bool hasMustTailInVarArgFunc() const
Returns true if the function is variadic and contains a musttail call.
int getOffsetAdjustment() const
Return the correction for frame offsets.
Align getObjectAlign(int ObjectIdx) const
Return the alignment of the specified stack object.
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
bool isMaxCallFrameSizeComputed() const
int64_t getLocalFrameSize() const
Get the size of the local object blob.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool hasVAStart() const
Returns true if the function calls the llvm.va_start intrinsic.
unsigned getCVBytesOfCalleeSavedRegisters() const
Returns how many bytes of callee-saved registers the target pushed in the prologue.
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
bool hasStackProtectorIndex() const
uint8_t getStackID(int ObjectIdx) const
unsigned getNumFixedObjects() const
Return the number of fixed objects.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
bool hasFunctionContextIndex() const
int getObjectIndexBegin() const
Return the minimum frame object index.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
MachineBasicBlock * getSavePoint() const
int getFunctionContextIndex() const
Return the index for the function context object.
bool isAliasedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an object that might be pointed to by an LLVM IR v...
bool hasProperty(Property P) const
bool useDebugInstrRef() const
Returns true if the function's variable locations are tracked with instruction referencing.
SmallVector< DebugSubstitution, 8 > DebugValueSubstitutions
Debug value substitutions: a collection of DebugSubstitution objects, recording changes in where a va...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
bool callsUnwindInit() const
const CallSiteInfoMap & getCallSitesInfo() const
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Align getAlignment() const
getAlignment - Return the alignment of the function.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
VariableDbgInfoMapTy & getVariableDbgInfo()
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
const MachineFunctionProperties & getProperties() const
Get the function properties.
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
Representation of each machine instruction.
Definition: MachineInstr.h:68
JTEntryKind getEntryKind() const
const std::vector< MachineJumpTableEntry > & getJumpTables() const
void collectMachineMDNodes(MachineMDNodeListType &L) const
MachineOperand class - Representation of each machine instruction operand.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
static void printIRSlotNumber(raw_ostream &OS, int Slot)
Print an IRSlotNumber.
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
@ MO_CFIIndex
MCCFIInstruction index.
@ MO_Immediate
Immediate operand.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
@ MO_MCSymbol
MCSymbol reference (for debug/eh info)
@ MO_Predicate
Generic predicate for ISel.
@ MO_GlobalAddress
Address of a global value.
@ MO_RegisterMask
Mask of preserved registers.
@ MO_ShuffleMask
Other IR Constant for ISel (shuffle masks)
@ MO_CImmediate
Immediate >64bit operand.
@ MO_BlockAddress
Address of a basic block.
@ MO_DbgInstrRef
Integer indices referring to an instruction+operand.
@ MO_MachineBasicBlock
MachineBasicBlock reference.
@ MO_FrameIndex
Abstract Stack Frame Index.
@ MO_Register
Register operand.
@ MO_ExternalSymbol
Name of external global symbol.
@ MO_IntrinsicID
Intrinsic ID for ISel.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
@ MO_TargetIndex
Target-dependent index+offset operand.
@ MO_Metadata
Metadata reference (for debug info)
@ MO_FPImmediate
Floating-point immediate operand.
@ MO_RegisterLiveOut
Mask of live-out registers.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Register getSimpleHint(Register VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint.
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
bool isUpdatedCSRsInitialized() const
Returns true if the updated CSR list was initialized and false otherwise.
ArrayRef< std::pair< MCRegister, Register > > liveins() const
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
StringRef getVRegName(Register Reg) const
Manage lifetime of a slot tracker for printing IR.
std::vector< std::pair< unsigned, const MDNode * > > MachineMDNodeListType
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:884
const Function * getCurrentFunction() const
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:870
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
void print(raw_ostream &OS, AssemblyAnnotationWriter *AAW, bool ShouldPreserveUseListOrder=false, bool IsForDebug=false) const
Print the module to an output stream with an optional AssemblyAnnotationWriter.
Definition: AsmWriter.cpp:4612
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:84
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:365
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:450
size_t size() const
Definition: SmallVector.h:91
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
void reserve(size_type N)
Definition: SmallVector.h:667
void push_back(const T &Elt)
Definition: SmallVector.h:416
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::string lower() const
Definition: StringRef.cpp:111
TargetInstrInfo - Interface to description of machine instruction set.
TargetIntrinsicInfo - Interface to description of machine instruction set.
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:78
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
LLVM Value Representation.
Definition: Value.h:74
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:4695
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:4778
bool hasName() const
Definition: Value.h:261
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:308
Iterator for intrusive lists based on ilist_node.
self_iterator getIterator()
Definition: ilist_node.h:82
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:642
std::string & str()
Returns the string's reference.
Definition: raw_ostream.h:660
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:445
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:92
void printMIR(raw_ostream &OS, const Module &M)
Print LLVM IR using the MIR serialization format to the given output stream.
Definition: MIRPrinter.cpp:961
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:604
void sort(IteratorTy Start, IteratorTy End)
Definition: STLExtras.h:1683
Printable printRegClassOrBank(Register Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1869
void printLLVMNameWithoutPrefix(raw_ostream &OS, StringRef Name)
Print out a name of an LLVM value without any prefixes.
Definition: AsmWriter.cpp:354
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
static void output(const Module &Mod, void *Ctxt, raw_ostream &OS)
Definition: MIRPrinter.cpp:170
static StringRef input(StringRef Str, void *Ctxt, Module &Mod)
Definition: MIRPrinter.cpp:174
Identifies call instruction location in machine function.
Serializable representation of CallSiteInfo.
std::vector< ArgRegPair > ArgForwardingRegs
MachineInstrLoc CallLocation
Serializable representation of the fixed stack object from the MachineFrameInfo class.
Serializable representation of MachineFrameInfo.
unsigned MaxCallFrameSize
~0u means: not computed yet.
std::vector< MachineStackObject > StackObjects
std::vector< StringValue > MachineMetadataNodes
std::optional< std::vector< FlowStringValue > > CalleeSavedRegisters
std::vector< MachineConstantPoolValue > Constants
std::vector< CallSiteInfo > CallSitesInfo
std::vector< MachineFunctionLiveIn > LiveIns
std::vector< VirtualRegisterDefinition > VirtualRegisters
std::vector< FixedMachineStackObject > FixedStackObjects
std::vector< DebugValueSubstitution > DebugValueSubstitutions
std::unique_ptr< MachineFunctionInfo > MachineFuncInfo
Constant pool.
MachineJumpTable JumpTableInfo
std::vector< Entry > Entries
MachineJumpTableInfo::JTEntryKind Kind
Serializable representation of stack object from the MachineFrameInfo class.
TargetStackID::Value StackID
A wrapper around std::string which contains a source range that's being set during parsing.