LLVM 17.0.0git
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#include "RISCVInstrInfo.h"
#include "MCTargetDesc/RISCVMatInt.h"
#include "RISCV.h"
#include "RISCVMachineFunctionInfo.h"
#include "RISCVSubtarget.h"
#include "RISCVTargetMachine.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineCombinerPattern.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/MC/MCInstBuilder.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/ErrorHandling.h"
#include "RISCVGenCompressInstEmitter.inc"
#include "RISCVGenInstrInfo.inc"
#include "RISCVGenSearchableTables.inc"
Go to the source code of this file.
Namespaces | |
namespace | llvm |
This is an optimization pass for GlobalISel generic memory operations. | |
namespace | llvm::RISCVVPseudosTable |
Enumerations | |
enum | MachineOutlinerConstructionID { MachineOutlinerDefault } |
Variables | |
static cl::opt< bool > | PreferWholeRegisterMove ("riscv-prefer-whole-register-move", cl::init(false), cl::Hidden, cl::desc("Prefer whole register move for vector registers.")) |
#define CASE_OPERAND_UIMM | ( | NUM | ) |
#define CASE_VFMA_CHANGE_OPCODE_COMMON | ( | OLDOP, | |
NEWOP, | |||
TYPE, | |||
LMUL | |||
) |
Definition at line 2202 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_CHANGE_OPCODE_LMULS | ( | OLDOP, | |
NEWOP, | |||
TYPE | |||
) |
Definition at line 2221 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_CHANGE_OPCODE_LMULS_M1 | ( | OLDOP, | |
NEWOP, | |||
TYPE | |||
) |
Definition at line 2207 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_CHANGE_OPCODE_LMULS_MF2 | ( | OLDOP, | |
NEWOP, | |||
TYPE | |||
) |
Definition at line 2213 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_CHANGE_OPCODE_LMULS_MF4 | ( | OLDOP, | |
NEWOP, | |||
TYPE | |||
) |
Definition at line 2217 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_CHANGE_OPCODE_SPLATS | ( | OLDOP, | |
NEWOP | |||
) |
Definition at line 2225 of file RISCVInstrInfo.cpp.
Definition at line 2058 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_OPCODE_LMULS | ( | OP, | |
TYPE | |||
) |
Definition at line 2075 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_OPCODE_LMULS_M1 | ( | OP, | |
TYPE | |||
) |
Definition at line 2061 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_OPCODE_LMULS_MF2 | ( | OP, | |
TYPE | |||
) |
Definition at line 2067 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_OPCODE_LMULS_MF4 | ( | OP, | |
TYPE | |||
) |
Definition at line 2071 of file RISCVInstrInfo.cpp.
#define CASE_VFMA_SPLATS | ( | OP | ) |
Definition at line 2079 of file RISCVInstrInfo.cpp.
#define CASE_WIDEOP_CHANGE_OPCODE_COMMON | ( | OP, | |
LMUL | |||
) |
#define CASE_WIDEOP_CHANGE_OPCODE_LMULS | ( | OP | ) |
Definition at line 2371 of file RISCVInstrInfo.cpp.
#define CASE_WIDEOP_CHANGE_OPCODE_LMULS_MF4 | ( | OP | ) |
Definition at line 2364 of file RISCVInstrInfo.cpp.
Definition at line 2344 of file RISCVInstrInfo.cpp.
#define CASE_WIDEOP_OPCODE_LMULS | ( | OP | ) |
Definition at line 2354 of file RISCVInstrInfo.cpp.
#define CASE_WIDEOP_OPCODE_LMULS_MF4 | ( | OP | ) |
Definition at line 2347 of file RISCVInstrInfo.cpp.
#define GEN_CHECK_COMPRESS_INSTR |
Definition at line 36 of file RISCVInstrInfo.cpp.
#define GET_INSTRINFO_CTOR_DTOR |
Definition at line 39 of file RISCVInstrInfo.cpp.
#define GET_INSTRINFO_NAMED_OPS |
Definition at line 40 of file RISCVInstrInfo.cpp.
#define GET_RISCVVPseudosTable_IMPL |
Definition at line 51 of file RISCVInstrInfo.cpp.
Enumerator | |
---|---|
MachineOutlinerDefault |
Definition at line 1859 of file RISCVInstrInfo.cpp.
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static |
Definition at line 1431 of file RISCVInstrInfo.cpp.
References llvm::MachineInstr::FmContract, llvm::MachineInstr::getFlag(), llvm::MachineInstr::getMF(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::RISCV::hasEqualFRM(), isFMUL(), llvm::MachineOperand::isReg(), llvm::Register::isVirtual(), MI, and MRI.
Referenced by getFPFusedMultiplyPatterns().
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Identify instructions that can be folded into a CCMOV instruction, and return the defining instruction.
Definition at line 1068 of file RISCVInstrInfo.cpp.
References getPredicatedOpcode(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isCPI(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isJTI(), llvm::Register::isPhysical(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isTied(), MI, and MRI.
Referenced by llvm::RISCVInstrInfo::optimizeSelect().
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Definition at line 1535 of file RISCVInstrInfo.cpp.
References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), getAddendOperandIdx(), llvm::MachineInstr::getDebugLoc(), llvm::MachineInstr::getFlags(), getFPFusedMultiplyOpcode(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::getKillRegState(), llvm::DILocation::getMergedLocation(), llvm::MachineInstr::getMF(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isKill(), MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::MachineOperand::setIsKill(), llvm::MachineInstrBuilder::setMIFlags(), and TII.
Referenced by llvm::RISCVInstrInfo::genAlternativeCodeSequence().
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Definition at line 120 of file RISCVInstrInfo.cpp.
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Definition at line 1522 of file RISCVInstrInfo.cpp.
References llvm::FMADD_AX, llvm::FMADD_XA, llvm::FMSUB, llvm::FNMSUB, and llvm_unreachable.
Referenced by combineFPFusedMultiply().
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Definition at line 732 of file RISCVInstrInfo.cpp.
References llvm::RISCVCC::COND_EQ, llvm::RISCVCC::COND_GE, llvm::RISCVCC::COND_GEU, llvm::RISCVCC::COND_INVALID, llvm::RISCVCC::COND_LT, llvm::RISCVCC::COND_LTU, and llvm::RISCVCC::COND_NE.
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Definition at line 1499 of file RISCVInstrInfo.cpp.
References llvm::FMSUB, and llvm_unreachable.
Referenced by combineFPFusedMultiply().
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Definition at line 1459 of file RISCVInstrInfo.cpp.
References canCombineFPFusedMultiply(), llvm::FMADD_AX, llvm::FMADD_XA, llvm::FMSUB, llvm::FNMSUB, llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), isFADD(), isFSUB(), and llvm::SmallVectorTemplateBase< T, bool >::push_back().
Referenced by getFPPatterns().
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Definition at line 1482 of file RISCVInstrInfo.cpp.
References getFPFusedMultiplyPatterns().
Referenced by llvm::RISCVInstrInfo::getMachineCombinerPatterns().
Definition at line 1051 of file RISCVInstrInfo.cpp.
Referenced by canFoldAsPredicatedOp(), and llvm::RISCVInstrInfo::optimizeSelect().
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Definition at line 125 of file RISCVInstrInfo.cpp.
References assert(), llvm::MachineBasicBlock::begin(), llvm::RISCVSubtarget::getRegisterInfo(), llvm::RISCVVType::getSEW(), llvm::RISCVVType::getVLMUL(), llvm::RISCVII::hasSEWOp(), llvm::RISCVII::hasVLOp(), llvm::RISCVII::isRVVWideningReduction(), llvm::RISCVVType::isTailAgnostic(), MBB, MBBI, PreferWholeRegisterMove, TRI, and TSFlags.
Referenced by llvm::RISCVInstrInfo::copyPhysReg().
Definition at line 1299 of file RISCVInstrInfo.cpp.
Referenced by getFPFusedMultiplyPatterns(), and llvm::RISCVInstrInfo::isAssociativeAndCommutative().
Definition at line 1321 of file RISCVInstrInfo.cpp.
Referenced by canCombineFPFusedMultiply(), and llvm::RISCVInstrInfo::isAssociativeAndCommutative().
Definition at line 1310 of file RISCVInstrInfo.cpp.
Referenced by getFPFusedMultiplyPatterns().
Definition at line 2778 of file RISCVInstrInfo.cpp.
Referenced by llvm::RISCV::isRVVSpill().
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Definition at line 754 of file RISCVInstrInfo.cpp.
References assert(), CC, Cond, llvm::MachineOperand::CreateImm(), getCondFromBranchOpc(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MCInstrDesc::isConditionalBranch().
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Referenced by isConvertibleToVMV_V_V().